[Clang][LoongArch] Add GPR alias handling without $ prefix

Currenlty there is a mismatch between LoongArch gcc and clang about
handling register name in inlineasm, i.e. gcc allows both `$`-prefixed
and non-prefiexed names for GPRs while clang only allows `$`-prefixed
one. This patch fixes this mismatch by adding non-prefixed GPR names
in clang.

Take `$r4` for example. With this patch, clang accepts `$r4`, `r4`,
`$a0` and `a0` like what gcc does.

Reviewed By: xen0n

Differential Revision: https://reviews.llvm.org/D136436

clang/lib/Basic/Targets/LoongArch.cpp

@@ -40,27 +40,70 @@ ArrayRef<const char *> LoongArchTargetInfo::getGCCRegNames() const {
 ArrayRef<TargetInfo::GCCRegAlias>
 LoongArchTargetInfo::getGCCRegAliases() const {
   static const TargetInfo::GCCRegAlias GCCRegAliases[] = {
-      {{"$zero"}, "$r0"},       {{"$ra"}, "$r1"},    {{"$tp"}, "$r2"},
-      {{"$sp"}, "$r3"},         {{"$a0"}, "$r4"},    {{"$a1"}, "$r5"},
-      {{"$a2"}, "$r6"},         {{"$a3"}, "$r7"},    {{"$a4"}, "$r8"},
-      {{"$a5"}, "$r9"},         {{"$a6"}, "$r10"},   {{"$a7"}, "$r11"},
-      {{"$t0"}, "$r12"},        {{"$t1"}, "$r13"},   {{"$t2"}, "$r14"},
-      {{"$t3"}, "$r15"},        {{"$t4"}, "$r16"},   {{"$t5"}, "$r17"},
-      {{"$t6"}, "$r18"},        {{"$t7"}, "$r19"},   {{"$t8"}, "$r20"},
-      {{"$fp", "$s9"}, "$r22"}, {{"$s0"}, "$r23"},   {{"$s1"}, "$r24"},
-      {{"$s2"}, "$r25"},        {{"$s3"}, "$r26"},   {{"$s4"}, "$r27"},
-      {{"$s5"}, "$r28"},        {{"$s6"}, "$r29"},   {{"$s7"}, "$r30"},
-      {{"$s8"}, "$r31"},        {{"$fa0"}, "$f0"},   {{"$fa1"}, "$f1"},
-      {{"$fa2"}, "$f2"},        {{"$fa3"}, "$f3"},   {{"$fa4"}, "$f4"},
-      {{"$fa5"}, "$f5"},        {{"$fa6"}, "$f6"},   {{"$fa7"}, "$f7"},
-      {{"$ft0"}, "$f8"},        {{"$ft1"}, "$f9"},   {{"$ft2"}, "$f10"},
-      {{"$ft3"}, "$f11"},       {{"$ft4"}, "$f12"},  {{"$ft5"}, "$f13"},
-      {{"$ft6"}, "$f14"},       {{"$ft7"}, "$f15"},  {{"$ft8"}, "$f16"},
-      {{"$ft9"}, "$f17"},       {{"$ft10"}, "$f18"}, {{"$ft11"}, "$f19"},
-      {{"$ft12"}, "$f20"},      {{"$ft13"}, "$f21"}, {{"$ft14"}, "$f22"},
-      {{"$ft15"}, "$f23"},      {{"$fs0"}, "$f24"},  {{"$fs1"}, "$f25"},
-      {{"$fs2"}, "$f26"},       {{"$fs3"}, "$f27"},  {{"$fs4"}, "$f28"},
-      {{"$fs5"}, "$f29"},       {{"$fs6"}, "$f30"},  {{"$fs7"}, "$f31"},
+      {{"zero", "$zero", "r0"}, "$r0"},
+      {{"ra", "$ra", "r1"}, "$r1"},
+      {{"tp", "$tp", "r2"}, "$r2"},
+      {{"sp", "$sp", "r3"}, "$r3"},
+      {{"a0", "$a0", "r4"}, "$r4"},
+      {{"a1", "$a1", "r5"}, "$r5"},
+      {{"a2", "$a2", "r6"}, "$r6"},
+      {{"a3", "$a3", "r7"}, "$r7"},
+      {{"a4", "$a4", "r8"}, "$r8"},
+      {{"a5", "$a5", "r9"}, "$r9"},
+      {{"a6", "$a6", "r10"}, "$r10"},
+      {{"a7", "$a7", "r11"}, "$r11"},
+      {{"t0", "$t0", "r12"}, "$r12"},
+      {{"t1", "$t1", "r13"}, "$r13"},
+      {{"t2", "$t2", "r14"}, "$r14"},
+      {{"t3", "$t3", "r15"}, "$r15"},
+      {{"t4", "$t4", "r16"}, "$r16"},
+      {{"t5", "$t5", "r17"}, "$r17"},
+      {{"t6", "$t6", "r18"}, "$r18"},
+      {{"t7", "$t7", "r19"}, "$r19"},
+      {{"t8", "$t8", "r20"}, "$r20"},
+      {{"r21"}, "$r21"},
+      {{"s9", "$s9", "r22", "fp", "$fp"}, "$r22"},
+      {{"s0", "$s0", "r23"}, "$r23"},
+      {{"s1", "$s1", "r24"}, "$r24"},
+      {{"s2", "$s2", "r25"}, "$r25"},
+      {{"s3", "$s3", "r26"}, "$r26"},
+      {{"s4", "$s4", "r27"}, "$r27"},
+      {{"s5", "$s5", "r28"}, "$r28"},
+      {{"s6", "$s6", "r29"}, "$r29"},
+      {{"s7", "$s7", "r30"}, "$r30"},
+      {{"s8", "$s8", "r31"}, "$r31"},
+      {{"$fa0"}, "$f0"},
+      {{"$fa1"}, "$f1"},
+      {{"$fa2"}, "$f2"},
+      {{"$fa3"}, "$f3"},
+      {{"$fa4"}, "$f4"},
+      {{"$fa5"}, "$f5"},
+      {{"$fa6"}, "$f6"},
+      {{"$fa7"}, "$f7"},
+      {{"$ft0"}, "$f8"},
+      {{"$ft1"}, "$f9"},
+      {{"$ft2"}, "$f10"},
+      {{"$ft3"}, "$f11"},
+      {{"$ft4"}, "$f12"},
+      {{"$ft5"}, "$f13"},
+      {{"$ft6"}, "$f14"},
+      {{"$ft7"}, "$f15"},
+      {{"$ft8"}, "$f16"},
+      {{"$ft9"}, "$f17"},
+      {{"$ft10"}, "$f18"},
+      {{"$ft11"}, "$f19"},
+      {{"$ft12"}, "$f20"},
+      {{"$ft13"}, "$f21"},
+      {{"$ft14"}, "$f22"},
+      {{"$ft15"}, "$f23"},
+      {{"$fs0"}, "$f24"},
+      {{"$fs1"}, "$f25"},
+      {{"$fs2"}, "$f26"},
+      {{"$fs3"}, "$f27"},
+      {{"$fs4"}, "$f28"},
+      {{"$fs5"}, "$f29"},
+      {{"$fs6"}, "$f30"},
+      {{"$fs7"}, "$f31"},
   };
   return llvm::ArrayRef(GCCRegAliases);
 }

clang/test/CodeGen/LoongArch/inline-asm-gcc-regs-error.c

@@ -11,10 +11,6 @@ void test(void) {
 
 /// Names not prefixed with '$' are invalid.
 
-// CHECK: :[[#@LINE+1]]:24: error: unknown register name 'r4' in asm
-  register int a3 asm ("r4");
-// CHECK: :[[#@LINE+1]]:24: error: unknown register name 'a0' in asm
-  register int a4 asm ("a0");
 // CHECK: :[[#@LINE+1]]:26: error: unknown register name 'f0' in asm
   register float a5 asm ("f0");
 // CHECK: :[[#@LINE+1]]:26: error: unknown register name 'fa0' in asm

clang/test/CodeGen/LoongArch/inline-asm-gcc-regs.c

@@ -7,56 +7,72 @@
 // CHECK: call void asm sideeffect "", "{$r0}"(i32 undef)
 void test_r0() {
     register int a asm ("$r0");
+    register int b asm ("r0");
     asm ("" :: "r" (a));
+    asm ("" :: "r" (b));
 }
 
 // CHECK-LABEL: @test_r12
 // CHECK: call void asm sideeffect "", "{$r12}"(i32 undef)
 void test_r12() {
     register int a asm ("$r12");
+    register int b asm ("r12");
     asm ("" :: "r" (a));
+    asm ("" :: "r" (b));
 }
 
 // CHECK-LABEL: @test_r31
 // CHECK: call void asm sideeffect "", "{$r31}"(i32 undef)
 void test_r31() {
     register int a asm ("$r31");
+    register int b asm ("r31");
     asm ("" :: "r" (a));
+    asm ("" :: "r" (b));
 }
 
 // CHECK-LABEL: @test_zero
 // CHECK: call void asm sideeffect "", "{$r0}"(i32 undef)
 void test_zero() {
     register int a asm ("$zero");
+    register int b asm ("zero");
     asm ("" :: "r" (a));
+    asm ("" :: "r" (b));
 }
 
 // CHECK-LABEL: @test_a0
 // CHECK: call void asm sideeffect "", "{$r4}"(i32 undef)
 void test_a0() {
     register int a asm ("$a0");
+    register int b asm ("a0");
     asm ("" :: "r" (a));
+    asm ("" :: "r" (b));
 }
 
 // CHECK-LABEL: @test_t1
 // CHECK: call void asm sideeffect "", "{$r13}"(i32 undef)
 void test_t1() {
     register int a asm ("$t1");
+    register int b asm ("t1");
     asm ("" :: "r" (a));
+    asm ("" :: "r" (b));
 }
 
 // CHECK-LABEL: @test_fp
 // CHECK: call void asm sideeffect "", "{$r22}"(i32 undef)
 void test_fp() {
     register int a asm ("$fp");
+    register int b asm ("fp");
     asm ("" :: "r" (a));
+    asm ("" :: "r" (b));
 }
 
 // CHECK-LABEL: @test_s2
 // CHECK: call void asm sideeffect "", "{$r25}"(i32 undef)
 void test_s2() {
     register int a asm ("$s2");
+    register int b asm ("s2");
     asm ("" :: "r" (a));
+    asm ("" :: "r" (b));
 }
 
 // CHECK-LABEL: @test_f0