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[mlir][openacc] Add ReturnLike trait to acc.yield operation

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Just add the trait as acc.yield is a return like op.

Reviewed By: razvanlupusoru, jeanPerier

Differential Revision: https://reviews.llvm.org/D150617
This commit is contained in:
Valentin Clement
2023-05-16 08:43:17 -07:00
parent 33da608ecc
commit 0c4d7d14e9
2 changed files with 3 additions and 1 deletions
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1
mlir/include/mlir/Dialect/OpenACC/OpenACC.h
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@@ -20,6 +20,7 @@
#include "mlir/Dialect/OpenACC/OpenACCOpsDialect.h.inc"
#include "mlir/Dialect/OpenACC/OpenACCOpsEnums.h.inc"
#include "mlir/Dialect/OpenACC/OpenACCTypeInterfaces.h.inc"
#include "mlir/Interfaces/ControlFlowInterfaces.h"
#include "mlir/Interfaces/SideEffectInterfaces.h"
#define GET_TYPEDEF_CLASSES

3
mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td
View File

@@ -13,6 +13,7 @@
#ifndef OPENACC_OPS
#define OPENACC_OPS
include "mlir/Interfaces/ControlFlowInterfaces.td"
include "mlir/Interfaces/SideEffectInterfaces.td"
include "mlir/IR/BuiltinTypes.td"
include "mlir/IR/EnumAttr.td"
@@ -859,7 +860,7 @@ def OpenACC_LoopOp : OpenACC_Op<"loop",
}
// Yield operation for the acc.loop and acc.parallel operations.
def OpenACC_YieldOp : OpenACC_Op<"yield", [Terminator,
def OpenACC_YieldOp : OpenACC_Op<"yield", [ReturnLike, Terminator,
ParentOneOf<["ParallelOp, LoopOp, SerialOp"]>]> {
let summary = "Acc yield and termination operation";