Fix more spelling mistakes in comments of LLVM Analysis passes
Patch by Reshabh Sharma! Differential Revision: https://reviews.llvm.org/D43939 llvm-svn: 326601
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@@ -1387,7 +1387,7 @@ Value *SCEVExpander::expandAddRecExprLiterally(const SCEVAddRecExpr *S) {
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// IVUsers tries to prevent this case, so it is rare. However, it can
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// happen when an IVUser outside the loop is not dominated by the latch
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// block. Adjusting IVIncInsertPos before expansion begins cannot handle
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// all cases. Consider a phi outide whose operand is replaced during
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// all cases. Consider a phi outside whose operand is replaced during
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// expansion with the value of the postinc user. Without fundamentally
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// changing the way postinc users are tracked, the only remedy is
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// inserting an extra IV increment. StepV might fold into PostLoopOffset,
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@@ -1407,7 +1407,7 @@ Value *SCEVExpander::expandAddRecExprLiterally(const SCEVAddRecExpr *S) {
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}
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// We have decided to reuse an induction variable of a dominating loop. Apply
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// truncation and/or invertion of the step.
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// truncation and/or inversion of the step.
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if (TruncTy) {
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Type *ResTy = Result->getType();
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// Normalize the result type.
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@@ -2209,7 +2209,7 @@ Value *SCEVExpander::generateOverflowCheck(const SCEVAddRecExpr *AR,
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// If the backedge taken count type is larger than the AR type,
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// check that we don't drop any bits by truncating it. If we are
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// droping bits, then we have overflow (unless the step is zero).
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// dropping bits, then we have overflow (unless the step is zero).
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if (SE.getTypeSizeInBits(CountTy) > SE.getTypeSizeInBits(Ty)) {
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auto MaxVal = APInt::getMaxValue(DstBits).zext(SrcBits);
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auto *BackedgeCheck =
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