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[RISCV] XFAIL SiFive Interrupt Test

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Sam Elliott
2025-04-28 13:00:43 -07:00
parent cd116ee29e
commit 31bd7a5071
1 changed files with 5 additions and 2 deletions
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7
llvm/test/CodeGen/RISCV/sifive-interrupt-attr.ll
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@@ -1,8 +1,11 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple riscv32-unknown-elf -mattr=+experimental-xsfmclic -o - %s \
; RUN: | FileCheck %s --check-prefix=RV32
; RUN: -verify-machineinstrs | FileCheck %s --check-prefix=RV32
; RUN: llc -mtriple riscv64-unknown-elf -mattr=+experimental-xsfmclic -o - %s \
; RUN: | FileCheck %s --check-prefix=RV64
; RUN: -verify-machineinstrs | FileCheck %s --check-prefix=RV64
;; These are failing to verify.
; XFAIL: *
; Test Handling of the SiFive-CLIC interrupt attributes.
;