Improve instruction emulation based stack unwinding on ARM

* Add and fix the emulation of several instruction.
* Disable frame pointer usage on Android.
* Specify return address register for the unwind plan instead of explict
  tracking the value of RA.
* Replace prologue detection heuristics (unreliable in several cases)
  with a logic to follow the branch instructions and restore the CFI
  value based on them. The target address for a branch should have the
  same CFI as the source address (if they are in the same function).
* Handle symbols in ELF files where the symbol size is not specified
  with calcualting their size based on the next symbol (already done
  in MachO files).
* Fix architecture in FuncUnwinders with filling up the inforamtion
  missing from the object file with the architecture of the target.
* Add code to read register wehn the value is set to "IsSame" as it
  meanse the value of a register in the parent frame is the same as the
  value in the current frame.

Differential revision: http://reviews.llvm.org/D10447

llvm-svn: 240533
This commit is contained in:
Tamas Berghammer
2015-06-24 11:27:32 +00:00
parent 1d2353d4f3
commit 44ff9ccede
10 changed files with 295 additions and 326 deletions

View File

@@ -2020,11 +2020,12 @@ ObjectFileELF::ParseSymbols (Symtab *symtab,
symbol_section_sp, // Section in which this symbol is defined or null.
symbol_value, // Offset in section or symbol value.
symbol.st_size), // Size in bytes of this symbol.
true, // Size is valid
has_suffix, // Contains linker annotations?
flags); // Symbol flags.
symbol.st_size != 0, // Size is valid if it is not 0
has_suffix, // Contains linker annotations?
flags); // Symbol flags.
symtab->AddSymbol(dc_symbol);
}
symtab->CalculateSymbolSizes();
return i;
}