caio/clang-p2996
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

[RISCV] Implement Feature Bits for B, E, H (#143436)

Browse Source 
As defined in riscv-non-isa/riscv-c-api-doc#109.
This commit is contained in:
Sam Elliott
2025-06-09 15:01:18 -07:00
committed by GitHub
parent 49049131bb
commit 6f6dc9c8ba
2 changed files with 12 additions and 4 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
compiler-rt/lib/builtins/cpu_model/riscv.c
View File

@@ -24,12 +24,18 @@ struct {
// TODO: Maybe generate a header from tablegen then include it.
#define A_GROUPID 0
#define A_BITMASK (1ULL << 0)
#define B_GROUPID 0
#define B_BITMASK (1ULL << 1)
#define C_GROUPID 0
#define C_BITMASK (1ULL << 2)
#define D_GROUPID 0
#define D_BITMASK (1ULL << 3)
#define E_GROUPID 0
#define E_BITMASK (1ULL << 4)
#define F_GROUPID 0
#define F_BITMASK (1ULL << 5)
#define H_GROUPID 0
#define H_BITMASK (1ULL << 7)
#define I_GROUPID 0
#define I_BITMASK (1ULL << 8)
#define M_GROUPID 0

10
llvm/lib/Target/RISCV/RISCVFeatures.td
View File

@@ -75,7 +75,8 @@ def FeatureStdExtI
RISCVExtensionBitmask<0, 8>;
def FeatureStdExtE
: RISCVExtension<2, 0, "Embedded Instruction Set with 16 GPRs">;
: RISCVExtension<2, 0, "Embedded Instruction Set with 16 GPRs">,
RISCVExtensionBitmask<0, 4>;
def FeatureStdExtZic64b
: RISCVExtension<1, 0, "Cache Block Size Is 64 Bytes">;
@@ -510,7 +511,8 @@ def HasStdExtZbs : Predicate<"Subtarget->hasStdExtZbs()">,
def FeatureStdExtB
: RISCVExtension<1, 0, "the collection of the Zba, Zbb, Zbs extensions",
[FeatureStdExtZba, FeatureStdExtZbb, FeatureStdExtZbs]>;
[FeatureStdExtZba, FeatureStdExtZbb, FeatureStdExtZbs]>,
RISCVExtensionBitmask<0, 1>;
def FeatureStdExtZbkb
: RISCVExtension<1, 0, "Bitmanip instructions for Cryptography">,
@@ -887,8 +889,8 @@ def HasVInstructionsFullMultiply : Predicate<"Subtarget->hasVInstructionsFullMul
// Hypervisor Extensions
def FeatureStdExtH : RISCVExtension<1, 0, "Hypervisor">;
def FeatureStdExtH : RISCVExtension<1, 0, "Hypervisor">,
RISCVExtensionBitmask<0, 7>;
def HasStdExtH : Predicate<"Subtarget->hasStdExtH()">,
AssemblerPredicate<(all_of FeatureStdExtH),
"'H' (Hypervisor)">;