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[SCCP] Use range info to prove AddInst has NSW flag.

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This patch updates SCCP to use the value ranges of AddInst operands to
try to prove the AddInst does not overflow in the signed sense and
adds the NSW flag. The reasoning is done with
makeGuaranteedNoWrapRegion (thanks @nikic for point it out!).

Follow-ups will include extending this to more
OverflowingBinaryOperators.

Depends on D142387.

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D142390
This commit is contained in:
Florian Hahn
2023-01-27 14:09:25 +00:00
parent 977cddb95e
commit 72121a20cd
14 changed files with 72 additions and 63 deletions
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13
llvm/lib/Transforms/Utils/SCCPSolver.cpp
View File

@@ -142,16 +142,25 @@ static bool refineInstruction(SCCPSolver &Solver,
};
auto RangeA = GetRange(Inst.getOperand(0));
auto RangeB = GetRange(Inst.getOperand(1));
bool Changed = false;
if (!Inst.hasNoUnsignedWrap()) {
auto NUWRange = ConstantRange::makeGuaranteedNoWrapRegion(
Instruction::Add, RangeB, OverflowingBinaryOperator::NoUnsignedWrap);
if (NUWRange.contains(RangeA)) {
Inst.setHasNoUnsignedWrap();
return true;
Changed = true;
}
}
if (!Inst.hasNoSignedWrap()) {
auto NSWRange = ConstantRange::makeGuaranteedNoWrapRegion(
Instruction::Add, RangeA, OverflowingBinaryOperator::NoSignedWrap);
if (NSWRange.contains(RangeB)) {
Inst.setHasNoSignedWrap();
Changed = true;
}
}
return false;
return Changed;
}
/// Try to replace signed instructions with their unsigned equivalent.

22
llvm/test/Transforms/SCCP/add-nuw-nsw-flags.ll
View File

@@ -6,9 +6,9 @@ define i8 @range_from_lshr(i8 %a) {
; CHECK-NEXT: entry:
; CHECK-NEXT: [[A_SHR:%.*]] = lshr i8 [[A:%.*]], 1
; CHECK-NEXT: [[ADD_1:%.*]] = add nuw i8 [[A_SHR]], 1
; CHECK-NEXT: [[ADD_2:%.*]] = add nuw i8 [[A_SHR]], -128
; CHECK-NEXT: [[ADD_3:%.*]] = add i8 [[A_SHR]], -127
; CHECK-NEXT: [[ADD_4:%.*]] = add i8 [[A_SHR]], -1
; CHECK-NEXT: [[ADD_2:%.*]] = add nuw nsw i8 [[A_SHR]], -128
; CHECK-NEXT: [[ADD_3:%.*]] = add nsw i8 [[A_SHR]], -127
; CHECK-NEXT: [[ADD_4:%.*]] = add nsw i8 [[A_SHR]], -1
; CHECK-NEXT: [[RES_1:%.*]] = xor i8 [[ADD_1]], [[ADD_2]]
; CHECK-NEXT: [[RES_2:%.*]] = xor i8 [[RES_1]], [[ADD_3]]
; CHECK-NEXT: [[RES_3:%.*]] = xor i8 [[RES_2]], [[ADD_4]]
@@ -30,7 +30,7 @@ define i8 @a_and_15_add_1(i8 %a) {
; CHECK-LABEL: @a_and_15_add_1(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[A_AND:%.*]] = and i8 [[A:%.*]], 15
; CHECK-NEXT: [[ADD_1:%.*]] = add nuw i8 [[A_AND]], 1
; CHECK-NEXT: [[ADD_1:%.*]] = add nuw nsw i8 [[A_AND]], 1
; CHECK-NEXT: ret i8 [[ADD_1]]
;
entry:
@@ -73,10 +73,10 @@ define i8 @sge_0_and_sle_90(i8 %a) {
; CHECK-NEXT: [[AND:%.*]] = and i1 [[SGT]], [[SLT]]
; CHECK-NEXT: br i1 [[AND]], label [[THEN:%.*]], label [[ELSE:%.*]]
; CHECK: then:
; CHECK-NEXT: [[ADD_1:%.*]] = add nuw i8 [[A]], 1
; CHECK-NEXT: [[ADD_2:%.*]] = add i8 [[A]], -1
; CHECK-NEXT: [[ADD_3:%.*]] = add nuw i8 [[A]], -91
; CHECK-NEXT: [[ADD_4:%.*]] = add i8 [[A]], -90
; CHECK-NEXT: [[ADD_1:%.*]] = add nuw nsw i8 [[A]], 1
; CHECK-NEXT: [[ADD_2:%.*]] = add nsw i8 [[A]], -1
; CHECK-NEXT: [[ADD_3:%.*]] = add nuw nsw i8 [[A]], -91
; CHECK-NEXT: [[ADD_4:%.*]] = add nsw i8 [[A]], -90
; CHECK-NEXT: [[RES_1:%.*]] = xor i8 [[ADD_1]], [[ADD_2]]
; CHECK-NEXT: [[RES_2:%.*]] = xor i8 [[RES_1]], [[ADD_3]]
; CHECK-NEXT: [[RES_3:%.*]] = xor i8 [[RES_2]], [[ADD_4]]
@@ -133,9 +133,9 @@ define i16 @sge_with_sext_to_zext_conversion(i8 %a) {
; CHECK-NEXT: ret i16 [[RES_2]]
; CHECK: else:
; CHECK-NEXT: [[SEXT_2:%.*]] = sext i8 [[A]] to i16
; CHECK-NEXT: [[ADD_4:%.*]] = add i16 [[SEXT_2]], 1
; CHECK-NEXT: [[ADD_5:%.*]] = add i16 [[SEXT_2]], -128
; CHECK-NEXT: [[ADD_6:%.*]] = add i16 [[SEXT_2]], -127
; CHECK-NEXT: [[ADD_4:%.*]] = add nsw i16 [[SEXT_2]], 1
; CHECK-NEXT: [[ADD_5:%.*]] = add nsw i16 [[SEXT_2]], -128
; CHECK-NEXT: [[ADD_6:%.*]] = add nsw i16 [[SEXT_2]], -127
; CHECK-NEXT: [[RES_3:%.*]] = xor i16 [[ADD_4]], [[ADD_5]]
; CHECK-NEXT: [[RES_4:%.*]] = xor i16 [[RES_3]], [[ADD_6]]
; CHECK-NEXT: ret i16 [[RES_4]]

2
llvm/test/Transforms/SCCP/binaryops-constexprs.ll
View File

@@ -36,7 +36,7 @@ entry:
define void @add_constexpr(i32 %a) {
; CHECK-LABEL: @add_constexpr(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[ADD_1:%.*]] = add nuw i32 0, [[A:%.*]]
; CHECK-NEXT: [[ADD_1:%.*]] = add nuw nsw i32 0, [[A:%.*]]
; CHECK-NEXT: call void @use.i32(i32 [[ADD_1]])
; CHECK-NEXT: [[ADD_2:%.*]] = add i32 20, [[A]]
; CHECK-NEXT: call void @use.i32(i32 [[ADD_2]])

4
llvm/test/Transforms/SCCP/conditions-ranges-with-undef.ll
View File

@@ -8,7 +8,7 @@ declare void @use(i1)
define void @val_undef_eq() {
; CHECK-LABEL: @val_undef_eq(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[A:%.*]] = add nuw i32 undef, 0
; CHECK-NEXT: [[A:%.*]] = add nuw nsw i32 undef, 0
; CHECK-NEXT: [[BC_1:%.*]] = icmp eq i32 [[A]], 10
; CHECK-NEXT: br i1 [[BC_1]], label [[TRUE:%.*]], label [[FALSE:%.*]]
; CHECK: true:
@@ -41,7 +41,7 @@ declare void @use.i32(i32)
define void @val_undef_range() {
; CHECK-LABEL: @val_undef_range(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[A:%.*]] = add nuw i32 undef, 0
; CHECK-NEXT: [[A:%.*]] = add nuw nsw i32 undef, 0
; CHECK-NEXT: [[BC_1:%.*]] = icmp ult i32 [[A]], 127
; CHECK-NEXT: br i1 [[BC_1]], label [[TRUE:%.*]], label [[FALSE:%.*]]
; CHECK: true:

4
llvm/test/Transforms/SCCP/conditions-ranges.ll
View File

@@ -7,7 +7,7 @@ define void @f1(i32 %a, i32 %b) {
; CHECK-LABEL: @f1(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[A_255:%.*]] = and i32 [[A:%.*]], 255
; CHECK-NEXT: [[A_2:%.*]] = add nuw i32 [[A_255]], 20
; CHECK-NEXT: [[A_2:%.*]] = add nuw nsw i32 [[A_255]], 20
; CHECK-NEXT: [[BC:%.*]] = icmp ugt i32 [[B:%.*]], [[A_2]]
; CHECK-NEXT: br i1 [[BC]], label [[TRUE:%.*]], label [[FALSE:%.*]]
; CHECK: true:
@@ -260,7 +260,7 @@ define void @f8_nested_conds(i32 %a, i32 %b) {
; CHECK-LABEL: @f8_nested_conds(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[A_255:%.*]] = and i32 [[A:%.*]], 255
; CHECK-NEXT: [[A_2:%.*]] = add nuw i32 [[A_255]], 20
; CHECK-NEXT: [[A_2:%.*]] = add nuw nsw i32 [[A_255]], 20
; CHECK-NEXT: [[BC_1:%.*]] = icmp ugt i32 [[B:%.*]], [[A_2]]
; CHECK-NEXT: br i1 [[BC_1]], label [[TRUE:%.*]], label [[FALSE:%.*]]
; CHECK: true:

2
llvm/test/Transforms/SCCP/ip-add-range-to-call.ll
View File

@@ -15,7 +15,7 @@ define i32 @caller1() {
; CHECK-LABEL: @caller1(
; CHECK-NEXT: [[C1:%.*]] = call i32 @callee(i32 10), !range [[RNG0:![0-9]+]]
; CHECK-NEXT: [[C2:%.*]] = call i32 @callee(i32 20), !range [[RNG0]]
; CHECK-NEXT: [[A:%.*]] = add nuw i32 [[C1]], [[C2]]
; CHECK-NEXT: [[A:%.*]] = add nuw nsw i32 [[C1]], [[C2]]
; CHECK-NEXT: ret i32 [[A]]
;
%c1 = call i32 @callee(i32 10)

6
llvm/test/Transforms/SCCP/ip-constant-ranges.ll
View File

@@ -33,9 +33,9 @@ define internal i32 @f2(i32 %x) {
; CHECK-NEXT: [[CMP4:%.*]] = icmp ugt i32 [[X]], 300
; CHECK-NEXT: [[RES1:%.*]] = select i1 [[CMP]], i32 1, i32 2
; CHECK-NEXT: [[RES4:%.*]] = select i1 [[CMP4]], i32 3, i32 4
; CHECK-NEXT: [[RES6:%.*]] = add nuw i32 [[RES1]], 3
; CHECK-NEXT: [[RES7:%.*]] = add nuw i32 5, [[RES4]]
; CHECK-NEXT: [[RES:%.*]] = add nuw i32 [[RES6]], 5
; CHECK-NEXT: [[RES6:%.*]] = add nuw nsw i32 [[RES1]], 3
; CHECK-NEXT: [[RES7:%.*]] = add nuw nsw i32 5, [[RES4]]
; CHECK-NEXT: [[RES:%.*]] = add nuw nsw i32 [[RES6]], 5
; CHECK-NEXT: ret i32 [[RES]]
;
entry:

14
llvm/test/Transforms/SCCP/ip-ranges-binaryops.ll
View File

@@ -5,13 +5,13 @@
; x + y = [110, 221)
define internal i1 @f.add(i32 %x, i32 %y) {
; CHECK-LABEL: @f.add(
; CHECK-NEXT: [[A_1:%.*]] = add nuw i32 [[X:%.*]], [[Y:%.*]]
; CHECK-NEXT: [[A_1:%.*]] = add nuw nsw i32 [[X:%.*]], [[Y:%.*]]
; CHECK-NEXT: [[C_2:%.*]] = icmp sgt i32 [[A_1]], 219
; CHECK-NEXT: [[C_4:%.*]] = icmp slt i32 [[A_1]], 111
; CHECK-NEXT: [[C_5:%.*]] = icmp eq i32 [[A_1]], 150
; CHECK-NEXT: [[C_6:%.*]] = icmp slt i32 [[A_1]], 150
; CHECK-NEXT: [[RES_1:%.*]] = add nuw i1 false, [[C_2]]
; CHECK-NEXT: [[RES_2:%.*]] = add nuw i1 [[RES_1]], false
; CHECK-NEXT: [[RES_1:%.*]] = add nuw nsw i1 false, [[C_2]]
; CHECK-NEXT: [[RES_2:%.*]] = add nuw nsw i1 [[RES_1]], false
; CHECK-NEXT: [[RES_3:%.*]] = add i1 [[RES_2]], [[C_4]]
; CHECK-NEXT: [[RES_4:%.*]] = add i1 [[RES_3]], [[C_5]]
; CHECK-NEXT: [[RES_5:%.*]] = add i1 [[RES_4]], [[C_6]]
@@ -55,8 +55,8 @@ define internal i1 @f.sub(i32 %x, i32 %y) {
; CHECK-NEXT: [[C_4:%.*]] = icmp slt i32 [[A_1]], -189
; CHECK-NEXT: [[C_5:%.*]] = icmp eq i32 [[A_1]], -150
; CHECK-NEXT: [[C_6:%.*]] = icmp slt i32 [[A_1]], -150
; CHECK-NEXT: [[RES_1:%.*]] = add nuw i1 false, [[C_2]]
; CHECK-NEXT: [[RES_2:%.*]] = add nuw i1 [[RES_1]], false
; CHECK-NEXT: [[RES_1:%.*]] = add nuw nsw i1 false, [[C_2]]
; CHECK-NEXT: [[RES_2:%.*]] = add nuw nsw i1 [[RES_1]], false
; CHECK-NEXT: [[RES_3:%.*]] = add i1 [[RES_2]], [[C_4]]
; CHECK-NEXT: [[RES_4:%.*]] = add i1 [[RES_3]], [[C_5]]
; CHECK-NEXT: [[RES_5:%.*]] = add i1 [[RES_4]], [[C_6]]
@@ -99,8 +99,8 @@ define internal i1 @f.mul(i32 %x, i32 %y) {
; CHECK-NEXT: [[C_4:%.*]] = icmp slt i32 [[A_1]], 1001
; CHECK-NEXT: [[C_5:%.*]] = icmp eq i32 [[A_1]], 1500
; CHECK-NEXT: [[C_6:%.*]] = icmp slt i32 [[A_1]], 1500
; CHECK-NEXT: [[RES_1:%.*]] = add nuw i1 false, [[C_2]]
; CHECK-NEXT: [[RES_2:%.*]] = add nuw i1 [[RES_1]], false
; CHECK-NEXT: [[RES_1:%.*]] = add nuw nsw i1 false, [[C_2]]
; CHECK-NEXT: [[RES_2:%.*]] = add nuw nsw i1 [[RES_1]], false
; CHECK-NEXT: [[RES_3:%.*]] = add i1 [[RES_2]], [[C_4]]
; CHECK-NEXT: [[RES_4:%.*]] = add i1 [[RES_3]], [[C_5]]
; CHECK-NEXT: [[RES_5:%.*]] = add i1 [[RES_4]], [[C_6]]

18
llvm/test/Transforms/SCCP/ip-ranges-casts.ll
View File

@@ -7,8 +7,8 @@ define internal i1 @f.trunc(i32 %x) {
; CHECK-NEXT: [[T_1:%.*]] = trunc i32 [[X:%.*]] to i16
; CHECK-NEXT: [[C_2:%.*]] = icmp sgt i16 [[T_1]], 299
; CHECK-NEXT: [[C_4:%.*]] = icmp slt i16 [[T_1]], 101
; CHECK-NEXT: [[RES_1:%.*]] = add nuw i1 false, [[C_2]]
; CHECK-NEXT: [[RES_2:%.*]] = add nuw i1 [[RES_1]], false
; CHECK-NEXT: [[RES_1:%.*]] = add nuw nsw i1 false, [[C_2]]
; CHECK-NEXT: [[RES_2:%.*]] = add nuw nsw i1 [[RES_1]], false
; CHECK-NEXT: [[RES_3:%.*]] = add i1 [[RES_2]], [[C_4]]
; CHECK-NEXT: [[T_2:%.*]] = trunc i32 [[X]] to i8
; CHECK-NEXT: [[C_5:%.*]] = icmp sgt i8 [[T_2]], 44
@@ -62,8 +62,8 @@ define internal i1 @f.zext(i32 %x, i32 %y) {
; CHECK-NEXT: [[T_1:%.*]] = zext i32 [[X:%.*]] to i64
; CHECK-NEXT: [[C_2:%.*]] = icmp sgt i64 [[T_1]], 299
; CHECK-NEXT: [[C_4:%.*]] = icmp slt i64 [[T_1]], 101
; CHECK-NEXT: [[RES_1:%.*]] = add nuw i1 false, [[C_2]]
; CHECK-NEXT: [[RES_2:%.*]] = add nuw i1 [[RES_1]], false
; CHECK-NEXT: [[RES_1:%.*]] = add nuw nsw i1 false, [[C_2]]
; CHECK-NEXT: [[RES_2:%.*]] = add nuw nsw i1 [[RES_1]], false
; CHECK-NEXT: [[RES_3:%.*]] = add i1 [[RES_2]], [[C_4]]
; CHECK-NEXT: [[T_2:%.*]] = zext i32 [[Y:%.*]] to i64
; CHECK-NEXT: [[C_5:%.*]] = icmp sgt i64 [[T_2]], 300
@@ -71,7 +71,7 @@ define internal i1 @f.zext(i32 %x, i32 %y) {
; CHECK-NEXT: [[C_8:%.*]] = icmp slt i64 [[T_2]], 1
; CHECK-NEXT: [[RES_4:%.*]] = add i1 [[RES_3]], [[C_5]]
; CHECK-NEXT: [[RES_5:%.*]] = add i1 [[RES_4]], [[C_6]]
; CHECK-NEXT: [[RES_6:%.*]] = add nuw i1 [[RES_5]], false
; CHECK-NEXT: [[RES_6:%.*]] = add nuw nsw i1 [[RES_5]], false
; CHECK-NEXT: [[RES_7:%.*]] = add i1 [[RES_6]], [[C_8]]
; CHECK-NEXT: ret i1 [[RES_7]]
;
@@ -115,15 +115,15 @@ define internal i1 @f.sext(i32 %x, i32 %y) {
; CHECK-NEXT: [[T_1:%.*]] = zext i32 [[X:%.*]] to i64
; CHECK-NEXT: [[C_2:%.*]] = icmp sgt i64 [[T_1]], 299
; CHECK-NEXT: [[C_4:%.*]] = icmp slt i64 [[T_1]], 101
; CHECK-NEXT: [[RES_1:%.*]] = add nuw i1 false, [[C_2]]
; CHECK-NEXT: [[RES_2:%.*]] = add nuw i1 [[RES_1]], false
; CHECK-NEXT: [[RES_1:%.*]] = add nuw nsw i1 false, [[C_2]]
; CHECK-NEXT: [[RES_2:%.*]] = add nuw nsw i1 [[RES_1]], false
; CHECK-NEXT: [[RES_3:%.*]] = add i1 [[RES_2]], [[C_4]]
; CHECK-NEXT: [[T_2:%.*]] = sext i32 [[Y:%.*]] to i64
; CHECK-NEXT: [[C_6:%.*]] = icmp sgt i64 [[T_2]], 899
; CHECK-NEXT: [[C_8:%.*]] = icmp slt i64 [[T_2]], -119
; CHECK-NEXT: [[RES_4:%.*]] = add nuw i1 [[RES_3]], false
; CHECK-NEXT: [[RES_4:%.*]] = add nuw nsw i1 [[RES_3]], false
; CHECK-NEXT: [[RES_5:%.*]] = add i1 [[RES_4]], [[C_6]]
; CHECK-NEXT: [[RES_6:%.*]] = add nuw i1 [[RES_5]], false
; CHECK-NEXT: [[RES_6:%.*]] = add nuw nsw i1 [[RES_5]], false
; CHECK-NEXT: [[RES_7:%.*]] = add i1 [[RES_6]], [[C_8]]
; CHECK-NEXT: ret i1 [[RES_7]]
;

24
llvm/test/Transforms/SCCP/ip-ranges-phis.ll
View File

@@ -55,12 +55,12 @@ define internal i32 @f2(i32 %x, i32 %y, i32 %z, i1 %cmp.1, i1 %cmp.2) {
; CHECK-NEXT: [[V_1:%.*]] = select i1 [[C_1]], i32 10, i32 100
; CHECK-NEXT: [[V_2:%.*]] = select i1 [[C_2]], i32 20, i32 200
; CHECK-NEXT: [[V_3:%.*]] = select i1 [[C_3]], i32 30, i32 300
; CHECK-NEXT: [[R_1:%.*]] = add nuw i32 [[V_1]], [[V_2]]
; CHECK-NEXT: [[R_2:%.*]] = add nuw i32 [[R_1]], [[V_3]]
; CHECK-NEXT: [[R_3:%.*]] = add nuw i32 [[R_2]], 400
; CHECK-NEXT: [[R_4:%.*]] = add nuw i32 [[R_3]], 50
; CHECK-NEXT: [[R_5:%.*]] = add nuw i32 [[R_4]], 60
; CHECK-NEXT: [[R_6:%.*]] = add nuw i32 [[R_4]], 700
; CHECK-NEXT: [[R_1:%.*]] = add nuw nsw i32 [[V_1]], [[V_2]]
; CHECK-NEXT: [[R_2:%.*]] = add nuw nsw i32 [[R_1]], [[V_3]]
; CHECK-NEXT: [[R_3:%.*]] = add nuw nsw i32 [[R_2]], 400
; CHECK-NEXT: [[R_4:%.*]] = add nuw nsw i32 [[R_3]], 50
; CHECK-NEXT: [[R_5:%.*]] = add nuw nsw i32 [[R_4]], 60
; CHECK-NEXT: [[R_6:%.*]] = add nuw nsw i32 [[R_4]], 700
; CHECK-NEXT: ret i32 [[R_6]]
;
@@ -154,12 +154,12 @@ define internal i32 @f3(i32 %x, i32 %y, i1 %cmp.1) {
; CHECK-NEXT: [[V_5:%.*]] = select i1 [[C_5]], i32 50, i32 500
; CHECK-NEXT: [[V_6:%.*]] = select i1 [[C_6]], i32 60, i32 600
; CHECK-NEXT: [[V_7:%.*]] = select i1 [[C_7]], i32 70, i32 700
; CHECK-NEXT: [[R_1:%.*]] = add nuw i32 [[V_1]], [[V_2]]
; CHECK-NEXT: [[R_2:%.*]] = add nuw i32 [[R_1]], [[V_3]]
; CHECK-NEXT: [[R_3:%.*]] = add nuw i32 [[R_2]], [[V_4]]
; CHECK-NEXT: [[R_4:%.*]] = add nuw i32 [[R_3]], [[V_5]]
; CHECK-NEXT: [[R_5:%.*]] = add nuw i32 [[R_4]], [[V_6]]
; CHECK-NEXT: [[R_6:%.*]] = add nuw i32 [[R_4]], [[V_7]]
; CHECK-NEXT: [[R_1:%.*]] = add nuw nsw i32 [[V_1]], [[V_2]]
; CHECK-NEXT: [[R_2:%.*]] = add nuw nsw i32 [[R_1]], [[V_3]]
; CHECK-NEXT: [[R_3:%.*]] = add nuw nsw i32 [[R_2]], [[V_4]]
; CHECK-NEXT: [[R_4:%.*]] = add nuw nsw i32 [[R_3]], [[V_5]]
; CHECK-NEXT: [[R_5:%.*]] = add nuw nsw i32 [[R_4]], [[V_6]]
; CHECK-NEXT: [[R_6:%.*]] = add nuw nsw i32 [[R_4]], [[V_7]]
; CHECK-NEXT: ret i32 [[R_6]]
;

4
llvm/test/Transforms/SCCP/ip-ranges-select.ll
View File

@@ -44,9 +44,9 @@ define internal i1 @f1(i32 %x, i32 %y, i1 %cmp) {
; CHECK-NEXT: [[SEL_1:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[Y]]
; CHECK-NEXT: [[C_2:%.*]] = icmp sgt i32 [[SEL_1]], 100
; CHECK-NEXT: [[C_3:%.*]] = icmp eq i32 [[SEL_1]], 50
; CHECK-NEXT: [[RES_1:%.*]] = add nuw i1 false, [[C_2]]
; CHECK-NEXT: [[RES_1:%.*]] = add nuw nsw i1 false, [[C_2]]
; CHECK-NEXT: [[RES_2:%.*]] = add i1 [[RES_1]], [[C_3]]
; CHECK-NEXT: [[RES_3:%.*]] = add nuw i1 [[RES_2]], false
; CHECK-NEXT: [[RES_3:%.*]] = add nuw nsw i1 [[RES_2]], false
; CHECK-NEXT: ret i1 [[RES_3]]
;
%sel.1 = select i1 %cmp, i32 %x, i32 %y

4
llvm/test/Transforms/SCCP/return-argument.ll
View File

@@ -33,7 +33,7 @@ F: ; preds = %0
;; value
define internal { i32, i32 } @foo(i32 %A, i32 %B) {
; CHECK-LABEL: @foo(
; CHECK-NEXT: [[X:%.*]] = add nuw i32 [[A:%.*]], [[B:%.*]]
; CHECK-NEXT: [[X:%.*]] = add nuw nsw i32 [[A:%.*]], [[B:%.*]]
; CHECK-NEXT: [[Y:%.*]] = insertvalue { i32, i32 } undef, i32 [[A]], 0
; CHECK-NEXT: [[Z:%.*]] = insertvalue { i32, i32 } [[Y]], i32 [[X]], 1
; CHECK-NEXT: ret { i32, i32 } [[Z]]
@@ -54,7 +54,7 @@ define void @caller(i1 %C) personality ptr @__gxx_personality_v0 {
; CHECK-NEXT: to label [[OK:%.*]] unwind label [[LPAD:%.*]]
; CHECK: OK:
; CHECK-NEXT: [[X2:%.*]] = extractvalue { i32, i32 } [[S2]], 0
; CHECK-NEXT: [[Z:%.*]] = add nuw i32 [[X1]], [[X2]]
; CHECK-NEXT: [[Z:%.*]] = add nuw nsw i32 [[X1]], [[X2]]
; CHECK-NEXT: store i32 [[Z]], ptr [[W]], align 4
; CHECK-NEXT: br label [[RET:%.*]]
; CHECK: LPAD:

2
llvm/test/Transforms/SCCP/return-constants.ll
View File

@@ -50,7 +50,7 @@ define %0 @caller(i1 %Q) {
; CHECK-NEXT: [[B:%.*]] = extractvalue [[TMP0]] [[X]], 1
; CHECK-NEXT: [[Y:%.*]] = call [[TMP0]] @bar(i1 [[Q]])
; CHECK-NEXT: [[D:%.*]] = extractvalue [[TMP0]] [[Y]], 1
; CHECK-NEXT: [[N:%.*]] = add nuw i32 [[B]], [[D]]
; CHECK-NEXT: [[N:%.*]] = add nuw nsw i32 [[B]], [[D]]
; CHECK-NEXT: ret [[TMP0]] [[X]]
;
%X = call %0 @foo(i1 %Q)

16
llvm/test/Transforms/SCCP/widening.ll
View File

@@ -16,7 +16,7 @@ define void @test_2_incoming_constants(i32 %x) {
; SCCP-NEXT: br label [[EXIT]]
; SCCP: exit:
; SCCP-NEXT: [[P:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ 1, [[BB1]] ]
; SCCP-NEXT: [[A:%.*]] = add nuw i32 [[P]], 1
; SCCP-NEXT: [[A:%.*]] = add nuw nsw i32 [[P]], 1
; SCCP-NEXT: call void @use(i1 true)
; SCCP-NEXT: call void @use(i1 false)
; SCCP-NEXT: ret void
@@ -29,7 +29,7 @@ define void @test_2_incoming_constants(i32 %x) {
; IPSCCP-NEXT: br label [[EXIT]]
; IPSCCP: exit:
; IPSCCP-NEXT: [[P:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ 1, [[BB1]] ]
; IPSCCP-NEXT: [[A:%.*]] = add nuw i32 [[P]], 1
; IPSCCP-NEXT: [[A:%.*]] = add nuw nsw i32 [[P]], 1
; IPSCCP-NEXT: call void @use(i1 true)
; IPSCCP-NEXT: call void @use(i1 false)
; IPSCCP-NEXT: ret void
@@ -63,7 +63,7 @@ define void @test_3_incoming_constants(i32 %x) {
; SCCP-NEXT: br label [[EXIT]]
; SCCP: exit:
; SCCP-NEXT: [[P:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ 1, [[BB1]] ], [ 2, [[BB2]] ]
; SCCP-NEXT: [[A:%.*]] = add nuw i32 [[P]], 1
; SCCP-NEXT: [[A:%.*]] = add nuw nsw i32 [[P]], 1
; SCCP-NEXT: call void @use(i1 true)
; SCCP-NEXT: call void @use(i1 false)
; SCCP-NEXT: ret void
@@ -79,7 +79,7 @@ define void @test_3_incoming_constants(i32 %x) {
; IPSCCP-NEXT: br label [[EXIT]]
; IPSCCP: exit:
; IPSCCP-NEXT: [[P:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ 1, [[BB1]] ], [ 2, [[BB2]] ]
; IPSCCP-NEXT: [[A:%.*]] = add nuw i32 [[P]], 1
; IPSCCP-NEXT: [[A:%.*]] = add nuw nsw i32 [[P]], 1
; IPSCCP-NEXT: call void @use(i1 true)
; IPSCCP-NEXT: call void @use(i1 false)
; IPSCCP-NEXT: ret void
@@ -123,7 +123,7 @@ define void @test_5_incoming_constants(i32 %x) {
; SCCP-NEXT: br label [[EXIT]]
; SCCP: exit:
; SCCP-NEXT: [[P:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ 1, [[BB1]] ], [ 2, [[BB2]] ], [ 3, [[BB3]] ], [ 4, [[BB4]] ]
; SCCP-NEXT: [[A:%.*]] = add nuw i32 [[P]], 1
; SCCP-NEXT: [[A:%.*]] = add nuw nsw i32 [[P]], 1
; SCCP-NEXT: call void @use(i1 true)
; SCCP-NEXT: call void @use(i1 false)
; SCCP-NEXT: ret void
@@ -145,7 +145,7 @@ define void @test_5_incoming_constants(i32 %x) {
; IPSCCP-NEXT: br label [[EXIT]]
; IPSCCP: exit:
; IPSCCP-NEXT: [[P:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ 1, [[BB1]] ], [ 2, [[BB2]] ], [ 3, [[BB3]] ], [ 4, [[BB4]] ]
; IPSCCP-NEXT: [[A:%.*]] = add nuw i32 [[P]], 1
; IPSCCP-NEXT: [[A:%.*]] = add nuw nsw i32 [[P]], 1
; IPSCCP-NEXT: call void @use(i1 true)
; IPSCCP-NEXT: call void @use(i1 false)
; IPSCCP-NEXT: ret void
@@ -196,7 +196,7 @@ define void @rotated_loop_2(i32 %x) {
; SCCP-NEXT: br label [[EXIT]]
; SCCP: exit:
; SCCP-NEXT: [[P:%.*]] = phi i32 [ 1, [[ENTRY:%.*]] ], [ 3, [[BB1]] ], [ 2, [[BB2]] ], [ 5, [[BB3]] ]
; SCCP-NEXT: [[A:%.*]] = add nuw i32 [[P]], 1
; SCCP-NEXT: [[A:%.*]] = add nuw nsw i32 [[P]], 1
; SCCP-NEXT: call void @use(i1 true)
; SCCP-NEXT: call void @use(i1 false)
; SCCP-NEXT: br label [[EXIT_1:%.*]]
@@ -217,7 +217,7 @@ define void @rotated_loop_2(i32 %x) {
; IPSCCP-NEXT: br label [[EXIT]]
; IPSCCP: exit:
; IPSCCP-NEXT: [[P:%.*]] = phi i32 [ 1, [[ENTRY:%.*]] ], [ 3, [[BB1]] ], [ 2, [[BB2]] ], [ 5, [[BB3]] ]
; IPSCCP-NEXT: [[A:%.*]] = add nuw i32 [[P]], 1
; IPSCCP-NEXT: [[A:%.*]] = add nuw nsw i32 [[P]], 1
; IPSCCP-NEXT: call void @use(i1 true)
; IPSCCP-NEXT: call void @use(i1 false)
; IPSCCP-NEXT: br label [[EXIT_1:%.*]]