diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/select-insert-vector-elt.mir b/llvm/test/CodeGen/AArch64/GlobalISel/select-insert-vector-elt.mir index 13fd146f8744..d6618d440f42 100644 --- a/llvm/test/CodeGen/AArch64/GlobalISel/select-insert-vector-elt.mir +++ b/llvm/test/CodeGen/AArch64/GlobalISel/select-insert-vector-elt.mir @@ -12,11 +12,12 @@ body: | ; CHECK-LABEL: name: v16s8_gpr ; CHECK: liveins: $q1, $w0 - ; CHECK: [[COPY:%[0-9]+]]:gpr32 = COPY $w0 - ; CHECK: [[COPY1:%[0-9]+]]:fpr128 = COPY $q1 - ; CHECK: [[INSvi8gpr:%[0-9]+]]:fpr128 = INSvi8gpr [[COPY1]], 1, [[COPY]] - ; CHECK: $q0 = COPY [[INSvi8gpr]] - ; CHECK: RET_ReallyLR implicit $q0 + ; CHECK-NEXT: {{ $}} + ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32 = COPY $w0 + ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr128 = COPY $q1 + ; CHECK-NEXT: [[INSvi8gpr:%[0-9]+]]:fpr128 = INSvi8gpr [[COPY1]], 1, [[COPY]] + ; CHECK-NEXT: $q0 = COPY [[INSvi8gpr]] + ; CHECK-NEXT: RET_ReallyLR implicit $q0 %0:gpr(s32) = COPY $w0 %trunc:gpr(s8) = G_TRUNC %0 %1:fpr(<16 x s8>) = COPY $q1 @@ -38,14 +39,15 @@ body: | ; CHECK-LABEL: name: v8s8_gpr ; CHECK: liveins: $d0, $w0 - ; CHECK: [[COPY:%[0-9]+]]:gpr32 = COPY $w0 - ; CHECK: [[COPY1:%[0-9]+]]:fpr64 = COPY $d0 - ; CHECK: [[DEF:%[0-9]+]]:fpr128 = IMPLICIT_DEF - ; CHECK: [[INSERT_SUBREG:%[0-9]+]]:fpr128 = INSERT_SUBREG [[DEF]], [[COPY1]], %subreg.dsub - ; CHECK: [[INSvi8gpr:%[0-9]+]]:fpr128 = INSvi8gpr [[INSERT_SUBREG]], 1, [[COPY]] - ; CHECK: [[COPY2:%[0-9]+]]:fpr64 = COPY [[INSvi8gpr]].dsub - ; CHECK: $d0 = COPY [[COPY2]] - ; CHECK: RET_ReallyLR implicit $d0 + ; CHECK-NEXT: {{ $}} + ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32 = COPY $w0 + ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr64 = COPY $d0 + ; CHECK-NEXT: [[DEF:%[0-9]+]]:fpr128 = IMPLICIT_DEF + ; CHECK-NEXT: [[INSERT_SUBREG:%[0-9]+]]:fpr128 = INSERT_SUBREG [[DEF]], [[COPY1]], %subreg.dsub + ; CHECK-NEXT: [[INSvi8gpr:%[0-9]+]]:fpr128 = INSvi8gpr [[INSERT_SUBREG]], 1, [[COPY]] + ; CHECK-NEXT: [[COPY2:%[0-9]+]]:fpr64 = COPY [[INSvi8gpr]].dsub + ; CHECK-NEXT: $d0 = COPY [[COPY2]] + ; CHECK-NEXT: RET_ReallyLR implicit $d0 %0:gpr(s32) = COPY $w0 %trunc:gpr(s8) = G_TRUNC %0 %1:fpr(<8 x s8>) = COPY $d0 @@ -67,11 +69,12 @@ body: | ; CHECK-LABEL: name: v8s16_gpr ; CHECK: liveins: $q1, $w0 - ; CHECK: [[COPY:%[0-9]+]]:gpr32 = COPY $w0 - ; CHECK: [[COPY1:%[0-9]+]]:fpr128 = COPY $q1 - ; CHECK: [[INSvi16gpr:%[0-9]+]]:fpr128 = INSvi16gpr [[COPY1]], 1, [[COPY]] - ; CHECK: $q0 = COPY [[INSvi16gpr]] - ; CHECK: RET_ReallyLR implicit $q0 + ; CHECK-NEXT: {{ $}} + ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32 = COPY $w0 + ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr128 = COPY $q1 + ; CHECK-NEXT: [[INSvi16gpr:%[0-9]+]]:fpr128 = INSvi16gpr [[COPY1]], 1, [[COPY]] + ; CHECK-NEXT: $q0 = COPY [[INSvi16gpr]] + ; CHECK-NEXT: RET_ReallyLR implicit $q0 %0:gpr(s32) = COPY $w0 %trunc:gpr(s16) = G_TRUNC %0 %1:fpr(<8 x s16>) = COPY $q1 @@ -93,13 +96,14 @@ body: | ; CHECK-LABEL: name: v8s16_fpr ; CHECK: liveins: $q1, $h0 - ; CHECK: [[COPY:%[0-9]+]]:fpr16 = COPY $h0 - ; CHECK: [[COPY1:%[0-9]+]]:fpr128 = COPY $q1 - ; CHECK: [[DEF:%[0-9]+]]:fpr128 = IMPLICIT_DEF - ; CHECK: [[INSERT_SUBREG:%[0-9]+]]:fpr128 = INSERT_SUBREG [[DEF]], [[COPY]], %subreg.hsub - ; CHECK: [[INSvi16lane:%[0-9]+]]:fpr128 = INSvi16lane [[COPY1]], 1, [[INSERT_SUBREG]], 0 - ; CHECK: $q0 = COPY [[INSvi16lane]] - ; CHECK: RET_ReallyLR implicit $q0 + ; CHECK-NEXT: {{ $}} + ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr16 = COPY $h0 + ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr128 = COPY $q1 + ; CHECK-NEXT: [[DEF:%[0-9]+]]:fpr128 = IMPLICIT_DEF + ; CHECK-NEXT: [[INSERT_SUBREG:%[0-9]+]]:fpr128 = INSERT_SUBREG [[DEF]], [[COPY]], %subreg.hsub + ; CHECK-NEXT: [[INSvi16lane:%[0-9]+]]:fpr128 = INSvi16lane [[COPY1]], 1, [[INSERT_SUBREG]], 0 + ; CHECK-NEXT: $q0 = COPY [[INSvi16lane]] + ; CHECK-NEXT: RET_ReallyLR implicit $q0 %0:fpr(s16) = COPY $h0 %1:fpr(<8 x s16>) = COPY $q1 %3:gpr(s32) = G_CONSTANT i32 1 @@ -120,13 +124,14 @@ body: | ; CHECK-LABEL: name: v4s32_fpr ; CHECK: liveins: $q1, $s0 - ; CHECK: [[COPY:%[0-9]+]]:fpr32 = COPY $s0 - ; CHECK: [[COPY1:%[0-9]+]]:fpr128 = COPY $q1 - ; CHECK: [[DEF:%[0-9]+]]:fpr128 = IMPLICIT_DEF - ; CHECK: [[INSERT_SUBREG:%[0-9]+]]:fpr128 = INSERT_SUBREG [[DEF]], [[COPY]], %subreg.ssub - ; CHECK: [[INSvi32lane:%[0-9]+]]:fpr128 = INSvi32lane [[COPY1]], 1, [[INSERT_SUBREG]], 0 - ; CHECK: $q0 = COPY [[INSvi32lane]] - ; CHECK: RET_ReallyLR implicit $q0 + ; CHECK-NEXT: {{ $}} + ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr32 = COPY $s0 + ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr128 = COPY $q1 + ; CHECK-NEXT: [[DEF:%[0-9]+]]:fpr128 = IMPLICIT_DEF + ; CHECK-NEXT: [[INSERT_SUBREG:%[0-9]+]]:fpr128 = INSERT_SUBREG [[DEF]], [[COPY]], %subreg.ssub + ; CHECK-NEXT: [[INSvi32lane:%[0-9]+]]:fpr128 = INSvi32lane [[COPY1]], 1, [[INSERT_SUBREG]], 0 + ; CHECK-NEXT: $q0 = COPY [[INSvi32lane]] + ; CHECK-NEXT: RET_ReallyLR implicit $q0 %0:fpr(s32) = COPY $s0 %1:fpr(<4 x s32>) = COPY $q1 %3:gpr(s32) = G_CONSTANT i32 1 @@ -147,11 +152,12 @@ body: | ; CHECK-LABEL: name: v4s32_gpr ; CHECK: liveins: $q0, $w0 - ; CHECK: [[COPY:%[0-9]+]]:gpr32 = COPY $w0 - ; CHECK: [[COPY1:%[0-9]+]]:fpr128 = COPY $q0 - ; CHECK: [[INSvi32gpr:%[0-9]+]]:fpr128 = INSvi32gpr [[COPY1]], 1, [[COPY]] - ; CHECK: $q0 = COPY [[INSvi32gpr]] - ; CHECK: RET_ReallyLR implicit $q0 + ; CHECK-NEXT: {{ $}} + ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32 = COPY $w0 + ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr128 = COPY $q0 + ; CHECK-NEXT: [[INSvi32gpr:%[0-9]+]]:fpr128 = INSvi32gpr [[COPY1]], 1, [[COPY]] + ; CHECK-NEXT: $q0 = COPY [[INSvi32gpr]] + ; CHECK-NEXT: RET_ReallyLR implicit $q0 %0:gpr(s32) = COPY $w0 %1:fpr(<4 x s32>) = COPY $q0 %3:gpr(s32) = G_CONSTANT i32 1 @@ -172,14 +178,15 @@ body: | ; CHECK-LABEL: name: v4s16_gpr ; CHECK: liveins: $d0, $w0 - ; CHECK: [[COPY:%[0-9]+]]:gpr32 = COPY $w0 - ; CHECK: [[COPY1:%[0-9]+]]:fpr64 = COPY $d0 - ; CHECK: [[DEF:%[0-9]+]]:fpr128 = IMPLICIT_DEF - ; CHECK: [[INSERT_SUBREG:%[0-9]+]]:fpr128 = INSERT_SUBREG [[DEF]], [[COPY1]], %subreg.dsub - ; CHECK: [[INSvi16gpr:%[0-9]+]]:fpr128 = INSvi16gpr [[INSERT_SUBREG]], 1, [[COPY]] - ; CHECK: [[COPY2:%[0-9]+]]:fpr64 = COPY [[INSvi16gpr]].dsub - ; CHECK: $d0 = COPY [[COPY2]] - ; CHECK: RET_ReallyLR implicit $d0 + ; CHECK-NEXT: {{ $}} + ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32 = COPY $w0 + ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr64 = COPY $d0 + ; CHECK-NEXT: [[DEF:%[0-9]+]]:fpr128 = IMPLICIT_DEF + ; CHECK-NEXT: [[INSERT_SUBREG:%[0-9]+]]:fpr128 = INSERT_SUBREG [[DEF]], [[COPY1]], %subreg.dsub + ; CHECK-NEXT: [[INSvi16gpr:%[0-9]+]]:fpr128 = INSvi16gpr [[INSERT_SUBREG]], 1, [[COPY]] + ; CHECK-NEXT: [[COPY2:%[0-9]+]]:fpr64 = COPY [[INSvi16gpr]].dsub + ; CHECK-NEXT: $d0 = COPY [[COPY2]] + ; CHECK-NEXT: RET_ReallyLR implicit $d0 %0:gpr(s32) = COPY $w0 %trunc:gpr(s16) = G_TRUNC %0 %1:fpr(<4 x s16>) = COPY $d0 @@ -201,13 +208,14 @@ body: | ; CHECK-LABEL: name: v2s64_fpr ; CHECK: liveins: $d0, $q1 - ; CHECK: [[COPY:%[0-9]+]]:fpr64 = COPY $d0 - ; CHECK: [[COPY1:%[0-9]+]]:fpr128 = COPY $q1 - ; CHECK: [[DEF:%[0-9]+]]:fpr128 = IMPLICIT_DEF - ; CHECK: [[INSERT_SUBREG:%[0-9]+]]:fpr128 = INSERT_SUBREG [[DEF]], [[COPY]], %subreg.dsub - ; CHECK: [[INSvi64lane:%[0-9]+]]:fpr128 = INSvi64lane [[COPY1]], 1, [[INSERT_SUBREG]], 0 - ; CHECK: $q0 = COPY [[INSvi64lane]] - ; CHECK: RET_ReallyLR implicit $q0 + ; CHECK-NEXT: {{ $}} + ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr64 = COPY $d0 + ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr128 = COPY $q1 + ; CHECK-NEXT: [[DEF:%[0-9]+]]:fpr128 = IMPLICIT_DEF + ; CHECK-NEXT: [[INSERT_SUBREG:%[0-9]+]]:fpr128 = INSERT_SUBREG [[DEF]], [[COPY]], %subreg.dsub + ; CHECK-NEXT: [[INSvi64lane:%[0-9]+]]:fpr128 = INSvi64lane [[COPY1]], 1, [[INSERT_SUBREG]], 0 + ; CHECK-NEXT: $q0 = COPY [[INSvi64lane]] + ; CHECK-NEXT: RET_ReallyLR implicit $q0 %0:fpr(s64) = COPY $d0 %1:fpr(<2 x s64>) = COPY $q1 %3:gpr(s32) = G_CONSTANT i32 1 @@ -228,11 +236,12 @@ body: | ; CHECK-LABEL: name: v2s64_gpr ; CHECK: liveins: $q0, $x0 - ; CHECK: [[COPY:%[0-9]+]]:gpr64 = COPY $x0 - ; CHECK: [[COPY1:%[0-9]+]]:fpr128 = COPY $q0 - ; CHECK: [[INSvi64gpr:%[0-9]+]]:fpr128 = INSvi64gpr [[COPY1]], 0, [[COPY]] - ; CHECK: $q0 = COPY [[INSvi64gpr]] - ; CHECK: RET_ReallyLR implicit $q0 + ; CHECK-NEXT: {{ $}} + ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64 = COPY $x0 + ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr128 = COPY $q0 + ; CHECK-NEXT: [[INSvi64gpr:%[0-9]+]]:fpr128 = INSvi64gpr [[COPY1]], 0, [[COPY]] + ; CHECK-NEXT: $q0 = COPY [[INSvi64gpr]] + ; CHECK-NEXT: RET_ReallyLR implicit $q0 %0:gpr(s64) = COPY $x0 %1:fpr(<2 x s64>) = COPY $q0 %3:gpr(s32) = G_CONSTANT i32 0 @@ -253,16 +262,17 @@ body: | ; CHECK-LABEL: name: v2s32_fpr ; CHECK: liveins: $d1, $s0 - ; CHECK: [[COPY:%[0-9]+]]:fpr32 = COPY $s0 - ; CHECK: [[COPY1:%[0-9]+]]:fpr64 = COPY $d1 - ; CHECK: [[DEF:%[0-9]+]]:fpr128 = IMPLICIT_DEF - ; CHECK: [[INSERT_SUBREG:%[0-9]+]]:fpr128 = INSERT_SUBREG [[DEF]], [[COPY1]], %subreg.dsub - ; CHECK: [[DEF1:%[0-9]+]]:fpr128 = IMPLICIT_DEF - ; CHECK: [[INSERT_SUBREG1:%[0-9]+]]:fpr128 = INSERT_SUBREG [[DEF1]], [[COPY]], %subreg.ssub - ; CHECK: [[INSvi32lane:%[0-9]+]]:fpr128 = INSvi32lane [[INSERT_SUBREG]], 1, [[INSERT_SUBREG1]], 0 - ; CHECK: [[COPY2:%[0-9]+]]:fpr64 = COPY [[INSvi32lane]].dsub - ; CHECK: $d0 = COPY [[COPY2]] - ; CHECK: RET_ReallyLR implicit $d0 + ; CHECK-NEXT: {{ $}} + ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr32 = COPY $s0 + ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr64 = COPY $d1 + ; CHECK-NEXT: [[DEF:%[0-9]+]]:fpr128 = IMPLICIT_DEF + ; CHECK-NEXT: [[INSERT_SUBREG:%[0-9]+]]:fpr128 = INSERT_SUBREG [[DEF]], [[COPY1]], %subreg.dsub + ; CHECK-NEXT: [[DEF1:%[0-9]+]]:fpr128 = IMPLICIT_DEF + ; CHECK-NEXT: [[INSERT_SUBREG1:%[0-9]+]]:fpr128 = INSERT_SUBREG [[DEF1]], [[COPY]], %subreg.ssub + ; CHECK-NEXT: [[INSvi32lane:%[0-9]+]]:fpr128 = INSvi32lane [[INSERT_SUBREG]], 1, [[INSERT_SUBREG1]], 0 + ; CHECK-NEXT: [[COPY2:%[0-9]+]]:fpr64 = COPY [[INSvi32lane]].dsub + ; CHECK-NEXT: $d0 = COPY [[COPY2]] + ; CHECK-NEXT: RET_ReallyLR implicit $d0 %0:fpr(s32) = COPY $s0 %1:fpr(<2 x s32>) = COPY $d1 %3:gpr(s32) = G_CONSTANT i32 1 @@ -283,14 +293,15 @@ body: | ; CHECK-LABEL: name: v2s32_gpr ; CHECK: liveins: $d0, $w0 - ; CHECK: [[COPY:%[0-9]+]]:gpr32 = COPY $w0 - ; CHECK: [[COPY1:%[0-9]+]]:fpr64 = COPY $d0 - ; CHECK: [[DEF:%[0-9]+]]:fpr128 = IMPLICIT_DEF - ; CHECK: [[INSERT_SUBREG:%[0-9]+]]:fpr128 = INSERT_SUBREG [[DEF]], [[COPY1]], %subreg.dsub - ; CHECK: [[INSvi32gpr:%[0-9]+]]:fpr128 = INSvi32gpr [[INSERT_SUBREG]], 1, [[COPY]] - ; CHECK: [[COPY2:%[0-9]+]]:fpr64 = COPY [[INSvi32gpr]].dsub - ; CHECK: $d0 = COPY [[COPY2]] - ; CHECK: RET_ReallyLR implicit $d0 + ; CHECK-NEXT: {{ $}} + ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32 = COPY $w0 + ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr64 = COPY $d0 + ; CHECK-NEXT: [[DEF:%[0-9]+]]:fpr128 = IMPLICIT_DEF + ; CHECK-NEXT: [[INSERT_SUBREG:%[0-9]+]]:fpr128 = INSERT_SUBREG [[DEF]], [[COPY1]], %subreg.dsub + ; CHECK-NEXT: [[INSvi32gpr:%[0-9]+]]:fpr128 = INSvi32gpr [[INSERT_SUBREG]], 1, [[COPY]] + ; CHECK-NEXT: [[COPY2:%[0-9]+]]:fpr64 = COPY [[INSvi32gpr]].dsub + ; CHECK-NEXT: $d0 = COPY [[COPY2]] + ; CHECK-NEXT: RET_ReallyLR implicit $d0 %0:gpr(s32) = COPY $w0 %1:fpr(<2 x s32>) = COPY $d0 %3:gpr(s32) = G_CONSTANT i32 1 diff --git a/llvm/test/CodeGen/AArch64/arm64-fminv.ll b/llvm/test/CodeGen/AArch64/arm64-fminv.ll index 90076a2b66f9..ae55288f9159 100644 --- a/llvm/test/CodeGen/AArch64/arm64-fminv.ll +++ b/llvm/test/CodeGen/AArch64/arm64-fminv.ll @@ -1,23 +1,30 @@ -; RUN: llc -mtriple=arm64-linux-gnu -o - %s | FileCheck %s -; RUN: llc -global-isel=1 -mtriple=arm64-linux-gnu -o - %s | FileCheck %s +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4 +; RUN: llc < %s -mtriple=arm64-linux-gnu | FileCheck %s +; RUN: llc < %s -mtriple=arm64-linux-gnu -global-isel | FileCheck %s define float @test_fminv_v2f32(<2 x float> %in) { -; CHECK: test_fminv_v2f32: -; CHECK: fminp s0, v0.2s +; CHECK-LABEL: test_fminv_v2f32: +; CHECK: // %bb.0: +; CHECK-NEXT: fminp s0, v0.2s +; CHECK-NEXT: ret %min = call float @llvm.aarch64.neon.fminv.f32.v2f32(<2 x float> %in) ret float %min } define float @test_fminv_v4f32(<4 x float> %in) { -; CHECK: test_fminv_v4f32: -; CHECK: fminv s0, v0.4s +; CHECK-LABEL: test_fminv_v4f32: +; CHECK: // %bb.0: +; CHECK-NEXT: fminv s0, v0.4s +; CHECK-NEXT: ret %min = call float @llvm.aarch64.neon.fminv.f32.v4f32(<4 x float> %in) ret float %min } define double @test_fminv_v2f64(<2 x double> %in) { -; CHECK: test_fminv_v2f64: -; CHECK: fminp d0, v0.2d +; CHECK-LABEL: test_fminv_v2f64: +; CHECK: // %bb.0: +; CHECK-NEXT: fminp d0, v0.2d +; CHECK-NEXT: ret %min = call double @llvm.aarch64.neon.fminv.f64.v2f64(<2 x double> %in) ret double %min } @@ -27,22 +34,28 @@ declare float @llvm.aarch64.neon.fminv.f32.v4f32(<4 x float>) declare double @llvm.aarch64.neon.fminv.f64.v2f64(<2 x double>) define float @test_fmaxv_v2f32(<2 x float> %in) { -; CHECK: test_fmaxv_v2f32: -; CHECK: fmaxp s0, v0.2s +; CHECK-LABEL: test_fmaxv_v2f32: +; CHECK: // %bb.0: +; CHECK-NEXT: fmaxp s0, v0.2s +; CHECK-NEXT: ret %max = call float @llvm.aarch64.neon.fmaxv.f32.v2f32(<2 x float> %in) ret float %max } define float @test_fmaxv_v4f32(<4 x float> %in) { -; CHECK: test_fmaxv_v4f32: -; CHECK: fmaxv s0, v0.4s +; CHECK-LABEL: test_fmaxv_v4f32: +; CHECK: // %bb.0: +; CHECK-NEXT: fmaxv s0, v0.4s +; CHECK-NEXT: ret %max = call float @llvm.aarch64.neon.fmaxv.f32.v4f32(<4 x float> %in) ret float %max } define double @test_fmaxv_v2f64(<2 x double> %in) { -; CHECK: test_fmaxv_v2f64: -; CHECK: fmaxp d0, v0.2d +; CHECK-LABEL: test_fmaxv_v2f64: +; CHECK: // %bb.0: +; CHECK-NEXT: fmaxp d0, v0.2d +; CHECK-NEXT: ret %max = call double @llvm.aarch64.neon.fmaxv.f64.v2f64(<2 x double> %in) ret double %max } @@ -52,22 +65,28 @@ declare float @llvm.aarch64.neon.fmaxv.f32.v4f32(<4 x float>) declare double @llvm.aarch64.neon.fmaxv.f64.v2f64(<2 x double>) define float @test_fminnmv_v2f32(<2 x float> %in) { -; CHECK: test_fminnmv_v2f32: -; CHECK: fminnmp s0, v0.2s +; CHECK-LABEL: test_fminnmv_v2f32: +; CHECK: // %bb.0: +; CHECK-NEXT: fminnmp s0, v0.2s +; CHECK-NEXT: ret %minnm = call float @llvm.aarch64.neon.fminnmv.f32.v2f32(<2 x float> %in) ret float %minnm } define float @test_fminnmv_v4f32(<4 x float> %in) { -; CHECK: test_fminnmv_v4f32: -; CHECK: fminnmv s0, v0.4s +; CHECK-LABEL: test_fminnmv_v4f32: +; CHECK: // %bb.0: +; CHECK-NEXT: fminnmv s0, v0.4s +; CHECK-NEXT: ret %minnm = call float @llvm.aarch64.neon.fminnmv.f32.v4f32(<4 x float> %in) ret float %minnm } define double @test_fminnmv_v2f64(<2 x double> %in) { -; CHECK: test_fminnmv_v2f64: -; CHECK: fminnmp d0, v0.2d +; CHECK-LABEL: test_fminnmv_v2f64: +; CHECK: // %bb.0: +; CHECK-NEXT: fminnmp d0, v0.2d +; CHECK-NEXT: ret %minnm = call double @llvm.aarch64.neon.fminnmv.f64.v2f64(<2 x double> %in) ret double %minnm } @@ -77,22 +96,28 @@ declare float @llvm.aarch64.neon.fminnmv.f32.v4f32(<4 x float>) declare double @llvm.aarch64.neon.fminnmv.f64.v2f64(<2 x double>) define float @test_fmaxnmv_v2f32(<2 x float> %in) { -; CHECK: test_fmaxnmv_v2f32: -; CHECK: fmaxnmp s0, v0.2s +; CHECK-LABEL: test_fmaxnmv_v2f32: +; CHECK: // %bb.0: +; CHECK-NEXT: fmaxnmp s0, v0.2s +; CHECK-NEXT: ret %maxnm = call float @llvm.aarch64.neon.fmaxnmv.f32.v2f32(<2 x float> %in) ret float %maxnm } define float @test_fmaxnmv_v4f32(<4 x float> %in) { -; CHECK: test_fmaxnmv_v4f32: -; CHECK: fmaxnmv s0, v0.4s +; CHECK-LABEL: test_fmaxnmv_v4f32: +; CHECK: // %bb.0: +; CHECK-NEXT: fmaxnmv s0, v0.4s +; CHECK-NEXT: ret %maxnm = call float @llvm.aarch64.neon.fmaxnmv.f32.v4f32(<4 x float> %in) ret float %maxnm } define double @test_fmaxnmv_v2f64(<2 x double> %in) { -; CHECK: test_fmaxnmv_v2f64: -; CHECK: fmaxnmp d0, v0.2d +; CHECK-LABEL: test_fmaxnmv_v2f64: +; CHECK: // %bb.0: +; CHECK-NEXT: fmaxnmp d0, v0.2d +; CHECK-NEXT: ret %maxnm = call double @llvm.aarch64.neon.fmaxnmv.f64.v2f64(<2 x double> %in) ret double %maxnm } diff --git a/llvm/test/CodeGen/AArch64/arm64-indexed-vector-ldst.ll b/llvm/test/CodeGen/AArch64/arm64-indexed-vector-ldst.ll index 7493afd672d4..628fb550a053 100644 --- a/llvm/test/CodeGen/AArch64/arm64-indexed-vector-ldst.ll +++ b/llvm/test/CodeGen/AArch64/arm64-indexed-vector-ldst.ll @@ -1,627 +1,6 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc -mtriple=arm64-apple-ios7.0 -o - %s | FileCheck %s --check-prefixes=CHECK,SDAG -; RUN: llc -global-isel=1 -global-isel-abort=2 -mtriple=arm64-apple-ios7.0 -o - %s 2>&1 | FileCheck %s --check-prefixes=CHECK,CHECK-GISEL - -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_pre_load -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_load -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_pre_store -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_store -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_pre_load -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_load -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_pre_store -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_store -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_pre_load -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_load -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_pre_store -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_store -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_pre_load -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_load -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_pre_store -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_store -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_pre_load -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_load -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_pre_store -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_store -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_pre_load -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_load -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_pre_store -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_store -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_pre_load -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_load -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_pre_store -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_store -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_pre_load -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_load -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_pre_store -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_store -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_pre_load -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_load -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_pre_store -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_store -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_pre_load -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_load -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_pre_store -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_store -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_pre_load -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_load -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_pre_store -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_store -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_imm_st1_lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_reg_st1_lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_imm_st1_lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_reg_st1_lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_imm_st1_lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_reg_st1_lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_imm_st1_lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_reg_st1_lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_imm_st1_lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_reg_st1_lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_imm_st1_lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_reg_st1_lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_imm_st1_lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_reg_st1_lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_imm_st1_lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_reg_st1_lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_imm_st1_lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_reg_st1_lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_imm_st1_lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_reg_st1_lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_imm_ld2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_reg_ld2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_imm_ld2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_reg_ld2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_imm_ld2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_reg_ld2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_imm_ld2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_reg_ld2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_imm_ld2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_reg_ld2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_imm_ld2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_reg_ld2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_imm_ld2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_reg_ld2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_imm_ld2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_reg_ld2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_imm_ld2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_reg_ld2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_imm_ld2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_reg_ld2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_imm_ld2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_reg_ld2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1f64_post_imm_ld2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1f64_post_reg_ld2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_imm_ld3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_reg_ld3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_imm_ld3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_reg_ld3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_imm_ld3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_reg_ld3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_imm_ld3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_reg_ld3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_imm_ld3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_reg_ld3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_imm_ld3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_reg_ld3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_imm_ld3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_reg_ld3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_imm_ld3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_reg_ld3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_imm_ld3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_reg_ld3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_imm_ld3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_reg_ld3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_imm_ld3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_reg_ld3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1f64_post_imm_ld3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1f64_post_reg_ld3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_imm_ld4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_reg_ld4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_imm_ld4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_reg_ld4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_imm_ld4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_reg_ld4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_imm_ld4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_reg_ld4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_imm_ld4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_reg_ld4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_imm_ld4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_reg_ld4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_imm_ld4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_reg_ld4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_imm_ld4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_reg_ld4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_imm_ld4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_reg_ld4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_imm_ld4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_reg_ld4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_imm_ld4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_reg_ld4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1f64_post_imm_ld4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1f64_post_reg_ld4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_imm_ld1x2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_reg_ld1x2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_imm_ld1x2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_reg_ld1x2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_imm_ld1x2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_reg_ld1x2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_imm_ld1x2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_reg_ld1x2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_imm_ld1x2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_reg_ld1x2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_imm_ld1x2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_reg_ld1x2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_imm_ld1x2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_reg_ld1x2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_imm_ld1x2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_reg_ld1x2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_imm_ld1x2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_reg_ld1x2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_imm_ld1x2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_reg_ld1x2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_imm_ld1x2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_reg_ld1x2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1f64_post_imm_ld1x2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1f64_post_reg_ld1x2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_imm_ld1x3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_reg_ld1x3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_imm_ld1x3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_reg_ld1x3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_imm_ld1x3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_reg_ld1x3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_imm_ld1x3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_reg_ld1x3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_imm_ld1x3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_reg_ld1x3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_imm_ld1x3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_reg_ld1x3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_imm_ld1x3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_reg_ld1x3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_imm_ld1x3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_reg_ld1x3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_imm_ld1x3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_reg_ld1x3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_imm_ld1x3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_reg_ld1x3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_imm_ld1x3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_reg_ld1x3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1f64_post_imm_ld1x3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1f64_post_reg_ld1x3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_imm_ld1x4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_reg_ld1x4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_imm_ld1x4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_reg_ld1x4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_imm_ld1x4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_reg_ld1x4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_imm_ld1x4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_reg_ld1x4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_imm_ld1x4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_reg_ld1x4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_imm_ld1x4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_reg_ld1x4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_imm_ld1x4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_reg_ld1x4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_imm_ld1x4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_reg_ld1x4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_imm_ld1x4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_reg_ld1x4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_imm_ld1x4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_reg_ld1x4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_imm_ld1x4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_reg_ld1x4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1f64_post_imm_ld1x4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1f64_post_reg_ld1x4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_imm_ld2r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_reg_ld2r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_imm_ld2r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_reg_ld2r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_imm_ld2r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_reg_ld2r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_imm_ld2r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_reg_ld2r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_imm_ld2r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_reg_ld2r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_imm_ld2r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_reg_ld2r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_imm_ld2r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_reg_ld2r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_imm_ld2r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_reg_ld2r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_imm_ld2r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_reg_ld2r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_imm_ld2r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_reg_ld2r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_imm_ld2r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_reg_ld2r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1f64_post_imm_ld2r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1f64_post_reg_ld2r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_imm_ld3r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_reg_ld3r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_imm_ld3r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_reg_ld3r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_imm_ld3r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_reg_ld3r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_imm_ld3r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_reg_ld3r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_imm_ld3r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_reg_ld3r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_imm_ld3r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_reg_ld3r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_imm_ld3r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_reg_ld3r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_imm_ld3r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_reg_ld3r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_imm_ld3r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_reg_ld3r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_imm_ld3r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_reg_ld3r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_imm_ld3r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_reg_ld3r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1f64_post_imm_ld3r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1f64_post_reg_ld3r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_imm_ld4r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_reg_ld4r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_imm_ld4r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_reg_ld4r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_imm_ld4r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_reg_ld4r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_imm_ld4r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_reg_ld4r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_imm_ld4r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_reg_ld4r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_imm_ld4r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_reg_ld4r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_imm_ld4r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_reg_ld4r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_imm_ld4r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_reg_ld4r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_imm_ld4r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_reg_ld4r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_imm_ld4r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_reg_ld4r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_imm_ld4r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_reg_ld4r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1f64_post_imm_ld4r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1f64_post_reg_ld4r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_imm_ld2lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_reg_ld2lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_imm_ld2lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_reg_ld2lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_imm_ld2lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_reg_ld2lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_imm_ld2lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_reg_ld2lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_imm_ld2lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_reg_ld2lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_imm_ld2lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_reg_ld2lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_imm_ld2lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_reg_ld2lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_imm_ld2lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_reg_ld2lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_imm_ld2lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_reg_ld2lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_imm_ld2lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_reg_ld2lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_imm_ld2lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_reg_ld2lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1f64_post_imm_ld2lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1f64_post_reg_ld2lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_imm_ld3lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_reg_ld3lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_imm_ld3lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_reg_ld3lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_imm_ld3lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_reg_ld3lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_imm_ld3lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_reg_ld3lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_imm_ld3lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_reg_ld3lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_imm_ld3lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_reg_ld3lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_imm_ld3lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_reg_ld3lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_imm_ld3lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_reg_ld3lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_imm_ld3lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_reg_ld3lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_imm_ld3lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_reg_ld3lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_imm_ld3lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_reg_ld3lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1f64_post_imm_ld3lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1f64_post_reg_ld3lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_imm_ld4lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_reg_ld4lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_imm_ld4lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_reg_ld4lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_imm_ld4lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_reg_ld4lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_imm_ld4lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_reg_ld4lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_imm_ld4lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_reg_ld4lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_imm_ld4lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_reg_ld4lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_imm_ld4lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_reg_ld4lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_imm_ld4lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_reg_ld4lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_imm_ld4lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_reg_ld4lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_imm_ld4lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_reg_ld4lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_imm_ld4lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_reg_ld4lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1f64_post_imm_ld4lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1f64_post_reg_ld4lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_imm_st2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_reg_st2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_imm_st2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_reg_st2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_imm_st2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_reg_st2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_imm_st2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_reg_st2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_imm_st2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_reg_st2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_imm_st2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_reg_st2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_imm_st2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_reg_st2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_imm_st2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_reg_st2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_imm_st2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_reg_st2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_imm_st2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_reg_st2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_imm_st2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_reg_st2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1f64_post_imm_st2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1f64_post_reg_st2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_imm_st3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_reg_st3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_imm_st3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_reg_st3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_imm_st3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_reg_st3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_imm_st3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_reg_st3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_imm_st3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_reg_st3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_imm_st3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_reg_st3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_imm_st3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_reg_st3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_imm_st3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_reg_st3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_imm_st3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_reg_st3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_imm_st3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_reg_st3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_imm_st3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_reg_st3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1f64_post_imm_st3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1f64_post_reg_st3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_imm_st4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_reg_st4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_imm_st4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_reg_st4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_imm_st4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_reg_st4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_imm_st4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_reg_st4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_imm_st4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_reg_st4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_imm_st4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_reg_st4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_imm_st4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_reg_st4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_imm_st4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_reg_st4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_imm_st4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_reg_st4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_imm_st4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_reg_st4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_imm_st4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_reg_st4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1f64_post_imm_st4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1f64_post_reg_st4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_imm_st1x2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_reg_st1x2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_imm_st1x2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_reg_st1x2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_imm_st1x2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_reg_st1x2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_imm_st1x2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_reg_st1x2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_imm_st1x2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_reg_st1x2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_imm_st1x2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_reg_st1x2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_imm_st1x2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_reg_st1x2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_imm_st1x2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_reg_st1x2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_imm_st1x2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_reg_st1x2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_imm_st1x2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_reg_st1x2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_imm_st1x2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_reg_st1x2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1f64_post_imm_st1x2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1f64_post_reg_st1x2 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_imm_st1x3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_reg_st1x3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_imm_st1x3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_reg_st1x3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_imm_st1x3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_reg_st1x3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_imm_st1x3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_reg_st1x3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_imm_st1x3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_reg_st1x3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_imm_st1x3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_reg_st1x3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_imm_st1x3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_reg_st1x3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_imm_st1x3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_reg_st1x3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_imm_st1x3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_reg_st1x3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_imm_st1x3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_reg_st1x3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_imm_st1x3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_reg_st1x3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1f64_post_imm_st1x3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1f64_post_reg_st1x3 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_imm_st1x4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_reg_st1x4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_imm_st1x4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_reg_st1x4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_imm_st1x4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_reg_st1x4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_imm_st1x4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_reg_st1x4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_imm_st1x4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_reg_st1x4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_imm_st1x4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_reg_st1x4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_imm_st1x4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_reg_st1x4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_imm_st1x4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_reg_st1x4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_imm_st1x4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_reg_st1x4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_imm_st1x4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_reg_st1x4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_imm_st1x4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_reg_st1x4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1f64_post_imm_st1x4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1f64_post_reg_st1x4 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_imm_st2lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_reg_st2lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_imm_st2lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_reg_st2lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_imm_st2lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_reg_st2lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_imm_st2lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_reg_st2lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_imm_st2lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_reg_st2lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_imm_st2lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_reg_st2lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_imm_st2lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_reg_st2lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_imm_st2lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_reg_st2lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_imm_st2lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_reg_st2lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_imm_st2lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_reg_st2lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_imm_st2lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_reg_st2lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1f64_post_imm_st2lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1f64_post_reg_st2lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_imm_st3lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_reg_st3lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_imm_st3lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_reg_st3lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_imm_st3lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_reg_st3lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_imm_st3lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_reg_st3lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_imm_st3lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_reg_st3lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_imm_st3lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_reg_st3lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_imm_st3lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_reg_st3lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_imm_st3lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_reg_st3lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_imm_st3lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_reg_st3lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_imm_st3lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_reg_st3lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_imm_st3lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_reg_st3lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1f64_post_imm_st3lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1f64_post_reg_st3lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_imm_st4lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_reg_st4lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_imm_st4lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_reg_st4lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_imm_st4lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_reg_st4lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_imm_st4lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_reg_st4lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_imm_st4lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_reg_st4lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_imm_st4lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_reg_st4lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_imm_st4lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_reg_st4lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_imm_st4lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1i64_post_reg_st4lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_imm_st4lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_reg_st4lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_imm_st4lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_reg_st4lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_imm_st4lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_reg_st4lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1f64_post_imm_st4lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v1f64_post_reg_st4lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_imm_ld1r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_reg_ld1r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_imm_ld1r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_reg_ld1r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_imm_ld1r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_reg_ld1r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_imm_ld1r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_reg_ld1r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_imm_ld1r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_reg_ld1r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_imm_ld1r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_reg_ld1r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_imm_ld1r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_reg_ld1r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_imm_ld1r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_reg_ld1r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_imm_ld1r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_reg_ld1r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_imm_ld1r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_reg_ld1r -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_imm_ld1lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v16i8_post_reg_ld1lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_imm_ld1lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i8_post_reg_ld1lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_imm_ld1lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v8i16_post_reg_ld1lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_imm_ld1lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_reg_ld1lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_imm_ld1lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i32_post_reg_ld1lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_imm_ld1lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i32_post_reg_ld1lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_imm_ld1lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2i64_post_reg_ld1lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_imm_ld1lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_reg_ld1lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_imm_ld1lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f32_post_reg_ld1lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_imm_ld1lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v2f64_post_reg_ld1lane -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4f32_post_reg_ld1lane_dep_vec_on_load -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_v4i16_post_reg_ld1lane_forced_narrow -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_ld1lane_build -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_ld1lane_build_i16 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_ld1lane_build_half -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_ld1lane_build_i8 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for test_inc_cycle -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for load_single_extract_variable_index_i8 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for load_single_extract_variable_index_i16 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for load_single_extract_variable_index_i32 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for load_single_extract_variable_index_masked_i32 -; CHECK-GISEL-NOT: warning: Instruction selection used fallback path for load_single_extract_variable_index_masked2_i32 +; RUN: llc -mtriple=arm64-apple-ios7.0 -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-SD +; RUN: llc -global-isel=1 -mtriple=arm64-apple-ios7.0 -o - %s 2>&1 | FileCheck %s --check-prefixes=CHECK,CHECK-GI @ptr = global ptr null @@ -834,20 +213,20 @@ define void @test_v2f32_post_store(<2 x float> %in, ptr %addr) { } define <1 x i64> @test_v1i64_pre_load(ptr %addr) { -; SDAG-LABEL: test_v1i64_pre_load: -; SDAG: ; %bb.0: -; SDAG-NEXT: ldr d0, [x0, #40]! -; SDAG-NEXT: adrp x8, _ptr@PAGE -; SDAG-NEXT: str x0, [x8, _ptr@PAGEOFF] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v1i64_pre_load: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ldr d0, [x0, #40]! +; CHECK-SD-NEXT: adrp x8, _ptr@PAGE +; CHECK-SD-NEXT: str x0, [x8, _ptr@PAGEOFF] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v1i64_pre_load: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ldr x8, [x0, #40]! -; CHECK-GISEL-NEXT: adrp x9, _ptr@PAGE -; CHECK-GISEL-NEXT: str x0, [x9, _ptr@PAGEOFF] -; CHECK-GISEL-NEXT: fmov d0, x8 -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v1i64_pre_load: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ldr x8, [x0, #40]! +; CHECK-GI-NEXT: adrp x9, _ptr@PAGE +; CHECK-GI-NEXT: str x0, [x9, _ptr@PAGEOFF] +; CHECK-GI-NEXT: fmov d0, x8 +; CHECK-GI-NEXT: ret %newaddr = getelementptr <1 x i64>, ptr %addr, i32 5 %val = load <1 x i64>, ptr %newaddr, align 8 store ptr %newaddr, ptr @ptr @@ -855,20 +234,20 @@ define <1 x i64> @test_v1i64_pre_load(ptr %addr) { } define <1 x i64> @test_v1i64_post_load(ptr %addr) { -; SDAG-LABEL: test_v1i64_post_load: -; SDAG: ; %bb.0: -; SDAG-NEXT: ldr d0, [x0], #40 -; SDAG-NEXT: adrp x8, _ptr@PAGE -; SDAG-NEXT: str x0, [x8, _ptr@PAGEOFF] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v1i64_post_load: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ldr d0, [x0], #40 +; CHECK-SD-NEXT: adrp x8, _ptr@PAGE +; CHECK-SD-NEXT: str x0, [x8, _ptr@PAGEOFF] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v1i64_post_load: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ldr x8, [x0], #40 -; CHECK-GISEL-NEXT: adrp x9, _ptr@PAGE -; CHECK-GISEL-NEXT: str x0, [x9, _ptr@PAGEOFF] -; CHECK-GISEL-NEXT: fmov d0, x8 -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v1i64_post_load: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ldr x8, [x0], #40 +; CHECK-GI-NEXT: adrp x9, _ptr@PAGE +; CHECK-GI-NEXT: str x0, [x9, _ptr@PAGEOFF] +; CHECK-GI-NEXT: fmov d0, x8 +; CHECK-GI-NEXT: ret %newaddr = getelementptr <1 x i64>, ptr %addr, i32 5 %val = load <1 x i64>, ptr %addr, align 8 store ptr %newaddr, ptr @ptr @@ -1217,16 +596,16 @@ define void @test_v2f64_post_store(<2 x double> %in, ptr %addr) { } define ptr @test_v16i8_post_imm_st1_lane(<16 x i8> %in, ptr %addr) { -; SDAG-LABEL: test_v16i8_post_imm_st1_lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: st1.b { v0 }[3], [x0], #1 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v16i8_post_imm_st1_lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: st1.b { v0 }[3], [x0], #1 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v16i8_post_imm_st1_lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov b0, v0[3] -; CHECK-GISEL-NEXT: str b0, [x0], #1 -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v16i8_post_imm_st1_lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov b0, v0[3] +; CHECK-GI-NEXT: str b0, [x0], #1 +; CHECK-GI-NEXT: ret %elt = extractelement <16 x i8> %in, i32 3 store i8 %elt, ptr %addr @@ -1235,17 +614,17 @@ define ptr @test_v16i8_post_imm_st1_lane(<16 x i8> %in, ptr %addr) { } define ptr @test_v16i8_post_reg_st1_lane(<16 x i8> %in, ptr %addr) { -; SDAG-LABEL: test_v16i8_post_reg_st1_lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: mov w8, #2 ; =0x2 -; SDAG-NEXT: st1.b { v0 }[3], [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v16i8_post_reg_st1_lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: mov w8, #2 ; =0x2 +; CHECK-SD-NEXT: st1.b { v0 }[3], [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v16i8_post_reg_st1_lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov b0, v0[3] -; CHECK-GISEL-NEXT: str b0, [x0], #2 -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v16i8_post_reg_st1_lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov b0, v0[3] +; CHECK-GI-NEXT: str b0, [x0], #2 +; CHECK-GI-NEXT: ret %elt = extractelement <16 x i8> %in, i32 3 store i8 %elt, ptr %addr @@ -1255,16 +634,16 @@ define ptr @test_v16i8_post_reg_st1_lane(<16 x i8> %in, ptr %addr) { define ptr @test_v8i16_post_imm_st1_lane(<8 x i16> %in, ptr %addr) { -; SDAG-LABEL: test_v8i16_post_imm_st1_lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: st1.h { v0 }[3], [x0], #2 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i16_post_imm_st1_lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: st1.h { v0 }[3], [x0], #2 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i16_post_imm_st1_lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov h0, v0[3] -; CHECK-GISEL-NEXT: str h0, [x0], #2 -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i16_post_imm_st1_lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov h0, v0[3] +; CHECK-GI-NEXT: str h0, [x0], #2 +; CHECK-GI-NEXT: ret %elt = extractelement <8 x i16> %in, i32 3 store i16 %elt, ptr %addr @@ -1273,17 +652,17 @@ define ptr @test_v8i16_post_imm_st1_lane(<8 x i16> %in, ptr %addr) { } define ptr @test_v8i16_post_reg_st1_lane(<8 x i16> %in, ptr %addr) { -; SDAG-LABEL: test_v8i16_post_reg_st1_lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: mov w8, #4 ; =0x4 -; SDAG-NEXT: st1.h { v0 }[3], [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i16_post_reg_st1_lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: mov w8, #4 ; =0x4 +; CHECK-SD-NEXT: st1.h { v0 }[3], [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i16_post_reg_st1_lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov h0, v0[3] -; CHECK-GISEL-NEXT: str h0, [x0], #4 -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i16_post_reg_st1_lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov h0, v0[3] +; CHECK-GI-NEXT: str h0, [x0], #4 +; CHECK-GI-NEXT: ret %elt = extractelement <8 x i16> %in, i32 3 store i16 %elt, ptr %addr @@ -1292,16 +671,16 @@ define ptr @test_v8i16_post_reg_st1_lane(<8 x i16> %in, ptr %addr) { } define ptr @test_v4i32_post_imm_st1_lane(<4 x i32> %in, ptr %addr) { -; SDAG-LABEL: test_v4i32_post_imm_st1_lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: st1.s { v0 }[3], [x0], #4 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i32_post_imm_st1_lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: st1.s { v0 }[3], [x0], #4 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i32_post_imm_st1_lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov s0, v0[3] -; CHECK-GISEL-NEXT: str s0, [x0], #4 -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i32_post_imm_st1_lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov s0, v0[3] +; CHECK-GI-NEXT: str s0, [x0], #4 +; CHECK-GI-NEXT: ret %elt = extractelement <4 x i32> %in, i32 3 store i32 %elt, ptr %addr @@ -1310,17 +689,17 @@ define ptr @test_v4i32_post_imm_st1_lane(<4 x i32> %in, ptr %addr) { } define ptr @test_v4i32_post_reg_st1_lane(<4 x i32> %in, ptr %addr) { -; SDAG-LABEL: test_v4i32_post_reg_st1_lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: mov w8, #8 ; =0x8 -; SDAG-NEXT: st1.s { v0 }[3], [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i32_post_reg_st1_lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: mov w8, #8 ; =0x8 +; CHECK-SD-NEXT: st1.s { v0 }[3], [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i32_post_reg_st1_lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov s0, v0[3] -; CHECK-GISEL-NEXT: str s0, [x0], #8 -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i32_post_reg_st1_lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov s0, v0[3] +; CHECK-GI-NEXT: str s0, [x0], #8 +; CHECK-GI-NEXT: ret %elt = extractelement <4 x i32> %in, i32 3 store i32 %elt, ptr %addr @@ -1329,16 +708,16 @@ define ptr @test_v4i32_post_reg_st1_lane(<4 x i32> %in, ptr %addr) { } define ptr @test_v4f32_post_imm_st1_lane(<4 x float> %in, ptr %addr) { -; SDAG-LABEL: test_v4f32_post_imm_st1_lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: st1.s { v0 }[3], [x0], #4 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4f32_post_imm_st1_lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: st1.s { v0 }[3], [x0], #4 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4f32_post_imm_st1_lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov s0, v0[3] -; CHECK-GISEL-NEXT: str s0, [x0], #4 -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4f32_post_imm_st1_lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov s0, v0[3] +; CHECK-GI-NEXT: str s0, [x0], #4 +; CHECK-GI-NEXT: ret %elt = extractelement <4 x float> %in, i32 3 store float %elt, ptr %addr @@ -1347,17 +726,17 @@ define ptr @test_v4f32_post_imm_st1_lane(<4 x float> %in, ptr %addr) { } define ptr @test_v4f32_post_reg_st1_lane(<4 x float> %in, ptr %addr) { -; SDAG-LABEL: test_v4f32_post_reg_st1_lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: mov w8, #8 ; =0x8 -; SDAG-NEXT: st1.s { v0 }[3], [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4f32_post_reg_st1_lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: mov w8, #8 ; =0x8 +; CHECK-SD-NEXT: st1.s { v0 }[3], [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4f32_post_reg_st1_lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov s0, v0[3] -; CHECK-GISEL-NEXT: str s0, [x0], #8 -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4f32_post_reg_st1_lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov s0, v0[3] +; CHECK-GI-NEXT: str s0, [x0], #8 +; CHECK-GI-NEXT: ret %elt = extractelement <4 x float> %in, i32 3 store float %elt, ptr %addr @@ -1366,16 +745,16 @@ define ptr @test_v4f32_post_reg_st1_lane(<4 x float> %in, ptr %addr) { } define ptr @test_v2i64_post_imm_st1_lane(<2 x i64> %in, ptr %addr) { -; SDAG-LABEL: test_v2i64_post_imm_st1_lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: st1.d { v0 }[1], [x0], #8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i64_post_imm_st1_lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: st1.d { v0 }[1], [x0], #8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i64_post_imm_st1_lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov d0, v0[1] -; CHECK-GISEL-NEXT: str d0, [x0], #8 -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i64_post_imm_st1_lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov d0, v0[1] +; CHECK-GI-NEXT: str d0, [x0], #8 +; CHECK-GI-NEXT: ret %elt = extractelement <2 x i64> %in, i64 1 store i64 %elt, ptr %addr @@ -1384,17 +763,17 @@ define ptr @test_v2i64_post_imm_st1_lane(<2 x i64> %in, ptr %addr) { } define ptr @test_v2i64_post_reg_st1_lane(<2 x i64> %in, ptr %addr) { -; SDAG-LABEL: test_v2i64_post_reg_st1_lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: mov w8, #16 ; =0x10 -; SDAG-NEXT: st1.d { v0 }[1], [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i64_post_reg_st1_lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: mov w8, #16 ; =0x10 +; CHECK-SD-NEXT: st1.d { v0 }[1], [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i64_post_reg_st1_lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov d0, v0[1] -; CHECK-GISEL-NEXT: str d0, [x0], #16 -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i64_post_reg_st1_lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov d0, v0[1] +; CHECK-GI-NEXT: str d0, [x0], #16 +; CHECK-GI-NEXT: ret %elt = extractelement <2 x i64> %in, i64 1 store i64 %elt, ptr %addr @@ -1403,16 +782,16 @@ define ptr @test_v2i64_post_reg_st1_lane(<2 x i64> %in, ptr %addr) { } define ptr @test_v2f64_post_imm_st1_lane(<2 x double> %in, ptr %addr) { -; SDAG-LABEL: test_v2f64_post_imm_st1_lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: st1.d { v0 }[1], [x0], #8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f64_post_imm_st1_lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: st1.d { v0 }[1], [x0], #8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f64_post_imm_st1_lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov d0, v0[1] -; CHECK-GISEL-NEXT: str d0, [x0], #8 -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f64_post_imm_st1_lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov d0, v0[1] +; CHECK-GI-NEXT: str d0, [x0], #8 +; CHECK-GI-NEXT: ret %elt = extractelement <2 x double> %in, i32 1 store double %elt, ptr %addr @@ -1421,17 +800,17 @@ define ptr @test_v2f64_post_imm_st1_lane(<2 x double> %in, ptr %addr) { } define ptr @test_v2f64_post_reg_st1_lane(<2 x double> %in, ptr %addr) { -; SDAG-LABEL: test_v2f64_post_reg_st1_lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: mov w8, #16 ; =0x10 -; SDAG-NEXT: st1.d { v0 }[1], [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f64_post_reg_st1_lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: mov w8, #16 ; =0x10 +; CHECK-SD-NEXT: st1.d { v0 }[1], [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f64_post_reg_st1_lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov d0, v0[1] -; CHECK-GISEL-NEXT: str d0, [x0], #16 -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f64_post_reg_st1_lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov d0, v0[1] +; CHECK-GI-NEXT: str d0, [x0], #16 +; CHECK-GI-NEXT: ret %elt = extractelement <2 x double> %in, i32 1 store double %elt, ptr %addr @@ -1440,18 +819,18 @@ define ptr @test_v2f64_post_reg_st1_lane(<2 x double> %in, ptr %addr) { } define ptr @test_v8i8_post_imm_st1_lane(<8 x i8> %in, ptr %addr) { -; SDAG-LABEL: test_v8i8_post_imm_st1_lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d0 killed $d0 def $q0 -; SDAG-NEXT: st1.b { v0 }[3], [x0], #1 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i8_post_imm_st1_lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 def $q0 +; CHECK-SD-NEXT: st1.b { v0 }[3], [x0], #1 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i8_post_imm_st1_lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 def $q0 -; CHECK-GISEL-NEXT: mov b0, v0[3] -; CHECK-GISEL-NEXT: str b0, [x0], #1 -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i8_post_imm_st1_lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 def $q0 +; CHECK-GI-NEXT: mov b0, v0[3] +; CHECK-GI-NEXT: str b0, [x0], #1 +; CHECK-GI-NEXT: ret %elt = extractelement <8 x i8> %in, i32 3 store i8 %elt, ptr %addr @@ -1460,19 +839,19 @@ define ptr @test_v8i8_post_imm_st1_lane(<8 x i8> %in, ptr %addr) { } define ptr @test_v8i8_post_reg_st1_lane(<8 x i8> %in, ptr %addr) { -; SDAG-LABEL: test_v8i8_post_reg_st1_lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: mov w8, #2 ; =0x2 -; SDAG-NEXT: ; kill: def $d0 killed $d0 def $q0 -; SDAG-NEXT: st1.b { v0 }[3], [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i8_post_reg_st1_lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: mov w8, #2 ; =0x2 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 def $q0 +; CHECK-SD-NEXT: st1.b { v0 }[3], [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i8_post_reg_st1_lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 def $q0 -; CHECK-GISEL-NEXT: mov b0, v0[3] -; CHECK-GISEL-NEXT: str b0, [x0], #2 -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i8_post_reg_st1_lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 def $q0 +; CHECK-GI-NEXT: mov b0, v0[3] +; CHECK-GI-NEXT: str b0, [x0], #2 +; CHECK-GI-NEXT: ret %elt = extractelement <8 x i8> %in, i32 3 store i8 %elt, ptr %addr @@ -1481,18 +860,18 @@ define ptr @test_v8i8_post_reg_st1_lane(<8 x i8> %in, ptr %addr) { } define ptr @test_v4i16_post_imm_st1_lane(<4 x i16> %in, ptr %addr) { -; SDAG-LABEL: test_v4i16_post_imm_st1_lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d0 killed $d0 def $q0 -; SDAG-NEXT: st1.h { v0 }[3], [x0], #2 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i16_post_imm_st1_lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 def $q0 +; CHECK-SD-NEXT: st1.h { v0 }[3], [x0], #2 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i16_post_imm_st1_lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 def $q0 -; CHECK-GISEL-NEXT: mov h0, v0[3] -; CHECK-GISEL-NEXT: str h0, [x0], #2 -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i16_post_imm_st1_lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 def $q0 +; CHECK-GI-NEXT: mov h0, v0[3] +; CHECK-GI-NEXT: str h0, [x0], #2 +; CHECK-GI-NEXT: ret %elt = extractelement <4 x i16> %in, i32 3 store i16 %elt, ptr %addr @@ -1501,19 +880,19 @@ define ptr @test_v4i16_post_imm_st1_lane(<4 x i16> %in, ptr %addr) { } define ptr @test_v4i16_post_reg_st1_lane(<4 x i16> %in, ptr %addr) { -; SDAG-LABEL: test_v4i16_post_reg_st1_lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: mov w8, #4 ; =0x4 -; SDAG-NEXT: ; kill: def $d0 killed $d0 def $q0 -; SDAG-NEXT: st1.h { v0 }[3], [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i16_post_reg_st1_lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: mov w8, #4 ; =0x4 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 def $q0 +; CHECK-SD-NEXT: st1.h { v0 }[3], [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i16_post_reg_st1_lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 def $q0 -; CHECK-GISEL-NEXT: mov h0, v0[3] -; CHECK-GISEL-NEXT: str h0, [x0], #4 -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i16_post_reg_st1_lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 def $q0 +; CHECK-GI-NEXT: mov h0, v0[3] +; CHECK-GI-NEXT: str h0, [x0], #4 +; CHECK-GI-NEXT: ret %elt = extractelement <4 x i16> %in, i32 3 store i16 %elt, ptr %addr @@ -1522,18 +901,18 @@ define ptr @test_v4i16_post_reg_st1_lane(<4 x i16> %in, ptr %addr) { } define ptr @test_v2i32_post_imm_st1_lane(<2 x i32> %in, ptr %addr) { -; SDAG-LABEL: test_v2i32_post_imm_st1_lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d0 killed $d0 def $q0 -; SDAG-NEXT: st1.s { v0 }[1], [x0], #4 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i32_post_imm_st1_lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 def $q0 +; CHECK-SD-NEXT: st1.s { v0 }[1], [x0], #4 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i32_post_imm_st1_lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 def $q0 -; CHECK-GISEL-NEXT: mov s0, v0[1] -; CHECK-GISEL-NEXT: str s0, [x0], #4 -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i32_post_imm_st1_lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 def $q0 +; CHECK-GI-NEXT: mov s0, v0[1] +; CHECK-GI-NEXT: str s0, [x0], #4 +; CHECK-GI-NEXT: ret %elt = extractelement <2 x i32> %in, i32 1 store i32 %elt, ptr %addr @@ -1542,19 +921,19 @@ define ptr @test_v2i32_post_imm_st1_lane(<2 x i32> %in, ptr %addr) { } define ptr @test_v2i32_post_reg_st1_lane(<2 x i32> %in, ptr %addr) { -; SDAG-LABEL: test_v2i32_post_reg_st1_lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: mov w8, #8 ; =0x8 -; SDAG-NEXT: ; kill: def $d0 killed $d0 def $q0 -; SDAG-NEXT: st1.s { v0 }[1], [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i32_post_reg_st1_lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: mov w8, #8 ; =0x8 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 def $q0 +; CHECK-SD-NEXT: st1.s { v0 }[1], [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i32_post_reg_st1_lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 def $q0 -; CHECK-GISEL-NEXT: mov s0, v0[1] -; CHECK-GISEL-NEXT: str s0, [x0], #8 -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i32_post_reg_st1_lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 def $q0 +; CHECK-GI-NEXT: mov s0, v0[1] +; CHECK-GI-NEXT: str s0, [x0], #8 +; CHECK-GI-NEXT: ret %elt = extractelement <2 x i32> %in, i32 1 store i32 %elt, ptr %addr @@ -1563,18 +942,18 @@ define ptr @test_v2i32_post_reg_st1_lane(<2 x i32> %in, ptr %addr) { } define ptr @test_v2f32_post_imm_st1_lane(<2 x float> %in, ptr %addr) { -; SDAG-LABEL: test_v2f32_post_imm_st1_lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d0 killed $d0 def $q0 -; SDAG-NEXT: st1.s { v0 }[1], [x0], #4 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f32_post_imm_st1_lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 def $q0 +; CHECK-SD-NEXT: st1.s { v0 }[1], [x0], #4 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f32_post_imm_st1_lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 def $q0 -; CHECK-GISEL-NEXT: mov s0, v0[1] -; CHECK-GISEL-NEXT: str s0, [x0], #4 -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f32_post_imm_st1_lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 def $q0 +; CHECK-GI-NEXT: mov s0, v0[1] +; CHECK-GI-NEXT: str s0, [x0], #4 +; CHECK-GI-NEXT: ret %elt = extractelement <2 x float> %in, i32 1 store float %elt, ptr %addr @@ -1583,19 +962,19 @@ define ptr @test_v2f32_post_imm_st1_lane(<2 x float> %in, ptr %addr) { } define ptr @test_v2f32_post_reg_st1_lane(<2 x float> %in, ptr %addr) { -; SDAG-LABEL: test_v2f32_post_reg_st1_lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: mov w8, #8 ; =0x8 -; SDAG-NEXT: ; kill: def $d0 killed $d0 def $q0 -; SDAG-NEXT: st1.s { v0 }[1], [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f32_post_reg_st1_lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: mov w8, #8 ; =0x8 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 def $q0 +; CHECK-SD-NEXT: st1.s { v0 }[1], [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f32_post_reg_st1_lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 def $q0 -; CHECK-GISEL-NEXT: mov s0, v0[1] -; CHECK-GISEL-NEXT: str s0, [x0], #8 -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f32_post_reg_st1_lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 def $q0 +; CHECK-GI-NEXT: mov s0, v0[1] +; CHECK-GI-NEXT: str s0, [x0], #8 +; CHECK-GI-NEXT: ret %elt = extractelement <2 x float> %in, i32 1 store float %elt, ptr %addr @@ -1604,18 +983,18 @@ define ptr @test_v2f32_post_reg_st1_lane(<2 x float> %in, ptr %addr) { } define { <16 x i8>, <16 x i8> } @test_v16i8_post_imm_ld2(ptr %A, ptr %ptr) { -; SDAG-LABEL: test_v16i8_post_imm_ld2: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld2.16b { v0, v1 }, [x0], #32 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v16i8_post_imm_ld2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld2.16b { v0, v1 }, [x0], #32 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v16i8_post_imm_ld2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld2.16b { v0, v1 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #32 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v16i8_post_imm_ld2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld2.16b { v0, v1 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #32 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld2 = tail call { <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld2.v16i8.p0(ptr %A) %tmp = getelementptr i8, ptr %A, i32 32 store ptr %tmp, ptr %ptr @@ -1623,18 +1002,18 @@ define { <16 x i8>, <16 x i8> } @test_v16i8_post_imm_ld2(ptr %A, ptr %ptr) { } define { <16 x i8>, <16 x i8> } @test_v16i8_post_reg_ld2(ptr %A, ptr %ptr, i64 %inc) { -; SDAG-LABEL: test_v16i8_post_reg_ld2: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld2.16b { v0, v1 }, [x0], x2 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v16i8_post_reg_ld2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld2.16b { v0, v1 }, [x0], x2 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v16i8_post_reg_ld2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld2.16b { v0, v1 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v16i8_post_reg_ld2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld2.16b { v0, v1 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld2 = tail call { <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld2.v16i8.p0(ptr %A) %tmp = getelementptr i8, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -1645,18 +1024,18 @@ declare { <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld2.v16i8.p0(ptr) define { <8 x i8>, <8 x i8> } @test_v8i8_post_imm_ld2(ptr %A, ptr %ptr) { -; SDAG-LABEL: test_v8i8_post_imm_ld2: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld2.8b { v0, v1 }, [x0], #16 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i8_post_imm_ld2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld2.8b { v0, v1 }, [x0], #16 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i8_post_imm_ld2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld2.8b { v0, v1 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #16 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i8_post_imm_ld2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld2.8b { v0, v1 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #16 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld2 = tail call { <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld2.v8i8.p0(ptr %A) %tmp = getelementptr i8, ptr %A, i32 16 store ptr %tmp, ptr %ptr @@ -1664,18 +1043,18 @@ define { <8 x i8>, <8 x i8> } @test_v8i8_post_imm_ld2(ptr %A, ptr %ptr) { } define { <8 x i8>, <8 x i8> } @test_v8i8_post_reg_ld2(ptr %A, ptr %ptr, i64 %inc) { -; SDAG-LABEL: test_v8i8_post_reg_ld2: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld2.8b { v0, v1 }, [x0], x2 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i8_post_reg_ld2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld2.8b { v0, v1 }, [x0], x2 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i8_post_reg_ld2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld2.8b { v0, v1 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i8_post_reg_ld2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld2.8b { v0, v1 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld2 = tail call { <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld2.v8i8.p0(ptr %A) %tmp = getelementptr i8, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -1686,18 +1065,18 @@ declare { <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld2.v8i8.p0(ptr) define { <8 x i16>, <8 x i16> } @test_v8i16_post_imm_ld2(ptr %A, ptr %ptr) { -; SDAG-LABEL: test_v8i16_post_imm_ld2: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld2.8h { v0, v1 }, [x0], #32 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i16_post_imm_ld2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld2.8h { v0, v1 }, [x0], #32 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i16_post_imm_ld2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld2.8h { v0, v1 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #32 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i16_post_imm_ld2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld2.8h { v0, v1 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #32 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld2 = tail call { <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld2.v8i16.p0(ptr %A) %tmp = getelementptr i16, ptr %A, i32 16 store ptr %tmp, ptr %ptr @@ -1705,19 +1084,19 @@ define { <8 x i16>, <8 x i16> } @test_v8i16_post_imm_ld2(ptr %A, ptr %ptr) { } define { <8 x i16>, <8 x i16> } @test_v8i16_post_reg_ld2(ptr %A, ptr %ptr, i64 %inc) { -; SDAG-LABEL: test_v8i16_post_reg_ld2: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #1 -; SDAG-NEXT: ld2.8h { v0, v1 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i16_post_reg_ld2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #1 +; CHECK-SD-NEXT: ld2.8h { v0, v1 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i16_post_reg_ld2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld2.8h { v0, v1 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #1 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i16_post_reg_ld2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld2.8h { v0, v1 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #1 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld2 = tail call { <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld2.v8i16.p0(ptr %A) %tmp = getelementptr i16, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -1728,18 +1107,18 @@ declare { <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld2.v8i16.p0(ptr) define { <4 x i16>, <4 x i16> } @test_v4i16_post_imm_ld2(ptr %A, ptr %ptr) { -; SDAG-LABEL: test_v4i16_post_imm_ld2: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld2.4h { v0, v1 }, [x0], #16 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i16_post_imm_ld2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld2.4h { v0, v1 }, [x0], #16 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i16_post_imm_ld2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld2.4h { v0, v1 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #16 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i16_post_imm_ld2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld2.4h { v0, v1 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #16 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld2 = tail call { <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld2.v4i16.p0(ptr %A) %tmp = getelementptr i16, ptr %A, i32 8 store ptr %tmp, ptr %ptr @@ -1747,19 +1126,19 @@ define { <4 x i16>, <4 x i16> } @test_v4i16_post_imm_ld2(ptr %A, ptr %ptr) { } define { <4 x i16>, <4 x i16> } @test_v4i16_post_reg_ld2(ptr %A, ptr %ptr, i64 %inc) { -; SDAG-LABEL: test_v4i16_post_reg_ld2: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #1 -; SDAG-NEXT: ld2.4h { v0, v1 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i16_post_reg_ld2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #1 +; CHECK-SD-NEXT: ld2.4h { v0, v1 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i16_post_reg_ld2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld2.4h { v0, v1 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #1 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i16_post_reg_ld2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld2.4h { v0, v1 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #1 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld2 = tail call { <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld2.v4i16.p0(ptr %A) %tmp = getelementptr i16, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -1770,18 +1149,18 @@ declare { <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld2.v4i16.p0(ptr) define { <4 x i32>, <4 x i32> } @test_v4i32_post_imm_ld2(ptr %A, ptr %ptr) { -; SDAG-LABEL: test_v4i32_post_imm_ld2: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld2.4s { v0, v1 }, [x0], #32 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i32_post_imm_ld2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld2.4s { v0, v1 }, [x0], #32 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i32_post_imm_ld2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld2.4s { v0, v1 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #32 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i32_post_imm_ld2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld2.4s { v0, v1 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #32 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld2 = tail call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2.v4i32.p0(ptr %A) %tmp = getelementptr i32, ptr %A, i32 8 store ptr %tmp, ptr %ptr @@ -1789,19 +1168,19 @@ define { <4 x i32>, <4 x i32> } @test_v4i32_post_imm_ld2(ptr %A, ptr %ptr) { } define { <4 x i32>, <4 x i32> } @test_v4i32_post_reg_ld2(ptr %A, ptr %ptr, i64 %inc) { -; SDAG-LABEL: test_v4i32_post_reg_ld2: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ld2.4s { v0, v1 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i32_post_reg_ld2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ld2.4s { v0, v1 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i32_post_reg_ld2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld2.4s { v0, v1 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i32_post_reg_ld2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld2.4s { v0, v1 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #2 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld2 = tail call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2.v4i32.p0(ptr %A) %tmp = getelementptr i32, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -1812,18 +1191,18 @@ declare { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2.v4i32.p0(ptr) define { <2 x i32>, <2 x i32> } @test_v2i32_post_imm_ld2(ptr %A, ptr %ptr) { -; SDAG-LABEL: test_v2i32_post_imm_ld2: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld2.2s { v0, v1 }, [x0], #16 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i32_post_imm_ld2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld2.2s { v0, v1 }, [x0], #16 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i32_post_imm_ld2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld2.2s { v0, v1 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #16 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i32_post_imm_ld2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld2.2s { v0, v1 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #16 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld2 = tail call { <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld2.v2i32.p0(ptr %A) %tmp = getelementptr i32, ptr %A, i32 4 store ptr %tmp, ptr %ptr @@ -1831,19 +1210,19 @@ define { <2 x i32>, <2 x i32> } @test_v2i32_post_imm_ld2(ptr %A, ptr %ptr) { } define { <2 x i32>, <2 x i32> } @test_v2i32_post_reg_ld2(ptr %A, ptr %ptr, i64 %inc) { -; SDAG-LABEL: test_v2i32_post_reg_ld2: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ld2.2s { v0, v1 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i32_post_reg_ld2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ld2.2s { v0, v1 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i32_post_reg_ld2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld2.2s { v0, v1 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i32_post_reg_ld2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld2.2s { v0, v1 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #2 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld2 = tail call { <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld2.v2i32.p0(ptr %A) %tmp = getelementptr i32, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -1854,18 +1233,18 @@ declare { <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld2.v2i32.p0(ptr) define { <2 x i64>, <2 x i64> } @test_v2i64_post_imm_ld2(ptr %A, ptr %ptr) { -; SDAG-LABEL: test_v2i64_post_imm_ld2: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld2.2d { v0, v1 }, [x0], #32 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i64_post_imm_ld2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld2.2d { v0, v1 }, [x0], #32 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i64_post_imm_ld2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld2.2d { v0, v1 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #32 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i64_post_imm_ld2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld2.2d { v0, v1 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #32 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld2 = tail call { <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld2.v2i64.p0(ptr %A) %tmp = getelementptr i64, ptr %A, i32 4 store ptr %tmp, ptr %ptr @@ -1873,19 +1252,19 @@ define { <2 x i64>, <2 x i64> } @test_v2i64_post_imm_ld2(ptr %A, ptr %ptr) { } define { <2 x i64>, <2 x i64> } @test_v2i64_post_reg_ld2(ptr %A, ptr %ptr, i64 %inc) { -; SDAG-LABEL: test_v2i64_post_reg_ld2: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ld2.2d { v0, v1 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i64_post_reg_ld2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ld2.2d { v0, v1 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i64_post_reg_ld2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld2.2d { v0, v1 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i64_post_reg_ld2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld2.2d { v0, v1 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #3 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld2 = tail call { <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld2.v2i64.p0(ptr %A) %tmp = getelementptr i64, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -1896,18 +1275,18 @@ declare { <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld2.v2i64.p0(ptr) define { <1 x i64>, <1 x i64> } @test_v1i64_post_imm_ld2(ptr %A, ptr %ptr) { -; SDAG-LABEL: test_v1i64_post_imm_ld2: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld1.1d { v0, v1 }, [x0], #16 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v1i64_post_imm_ld2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld1.1d { v0, v1 }, [x0], #16 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v1i64_post_imm_ld2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1.1d { v0, v1 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #16 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v1i64_post_imm_ld2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1.1d { v0, v1 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #16 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld2 = tail call { <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld2.v1i64.p0(ptr %A) %tmp = getelementptr i64, ptr %A, i32 2 store ptr %tmp, ptr %ptr @@ -1915,19 +1294,19 @@ define { <1 x i64>, <1 x i64> } @test_v1i64_post_imm_ld2(ptr %A, ptr %ptr) { } define { <1 x i64>, <1 x i64> } @test_v1i64_post_reg_ld2(ptr %A, ptr %ptr, i64 %inc) { -; SDAG-LABEL: test_v1i64_post_reg_ld2: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ld1.1d { v0, v1 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v1i64_post_reg_ld2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ld1.1d { v0, v1 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v1i64_post_reg_ld2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1.1d { v0, v1 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v1i64_post_reg_ld2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1.1d { v0, v1 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #3 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld2 = tail call { <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld2.v1i64.p0(ptr %A) %tmp = getelementptr i64, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -1938,18 +1317,18 @@ declare { <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld2.v1i64.p0(ptr) define { <4 x float>, <4 x float> } @test_v4f32_post_imm_ld2(ptr %A, ptr %ptr) { -; SDAG-LABEL: test_v4f32_post_imm_ld2: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld2.4s { v0, v1 }, [x0], #32 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4f32_post_imm_ld2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld2.4s { v0, v1 }, [x0], #32 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4f32_post_imm_ld2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld2.4s { v0, v1 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #32 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4f32_post_imm_ld2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld2.4s { v0, v1 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #32 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld2 = tail call { <4 x float>, <4 x float> } @llvm.aarch64.neon.ld2.v4f32.p0(ptr %A) %tmp = getelementptr float, ptr %A, i32 8 store ptr %tmp, ptr %ptr @@ -1957,19 +1336,19 @@ define { <4 x float>, <4 x float> } @test_v4f32_post_imm_ld2(ptr %A, ptr %ptr) { } define { <4 x float>, <4 x float> } @test_v4f32_post_reg_ld2(ptr %A, ptr %ptr, i64 %inc) { -; SDAG-LABEL: test_v4f32_post_reg_ld2: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ld2.4s { v0, v1 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4f32_post_reg_ld2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ld2.4s { v0, v1 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4f32_post_reg_ld2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld2.4s { v0, v1 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4f32_post_reg_ld2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld2.4s { v0, v1 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #2 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld2 = tail call { <4 x float>, <4 x float> } @llvm.aarch64.neon.ld2.v4f32.p0(ptr %A) %tmp = getelementptr float, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -1980,18 +1359,18 @@ declare { <4 x float>, <4 x float> } @llvm.aarch64.neon.ld2.v4f32.p0(ptr) define { <2 x float>, <2 x float> } @test_v2f32_post_imm_ld2(ptr %A, ptr %ptr) { -; SDAG-LABEL: test_v2f32_post_imm_ld2: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld2.2s { v0, v1 }, [x0], #16 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f32_post_imm_ld2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld2.2s { v0, v1 }, [x0], #16 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f32_post_imm_ld2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld2.2s { v0, v1 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #16 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f32_post_imm_ld2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld2.2s { v0, v1 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #16 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld2 = tail call { <2 x float>, <2 x float> } @llvm.aarch64.neon.ld2.v2f32.p0(ptr %A) %tmp = getelementptr float, ptr %A, i32 4 store ptr %tmp, ptr %ptr @@ -1999,19 +1378,19 @@ define { <2 x float>, <2 x float> } @test_v2f32_post_imm_ld2(ptr %A, ptr %ptr) { } define { <2 x float>, <2 x float> } @test_v2f32_post_reg_ld2(ptr %A, ptr %ptr, i64 %inc) { -; SDAG-LABEL: test_v2f32_post_reg_ld2: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ld2.2s { v0, v1 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f32_post_reg_ld2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ld2.2s { v0, v1 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f32_post_reg_ld2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld2.2s { v0, v1 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f32_post_reg_ld2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld2.2s { v0, v1 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #2 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld2 = tail call { <2 x float>, <2 x float> } @llvm.aarch64.neon.ld2.v2f32.p0(ptr %A) %tmp = getelementptr float, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -2022,18 +1401,18 @@ declare { <2 x float>, <2 x float> } @llvm.aarch64.neon.ld2.v2f32.p0(ptr) define { <2 x double>, <2 x double> } @test_v2f64_post_imm_ld2(ptr %A, ptr %ptr) { -; SDAG-LABEL: test_v2f64_post_imm_ld2: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld2.2d { v0, v1 }, [x0], #32 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f64_post_imm_ld2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld2.2d { v0, v1 }, [x0], #32 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f64_post_imm_ld2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld2.2d { v0, v1 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #32 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f64_post_imm_ld2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld2.2d { v0, v1 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #32 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld2 = tail call { <2 x double>, <2 x double> } @llvm.aarch64.neon.ld2.v2f64.p0(ptr %A) %tmp = getelementptr double, ptr %A, i32 4 store ptr %tmp, ptr %ptr @@ -2041,19 +1420,19 @@ define { <2 x double>, <2 x double> } @test_v2f64_post_imm_ld2(ptr %A, ptr %ptr) } define { <2 x double>, <2 x double> } @test_v2f64_post_reg_ld2(ptr %A, ptr %ptr, i64 %inc) { -; SDAG-LABEL: test_v2f64_post_reg_ld2: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ld2.2d { v0, v1 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f64_post_reg_ld2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ld2.2d { v0, v1 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f64_post_reg_ld2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld2.2d { v0, v1 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f64_post_reg_ld2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld2.2d { v0, v1 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #3 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld2 = tail call { <2 x double>, <2 x double> } @llvm.aarch64.neon.ld2.v2f64.p0(ptr %A) %tmp = getelementptr double, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -2064,18 +1443,18 @@ declare { <2 x double>, <2 x double> } @llvm.aarch64.neon.ld2.v2f64.p0(ptr) define { <1 x double>, <1 x double> } @test_v1f64_post_imm_ld2(ptr %A, ptr %ptr) { -; SDAG-LABEL: test_v1f64_post_imm_ld2: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld1.1d { v0, v1 }, [x0], #16 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v1f64_post_imm_ld2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld1.1d { v0, v1 }, [x0], #16 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v1f64_post_imm_ld2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1.1d { v0, v1 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #16 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v1f64_post_imm_ld2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1.1d { v0, v1 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #16 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld2 = tail call { <1 x double>, <1 x double> } @llvm.aarch64.neon.ld2.v1f64.p0(ptr %A) %tmp = getelementptr double, ptr %A, i32 2 store ptr %tmp, ptr %ptr @@ -2083,19 +1462,19 @@ define { <1 x double>, <1 x double> } @test_v1f64_post_imm_ld2(ptr %A, ptr %ptr) } define { <1 x double>, <1 x double> } @test_v1f64_post_reg_ld2(ptr %A, ptr %ptr, i64 %inc) { -; SDAG-LABEL: test_v1f64_post_reg_ld2: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ld1.1d { v0, v1 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v1f64_post_reg_ld2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ld1.1d { v0, v1 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v1f64_post_reg_ld2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1.1d { v0, v1 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v1f64_post_reg_ld2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1.1d { v0, v1 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #3 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld2 = tail call { <1 x double>, <1 x double> } @llvm.aarch64.neon.ld2.v1f64.p0(ptr %A) %tmp = getelementptr double, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -2106,18 +1485,18 @@ declare { <1 x double>, <1 x double> } @llvm.aarch64.neon.ld2.v1f64.p0(ptr) define { <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_imm_ld3(ptr %A, ptr %ptr) { -; SDAG-LABEL: test_v16i8_post_imm_ld3: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld3.16b { v0, v1, v2 }, [x0], #48 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v16i8_post_imm_ld3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld3.16b { v0, v1, v2 }, [x0], #48 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v16i8_post_imm_ld3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld3.16b { v0, v1, v2 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #48 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v16i8_post_imm_ld3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld3.16b { v0, v1, v2 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #48 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld3 = tail call { <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld3.v16i8.p0(ptr %A) %tmp = getelementptr i8, ptr %A, i32 48 store ptr %tmp, ptr %ptr @@ -2125,18 +1504,18 @@ define { <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_imm_ld3(ptr %A, ptr } define { <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_reg_ld3(ptr %A, ptr %ptr, i64 %inc) { -; SDAG-LABEL: test_v16i8_post_reg_ld3: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld3.16b { v0, v1, v2 }, [x0], x2 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v16i8_post_reg_ld3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld3.16b { v0, v1, v2 }, [x0], x2 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v16i8_post_reg_ld3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld3.16b { v0, v1, v2 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v16i8_post_reg_ld3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld3.16b { v0, v1, v2 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld3 = tail call { <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld3.v16i8.p0(ptr %A) %tmp = getelementptr i8, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -2147,18 +1526,18 @@ declare { <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld3.v16i8.p0(ptr) define { <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_imm_ld3(ptr %A, ptr %ptr) { -; SDAG-LABEL: test_v8i8_post_imm_ld3: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld3.8b { v0, v1, v2 }, [x0], #24 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i8_post_imm_ld3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld3.8b { v0, v1, v2 }, [x0], #24 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i8_post_imm_ld3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld3.8b { v0, v1, v2 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #24 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i8_post_imm_ld3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld3.8b { v0, v1, v2 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #24 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld3 = tail call { <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld3.v8i8.p0(ptr %A) %tmp = getelementptr i8, ptr %A, i32 24 store ptr %tmp, ptr %ptr @@ -2166,18 +1545,18 @@ define { <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_imm_ld3(ptr %A, ptr %ptr } define { <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_reg_ld3(ptr %A, ptr %ptr, i64 %inc) { -; SDAG-LABEL: test_v8i8_post_reg_ld3: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld3.8b { v0, v1, v2 }, [x0], x2 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i8_post_reg_ld3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld3.8b { v0, v1, v2 }, [x0], x2 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i8_post_reg_ld3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld3.8b { v0, v1, v2 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i8_post_reg_ld3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld3.8b { v0, v1, v2 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld3 = tail call { <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld3.v8i8.p0(ptr %A) %tmp = getelementptr i8, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -2188,18 +1567,18 @@ declare { <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld3.v8i8.p0(ptr) define { <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_imm_ld3(ptr %A, ptr %ptr) { -; SDAG-LABEL: test_v8i16_post_imm_ld3: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld3.8h { v0, v1, v2 }, [x0], #48 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i16_post_imm_ld3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld3.8h { v0, v1, v2 }, [x0], #48 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i16_post_imm_ld3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld3.8h { v0, v1, v2 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #48 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i16_post_imm_ld3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld3.8h { v0, v1, v2 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #48 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld3 = tail call { <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld3.v8i16.p0(ptr %A) %tmp = getelementptr i16, ptr %A, i32 24 store ptr %tmp, ptr %ptr @@ -2207,19 +1586,19 @@ define { <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_imm_ld3(ptr %A, ptr } define { <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_reg_ld3(ptr %A, ptr %ptr, i64 %inc) { -; SDAG-LABEL: test_v8i16_post_reg_ld3: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #1 -; SDAG-NEXT: ld3.8h { v0, v1, v2 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i16_post_reg_ld3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #1 +; CHECK-SD-NEXT: ld3.8h { v0, v1, v2 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i16_post_reg_ld3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld3.8h { v0, v1, v2 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #1 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i16_post_reg_ld3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld3.8h { v0, v1, v2 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #1 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld3 = tail call { <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld3.v8i16.p0(ptr %A) %tmp = getelementptr i16, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -2230,18 +1609,18 @@ declare { <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld3.v8i16.p0(ptr) define { <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_imm_ld3(ptr %A, ptr %ptr) { -; SDAG-LABEL: test_v4i16_post_imm_ld3: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld3.4h { v0, v1, v2 }, [x0], #24 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i16_post_imm_ld3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld3.4h { v0, v1, v2 }, [x0], #24 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i16_post_imm_ld3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld3.4h { v0, v1, v2 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #24 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i16_post_imm_ld3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld3.4h { v0, v1, v2 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #24 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld3 = tail call { <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld3.v4i16.p0(ptr %A) %tmp = getelementptr i16, ptr %A, i32 12 store ptr %tmp, ptr %ptr @@ -2249,19 +1628,19 @@ define { <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_imm_ld3(ptr %A, ptr } define { <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_reg_ld3(ptr %A, ptr %ptr, i64 %inc) { -; SDAG-LABEL: test_v4i16_post_reg_ld3: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #1 -; SDAG-NEXT: ld3.4h { v0, v1, v2 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i16_post_reg_ld3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #1 +; CHECK-SD-NEXT: ld3.4h { v0, v1, v2 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i16_post_reg_ld3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld3.4h { v0, v1, v2 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #1 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i16_post_reg_ld3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld3.4h { v0, v1, v2 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #1 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld3 = tail call { <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld3.v4i16.p0(ptr %A) %tmp = getelementptr i16, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -2272,18 +1651,18 @@ declare { <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld3.v4i16.p0(ptr) define { <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_imm_ld3(ptr %A, ptr %ptr) { -; SDAG-LABEL: test_v4i32_post_imm_ld3: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld3.4s { v0, v1, v2 }, [x0], #48 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i32_post_imm_ld3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld3.4s { v0, v1, v2 }, [x0], #48 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i32_post_imm_ld3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld3.4s { v0, v1, v2 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #48 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i32_post_imm_ld3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld3.4s { v0, v1, v2 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #48 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld3 = tail call { <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld3.v4i32.p0(ptr %A) %tmp = getelementptr i32, ptr %A, i32 12 store ptr %tmp, ptr %ptr @@ -2291,19 +1670,19 @@ define { <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_imm_ld3(ptr %A, ptr } define { <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_reg_ld3(ptr %A, ptr %ptr, i64 %inc) { -; SDAG-LABEL: test_v4i32_post_reg_ld3: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ld3.4s { v0, v1, v2 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i32_post_reg_ld3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ld3.4s { v0, v1, v2 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i32_post_reg_ld3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld3.4s { v0, v1, v2 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i32_post_reg_ld3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld3.4s { v0, v1, v2 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #2 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld3 = tail call { <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld3.v4i32.p0(ptr %A) %tmp = getelementptr i32, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -2314,18 +1693,18 @@ declare { <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld3.v4i32.p0(ptr) define { <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_imm_ld3(ptr %A, ptr %ptr) { -; SDAG-LABEL: test_v2i32_post_imm_ld3: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld3.2s { v0, v1, v2 }, [x0], #24 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i32_post_imm_ld3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld3.2s { v0, v1, v2 }, [x0], #24 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i32_post_imm_ld3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld3.2s { v0, v1, v2 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #24 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i32_post_imm_ld3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld3.2s { v0, v1, v2 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #24 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld3 = tail call { <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld3.v2i32.p0(ptr %A) %tmp = getelementptr i32, ptr %A, i32 6 store ptr %tmp, ptr %ptr @@ -2333,19 +1712,19 @@ define { <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_imm_ld3(ptr %A, ptr } define { <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_reg_ld3(ptr %A, ptr %ptr, i64 %inc) { -; SDAG-LABEL: test_v2i32_post_reg_ld3: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ld3.2s { v0, v1, v2 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i32_post_reg_ld3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ld3.2s { v0, v1, v2 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i32_post_reg_ld3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld3.2s { v0, v1, v2 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i32_post_reg_ld3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld3.2s { v0, v1, v2 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #2 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld3 = tail call { <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld3.v2i32.p0(ptr %A) %tmp = getelementptr i32, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -2356,18 +1735,18 @@ declare { <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld3.v2i32.p0(ptr) define { <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_imm_ld3(ptr %A, ptr %ptr) { -; SDAG-LABEL: test_v2i64_post_imm_ld3: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld3.2d { v0, v1, v2 }, [x0], #48 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i64_post_imm_ld3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld3.2d { v0, v1, v2 }, [x0], #48 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i64_post_imm_ld3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld3.2d { v0, v1, v2 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #48 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i64_post_imm_ld3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld3.2d { v0, v1, v2 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #48 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld3 = tail call { <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld3.v2i64.p0(ptr %A) %tmp = getelementptr i64, ptr %A, i32 6 store ptr %tmp, ptr %ptr @@ -2375,19 +1754,19 @@ define { <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_imm_ld3(ptr %A, ptr } define { <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_reg_ld3(ptr %A, ptr %ptr, i64 %inc) { -; SDAG-LABEL: test_v2i64_post_reg_ld3: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ld3.2d { v0, v1, v2 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i64_post_reg_ld3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ld3.2d { v0, v1, v2 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i64_post_reg_ld3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld3.2d { v0, v1, v2 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i64_post_reg_ld3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld3.2d { v0, v1, v2 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #3 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld3 = tail call { <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld3.v2i64.p0(ptr %A) %tmp = getelementptr i64, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -2398,18 +1777,18 @@ declare { <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld3.v2i64.p0(ptr) define { <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_imm_ld3(ptr %A, ptr %ptr) { -; SDAG-LABEL: test_v1i64_post_imm_ld3: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld1.1d { v0, v1, v2 }, [x0], #24 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v1i64_post_imm_ld3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld1.1d { v0, v1, v2 }, [x0], #24 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v1i64_post_imm_ld3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1.1d { v0, v1, v2 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #24 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v1i64_post_imm_ld3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1.1d { v0, v1, v2 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #24 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld3 = tail call { <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld3.v1i64.p0(ptr %A) %tmp = getelementptr i64, ptr %A, i32 3 store ptr %tmp, ptr %ptr @@ -2417,19 +1796,19 @@ define { <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_imm_ld3(ptr %A, ptr } define { <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_reg_ld3(ptr %A, ptr %ptr, i64 %inc) { -; SDAG-LABEL: test_v1i64_post_reg_ld3: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ld1.1d { v0, v1, v2 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v1i64_post_reg_ld3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ld1.1d { v0, v1, v2 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v1i64_post_reg_ld3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1.1d { v0, v1, v2 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v1i64_post_reg_ld3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1.1d { v0, v1, v2 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #3 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld3 = tail call { <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld3.v1i64.p0(ptr %A) %tmp = getelementptr i64, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -2440,18 +1819,18 @@ declare { <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld3.v1i64.p0(ptr) define { <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_imm_ld3(ptr %A, ptr %ptr) { -; SDAG-LABEL: test_v4f32_post_imm_ld3: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld3.4s { v0, v1, v2 }, [x0], #48 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4f32_post_imm_ld3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld3.4s { v0, v1, v2 }, [x0], #48 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4f32_post_imm_ld3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld3.4s { v0, v1, v2 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #48 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4f32_post_imm_ld3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld3.4s { v0, v1, v2 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #48 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld3 = tail call { <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld3.v4f32.p0(ptr %A) %tmp = getelementptr float, ptr %A, i32 12 store ptr %tmp, ptr %ptr @@ -2459,19 +1838,19 @@ define { <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_imm_ld3(ptr %A } define { <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_reg_ld3(ptr %A, ptr %ptr, i64 %inc) { -; SDAG-LABEL: test_v4f32_post_reg_ld3: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ld3.4s { v0, v1, v2 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4f32_post_reg_ld3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ld3.4s { v0, v1, v2 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4f32_post_reg_ld3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld3.4s { v0, v1, v2 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4f32_post_reg_ld3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld3.4s { v0, v1, v2 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #2 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld3 = tail call { <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld3.v4f32.p0(ptr %A) %tmp = getelementptr float, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -2482,18 +1861,18 @@ declare { <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld3.v4f32.p define { <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_imm_ld3(ptr %A, ptr %ptr) { -; SDAG-LABEL: test_v2f32_post_imm_ld3: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld3.2s { v0, v1, v2 }, [x0], #24 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f32_post_imm_ld3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld3.2s { v0, v1, v2 }, [x0], #24 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f32_post_imm_ld3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld3.2s { v0, v1, v2 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #24 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f32_post_imm_ld3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld3.2s { v0, v1, v2 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #24 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld3 = tail call { <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld3.v2f32.p0(ptr %A) %tmp = getelementptr float, ptr %A, i32 6 store ptr %tmp, ptr %ptr @@ -2501,19 +1880,19 @@ define { <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_imm_ld3(ptr %A } define { <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_reg_ld3(ptr %A, ptr %ptr, i64 %inc) { -; SDAG-LABEL: test_v2f32_post_reg_ld3: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ld3.2s { v0, v1, v2 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f32_post_reg_ld3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ld3.2s { v0, v1, v2 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f32_post_reg_ld3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld3.2s { v0, v1, v2 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f32_post_reg_ld3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld3.2s { v0, v1, v2 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #2 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld3 = tail call { <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld3.v2f32.p0(ptr %A) %tmp = getelementptr float, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -2524,18 +1903,18 @@ declare { <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld3.v2f32.p define { <2 x double>, <2 x double>, <2 x double> } @test_v2f64_post_imm_ld3(ptr %A, ptr %ptr) { -; SDAG-LABEL: test_v2f64_post_imm_ld3: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld3.2d { v0, v1, v2 }, [x0], #48 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f64_post_imm_ld3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld3.2d { v0, v1, v2 }, [x0], #48 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f64_post_imm_ld3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld3.2d { v0, v1, v2 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #48 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f64_post_imm_ld3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld3.2d { v0, v1, v2 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #48 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld3 = tail call { <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld3.v2f64.p0(ptr %A) %tmp = getelementptr double, ptr %A, i32 6 store ptr %tmp, ptr %ptr @@ -2543,19 +1922,19 @@ define { <2 x double>, <2 x double>, <2 x double> } @test_v2f64_post_imm_ld3(ptr } define { <2 x double>, <2 x double>, <2 x double> } @test_v2f64_post_reg_ld3(ptr %A, ptr %ptr, i64 %inc) { -; SDAG-LABEL: test_v2f64_post_reg_ld3: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ld3.2d { v0, v1, v2 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f64_post_reg_ld3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ld3.2d { v0, v1, v2 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f64_post_reg_ld3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld3.2d { v0, v1, v2 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f64_post_reg_ld3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld3.2d { v0, v1, v2 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #3 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld3 = tail call { <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld3.v2f64.p0(ptr %A) %tmp = getelementptr double, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -2566,18 +1945,18 @@ declare { <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld3.v2f6 define { <1 x double>, <1 x double>, <1 x double> } @test_v1f64_post_imm_ld3(ptr %A, ptr %ptr) { -; SDAG-LABEL: test_v1f64_post_imm_ld3: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld1.1d { v0, v1, v2 }, [x0], #24 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v1f64_post_imm_ld3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld1.1d { v0, v1, v2 }, [x0], #24 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v1f64_post_imm_ld3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1.1d { v0, v1, v2 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #24 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v1f64_post_imm_ld3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1.1d { v0, v1, v2 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #24 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld3 = tail call { <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld3.v1f64.p0(ptr %A) %tmp = getelementptr double, ptr %A, i32 3 store ptr %tmp, ptr %ptr @@ -2585,19 +1964,19 @@ define { <1 x double>, <1 x double>, <1 x double> } @test_v1f64_post_imm_ld3(ptr } define { <1 x double>, <1 x double>, <1 x double> } @test_v1f64_post_reg_ld3(ptr %A, ptr %ptr, i64 %inc) { -; SDAG-LABEL: test_v1f64_post_reg_ld3: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ld1.1d { v0, v1, v2 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v1f64_post_reg_ld3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ld1.1d { v0, v1, v2 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v1f64_post_reg_ld3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1.1d { v0, v1, v2 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v1f64_post_reg_ld3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1.1d { v0, v1, v2 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #3 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld3 = tail call { <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld3.v1f64.p0(ptr %A) %tmp = getelementptr double, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -2608,18 +1987,18 @@ declare { <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld3.v1f6 define { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_imm_ld4(ptr %A, ptr %ptr) { -; SDAG-LABEL: test_v16i8_post_imm_ld4: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld4.16b { v0, v1, v2, v3 }, [x0], #64 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v16i8_post_imm_ld4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld4.16b { v0, v1, v2, v3 }, [x0], #64 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v16i8_post_imm_ld4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld4.16b { v0, v1, v2, v3 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #64 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v16i8_post_imm_ld4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld4.16b { v0, v1, v2, v3 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #64 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld4 = tail call { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld4.v16i8.p0(ptr %A) %tmp = getelementptr i8, ptr %A, i32 64 store ptr %tmp, ptr %ptr @@ -2627,18 +2006,18 @@ define { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_imm_ld4(p } define { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_reg_ld4(ptr %A, ptr %ptr, i64 %inc) { -; SDAG-LABEL: test_v16i8_post_reg_ld4: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld4.16b { v0, v1, v2, v3 }, [x0], x2 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v16i8_post_reg_ld4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld4.16b { v0, v1, v2, v3 }, [x0], x2 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v16i8_post_reg_ld4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld4.16b { v0, v1, v2, v3 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v16i8_post_reg_ld4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld4.16b { v0, v1, v2, v3 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld4 = tail call { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld4.v16i8.p0(ptr %A) %tmp = getelementptr i8, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -2649,18 +2028,18 @@ declare { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld4.v1 define { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_imm_ld4(ptr %A, ptr %ptr) { -; SDAG-LABEL: test_v8i8_post_imm_ld4: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld4.8b { v0, v1, v2, v3 }, [x0], #32 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i8_post_imm_ld4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld4.8b { v0, v1, v2, v3 }, [x0], #32 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i8_post_imm_ld4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld4.8b { v0, v1, v2, v3 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #32 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i8_post_imm_ld4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld4.8b { v0, v1, v2, v3 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #32 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld4 = tail call { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld4.v8i8.p0(ptr %A) %tmp = getelementptr i8, ptr %A, i32 32 store ptr %tmp, ptr %ptr @@ -2668,18 +2047,18 @@ define { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_imm_ld4(ptr %A } define { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_reg_ld4(ptr %A, ptr %ptr, i64 %inc) { -; SDAG-LABEL: test_v8i8_post_reg_ld4: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld4.8b { v0, v1, v2, v3 }, [x0], x2 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i8_post_reg_ld4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld4.8b { v0, v1, v2, v3 }, [x0], x2 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i8_post_reg_ld4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld4.8b { v0, v1, v2, v3 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i8_post_reg_ld4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld4.8b { v0, v1, v2, v3 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld4 = tail call { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld4.v8i8.p0(ptr %A) %tmp = getelementptr i8, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -2690,18 +2069,18 @@ declare { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld4.v8i8.p define { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_imm_ld4(ptr %A, ptr %ptr) { -; SDAG-LABEL: test_v8i16_post_imm_ld4: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld4.8h { v0, v1, v2, v3 }, [x0], #64 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i16_post_imm_ld4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld4.8h { v0, v1, v2, v3 }, [x0], #64 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i16_post_imm_ld4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld4.8h { v0, v1, v2, v3 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #64 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i16_post_imm_ld4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld4.8h { v0, v1, v2, v3 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #64 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld4 = tail call { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld4.v8i16.p0(ptr %A) %tmp = getelementptr i16, ptr %A, i32 32 store ptr %tmp, ptr %ptr @@ -2709,19 +2088,19 @@ define { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_imm_ld4(p } define { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_reg_ld4(ptr %A, ptr %ptr, i64 %inc) { -; SDAG-LABEL: test_v8i16_post_reg_ld4: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #1 -; SDAG-NEXT: ld4.8h { v0, v1, v2, v3 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i16_post_reg_ld4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #1 +; CHECK-SD-NEXT: ld4.8h { v0, v1, v2, v3 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i16_post_reg_ld4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld4.8h { v0, v1, v2, v3 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #1 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i16_post_reg_ld4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld4.8h { v0, v1, v2, v3 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #1 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld4 = tail call { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld4.v8i16.p0(ptr %A) %tmp = getelementptr i16, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -2732,18 +2111,18 @@ declare { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld4.v8 define { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_imm_ld4(ptr %A, ptr %ptr) { -; SDAG-LABEL: test_v4i16_post_imm_ld4: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld4.4h { v0, v1, v2, v3 }, [x0], #32 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i16_post_imm_ld4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld4.4h { v0, v1, v2, v3 }, [x0], #32 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i16_post_imm_ld4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld4.4h { v0, v1, v2, v3 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #32 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i16_post_imm_ld4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld4.4h { v0, v1, v2, v3 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #32 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld4 = tail call { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld4.v4i16.p0(ptr %A) %tmp = getelementptr i16, ptr %A, i32 16 store ptr %tmp, ptr %ptr @@ -2751,19 +2130,19 @@ define { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_imm_ld4(p } define { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_reg_ld4(ptr %A, ptr %ptr, i64 %inc) { -; SDAG-LABEL: test_v4i16_post_reg_ld4: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #1 -; SDAG-NEXT: ld4.4h { v0, v1, v2, v3 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i16_post_reg_ld4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #1 +; CHECK-SD-NEXT: ld4.4h { v0, v1, v2, v3 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i16_post_reg_ld4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld4.4h { v0, v1, v2, v3 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #1 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i16_post_reg_ld4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld4.4h { v0, v1, v2, v3 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #1 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld4 = tail call { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld4.v4i16.p0(ptr %A) %tmp = getelementptr i16, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -2774,18 +2153,18 @@ declare { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld4.v4 define { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_imm_ld4(ptr %A, ptr %ptr) { -; SDAG-LABEL: test_v4i32_post_imm_ld4: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld4.4s { v0, v1, v2, v3 }, [x0], #64 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i32_post_imm_ld4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld4.4s { v0, v1, v2, v3 }, [x0], #64 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i32_post_imm_ld4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld4.4s { v0, v1, v2, v3 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #64 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i32_post_imm_ld4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld4.4s { v0, v1, v2, v3 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #64 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld4 = tail call { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld4.v4i32.p0(ptr %A) %tmp = getelementptr i32, ptr %A, i32 16 store ptr %tmp, ptr %ptr @@ -2793,19 +2172,19 @@ define { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_imm_ld4(p } define { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_reg_ld4(ptr %A, ptr %ptr, i64 %inc) { -; SDAG-LABEL: test_v4i32_post_reg_ld4: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ld4.4s { v0, v1, v2, v3 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i32_post_reg_ld4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ld4.4s { v0, v1, v2, v3 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i32_post_reg_ld4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld4.4s { v0, v1, v2, v3 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i32_post_reg_ld4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld4.4s { v0, v1, v2, v3 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #2 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld4 = tail call { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld4.v4i32.p0(ptr %A) %tmp = getelementptr i32, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -2816,18 +2195,18 @@ declare { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld4.v4 define { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_imm_ld4(ptr %A, ptr %ptr) { -; SDAG-LABEL: test_v2i32_post_imm_ld4: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld4.2s { v0, v1, v2, v3 }, [x0], #32 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i32_post_imm_ld4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld4.2s { v0, v1, v2, v3 }, [x0], #32 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i32_post_imm_ld4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld4.2s { v0, v1, v2, v3 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #32 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i32_post_imm_ld4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld4.2s { v0, v1, v2, v3 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #32 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld4 = tail call { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld4.v2i32.p0(ptr %A) %tmp = getelementptr i32, ptr %A, i32 8 store ptr %tmp, ptr %ptr @@ -2835,19 +2214,19 @@ define { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_imm_ld4(p } define { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_reg_ld4(ptr %A, ptr %ptr, i64 %inc) { -; SDAG-LABEL: test_v2i32_post_reg_ld4: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ld4.2s { v0, v1, v2, v3 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i32_post_reg_ld4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ld4.2s { v0, v1, v2, v3 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i32_post_reg_ld4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld4.2s { v0, v1, v2, v3 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i32_post_reg_ld4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld4.2s { v0, v1, v2, v3 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #2 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld4 = tail call { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld4.v2i32.p0(ptr %A) %tmp = getelementptr i32, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -2858,18 +2237,18 @@ declare { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld4.v2 define { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_imm_ld4(ptr %A, ptr %ptr) { -; SDAG-LABEL: test_v2i64_post_imm_ld4: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld4.2d { v0, v1, v2, v3 }, [x0], #64 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i64_post_imm_ld4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld4.2d { v0, v1, v2, v3 }, [x0], #64 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i64_post_imm_ld4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld4.2d { v0, v1, v2, v3 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #64 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i64_post_imm_ld4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld4.2d { v0, v1, v2, v3 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #64 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld4 = tail call { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld4.v2i64.p0(ptr %A) %tmp = getelementptr i64, ptr %A, i32 8 store ptr %tmp, ptr %ptr @@ -2877,19 +2256,19 @@ define { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_imm_ld4(p } define { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_reg_ld4(ptr %A, ptr %ptr, i64 %inc) { -; SDAG-LABEL: test_v2i64_post_reg_ld4: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ld4.2d { v0, v1, v2, v3 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i64_post_reg_ld4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ld4.2d { v0, v1, v2, v3 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i64_post_reg_ld4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld4.2d { v0, v1, v2, v3 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i64_post_reg_ld4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld4.2d { v0, v1, v2, v3 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #3 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld4 = tail call { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld4.v2i64.p0(ptr %A) %tmp = getelementptr i64, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -2900,18 +2279,18 @@ declare { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld4.v2 define { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_imm_ld4(ptr %A, ptr %ptr) { -; SDAG-LABEL: test_v1i64_post_imm_ld4: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld1.1d { v0, v1, v2, v3 }, [x0], #32 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v1i64_post_imm_ld4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld1.1d { v0, v1, v2, v3 }, [x0], #32 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v1i64_post_imm_ld4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1.1d { v0, v1, v2, v3 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #32 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v1i64_post_imm_ld4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1.1d { v0, v1, v2, v3 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #32 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld4 = tail call { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld4.v1i64.p0(ptr %A) %tmp = getelementptr i64, ptr %A, i32 4 store ptr %tmp, ptr %ptr @@ -2919,19 +2298,19 @@ define { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_imm_ld4(p } define { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_reg_ld4(ptr %A, ptr %ptr, i64 %inc) { -; SDAG-LABEL: test_v1i64_post_reg_ld4: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ld1.1d { v0, v1, v2, v3 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v1i64_post_reg_ld4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ld1.1d { v0, v1, v2, v3 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v1i64_post_reg_ld4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1.1d { v0, v1, v2, v3 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v1i64_post_reg_ld4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1.1d { v0, v1, v2, v3 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #3 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld4 = tail call { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld4.v1i64.p0(ptr %A) %tmp = getelementptr i64, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -2942,18 +2321,18 @@ declare { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld4.v1 define { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_imm_ld4(ptr %A, ptr %ptr) { -; SDAG-LABEL: test_v4f32_post_imm_ld4: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld4.4s { v0, v1, v2, v3 }, [x0], #64 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4f32_post_imm_ld4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld4.4s { v0, v1, v2, v3 }, [x0], #64 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4f32_post_imm_ld4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld4.4s { v0, v1, v2, v3 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #64 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4f32_post_imm_ld4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld4.4s { v0, v1, v2, v3 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #64 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld4 = tail call { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld4.v4f32.p0(ptr %A) %tmp = getelementptr float, ptr %A, i32 16 store ptr %tmp, ptr %ptr @@ -2961,19 +2340,19 @@ define { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_i } define { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_reg_ld4(ptr %A, ptr %ptr, i64 %inc) { -; SDAG-LABEL: test_v4f32_post_reg_ld4: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ld4.4s { v0, v1, v2, v3 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4f32_post_reg_ld4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ld4.4s { v0, v1, v2, v3 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4f32_post_reg_ld4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld4.4s { v0, v1, v2, v3 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4f32_post_reg_ld4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld4.4s { v0, v1, v2, v3 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #2 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld4 = tail call { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld4.v4f32.p0(ptr %A) %tmp = getelementptr float, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -2984,18 +2363,18 @@ declare { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neo define { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_imm_ld4(ptr %A, ptr %ptr) { -; SDAG-LABEL: test_v2f32_post_imm_ld4: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld4.2s { v0, v1, v2, v3 }, [x0], #32 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f32_post_imm_ld4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld4.2s { v0, v1, v2, v3 }, [x0], #32 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f32_post_imm_ld4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld4.2s { v0, v1, v2, v3 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #32 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f32_post_imm_ld4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld4.2s { v0, v1, v2, v3 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #32 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld4 = tail call { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld4.v2f32.p0(ptr %A) %tmp = getelementptr float, ptr %A, i32 8 store ptr %tmp, ptr %ptr @@ -3003,19 +2382,19 @@ define { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_i } define { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_reg_ld4(ptr %A, ptr %ptr, i64 %inc) { -; SDAG-LABEL: test_v2f32_post_reg_ld4: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ld4.2s { v0, v1, v2, v3 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f32_post_reg_ld4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ld4.2s { v0, v1, v2, v3 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f32_post_reg_ld4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld4.2s { v0, v1, v2, v3 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f32_post_reg_ld4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld4.2s { v0, v1, v2, v3 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #2 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld4 = tail call { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld4.v2f32.p0(ptr %A) %tmp = getelementptr float, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -3026,18 +2405,18 @@ declare { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neo define { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @test_v2f64_post_imm_ld4(ptr %A, ptr %ptr) { -; SDAG-LABEL: test_v2f64_post_imm_ld4: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld4.2d { v0, v1, v2, v3 }, [x0], #64 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f64_post_imm_ld4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld4.2d { v0, v1, v2, v3 }, [x0], #64 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f64_post_imm_ld4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld4.2d { v0, v1, v2, v3 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #64 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f64_post_imm_ld4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld4.2d { v0, v1, v2, v3 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #64 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld4 = tail call { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld4.v2f64.p0(ptr %A) %tmp = getelementptr double, ptr %A, i32 8 store ptr %tmp, ptr %ptr @@ -3045,19 +2424,19 @@ define { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @test_v2f64_po } define { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @test_v2f64_post_reg_ld4(ptr %A, ptr %ptr, i64 %inc) { -; SDAG-LABEL: test_v2f64_post_reg_ld4: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ld4.2d { v0, v1, v2, v3 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f64_post_reg_ld4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ld4.2d { v0, v1, v2, v3 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f64_post_reg_ld4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld4.2d { v0, v1, v2, v3 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f64_post_reg_ld4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld4.2d { v0, v1, v2, v3 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #3 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld4 = tail call { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld4.v2f64.p0(ptr %A) %tmp = getelementptr double, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -3068,18 +2447,18 @@ declare { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64 define { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @test_v1f64_post_imm_ld4(ptr %A, ptr %ptr) { -; SDAG-LABEL: test_v1f64_post_imm_ld4: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld1.1d { v0, v1, v2, v3 }, [x0], #32 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v1f64_post_imm_ld4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld1.1d { v0, v1, v2, v3 }, [x0], #32 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v1f64_post_imm_ld4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1.1d { v0, v1, v2, v3 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #32 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v1f64_post_imm_ld4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1.1d { v0, v1, v2, v3 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #32 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld4 = tail call { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld4.v1f64.p0(ptr %A) %tmp = getelementptr double, ptr %A, i32 4 store ptr %tmp, ptr %ptr @@ -3087,19 +2466,19 @@ define { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @test_v1f64_po } define { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @test_v1f64_post_reg_ld4(ptr %A, ptr %ptr, i64 %inc) { -; SDAG-LABEL: test_v1f64_post_reg_ld4: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ld1.1d { v0, v1, v2, v3 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v1f64_post_reg_ld4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ld1.1d { v0, v1, v2, v3 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v1f64_post_reg_ld4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1.1d { v0, v1, v2, v3 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v1f64_post_reg_ld4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1.1d { v0, v1, v2, v3 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #3 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld4 = tail call { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld4.v1f64.p0(ptr %A) %tmp = getelementptr double, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -3109,18 +2488,18 @@ define { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @test_v1f64_po declare { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld4.v1f64.p0(ptr) define { <16 x i8>, <16 x i8> } @test_v16i8_post_imm_ld1x2(ptr %A, ptr %ptr) { -; SDAG-LABEL: test_v16i8_post_imm_ld1x2: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld1.16b { v0, v1 }, [x0], #32 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v16i8_post_imm_ld1x2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld1.16b { v0, v1 }, [x0], #32 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v16i8_post_imm_ld1x2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1.16b { v0, v1 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #32 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v16i8_post_imm_ld1x2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1.16b { v0, v1 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #32 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld1x2 = tail call { <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld1x2.v16i8.p0(ptr %A) %tmp = getelementptr i8, ptr %A, i32 32 store ptr %tmp, ptr %ptr @@ -3128,18 +2507,18 @@ define { <16 x i8>, <16 x i8> } @test_v16i8_post_imm_ld1x2(ptr %A, ptr %ptr) { } define { <16 x i8>, <16 x i8> } @test_v16i8_post_reg_ld1x2(ptr %A, ptr %ptr, i64 %inc) { -; SDAG-LABEL: test_v16i8_post_reg_ld1x2: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld1.16b { v0, v1 }, [x0], x2 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v16i8_post_reg_ld1x2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld1.16b { v0, v1 }, [x0], x2 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v16i8_post_reg_ld1x2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1.16b { v0, v1 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v16i8_post_reg_ld1x2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1.16b { v0, v1 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld1x2 = tail call { <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld1x2.v16i8.p0(ptr %A) %tmp = getelementptr i8, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -3150,18 +2529,18 @@ declare { <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld1x2.v16i8.p0(ptr) define { <8 x i8>, <8 x i8> } @test_v8i8_post_imm_ld1x2(ptr %A, ptr %ptr) { -; SDAG-LABEL: test_v8i8_post_imm_ld1x2: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld1.8b { v0, v1 }, [x0], #16 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i8_post_imm_ld1x2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld1.8b { v0, v1 }, [x0], #16 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i8_post_imm_ld1x2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1.8b { v0, v1 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #16 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i8_post_imm_ld1x2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1.8b { v0, v1 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #16 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld1x2 = tail call { <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld1x2.v8i8.p0(ptr %A) %tmp = getelementptr i8, ptr %A, i32 16 store ptr %tmp, ptr %ptr @@ -3169,18 +2548,18 @@ define { <8 x i8>, <8 x i8> } @test_v8i8_post_imm_ld1x2(ptr %A, ptr %ptr) { } define { <8 x i8>, <8 x i8> } @test_v8i8_post_reg_ld1x2(ptr %A, ptr %ptr, i64 %inc) { -; SDAG-LABEL: test_v8i8_post_reg_ld1x2: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld1.8b { v0, v1 }, [x0], x2 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i8_post_reg_ld1x2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld1.8b { v0, v1 }, [x0], x2 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i8_post_reg_ld1x2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1.8b { v0, v1 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i8_post_reg_ld1x2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1.8b { v0, v1 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld1x2 = tail call { <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld1x2.v8i8.p0(ptr %A) %tmp = getelementptr i8, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -3191,18 +2570,18 @@ declare { <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld1x2.v8i8.p0(ptr) define { <8 x i16>, <8 x i16> } @test_v8i16_post_imm_ld1x2(ptr %A, ptr %ptr) { -; SDAG-LABEL: test_v8i16_post_imm_ld1x2: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld1.8h { v0, v1 }, [x0], #32 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i16_post_imm_ld1x2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld1.8h { v0, v1 }, [x0], #32 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i16_post_imm_ld1x2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1.8h { v0, v1 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #32 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i16_post_imm_ld1x2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1.8h { v0, v1 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #32 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld1x2 = tail call { <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld1x2.v8i16.p0(ptr %A) %tmp = getelementptr i16, ptr %A, i32 16 store ptr %tmp, ptr %ptr @@ -3210,19 +2589,19 @@ define { <8 x i16>, <8 x i16> } @test_v8i16_post_imm_ld1x2(ptr %A, ptr %ptr) { } define { <8 x i16>, <8 x i16> } @test_v8i16_post_reg_ld1x2(ptr %A, ptr %ptr, i64 %inc) { -; SDAG-LABEL: test_v8i16_post_reg_ld1x2: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #1 -; SDAG-NEXT: ld1.8h { v0, v1 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i16_post_reg_ld1x2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #1 +; CHECK-SD-NEXT: ld1.8h { v0, v1 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i16_post_reg_ld1x2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1.8h { v0, v1 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #1 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i16_post_reg_ld1x2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1.8h { v0, v1 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #1 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld1x2 = tail call { <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld1x2.v8i16.p0(ptr %A) %tmp = getelementptr i16, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -3233,18 +2612,18 @@ declare { <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld1x2.v8i16.p0(ptr) define { <4 x i16>, <4 x i16> } @test_v4i16_post_imm_ld1x2(ptr %A, ptr %ptr) { -; SDAG-LABEL: test_v4i16_post_imm_ld1x2: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld1.4h { v0, v1 }, [x0], #16 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i16_post_imm_ld1x2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld1.4h { v0, v1 }, [x0], #16 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i16_post_imm_ld1x2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1.4h { v0, v1 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #16 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i16_post_imm_ld1x2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1.4h { v0, v1 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #16 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld1x2 = tail call { <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld1x2.v4i16.p0(ptr %A) %tmp = getelementptr i16, ptr %A, i32 8 store ptr %tmp, ptr %ptr @@ -3252,19 +2631,19 @@ define { <4 x i16>, <4 x i16> } @test_v4i16_post_imm_ld1x2(ptr %A, ptr %ptr) { } define { <4 x i16>, <4 x i16> } @test_v4i16_post_reg_ld1x2(ptr %A, ptr %ptr, i64 %inc) { -; SDAG-LABEL: test_v4i16_post_reg_ld1x2: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #1 -; SDAG-NEXT: ld1.4h { v0, v1 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i16_post_reg_ld1x2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #1 +; CHECK-SD-NEXT: ld1.4h { v0, v1 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i16_post_reg_ld1x2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1.4h { v0, v1 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #1 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i16_post_reg_ld1x2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1.4h { v0, v1 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #1 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld1x2 = tail call { <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld1x2.v4i16.p0(ptr %A) %tmp = getelementptr i16, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -3275,18 +2654,18 @@ declare { <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld1x2.v4i16.p0(ptr) define { <4 x i32>, <4 x i32> } @test_v4i32_post_imm_ld1x2(ptr %A, ptr %ptr) { -; SDAG-LABEL: test_v4i32_post_imm_ld1x2: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld1.4s { v0, v1 }, [x0], #32 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i32_post_imm_ld1x2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld1.4s { v0, v1 }, [x0], #32 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i32_post_imm_ld1x2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1.4s { v0, v1 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #32 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i32_post_imm_ld1x2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1.4s { v0, v1 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #32 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld1x2 = tail call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld1x2.v4i32.p0(ptr %A) %tmp = getelementptr i32, ptr %A, i32 8 store ptr %tmp, ptr %ptr @@ -3294,19 +2673,19 @@ define { <4 x i32>, <4 x i32> } @test_v4i32_post_imm_ld1x2(ptr %A, ptr %ptr) { } define { <4 x i32>, <4 x i32> } @test_v4i32_post_reg_ld1x2(ptr %A, ptr %ptr, i64 %inc) { -; SDAG-LABEL: test_v4i32_post_reg_ld1x2: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ld1.4s { v0, v1 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i32_post_reg_ld1x2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ld1.4s { v0, v1 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i32_post_reg_ld1x2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1.4s { v0, v1 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i32_post_reg_ld1x2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1.4s { v0, v1 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #2 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld1x2 = tail call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld1x2.v4i32.p0(ptr %A) %tmp = getelementptr i32, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -3317,18 +2696,18 @@ declare { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld1x2.v4i32.p0(ptr) define { <2 x i32>, <2 x i32> } @test_v2i32_post_imm_ld1x2(ptr %A, ptr %ptr) { -; SDAG-LABEL: test_v2i32_post_imm_ld1x2: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld1.2s { v0, v1 }, [x0], #16 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i32_post_imm_ld1x2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld1.2s { v0, v1 }, [x0], #16 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i32_post_imm_ld1x2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1.2s { v0, v1 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #16 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i32_post_imm_ld1x2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1.2s { v0, v1 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #16 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld1x2 = tail call { <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld1x2.v2i32.p0(ptr %A) %tmp = getelementptr i32, ptr %A, i32 4 store ptr %tmp, ptr %ptr @@ -3336,19 +2715,19 @@ define { <2 x i32>, <2 x i32> } @test_v2i32_post_imm_ld1x2(ptr %A, ptr %ptr) { } define { <2 x i32>, <2 x i32> } @test_v2i32_post_reg_ld1x2(ptr %A, ptr %ptr, i64 %inc) { -; SDAG-LABEL: test_v2i32_post_reg_ld1x2: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ld1.2s { v0, v1 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i32_post_reg_ld1x2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ld1.2s { v0, v1 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i32_post_reg_ld1x2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1.2s { v0, v1 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i32_post_reg_ld1x2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1.2s { v0, v1 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #2 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld1x2 = tail call { <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld1x2.v2i32.p0(ptr %A) %tmp = getelementptr i32, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -3359,18 +2738,18 @@ declare { <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld1x2.v2i32.p0(ptr) define { <2 x i64>, <2 x i64> } @test_v2i64_post_imm_ld1x2(ptr %A, ptr %ptr) { -; SDAG-LABEL: test_v2i64_post_imm_ld1x2: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld1.2d { v0, v1 }, [x0], #32 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i64_post_imm_ld1x2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld1.2d { v0, v1 }, [x0], #32 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i64_post_imm_ld1x2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1.2d { v0, v1 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #32 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i64_post_imm_ld1x2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1.2d { v0, v1 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #32 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld1x2 = tail call { <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld1x2.v2i64.p0(ptr %A) %tmp = getelementptr i64, ptr %A, i32 4 store ptr %tmp, ptr %ptr @@ -3378,19 +2757,19 @@ define { <2 x i64>, <2 x i64> } @test_v2i64_post_imm_ld1x2(ptr %A, ptr %ptr) { } define { <2 x i64>, <2 x i64> } @test_v2i64_post_reg_ld1x2(ptr %A, ptr %ptr, i64 %inc) { -; SDAG-LABEL: test_v2i64_post_reg_ld1x2: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ld1.2d { v0, v1 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i64_post_reg_ld1x2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ld1.2d { v0, v1 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i64_post_reg_ld1x2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1.2d { v0, v1 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i64_post_reg_ld1x2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1.2d { v0, v1 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #3 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld1x2 = tail call { <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld1x2.v2i64.p0(ptr %A) %tmp = getelementptr i64, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -3401,18 +2780,18 @@ declare { <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld1x2.v2i64.p0(ptr) define { <1 x i64>, <1 x i64> } @test_v1i64_post_imm_ld1x2(ptr %A, ptr %ptr) { -; SDAG-LABEL: test_v1i64_post_imm_ld1x2: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld1.1d { v0, v1 }, [x0], #16 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v1i64_post_imm_ld1x2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld1.1d { v0, v1 }, [x0], #16 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v1i64_post_imm_ld1x2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1.1d { v0, v1 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #16 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v1i64_post_imm_ld1x2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1.1d { v0, v1 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #16 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld1x2 = tail call { <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld1x2.v1i64.p0(ptr %A) %tmp = getelementptr i64, ptr %A, i32 2 store ptr %tmp, ptr %ptr @@ -3420,19 +2799,19 @@ define { <1 x i64>, <1 x i64> } @test_v1i64_post_imm_ld1x2(ptr %A, ptr %ptr) { } define { <1 x i64>, <1 x i64> } @test_v1i64_post_reg_ld1x2(ptr %A, ptr %ptr, i64 %inc) { -; SDAG-LABEL: test_v1i64_post_reg_ld1x2: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ld1.1d { v0, v1 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v1i64_post_reg_ld1x2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ld1.1d { v0, v1 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v1i64_post_reg_ld1x2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1.1d { v0, v1 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v1i64_post_reg_ld1x2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1.1d { v0, v1 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #3 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld1x2 = tail call { <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld1x2.v1i64.p0(ptr %A) %tmp = getelementptr i64, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -3443,18 +2822,18 @@ declare { <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld1x2.v1i64.p0(ptr) define { <4 x float>, <4 x float> } @test_v4f32_post_imm_ld1x2(ptr %A, ptr %ptr) { -; SDAG-LABEL: test_v4f32_post_imm_ld1x2: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld1.4s { v0, v1 }, [x0], #32 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4f32_post_imm_ld1x2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld1.4s { v0, v1 }, [x0], #32 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4f32_post_imm_ld1x2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1.4s { v0, v1 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #32 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4f32_post_imm_ld1x2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1.4s { v0, v1 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #32 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld1x2 = tail call { <4 x float>, <4 x float> } @llvm.aarch64.neon.ld1x2.v4f32.p0(ptr %A) %tmp = getelementptr float, ptr %A, i32 8 store ptr %tmp, ptr %ptr @@ -3462,19 +2841,19 @@ define { <4 x float>, <4 x float> } @test_v4f32_post_imm_ld1x2(ptr %A, ptr %ptr) } define { <4 x float>, <4 x float> } @test_v4f32_post_reg_ld1x2(ptr %A, ptr %ptr, i64 %inc) { -; SDAG-LABEL: test_v4f32_post_reg_ld1x2: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ld1.4s { v0, v1 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4f32_post_reg_ld1x2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ld1.4s { v0, v1 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4f32_post_reg_ld1x2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1.4s { v0, v1 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4f32_post_reg_ld1x2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1.4s { v0, v1 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #2 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld1x2 = tail call { <4 x float>, <4 x float> } @llvm.aarch64.neon.ld1x2.v4f32.p0(ptr %A) %tmp = getelementptr float, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -3485,18 +2864,18 @@ declare { <4 x float>, <4 x float> } @llvm.aarch64.neon.ld1x2.v4f32.p0(ptr) define { <2 x float>, <2 x float> } @test_v2f32_post_imm_ld1x2(ptr %A, ptr %ptr) { -; SDAG-LABEL: test_v2f32_post_imm_ld1x2: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld1.2s { v0, v1 }, [x0], #16 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f32_post_imm_ld1x2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld1.2s { v0, v1 }, [x0], #16 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f32_post_imm_ld1x2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1.2s { v0, v1 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #16 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f32_post_imm_ld1x2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1.2s { v0, v1 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #16 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld1x2 = tail call { <2 x float>, <2 x float> } @llvm.aarch64.neon.ld1x2.v2f32.p0(ptr %A) %tmp = getelementptr float, ptr %A, i32 4 store ptr %tmp, ptr %ptr @@ -3504,19 +2883,19 @@ define { <2 x float>, <2 x float> } @test_v2f32_post_imm_ld1x2(ptr %A, ptr %ptr) } define { <2 x float>, <2 x float> } @test_v2f32_post_reg_ld1x2(ptr %A, ptr %ptr, i64 %inc) { -; SDAG-LABEL: test_v2f32_post_reg_ld1x2: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ld1.2s { v0, v1 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f32_post_reg_ld1x2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ld1.2s { v0, v1 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f32_post_reg_ld1x2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1.2s { v0, v1 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f32_post_reg_ld1x2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1.2s { v0, v1 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #2 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld1x2 = tail call { <2 x float>, <2 x float> } @llvm.aarch64.neon.ld1x2.v2f32.p0(ptr %A) %tmp = getelementptr float, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -3527,18 +2906,18 @@ declare { <2 x float>, <2 x float> } @llvm.aarch64.neon.ld1x2.v2f32.p0(ptr) define { <2 x double>, <2 x double> } @test_v2f64_post_imm_ld1x2(ptr %A, ptr %ptr) { -; SDAG-LABEL: test_v2f64_post_imm_ld1x2: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld1.2d { v0, v1 }, [x0], #32 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f64_post_imm_ld1x2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld1.2d { v0, v1 }, [x0], #32 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f64_post_imm_ld1x2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1.2d { v0, v1 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #32 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f64_post_imm_ld1x2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1.2d { v0, v1 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #32 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld1x2 = tail call { <2 x double>, <2 x double> } @llvm.aarch64.neon.ld1x2.v2f64.p0(ptr %A) %tmp = getelementptr double, ptr %A, i32 4 store ptr %tmp, ptr %ptr @@ -3546,19 +2925,19 @@ define { <2 x double>, <2 x double> } @test_v2f64_post_imm_ld1x2(ptr %A, ptr %pt } define { <2 x double>, <2 x double> } @test_v2f64_post_reg_ld1x2(ptr %A, ptr %ptr, i64 %inc) { -; SDAG-LABEL: test_v2f64_post_reg_ld1x2: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ld1.2d { v0, v1 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f64_post_reg_ld1x2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ld1.2d { v0, v1 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f64_post_reg_ld1x2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1.2d { v0, v1 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f64_post_reg_ld1x2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1.2d { v0, v1 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #3 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld1x2 = tail call { <2 x double>, <2 x double> } @llvm.aarch64.neon.ld1x2.v2f64.p0(ptr %A) %tmp = getelementptr double, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -3569,18 +2948,18 @@ declare { <2 x double>, <2 x double> } @llvm.aarch64.neon.ld1x2.v2f64.p0(ptr) define { <1 x double>, <1 x double> } @test_v1f64_post_imm_ld1x2(ptr %A, ptr %ptr) { -; SDAG-LABEL: test_v1f64_post_imm_ld1x2: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld1.1d { v0, v1 }, [x0], #16 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v1f64_post_imm_ld1x2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld1.1d { v0, v1 }, [x0], #16 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v1f64_post_imm_ld1x2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1.1d { v0, v1 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #16 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v1f64_post_imm_ld1x2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1.1d { v0, v1 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #16 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld1x2 = tail call { <1 x double>, <1 x double> } @llvm.aarch64.neon.ld1x2.v1f64.p0(ptr %A) %tmp = getelementptr double, ptr %A, i32 2 store ptr %tmp, ptr %ptr @@ -3588,19 +2967,19 @@ define { <1 x double>, <1 x double> } @test_v1f64_post_imm_ld1x2(ptr %A, ptr %pt } define { <1 x double>, <1 x double> } @test_v1f64_post_reg_ld1x2(ptr %A, ptr %ptr, i64 %inc) { -; SDAG-LABEL: test_v1f64_post_reg_ld1x2: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ld1.1d { v0, v1 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v1f64_post_reg_ld1x2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ld1.1d { v0, v1 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v1f64_post_reg_ld1x2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1.1d { v0, v1 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v1f64_post_reg_ld1x2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1.1d { v0, v1 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #3 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld1x2 = tail call { <1 x double>, <1 x double> } @llvm.aarch64.neon.ld1x2.v1f64.p0(ptr %A) %tmp = getelementptr double, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -3611,18 +2990,18 @@ declare { <1 x double>, <1 x double> } @llvm.aarch64.neon.ld1x2.v1f64.p0(ptr) define { <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_imm_ld1x3(ptr %A, ptr %ptr) { -; SDAG-LABEL: test_v16i8_post_imm_ld1x3: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld1.16b { v0, v1, v2 }, [x0], #48 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v16i8_post_imm_ld1x3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld1.16b { v0, v1, v2 }, [x0], #48 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v16i8_post_imm_ld1x3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1.16b { v0, v1, v2 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #48 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v16i8_post_imm_ld1x3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1.16b { v0, v1, v2 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #48 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld1x3 = tail call { <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld1x3.v16i8.p0(ptr %A) %tmp = getelementptr i8, ptr %A, i32 48 store ptr %tmp, ptr %ptr @@ -3630,18 +3009,18 @@ define { <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_imm_ld1x3(ptr %A, pt } define { <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_reg_ld1x3(ptr %A, ptr %ptr, i64 %inc) { -; SDAG-LABEL: test_v16i8_post_reg_ld1x3: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld1.16b { v0, v1, v2 }, [x0], x2 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v16i8_post_reg_ld1x3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld1.16b { v0, v1, v2 }, [x0], x2 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v16i8_post_reg_ld1x3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1.16b { v0, v1, v2 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v16i8_post_reg_ld1x3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1.16b { v0, v1, v2 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld1x3 = tail call { <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld1x3.v16i8.p0(ptr %A) %tmp = getelementptr i8, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -3652,18 +3031,18 @@ declare { <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld1x3.v16i8.p0(pt define { <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_imm_ld1x3(ptr %A, ptr %ptr) { -; SDAG-LABEL: test_v8i8_post_imm_ld1x3: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld1.8b { v0, v1, v2 }, [x0], #24 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i8_post_imm_ld1x3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld1.8b { v0, v1, v2 }, [x0], #24 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i8_post_imm_ld1x3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1.8b { v0, v1, v2 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #24 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i8_post_imm_ld1x3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1.8b { v0, v1, v2 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #24 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld1x3 = tail call { <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld1x3.v8i8.p0(ptr %A) %tmp = getelementptr i8, ptr %A, i32 24 store ptr %tmp, ptr %ptr @@ -3671,18 +3050,18 @@ define { <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_imm_ld1x3(ptr %A, ptr %p } define { <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_reg_ld1x3(ptr %A, ptr %ptr, i64 %inc) { -; SDAG-LABEL: test_v8i8_post_reg_ld1x3: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld1.8b { v0, v1, v2 }, [x0], x2 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i8_post_reg_ld1x3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld1.8b { v0, v1, v2 }, [x0], x2 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i8_post_reg_ld1x3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1.8b { v0, v1, v2 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i8_post_reg_ld1x3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1.8b { v0, v1, v2 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld1x3 = tail call { <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld1x3.v8i8.p0(ptr %A) %tmp = getelementptr i8, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -3693,18 +3072,18 @@ declare { <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld1x3.v8i8.p0(ptr) define { <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_imm_ld1x3(ptr %A, ptr %ptr) { -; SDAG-LABEL: test_v8i16_post_imm_ld1x3: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld1.8h { v0, v1, v2 }, [x0], #48 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i16_post_imm_ld1x3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld1.8h { v0, v1, v2 }, [x0], #48 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i16_post_imm_ld1x3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1.8h { v0, v1, v2 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #48 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i16_post_imm_ld1x3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1.8h { v0, v1, v2 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #48 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld1x3 = tail call { <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld1x3.v8i16.p0(ptr %A) %tmp = getelementptr i16, ptr %A, i32 24 store ptr %tmp, ptr %ptr @@ -3712,19 +3091,19 @@ define { <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_imm_ld1x3(ptr %A, pt } define { <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_reg_ld1x3(ptr %A, ptr %ptr, i64 %inc) { -; SDAG-LABEL: test_v8i16_post_reg_ld1x3: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #1 -; SDAG-NEXT: ld1.8h { v0, v1, v2 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i16_post_reg_ld1x3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #1 +; CHECK-SD-NEXT: ld1.8h { v0, v1, v2 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i16_post_reg_ld1x3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1.8h { v0, v1, v2 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #1 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i16_post_reg_ld1x3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1.8h { v0, v1, v2 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #1 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld1x3 = tail call { <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld1x3.v8i16.p0(ptr %A) %tmp = getelementptr i16, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -3735,18 +3114,18 @@ declare { <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld1x3.v8i16.p0(pt define { <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_imm_ld1x3(ptr %A, ptr %ptr) { -; SDAG-LABEL: test_v4i16_post_imm_ld1x3: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld1.4h { v0, v1, v2 }, [x0], #24 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i16_post_imm_ld1x3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld1.4h { v0, v1, v2 }, [x0], #24 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i16_post_imm_ld1x3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1.4h { v0, v1, v2 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #24 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i16_post_imm_ld1x3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1.4h { v0, v1, v2 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #24 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld1x3 = tail call { <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld1x3.v4i16.p0(ptr %A) %tmp = getelementptr i16, ptr %A, i32 12 store ptr %tmp, ptr %ptr @@ -3754,19 +3133,19 @@ define { <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_imm_ld1x3(ptr %A, pt } define { <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_reg_ld1x3(ptr %A, ptr %ptr, i64 %inc) { -; SDAG-LABEL: test_v4i16_post_reg_ld1x3: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #1 -; SDAG-NEXT: ld1.4h { v0, v1, v2 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i16_post_reg_ld1x3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #1 +; CHECK-SD-NEXT: ld1.4h { v0, v1, v2 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i16_post_reg_ld1x3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1.4h { v0, v1, v2 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #1 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i16_post_reg_ld1x3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1.4h { v0, v1, v2 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #1 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld1x3 = tail call { <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld1x3.v4i16.p0(ptr %A) %tmp = getelementptr i16, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -3777,18 +3156,18 @@ declare { <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld1x3.v4i16.p0(pt define { <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_imm_ld1x3(ptr %A, ptr %ptr) { -; SDAG-LABEL: test_v4i32_post_imm_ld1x3: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld1.4s { v0, v1, v2 }, [x0], #48 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i32_post_imm_ld1x3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld1.4s { v0, v1, v2 }, [x0], #48 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i32_post_imm_ld1x3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1.4s { v0, v1, v2 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #48 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i32_post_imm_ld1x3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1.4s { v0, v1, v2 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #48 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld1x3 = tail call { <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld1x3.v4i32.p0(ptr %A) %tmp = getelementptr i32, ptr %A, i32 12 store ptr %tmp, ptr %ptr @@ -3796,19 +3175,19 @@ define { <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_imm_ld1x3(ptr %A, pt } define { <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_reg_ld1x3(ptr %A, ptr %ptr, i64 %inc) { -; SDAG-LABEL: test_v4i32_post_reg_ld1x3: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ld1.4s { v0, v1, v2 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i32_post_reg_ld1x3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ld1.4s { v0, v1, v2 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i32_post_reg_ld1x3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1.4s { v0, v1, v2 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i32_post_reg_ld1x3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1.4s { v0, v1, v2 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #2 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld1x3 = tail call { <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld1x3.v4i32.p0(ptr %A) %tmp = getelementptr i32, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -3819,18 +3198,18 @@ declare { <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld1x3.v4i32.p0(pt define { <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_imm_ld1x3(ptr %A, ptr %ptr) { -; SDAG-LABEL: test_v2i32_post_imm_ld1x3: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld1.2s { v0, v1, v2 }, [x0], #24 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i32_post_imm_ld1x3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld1.2s { v0, v1, v2 }, [x0], #24 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i32_post_imm_ld1x3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1.2s { v0, v1, v2 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #24 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i32_post_imm_ld1x3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1.2s { v0, v1, v2 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #24 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld1x3 = tail call { <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld1x3.v2i32.p0(ptr %A) %tmp = getelementptr i32, ptr %A, i32 6 store ptr %tmp, ptr %ptr @@ -3838,19 +3217,19 @@ define { <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_imm_ld1x3(ptr %A, pt } define { <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_reg_ld1x3(ptr %A, ptr %ptr, i64 %inc) { -; SDAG-LABEL: test_v2i32_post_reg_ld1x3: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ld1.2s { v0, v1, v2 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i32_post_reg_ld1x3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ld1.2s { v0, v1, v2 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i32_post_reg_ld1x3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1.2s { v0, v1, v2 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i32_post_reg_ld1x3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1.2s { v0, v1, v2 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #2 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld1x3 = tail call { <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld1x3.v2i32.p0(ptr %A) %tmp = getelementptr i32, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -3861,18 +3240,18 @@ declare { <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld1x3.v2i32.p0(pt define { <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_imm_ld1x3(ptr %A, ptr %ptr) { -; SDAG-LABEL: test_v2i64_post_imm_ld1x3: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld1.2d { v0, v1, v2 }, [x0], #48 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i64_post_imm_ld1x3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld1.2d { v0, v1, v2 }, [x0], #48 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i64_post_imm_ld1x3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1.2d { v0, v1, v2 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #48 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i64_post_imm_ld1x3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1.2d { v0, v1, v2 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #48 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld1x3 = tail call { <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld1x3.v2i64.p0(ptr %A) %tmp = getelementptr i64, ptr %A, i32 6 store ptr %tmp, ptr %ptr @@ -3880,19 +3259,19 @@ define { <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_imm_ld1x3(ptr %A, pt } define { <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_reg_ld1x3(ptr %A, ptr %ptr, i64 %inc) { -; SDAG-LABEL: test_v2i64_post_reg_ld1x3: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ld1.2d { v0, v1, v2 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i64_post_reg_ld1x3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ld1.2d { v0, v1, v2 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i64_post_reg_ld1x3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1.2d { v0, v1, v2 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i64_post_reg_ld1x3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1.2d { v0, v1, v2 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #3 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld1x3 = tail call { <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld1x3.v2i64.p0(ptr %A) %tmp = getelementptr i64, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -3903,18 +3282,18 @@ declare { <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld1x3.v2i64.p0(pt define { <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_imm_ld1x3(ptr %A, ptr %ptr) { -; SDAG-LABEL: test_v1i64_post_imm_ld1x3: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld1.1d { v0, v1, v2 }, [x0], #24 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v1i64_post_imm_ld1x3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld1.1d { v0, v1, v2 }, [x0], #24 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v1i64_post_imm_ld1x3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1.1d { v0, v1, v2 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #24 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v1i64_post_imm_ld1x3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1.1d { v0, v1, v2 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #24 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld1x3 = tail call { <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld1x3.v1i64.p0(ptr %A) %tmp = getelementptr i64, ptr %A, i32 3 store ptr %tmp, ptr %ptr @@ -3922,19 +3301,19 @@ define { <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_imm_ld1x3(ptr %A, pt } define { <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_reg_ld1x3(ptr %A, ptr %ptr, i64 %inc) { -; SDAG-LABEL: test_v1i64_post_reg_ld1x3: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ld1.1d { v0, v1, v2 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v1i64_post_reg_ld1x3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ld1.1d { v0, v1, v2 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v1i64_post_reg_ld1x3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1.1d { v0, v1, v2 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v1i64_post_reg_ld1x3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1.1d { v0, v1, v2 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #3 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld1x3 = tail call { <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld1x3.v1i64.p0(ptr %A) %tmp = getelementptr i64, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -3945,18 +3324,18 @@ declare { <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld1x3.v1i64.p0(pt define { <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_imm_ld1x3(ptr %A, ptr %ptr) { -; SDAG-LABEL: test_v4f32_post_imm_ld1x3: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld1.4s { v0, v1, v2 }, [x0], #48 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4f32_post_imm_ld1x3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld1.4s { v0, v1, v2 }, [x0], #48 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4f32_post_imm_ld1x3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1.4s { v0, v1, v2 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #48 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4f32_post_imm_ld1x3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1.4s { v0, v1, v2 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #48 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld1x3 = tail call { <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld1x3.v4f32.p0(ptr %A) %tmp = getelementptr float, ptr %A, i32 12 store ptr %tmp, ptr %ptr @@ -3964,19 +3343,19 @@ define { <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_imm_ld1x3(ptr } define { <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_reg_ld1x3(ptr %A, ptr %ptr, i64 %inc) { -; SDAG-LABEL: test_v4f32_post_reg_ld1x3: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ld1.4s { v0, v1, v2 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4f32_post_reg_ld1x3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ld1.4s { v0, v1, v2 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4f32_post_reg_ld1x3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1.4s { v0, v1, v2 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4f32_post_reg_ld1x3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1.4s { v0, v1, v2 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #2 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld1x3 = tail call { <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld1x3.v4f32.p0(ptr %A) %tmp = getelementptr float, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -3987,18 +3366,18 @@ declare { <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld1x3.v4f32 define { <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_imm_ld1x3(ptr %A, ptr %ptr) { -; SDAG-LABEL: test_v2f32_post_imm_ld1x3: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld1.2s { v0, v1, v2 }, [x0], #24 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f32_post_imm_ld1x3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld1.2s { v0, v1, v2 }, [x0], #24 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f32_post_imm_ld1x3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1.2s { v0, v1, v2 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #24 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f32_post_imm_ld1x3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1.2s { v0, v1, v2 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #24 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld1x3 = tail call { <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld1x3.v2f32.p0(ptr %A) %tmp = getelementptr float, ptr %A, i32 6 store ptr %tmp, ptr %ptr @@ -4006,19 +3385,19 @@ define { <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_imm_ld1x3(ptr } define { <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_reg_ld1x3(ptr %A, ptr %ptr, i64 %inc) { -; SDAG-LABEL: test_v2f32_post_reg_ld1x3: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ld1.2s { v0, v1, v2 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f32_post_reg_ld1x3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ld1.2s { v0, v1, v2 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f32_post_reg_ld1x3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1.2s { v0, v1, v2 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f32_post_reg_ld1x3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1.2s { v0, v1, v2 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #2 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld1x3 = tail call { <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld1x3.v2f32.p0(ptr %A) %tmp = getelementptr float, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -4029,18 +3408,18 @@ declare { <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld1x3.v2f32 define { <2 x double>, <2 x double>, <2 x double> } @test_v2f64_post_imm_ld1x3(ptr %A, ptr %ptr) { -; SDAG-LABEL: test_v2f64_post_imm_ld1x3: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld1.2d { v0, v1, v2 }, [x0], #48 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f64_post_imm_ld1x3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld1.2d { v0, v1, v2 }, [x0], #48 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f64_post_imm_ld1x3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1.2d { v0, v1, v2 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #48 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f64_post_imm_ld1x3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1.2d { v0, v1, v2 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #48 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld1x3 = tail call { <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld1x3.v2f64.p0(ptr %A) %tmp = getelementptr double, ptr %A, i32 6 store ptr %tmp, ptr %ptr @@ -4048,19 +3427,19 @@ define { <2 x double>, <2 x double>, <2 x double> } @test_v2f64_post_imm_ld1x3(p } define { <2 x double>, <2 x double>, <2 x double> } @test_v2f64_post_reg_ld1x3(ptr %A, ptr %ptr, i64 %inc) { -; SDAG-LABEL: test_v2f64_post_reg_ld1x3: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ld1.2d { v0, v1, v2 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f64_post_reg_ld1x3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ld1.2d { v0, v1, v2 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f64_post_reg_ld1x3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1.2d { v0, v1, v2 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f64_post_reg_ld1x3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1.2d { v0, v1, v2 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #3 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld1x3 = tail call { <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld1x3.v2f64.p0(ptr %A) %tmp = getelementptr double, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -4071,18 +3450,18 @@ declare { <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld1x3.v2 define { <1 x double>, <1 x double>, <1 x double> } @test_v1f64_post_imm_ld1x3(ptr %A, ptr %ptr) { -; SDAG-LABEL: test_v1f64_post_imm_ld1x3: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld1.1d { v0, v1, v2 }, [x0], #24 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v1f64_post_imm_ld1x3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld1.1d { v0, v1, v2 }, [x0], #24 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v1f64_post_imm_ld1x3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1.1d { v0, v1, v2 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #24 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v1f64_post_imm_ld1x3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1.1d { v0, v1, v2 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #24 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld1x3 = tail call { <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld1x3.v1f64.p0(ptr %A) %tmp = getelementptr double, ptr %A, i32 3 store ptr %tmp, ptr %ptr @@ -4090,19 +3469,19 @@ define { <1 x double>, <1 x double>, <1 x double> } @test_v1f64_post_imm_ld1x3(p } define { <1 x double>, <1 x double>, <1 x double> } @test_v1f64_post_reg_ld1x3(ptr %A, ptr %ptr, i64 %inc) { -; SDAG-LABEL: test_v1f64_post_reg_ld1x3: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ld1.1d { v0, v1, v2 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v1f64_post_reg_ld1x3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ld1.1d { v0, v1, v2 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v1f64_post_reg_ld1x3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1.1d { v0, v1, v2 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v1f64_post_reg_ld1x3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1.1d { v0, v1, v2 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #3 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld1x3 = tail call { <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld1x3.v1f64.p0(ptr %A) %tmp = getelementptr double, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -4113,18 +3492,18 @@ declare { <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld1x3.v1 define { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_imm_ld1x4(ptr %A, ptr %ptr) { -; SDAG-LABEL: test_v16i8_post_imm_ld1x4: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld1.16b { v0, v1, v2, v3 }, [x0], #64 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v16i8_post_imm_ld1x4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld1.16b { v0, v1, v2, v3 }, [x0], #64 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v16i8_post_imm_ld1x4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1.16b { v0, v1, v2, v3 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #64 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v16i8_post_imm_ld1x4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1.16b { v0, v1, v2, v3 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #64 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld1x4 = tail call { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld1x4.v16i8.p0(ptr %A) %tmp = getelementptr i8, ptr %A, i32 64 store ptr %tmp, ptr %ptr @@ -4132,18 +3511,18 @@ define { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_imm_ld1x4 } define { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_reg_ld1x4(ptr %A, ptr %ptr, i64 %inc) { -; SDAG-LABEL: test_v16i8_post_reg_ld1x4: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld1.16b { v0, v1, v2, v3 }, [x0], x2 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v16i8_post_reg_ld1x4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld1.16b { v0, v1, v2, v3 }, [x0], x2 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v16i8_post_reg_ld1x4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1.16b { v0, v1, v2, v3 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v16i8_post_reg_ld1x4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1.16b { v0, v1, v2, v3 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld1x4 = tail call { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld1x4.v16i8.p0(ptr %A) %tmp = getelementptr i8, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -4154,18 +3533,18 @@ declare { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld1x4. define { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_imm_ld1x4(ptr %A, ptr %ptr) { -; SDAG-LABEL: test_v8i8_post_imm_ld1x4: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld1.8b { v0, v1, v2, v3 }, [x0], #32 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i8_post_imm_ld1x4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld1.8b { v0, v1, v2, v3 }, [x0], #32 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i8_post_imm_ld1x4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1.8b { v0, v1, v2, v3 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #32 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i8_post_imm_ld1x4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1.8b { v0, v1, v2, v3 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #32 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld1x4 = tail call { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld1x4.v8i8.p0(ptr %A) %tmp = getelementptr i8, ptr %A, i32 32 store ptr %tmp, ptr %ptr @@ -4173,18 +3552,18 @@ define { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_imm_ld1x4(ptr } define { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_reg_ld1x4(ptr %A, ptr %ptr, i64 %inc) { -; SDAG-LABEL: test_v8i8_post_reg_ld1x4: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld1.8b { v0, v1, v2, v3 }, [x0], x2 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i8_post_reg_ld1x4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld1.8b { v0, v1, v2, v3 }, [x0], x2 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i8_post_reg_ld1x4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1.8b { v0, v1, v2, v3 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i8_post_reg_ld1x4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1.8b { v0, v1, v2, v3 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld1x4 = tail call { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld1x4.v8i8.p0(ptr %A) %tmp = getelementptr i8, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -4195,18 +3574,18 @@ declare { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld1x4.v8i8 define { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_imm_ld1x4(ptr %A, ptr %ptr) { -; SDAG-LABEL: test_v8i16_post_imm_ld1x4: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld1.8h { v0, v1, v2, v3 }, [x0], #64 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i16_post_imm_ld1x4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld1.8h { v0, v1, v2, v3 }, [x0], #64 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i16_post_imm_ld1x4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1.8h { v0, v1, v2, v3 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #64 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i16_post_imm_ld1x4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1.8h { v0, v1, v2, v3 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #64 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld1x4 = tail call { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld1x4.v8i16.p0(ptr %A) %tmp = getelementptr i16, ptr %A, i32 32 store ptr %tmp, ptr %ptr @@ -4214,19 +3593,19 @@ define { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_imm_ld1x4 } define { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_reg_ld1x4(ptr %A, ptr %ptr, i64 %inc) { -; SDAG-LABEL: test_v8i16_post_reg_ld1x4: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #1 -; SDAG-NEXT: ld1.8h { v0, v1, v2, v3 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i16_post_reg_ld1x4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #1 +; CHECK-SD-NEXT: ld1.8h { v0, v1, v2, v3 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i16_post_reg_ld1x4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1.8h { v0, v1, v2, v3 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #1 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i16_post_reg_ld1x4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1.8h { v0, v1, v2, v3 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #1 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld1x4 = tail call { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld1x4.v8i16.p0(ptr %A) %tmp = getelementptr i16, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -4237,18 +3616,18 @@ declare { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld1x4. define { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_imm_ld1x4(ptr %A, ptr %ptr) { -; SDAG-LABEL: test_v4i16_post_imm_ld1x4: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld1.4h { v0, v1, v2, v3 }, [x0], #32 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i16_post_imm_ld1x4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld1.4h { v0, v1, v2, v3 }, [x0], #32 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i16_post_imm_ld1x4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1.4h { v0, v1, v2, v3 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #32 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i16_post_imm_ld1x4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1.4h { v0, v1, v2, v3 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #32 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld1x4 = tail call { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld1x4.v4i16.p0(ptr %A) %tmp = getelementptr i16, ptr %A, i32 16 store ptr %tmp, ptr %ptr @@ -4256,19 +3635,19 @@ define { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_imm_ld1x4 } define { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_reg_ld1x4(ptr %A, ptr %ptr, i64 %inc) { -; SDAG-LABEL: test_v4i16_post_reg_ld1x4: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #1 -; SDAG-NEXT: ld1.4h { v0, v1, v2, v3 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i16_post_reg_ld1x4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #1 +; CHECK-SD-NEXT: ld1.4h { v0, v1, v2, v3 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i16_post_reg_ld1x4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1.4h { v0, v1, v2, v3 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #1 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i16_post_reg_ld1x4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1.4h { v0, v1, v2, v3 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #1 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld1x4 = tail call { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld1x4.v4i16.p0(ptr %A) %tmp = getelementptr i16, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -4279,18 +3658,18 @@ declare { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld1x4. define { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_imm_ld1x4(ptr %A, ptr %ptr) { -; SDAG-LABEL: test_v4i32_post_imm_ld1x4: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld1.4s { v0, v1, v2, v3 }, [x0], #64 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i32_post_imm_ld1x4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld1.4s { v0, v1, v2, v3 }, [x0], #64 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i32_post_imm_ld1x4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1.4s { v0, v1, v2, v3 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #64 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i32_post_imm_ld1x4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1.4s { v0, v1, v2, v3 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #64 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld1x4 = tail call { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld1x4.v4i32.p0(ptr %A) %tmp = getelementptr i32, ptr %A, i32 16 store ptr %tmp, ptr %ptr @@ -4298,19 +3677,19 @@ define { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_imm_ld1x4 } define { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_reg_ld1x4(ptr %A, ptr %ptr, i64 %inc) { -; SDAG-LABEL: test_v4i32_post_reg_ld1x4: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ld1.4s { v0, v1, v2, v3 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i32_post_reg_ld1x4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ld1.4s { v0, v1, v2, v3 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i32_post_reg_ld1x4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1.4s { v0, v1, v2, v3 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i32_post_reg_ld1x4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1.4s { v0, v1, v2, v3 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #2 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld1x4 = tail call { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld1x4.v4i32.p0(ptr %A) %tmp = getelementptr i32, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -4321,18 +3700,18 @@ declare { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld1x4. define { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_imm_ld1x4(ptr %A, ptr %ptr) { -; SDAG-LABEL: test_v2i32_post_imm_ld1x4: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld1.2s { v0, v1, v2, v3 }, [x0], #32 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i32_post_imm_ld1x4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld1.2s { v0, v1, v2, v3 }, [x0], #32 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i32_post_imm_ld1x4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1.2s { v0, v1, v2, v3 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #32 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i32_post_imm_ld1x4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1.2s { v0, v1, v2, v3 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #32 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld1x4 = tail call { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld1x4.v2i32.p0(ptr %A) %tmp = getelementptr i32, ptr %A, i32 8 store ptr %tmp, ptr %ptr @@ -4340,19 +3719,19 @@ define { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_imm_ld1x4 } define { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_reg_ld1x4(ptr %A, ptr %ptr, i64 %inc) { -; SDAG-LABEL: test_v2i32_post_reg_ld1x4: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ld1.2s { v0, v1, v2, v3 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i32_post_reg_ld1x4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ld1.2s { v0, v1, v2, v3 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i32_post_reg_ld1x4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1.2s { v0, v1, v2, v3 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i32_post_reg_ld1x4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1.2s { v0, v1, v2, v3 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #2 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld1x4 = tail call { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld1x4.v2i32.p0(ptr %A) %tmp = getelementptr i32, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -4363,18 +3742,18 @@ declare { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld1x4. define { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_imm_ld1x4(ptr %A, ptr %ptr) { -; SDAG-LABEL: test_v2i64_post_imm_ld1x4: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld1.2d { v0, v1, v2, v3 }, [x0], #64 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i64_post_imm_ld1x4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld1.2d { v0, v1, v2, v3 }, [x0], #64 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i64_post_imm_ld1x4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1.2d { v0, v1, v2, v3 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #64 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i64_post_imm_ld1x4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1.2d { v0, v1, v2, v3 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #64 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld1x4 = tail call { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld1x4.v2i64.p0(ptr %A) %tmp = getelementptr i64, ptr %A, i32 8 store ptr %tmp, ptr %ptr @@ -4382,19 +3761,19 @@ define { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_imm_ld1x4 } define { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_reg_ld1x4(ptr %A, ptr %ptr, i64 %inc) { -; SDAG-LABEL: test_v2i64_post_reg_ld1x4: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ld1.2d { v0, v1, v2, v3 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i64_post_reg_ld1x4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ld1.2d { v0, v1, v2, v3 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i64_post_reg_ld1x4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1.2d { v0, v1, v2, v3 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i64_post_reg_ld1x4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1.2d { v0, v1, v2, v3 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #3 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld1x4 = tail call { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld1x4.v2i64.p0(ptr %A) %tmp = getelementptr i64, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -4405,18 +3784,18 @@ declare { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld1x4. define { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_imm_ld1x4(ptr %A, ptr %ptr) { -; SDAG-LABEL: test_v1i64_post_imm_ld1x4: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld1.1d { v0, v1, v2, v3 }, [x0], #32 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v1i64_post_imm_ld1x4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld1.1d { v0, v1, v2, v3 }, [x0], #32 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v1i64_post_imm_ld1x4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1.1d { v0, v1, v2, v3 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #32 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v1i64_post_imm_ld1x4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1.1d { v0, v1, v2, v3 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #32 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld1x4 = tail call { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld1x4.v1i64.p0(ptr %A) %tmp = getelementptr i64, ptr %A, i32 4 store ptr %tmp, ptr %ptr @@ -4424,19 +3803,19 @@ define { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_imm_ld1x4 } define { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_reg_ld1x4(ptr %A, ptr %ptr, i64 %inc) { -; SDAG-LABEL: test_v1i64_post_reg_ld1x4: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ld1.1d { v0, v1, v2, v3 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v1i64_post_reg_ld1x4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ld1.1d { v0, v1, v2, v3 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v1i64_post_reg_ld1x4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1.1d { v0, v1, v2, v3 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v1i64_post_reg_ld1x4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1.1d { v0, v1, v2, v3 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #3 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld1x4 = tail call { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld1x4.v1i64.p0(ptr %A) %tmp = getelementptr i64, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -4447,18 +3826,18 @@ declare { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld1x4. define { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_imm_ld1x4(ptr %A, ptr %ptr) { -; SDAG-LABEL: test_v4f32_post_imm_ld1x4: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld1.4s { v0, v1, v2, v3 }, [x0], #64 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4f32_post_imm_ld1x4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld1.4s { v0, v1, v2, v3 }, [x0], #64 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4f32_post_imm_ld1x4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1.4s { v0, v1, v2, v3 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #64 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4f32_post_imm_ld1x4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1.4s { v0, v1, v2, v3 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #64 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld1x4 = tail call { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld1x4.v4f32.p0(ptr %A) %tmp = getelementptr float, ptr %A, i32 16 store ptr %tmp, ptr %ptr @@ -4466,19 +3845,19 @@ define { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_i } define { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_reg_ld1x4(ptr %A, ptr %ptr, i64 %inc) { -; SDAG-LABEL: test_v4f32_post_reg_ld1x4: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ld1.4s { v0, v1, v2, v3 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4f32_post_reg_ld1x4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ld1.4s { v0, v1, v2, v3 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4f32_post_reg_ld1x4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1.4s { v0, v1, v2, v3 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4f32_post_reg_ld1x4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1.4s { v0, v1, v2, v3 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #2 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld1x4 = tail call { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld1x4.v4f32.p0(ptr %A) %tmp = getelementptr float, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -4489,18 +3868,18 @@ declare { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neo define { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_imm_ld1x4(ptr %A, ptr %ptr) { -; SDAG-LABEL: test_v2f32_post_imm_ld1x4: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld1.2s { v0, v1, v2, v3 }, [x0], #32 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f32_post_imm_ld1x4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld1.2s { v0, v1, v2, v3 }, [x0], #32 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f32_post_imm_ld1x4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1.2s { v0, v1, v2, v3 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #32 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f32_post_imm_ld1x4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1.2s { v0, v1, v2, v3 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #32 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld1x4 = tail call { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld1x4.v2f32.p0(ptr %A) %tmp = getelementptr float, ptr %A, i32 8 store ptr %tmp, ptr %ptr @@ -4508,19 +3887,19 @@ define { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_i } define { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_reg_ld1x4(ptr %A, ptr %ptr, i64 %inc) { -; SDAG-LABEL: test_v2f32_post_reg_ld1x4: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ld1.2s { v0, v1, v2, v3 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f32_post_reg_ld1x4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ld1.2s { v0, v1, v2, v3 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f32_post_reg_ld1x4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1.2s { v0, v1, v2, v3 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f32_post_reg_ld1x4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1.2s { v0, v1, v2, v3 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #2 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld1x4 = tail call { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld1x4.v2f32.p0(ptr %A) %tmp = getelementptr float, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -4531,18 +3910,18 @@ declare { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neo define { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @test_v2f64_post_imm_ld1x4(ptr %A, ptr %ptr) { -; SDAG-LABEL: test_v2f64_post_imm_ld1x4: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld1.2d { v0, v1, v2, v3 }, [x0], #64 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f64_post_imm_ld1x4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld1.2d { v0, v1, v2, v3 }, [x0], #64 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f64_post_imm_ld1x4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1.2d { v0, v1, v2, v3 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #64 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f64_post_imm_ld1x4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1.2d { v0, v1, v2, v3 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #64 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld1x4 = tail call { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld1x4.v2f64.p0(ptr %A) %tmp = getelementptr double, ptr %A, i32 8 store ptr %tmp, ptr %ptr @@ -4550,19 +3929,19 @@ define { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @test_v2f64_po } define { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @test_v2f64_post_reg_ld1x4(ptr %A, ptr %ptr, i64 %inc) { -; SDAG-LABEL: test_v2f64_post_reg_ld1x4: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ld1.2d { v0, v1, v2, v3 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f64_post_reg_ld1x4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ld1.2d { v0, v1, v2, v3 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f64_post_reg_ld1x4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1.2d { v0, v1, v2, v3 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f64_post_reg_ld1x4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1.2d { v0, v1, v2, v3 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #3 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld1x4 = tail call { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld1x4.v2f64.p0(ptr %A) %tmp = getelementptr double, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -4573,18 +3952,18 @@ declare { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64 define { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @test_v1f64_post_imm_ld1x4(ptr %A, ptr %ptr) { -; SDAG-LABEL: test_v1f64_post_imm_ld1x4: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld1.1d { v0, v1, v2, v3 }, [x0], #32 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v1f64_post_imm_ld1x4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld1.1d { v0, v1, v2, v3 }, [x0], #32 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v1f64_post_imm_ld1x4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1.1d { v0, v1, v2, v3 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #32 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v1f64_post_imm_ld1x4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1.1d { v0, v1, v2, v3 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #32 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld1x4 = tail call { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld1x4.v1f64.p0(ptr %A) %tmp = getelementptr double, ptr %A, i32 4 store ptr %tmp, ptr %ptr @@ -4592,19 +3971,19 @@ define { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @test_v1f64_po } define { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @test_v1f64_post_reg_ld1x4(ptr %A, ptr %ptr, i64 %inc) { -; SDAG-LABEL: test_v1f64_post_reg_ld1x4: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ld1.1d { v0, v1, v2, v3 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v1f64_post_reg_ld1x4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ld1.1d { v0, v1, v2, v3 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v1f64_post_reg_ld1x4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1.1d { v0, v1, v2, v3 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v1f64_post_reg_ld1x4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1.1d { v0, v1, v2, v3 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #3 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld1x4 = tail call { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld1x4.v1f64.p0(ptr %A) %tmp = getelementptr double, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -4615,18 +3994,18 @@ declare { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64 define { <16 x i8>, <16 x i8> } @test_v16i8_post_imm_ld2r(ptr %A, ptr %ptr) nounwind { -; SDAG-LABEL: test_v16i8_post_imm_ld2r: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld2r.16b { v0, v1 }, [x0], #2 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v16i8_post_imm_ld2r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld2r.16b { v0, v1 }, [x0], #2 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v16i8_post_imm_ld2r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld2r.16b { v0, v1 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #2 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v16i8_post_imm_ld2r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld2r.16b { v0, v1 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #2 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld2 = call { <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld2r.v16i8.p0(ptr %A) %tmp = getelementptr i8, ptr %A, i32 2 store ptr %tmp, ptr %ptr @@ -4634,18 +4013,18 @@ define { <16 x i8>, <16 x i8> } @test_v16i8_post_imm_ld2r(ptr %A, ptr %ptr) noun } define { <16 x i8>, <16 x i8> } @test_v16i8_post_reg_ld2r(ptr %A, ptr %ptr, i64 %inc) nounwind { -; SDAG-LABEL: test_v16i8_post_reg_ld2r: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld2r.16b { v0, v1 }, [x0], x2 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v16i8_post_reg_ld2r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld2r.16b { v0, v1 }, [x0], x2 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v16i8_post_reg_ld2r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld2r.16b { v0, v1 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v16i8_post_reg_ld2r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld2r.16b { v0, v1 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld2 = call { <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld2r.v16i8.p0(ptr %A) %tmp = getelementptr i8, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -4656,18 +4035,18 @@ declare { <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld2r.v16i8.p0(ptr) nounwind define { <8 x i8>, <8 x i8> } @test_v8i8_post_imm_ld2r(ptr %A, ptr %ptr) nounwind { -; SDAG-LABEL: test_v8i8_post_imm_ld2r: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld2r.8b { v0, v1 }, [x0], #2 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i8_post_imm_ld2r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld2r.8b { v0, v1 }, [x0], #2 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i8_post_imm_ld2r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld2r.8b { v0, v1 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #2 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i8_post_imm_ld2r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld2r.8b { v0, v1 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #2 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld2 = call { <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld2r.v8i8.p0(ptr %A) %tmp = getelementptr i8, ptr %A, i32 2 store ptr %tmp, ptr %ptr @@ -4675,18 +4054,18 @@ define { <8 x i8>, <8 x i8> } @test_v8i8_post_imm_ld2r(ptr %A, ptr %ptr) nounwin } define { <8 x i8>, <8 x i8> } @test_v8i8_post_reg_ld2r(ptr %A, ptr %ptr, i64 %inc) nounwind { -; SDAG-LABEL: test_v8i8_post_reg_ld2r: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld2r.8b { v0, v1 }, [x0], x2 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i8_post_reg_ld2r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld2r.8b { v0, v1 }, [x0], x2 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i8_post_reg_ld2r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld2r.8b { v0, v1 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i8_post_reg_ld2r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld2r.8b { v0, v1 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld2 = call { <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld2r.v8i8.p0(ptr %A) %tmp = getelementptr i8, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -4697,18 +4076,18 @@ declare { <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld2r.v8i8.p0(ptr) nounwind rea define { <8 x i16>, <8 x i16> } @test_v8i16_post_imm_ld2r(ptr %A, ptr %ptr) nounwind { -; SDAG-LABEL: test_v8i16_post_imm_ld2r: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld2r.8h { v0, v1 }, [x0], #4 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i16_post_imm_ld2r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld2r.8h { v0, v1 }, [x0], #4 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i16_post_imm_ld2r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld2r.8h { v0, v1 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #4 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i16_post_imm_ld2r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld2r.8h { v0, v1 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #4 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld2 = call { <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld2r.v8i16.p0(ptr %A) %tmp = getelementptr i16, ptr %A, i32 2 store ptr %tmp, ptr %ptr @@ -4716,19 +4095,19 @@ define { <8 x i16>, <8 x i16> } @test_v8i16_post_imm_ld2r(ptr %A, ptr %ptr) noun } define { <8 x i16>, <8 x i16> } @test_v8i16_post_reg_ld2r(ptr %A, ptr %ptr, i64 %inc) nounwind { -; SDAG-LABEL: test_v8i16_post_reg_ld2r: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #1 -; SDAG-NEXT: ld2r.8h { v0, v1 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i16_post_reg_ld2r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #1 +; CHECK-SD-NEXT: ld2r.8h { v0, v1 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i16_post_reg_ld2r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld2r.8h { v0, v1 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #1 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i16_post_reg_ld2r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld2r.8h { v0, v1 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #1 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld2 = call { <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld2r.v8i16.p0(ptr %A) %tmp = getelementptr i16, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -4739,18 +4118,18 @@ declare { <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld2r.v8i16.p0(ptr) nounwind define { <4 x i16>, <4 x i16> } @test_v4i16_post_imm_ld2r(ptr %A, ptr %ptr) nounwind { -; SDAG-LABEL: test_v4i16_post_imm_ld2r: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld2r.4h { v0, v1 }, [x0], #4 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i16_post_imm_ld2r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld2r.4h { v0, v1 }, [x0], #4 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i16_post_imm_ld2r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld2r.4h { v0, v1 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #4 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i16_post_imm_ld2r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld2r.4h { v0, v1 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #4 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld2 = call { <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld2r.v4i16.p0(ptr %A) %tmp = getelementptr i16, ptr %A, i32 2 store ptr %tmp, ptr %ptr @@ -4758,19 +4137,19 @@ define { <4 x i16>, <4 x i16> } @test_v4i16_post_imm_ld2r(ptr %A, ptr %ptr) noun } define { <4 x i16>, <4 x i16> } @test_v4i16_post_reg_ld2r(ptr %A, ptr %ptr, i64 %inc) nounwind { -; SDAG-LABEL: test_v4i16_post_reg_ld2r: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #1 -; SDAG-NEXT: ld2r.4h { v0, v1 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i16_post_reg_ld2r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #1 +; CHECK-SD-NEXT: ld2r.4h { v0, v1 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i16_post_reg_ld2r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld2r.4h { v0, v1 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #1 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i16_post_reg_ld2r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld2r.4h { v0, v1 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #1 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld2 = call { <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld2r.v4i16.p0(ptr %A) %tmp = getelementptr i16, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -4781,18 +4160,18 @@ declare { <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld2r.v4i16.p0(ptr) nounwind define { <4 x i32>, <4 x i32> } @test_v4i32_post_imm_ld2r(ptr %A, ptr %ptr) nounwind { -; SDAG-LABEL: test_v4i32_post_imm_ld2r: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld2r.4s { v0, v1 }, [x0], #8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i32_post_imm_ld2r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld2r.4s { v0, v1 }, [x0], #8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i32_post_imm_ld2r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld2r.4s { v0, v1 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #8 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i32_post_imm_ld2r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld2r.4s { v0, v1 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #8 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld2 = call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2r.v4i32.p0(ptr %A) %tmp = getelementptr i32, ptr %A, i32 2 store ptr %tmp, ptr %ptr @@ -4800,19 +4179,19 @@ define { <4 x i32>, <4 x i32> } @test_v4i32_post_imm_ld2r(ptr %A, ptr %ptr) noun } define { <4 x i32>, <4 x i32> } @test_v4i32_post_reg_ld2r(ptr %A, ptr %ptr, i64 %inc) nounwind { -; SDAG-LABEL: test_v4i32_post_reg_ld2r: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ld2r.4s { v0, v1 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i32_post_reg_ld2r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ld2r.4s { v0, v1 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i32_post_reg_ld2r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld2r.4s { v0, v1 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i32_post_reg_ld2r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld2r.4s { v0, v1 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #2 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld2 = call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2r.v4i32.p0(ptr %A) %tmp = getelementptr i32, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -4822,18 +4201,18 @@ define { <4 x i32>, <4 x i32> } @test_v4i32_post_reg_ld2r(ptr %A, ptr %ptr, i64 declare { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2r.v4i32.p0(ptr) nounwind readonly define { <2 x i32>, <2 x i32> } @test_v2i32_post_imm_ld2r(ptr %A, ptr %ptr) nounwind { -; SDAG-LABEL: test_v2i32_post_imm_ld2r: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld2r.2s { v0, v1 }, [x0], #8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i32_post_imm_ld2r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld2r.2s { v0, v1 }, [x0], #8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i32_post_imm_ld2r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld2r.2s { v0, v1 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #8 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i32_post_imm_ld2r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld2r.2s { v0, v1 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #8 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld2 = call { <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld2r.v2i32.p0(ptr %A) %tmp = getelementptr i32, ptr %A, i32 2 store ptr %tmp, ptr %ptr @@ -4841,19 +4220,19 @@ define { <2 x i32>, <2 x i32> } @test_v2i32_post_imm_ld2r(ptr %A, ptr %ptr) noun } define { <2 x i32>, <2 x i32> } @test_v2i32_post_reg_ld2r(ptr %A, ptr %ptr, i64 %inc) nounwind { -; SDAG-LABEL: test_v2i32_post_reg_ld2r: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ld2r.2s { v0, v1 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i32_post_reg_ld2r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ld2r.2s { v0, v1 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i32_post_reg_ld2r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld2r.2s { v0, v1 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i32_post_reg_ld2r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld2r.2s { v0, v1 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #2 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld2 = call { <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld2r.v2i32.p0(ptr %A) %tmp = getelementptr i32, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -4864,18 +4243,18 @@ declare { <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld2r.v2i32.p0(ptr) nounwind define { <2 x i64>, <2 x i64> } @test_v2i64_post_imm_ld2r(ptr %A, ptr %ptr) nounwind { -; SDAG-LABEL: test_v2i64_post_imm_ld2r: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld2r.2d { v0, v1 }, [x0], #16 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i64_post_imm_ld2r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld2r.2d { v0, v1 }, [x0], #16 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i64_post_imm_ld2r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld2r.2d { v0, v1 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #16 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i64_post_imm_ld2r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld2r.2d { v0, v1 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #16 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld2 = call { <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld2r.v2i64.p0(ptr %A) %tmp = getelementptr i64, ptr %A, i32 2 store ptr %tmp, ptr %ptr @@ -4883,19 +4262,19 @@ define { <2 x i64>, <2 x i64> } @test_v2i64_post_imm_ld2r(ptr %A, ptr %ptr) noun } define { <2 x i64>, <2 x i64> } @test_v2i64_post_reg_ld2r(ptr %A, ptr %ptr, i64 %inc) nounwind { -; SDAG-LABEL: test_v2i64_post_reg_ld2r: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ld2r.2d { v0, v1 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i64_post_reg_ld2r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ld2r.2d { v0, v1 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i64_post_reg_ld2r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld2r.2d { v0, v1 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i64_post_reg_ld2r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld2r.2d { v0, v1 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #3 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld2 = call { <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld2r.v2i64.p0(ptr %A) %tmp = getelementptr i64, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -4905,18 +4284,18 @@ define { <2 x i64>, <2 x i64> } @test_v2i64_post_reg_ld2r(ptr %A, ptr %ptr, i64 declare { <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld2r.v2i64.p0(ptr) nounwind readonly define { <1 x i64>, <1 x i64> } @test_v1i64_post_imm_ld2r(ptr %A, ptr %ptr) nounwind { -; SDAG-LABEL: test_v1i64_post_imm_ld2r: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld2r.1d { v0, v1 }, [x0], #16 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v1i64_post_imm_ld2r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld2r.1d { v0, v1 }, [x0], #16 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v1i64_post_imm_ld2r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld2r.1d { v0, v1 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #16 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v1i64_post_imm_ld2r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld2r.1d { v0, v1 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #16 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld2 = call { <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld2r.v1i64.p0(ptr %A) %tmp = getelementptr i64, ptr %A, i32 2 store ptr %tmp, ptr %ptr @@ -4924,19 +4303,19 @@ define { <1 x i64>, <1 x i64> } @test_v1i64_post_imm_ld2r(ptr %A, ptr %ptr) noun } define { <1 x i64>, <1 x i64> } @test_v1i64_post_reg_ld2r(ptr %A, ptr %ptr, i64 %inc) nounwind { -; SDAG-LABEL: test_v1i64_post_reg_ld2r: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ld2r.1d { v0, v1 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v1i64_post_reg_ld2r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ld2r.1d { v0, v1 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v1i64_post_reg_ld2r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld2r.1d { v0, v1 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v1i64_post_reg_ld2r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld2r.1d { v0, v1 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #3 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld2 = call { <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld2r.v1i64.p0(ptr %A) %tmp = getelementptr i64, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -4947,18 +4326,18 @@ declare { <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld2r.v1i64.p0(ptr) nounwind define { <4 x float>, <4 x float> } @test_v4f32_post_imm_ld2r(ptr %A, ptr %ptr) nounwind { -; SDAG-LABEL: test_v4f32_post_imm_ld2r: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld2r.4s { v0, v1 }, [x0], #8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4f32_post_imm_ld2r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld2r.4s { v0, v1 }, [x0], #8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4f32_post_imm_ld2r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld2r.4s { v0, v1 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #8 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4f32_post_imm_ld2r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld2r.4s { v0, v1 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #8 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld2 = call { <4 x float>, <4 x float> } @llvm.aarch64.neon.ld2r.v4f32.p0(ptr %A) %tmp = getelementptr float, ptr %A, i32 2 store ptr %tmp, ptr %ptr @@ -4966,19 +4345,19 @@ define { <4 x float>, <4 x float> } @test_v4f32_post_imm_ld2r(ptr %A, ptr %ptr) } define { <4 x float>, <4 x float> } @test_v4f32_post_reg_ld2r(ptr %A, ptr %ptr, i64 %inc) nounwind { -; SDAG-LABEL: test_v4f32_post_reg_ld2r: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ld2r.4s { v0, v1 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4f32_post_reg_ld2r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ld2r.4s { v0, v1 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4f32_post_reg_ld2r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld2r.4s { v0, v1 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4f32_post_reg_ld2r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld2r.4s { v0, v1 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #2 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld2 = call { <4 x float>, <4 x float> } @llvm.aarch64.neon.ld2r.v4f32.p0(ptr %A) %tmp = getelementptr float, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -4988,18 +4367,18 @@ define { <4 x float>, <4 x float> } @test_v4f32_post_reg_ld2r(ptr %A, ptr %ptr, declare { <4 x float>, <4 x float> } @llvm.aarch64.neon.ld2r.v4f32.p0(ptr) nounwind readonly define { <2 x float>, <2 x float> } @test_v2f32_post_imm_ld2r(ptr %A, ptr %ptr) nounwind { -; SDAG-LABEL: test_v2f32_post_imm_ld2r: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld2r.2s { v0, v1 }, [x0], #8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f32_post_imm_ld2r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld2r.2s { v0, v1 }, [x0], #8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f32_post_imm_ld2r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld2r.2s { v0, v1 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #8 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f32_post_imm_ld2r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld2r.2s { v0, v1 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #8 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld2 = call { <2 x float>, <2 x float> } @llvm.aarch64.neon.ld2r.v2f32.p0(ptr %A) %tmp = getelementptr float, ptr %A, i32 2 store ptr %tmp, ptr %ptr @@ -5007,19 +4386,19 @@ define { <2 x float>, <2 x float> } @test_v2f32_post_imm_ld2r(ptr %A, ptr %ptr) } define { <2 x float>, <2 x float> } @test_v2f32_post_reg_ld2r(ptr %A, ptr %ptr, i64 %inc) nounwind { -; SDAG-LABEL: test_v2f32_post_reg_ld2r: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ld2r.2s { v0, v1 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f32_post_reg_ld2r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ld2r.2s { v0, v1 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f32_post_reg_ld2r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld2r.2s { v0, v1 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f32_post_reg_ld2r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld2r.2s { v0, v1 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #2 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld2 = call { <2 x float>, <2 x float> } @llvm.aarch64.neon.ld2r.v2f32.p0(ptr %A) %tmp = getelementptr float, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -5030,18 +4409,18 @@ declare { <2 x float>, <2 x float> } @llvm.aarch64.neon.ld2r.v2f32.p0(ptr) nounw define { <2 x double>, <2 x double> } @test_v2f64_post_imm_ld2r(ptr %A, ptr %ptr) nounwind { -; SDAG-LABEL: test_v2f64_post_imm_ld2r: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld2r.2d { v0, v1 }, [x0], #16 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f64_post_imm_ld2r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld2r.2d { v0, v1 }, [x0], #16 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f64_post_imm_ld2r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld2r.2d { v0, v1 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #16 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f64_post_imm_ld2r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld2r.2d { v0, v1 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #16 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld2 = call { <2 x double>, <2 x double> } @llvm.aarch64.neon.ld2r.v2f64.p0(ptr %A) %tmp = getelementptr double, ptr %A, i32 2 store ptr %tmp, ptr %ptr @@ -5049,19 +4428,19 @@ define { <2 x double>, <2 x double> } @test_v2f64_post_imm_ld2r(ptr %A, ptr %ptr } define { <2 x double>, <2 x double> } @test_v2f64_post_reg_ld2r(ptr %A, ptr %ptr, i64 %inc) nounwind { -; SDAG-LABEL: test_v2f64_post_reg_ld2r: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ld2r.2d { v0, v1 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f64_post_reg_ld2r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ld2r.2d { v0, v1 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f64_post_reg_ld2r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld2r.2d { v0, v1 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f64_post_reg_ld2r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld2r.2d { v0, v1 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #3 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld2 = call { <2 x double>, <2 x double> } @llvm.aarch64.neon.ld2r.v2f64.p0(ptr %A) %tmp = getelementptr double, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -5071,18 +4450,18 @@ define { <2 x double>, <2 x double> } @test_v2f64_post_reg_ld2r(ptr %A, ptr %ptr declare { <2 x double>, <2 x double> } @llvm.aarch64.neon.ld2r.v2f64.p0(ptr) nounwind readonly define { <1 x double>, <1 x double> } @test_v1f64_post_imm_ld2r(ptr %A, ptr %ptr) nounwind { -; SDAG-LABEL: test_v1f64_post_imm_ld2r: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld2r.1d { v0, v1 }, [x0], #16 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v1f64_post_imm_ld2r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld2r.1d { v0, v1 }, [x0], #16 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v1f64_post_imm_ld2r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld2r.1d { v0, v1 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #16 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v1f64_post_imm_ld2r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld2r.1d { v0, v1 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #16 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld2 = call { <1 x double>, <1 x double> } @llvm.aarch64.neon.ld2r.v1f64.p0(ptr %A) %tmp = getelementptr double, ptr %A, i32 2 store ptr %tmp, ptr %ptr @@ -5090,19 +4469,19 @@ define { <1 x double>, <1 x double> } @test_v1f64_post_imm_ld2r(ptr %A, ptr %ptr } define { <1 x double>, <1 x double> } @test_v1f64_post_reg_ld2r(ptr %A, ptr %ptr, i64 %inc) nounwind { -; SDAG-LABEL: test_v1f64_post_reg_ld2r: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ld2r.1d { v0, v1 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v1f64_post_reg_ld2r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ld2r.1d { v0, v1 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v1f64_post_reg_ld2r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld2r.1d { v0, v1 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v1f64_post_reg_ld2r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld2r.1d { v0, v1 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #3 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld2 = call { <1 x double>, <1 x double> } @llvm.aarch64.neon.ld2r.v1f64.p0(ptr %A) %tmp = getelementptr double, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -5113,18 +4492,18 @@ declare { <1 x double>, <1 x double> } @llvm.aarch64.neon.ld2r.v1f64.p0(ptr) nou define { <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_imm_ld3r(ptr %A, ptr %ptr) nounwind { -; SDAG-LABEL: test_v16i8_post_imm_ld3r: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld3r.16b { v0, v1, v2 }, [x0], #3 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v16i8_post_imm_ld3r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld3r.16b { v0, v1, v2 }, [x0], #3 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v16i8_post_imm_ld3r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld3r.16b { v0, v1, v2 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #3 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v16i8_post_imm_ld3r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld3r.16b { v0, v1, v2 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #3 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld3 = call { <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld3r.v16i8.p0(ptr %A) %tmp = getelementptr i8, ptr %A, i32 3 store ptr %tmp, ptr %ptr @@ -5132,18 +4511,18 @@ define { <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_imm_ld3r(ptr %A, ptr } define { <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_reg_ld3r(ptr %A, ptr %ptr, i64 %inc) nounwind { -; SDAG-LABEL: test_v16i8_post_reg_ld3r: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld3r.16b { v0, v1, v2 }, [x0], x2 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v16i8_post_reg_ld3r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld3r.16b { v0, v1, v2 }, [x0], x2 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v16i8_post_reg_ld3r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld3r.16b { v0, v1, v2 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v16i8_post_reg_ld3r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld3r.16b { v0, v1, v2 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld3 = call { <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld3r.v16i8.p0(ptr %A) %tmp = getelementptr i8, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -5154,18 +4533,18 @@ declare { <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld3r.v16i8.p0(ptr define { <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_imm_ld3r(ptr %A, ptr %ptr) nounwind { -; SDAG-LABEL: test_v8i8_post_imm_ld3r: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld3r.8b { v0, v1, v2 }, [x0], #3 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i8_post_imm_ld3r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld3r.8b { v0, v1, v2 }, [x0], #3 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i8_post_imm_ld3r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld3r.8b { v0, v1, v2 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #3 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i8_post_imm_ld3r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld3r.8b { v0, v1, v2 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #3 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld3 = call { <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld3r.v8i8.p0(ptr %A) %tmp = getelementptr i8, ptr %A, i32 3 store ptr %tmp, ptr %ptr @@ -5173,18 +4552,18 @@ define { <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_imm_ld3r(ptr %A, ptr %pt } define { <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_reg_ld3r(ptr %A, ptr %ptr, i64 %inc) nounwind { -; SDAG-LABEL: test_v8i8_post_reg_ld3r: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld3r.8b { v0, v1, v2 }, [x0], x2 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i8_post_reg_ld3r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld3r.8b { v0, v1, v2 }, [x0], x2 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i8_post_reg_ld3r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld3r.8b { v0, v1, v2 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i8_post_reg_ld3r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld3r.8b { v0, v1, v2 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld3 = call { <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld3r.v8i8.p0(ptr %A) %tmp = getelementptr i8, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -5195,18 +4574,18 @@ declare { <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld3r.v8i8.p0(ptr) no define { <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_imm_ld3r(ptr %A, ptr %ptr) nounwind { -; SDAG-LABEL: test_v8i16_post_imm_ld3r: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld3r.8h { v0, v1, v2 }, [x0], #6 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i16_post_imm_ld3r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld3r.8h { v0, v1, v2 }, [x0], #6 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i16_post_imm_ld3r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld3r.8h { v0, v1, v2 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #6 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i16_post_imm_ld3r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld3r.8h { v0, v1, v2 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #6 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld3 = call { <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld3r.v8i16.p0(ptr %A) %tmp = getelementptr i16, ptr %A, i32 3 store ptr %tmp, ptr %ptr @@ -5214,19 +4593,19 @@ define { <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_imm_ld3r(ptr %A, ptr } define { <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_reg_ld3r(ptr %A, ptr %ptr, i64 %inc) nounwind { -; SDAG-LABEL: test_v8i16_post_reg_ld3r: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #1 -; SDAG-NEXT: ld3r.8h { v0, v1, v2 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i16_post_reg_ld3r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #1 +; CHECK-SD-NEXT: ld3r.8h { v0, v1, v2 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i16_post_reg_ld3r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld3r.8h { v0, v1, v2 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #1 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i16_post_reg_ld3r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld3r.8h { v0, v1, v2 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #1 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld3 = call { <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld3r.v8i16.p0(ptr %A) %tmp = getelementptr i16, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -5237,18 +4616,18 @@ declare { <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld3r.v8i16.p0(ptr define { <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_imm_ld3r(ptr %A, ptr %ptr) nounwind { -; SDAG-LABEL: test_v4i16_post_imm_ld3r: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld3r.4h { v0, v1, v2 }, [x0], #6 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i16_post_imm_ld3r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld3r.4h { v0, v1, v2 }, [x0], #6 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i16_post_imm_ld3r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld3r.4h { v0, v1, v2 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #6 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i16_post_imm_ld3r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld3r.4h { v0, v1, v2 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #6 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld3 = call { <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld3r.v4i16.p0(ptr %A) %tmp = getelementptr i16, ptr %A, i32 3 store ptr %tmp, ptr %ptr @@ -5256,19 +4635,19 @@ define { <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_imm_ld3r(ptr %A, ptr } define { <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_reg_ld3r(ptr %A, ptr %ptr, i64 %inc) nounwind { -; SDAG-LABEL: test_v4i16_post_reg_ld3r: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #1 -; SDAG-NEXT: ld3r.4h { v0, v1, v2 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i16_post_reg_ld3r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #1 +; CHECK-SD-NEXT: ld3r.4h { v0, v1, v2 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i16_post_reg_ld3r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld3r.4h { v0, v1, v2 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #1 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i16_post_reg_ld3r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld3r.4h { v0, v1, v2 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #1 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld3 = call { <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld3r.v4i16.p0(ptr %A) %tmp = getelementptr i16, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -5279,18 +4658,18 @@ declare { <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld3r.v4i16.p0(ptr define { <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_imm_ld3r(ptr %A, ptr %ptr) nounwind { -; SDAG-LABEL: test_v4i32_post_imm_ld3r: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld3r.4s { v0, v1, v2 }, [x0], #12 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i32_post_imm_ld3r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld3r.4s { v0, v1, v2 }, [x0], #12 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i32_post_imm_ld3r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld3r.4s { v0, v1, v2 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #12 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i32_post_imm_ld3r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld3r.4s { v0, v1, v2 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #12 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld3 = call { <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld3r.v4i32.p0(ptr %A) %tmp = getelementptr i32, ptr %A, i32 3 store ptr %tmp, ptr %ptr @@ -5298,19 +4677,19 @@ define { <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_imm_ld3r(ptr %A, ptr } define { <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_reg_ld3r(ptr %A, ptr %ptr, i64 %inc) nounwind { -; SDAG-LABEL: test_v4i32_post_reg_ld3r: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ld3r.4s { v0, v1, v2 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i32_post_reg_ld3r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ld3r.4s { v0, v1, v2 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i32_post_reg_ld3r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld3r.4s { v0, v1, v2 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i32_post_reg_ld3r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld3r.4s { v0, v1, v2 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #2 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld3 = call { <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld3r.v4i32.p0(ptr %A) %tmp = getelementptr i32, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -5320,18 +4699,18 @@ define { <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_reg_ld3r(ptr %A, ptr declare { <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld3r.v4i32.p0(ptr) nounwind readonly define { <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_imm_ld3r(ptr %A, ptr %ptr) nounwind { -; SDAG-LABEL: test_v2i32_post_imm_ld3r: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld3r.2s { v0, v1, v2 }, [x0], #12 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i32_post_imm_ld3r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld3r.2s { v0, v1, v2 }, [x0], #12 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i32_post_imm_ld3r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld3r.2s { v0, v1, v2 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #12 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i32_post_imm_ld3r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld3r.2s { v0, v1, v2 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #12 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld3 = call { <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld3r.v2i32.p0(ptr %A) %tmp = getelementptr i32, ptr %A, i32 3 store ptr %tmp, ptr %ptr @@ -5339,19 +4718,19 @@ define { <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_imm_ld3r(ptr %A, ptr } define { <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_reg_ld3r(ptr %A, ptr %ptr, i64 %inc) nounwind { -; SDAG-LABEL: test_v2i32_post_reg_ld3r: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ld3r.2s { v0, v1, v2 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i32_post_reg_ld3r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ld3r.2s { v0, v1, v2 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i32_post_reg_ld3r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld3r.2s { v0, v1, v2 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i32_post_reg_ld3r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld3r.2s { v0, v1, v2 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #2 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld3 = call { <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld3r.v2i32.p0(ptr %A) %tmp = getelementptr i32, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -5362,18 +4741,18 @@ declare { <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld3r.v2i32.p0(ptr define { <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_imm_ld3r(ptr %A, ptr %ptr) nounwind { -; SDAG-LABEL: test_v2i64_post_imm_ld3r: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld3r.2d { v0, v1, v2 }, [x0], #24 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i64_post_imm_ld3r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld3r.2d { v0, v1, v2 }, [x0], #24 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i64_post_imm_ld3r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld3r.2d { v0, v1, v2 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #24 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i64_post_imm_ld3r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld3r.2d { v0, v1, v2 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #24 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld3 = call { <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld3r.v2i64.p0(ptr %A) %tmp = getelementptr i64, ptr %A, i32 3 store ptr %tmp, ptr %ptr @@ -5381,19 +4760,19 @@ define { <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_imm_ld3r(ptr %A, ptr } define { <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_reg_ld3r(ptr %A, ptr %ptr, i64 %inc) nounwind { -; SDAG-LABEL: test_v2i64_post_reg_ld3r: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ld3r.2d { v0, v1, v2 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i64_post_reg_ld3r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ld3r.2d { v0, v1, v2 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i64_post_reg_ld3r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld3r.2d { v0, v1, v2 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i64_post_reg_ld3r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld3r.2d { v0, v1, v2 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #3 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld3 = call { <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld3r.v2i64.p0(ptr %A) %tmp = getelementptr i64, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -5403,18 +4782,18 @@ define { <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_reg_ld3r(ptr %A, ptr declare { <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld3r.v2i64.p0(ptr) nounwind readonly define { <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_imm_ld3r(ptr %A, ptr %ptr) nounwind { -; SDAG-LABEL: test_v1i64_post_imm_ld3r: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld3r.1d { v0, v1, v2 }, [x0], #24 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v1i64_post_imm_ld3r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld3r.1d { v0, v1, v2 }, [x0], #24 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v1i64_post_imm_ld3r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld3r.1d { v0, v1, v2 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #24 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v1i64_post_imm_ld3r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld3r.1d { v0, v1, v2 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #24 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld3 = call { <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld3r.v1i64.p0(ptr %A) %tmp = getelementptr i64, ptr %A, i32 3 store ptr %tmp, ptr %ptr @@ -5422,19 +4801,19 @@ define { <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_imm_ld3r(ptr %A, ptr } define { <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_reg_ld3r(ptr %A, ptr %ptr, i64 %inc) nounwind { -; SDAG-LABEL: test_v1i64_post_reg_ld3r: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ld3r.1d { v0, v1, v2 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v1i64_post_reg_ld3r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ld3r.1d { v0, v1, v2 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v1i64_post_reg_ld3r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld3r.1d { v0, v1, v2 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v1i64_post_reg_ld3r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld3r.1d { v0, v1, v2 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #3 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld3 = call { <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld3r.v1i64.p0(ptr %A) %tmp = getelementptr i64, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -5445,18 +4824,18 @@ declare { <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld3r.v1i64.p0(ptr define { <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_imm_ld3r(ptr %A, ptr %ptr) nounwind { -; SDAG-LABEL: test_v4f32_post_imm_ld3r: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld3r.4s { v0, v1, v2 }, [x0], #12 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4f32_post_imm_ld3r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld3r.4s { v0, v1, v2 }, [x0], #12 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4f32_post_imm_ld3r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld3r.4s { v0, v1, v2 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #12 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4f32_post_imm_ld3r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld3r.4s { v0, v1, v2 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #12 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld3 = call { <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld3r.v4f32.p0(ptr %A) %tmp = getelementptr float, ptr %A, i32 3 store ptr %tmp, ptr %ptr @@ -5464,19 +4843,19 @@ define { <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_imm_ld3r(ptr % } define { <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_reg_ld3r(ptr %A, ptr %ptr, i64 %inc) nounwind { -; SDAG-LABEL: test_v4f32_post_reg_ld3r: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ld3r.4s { v0, v1, v2 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4f32_post_reg_ld3r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ld3r.4s { v0, v1, v2 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4f32_post_reg_ld3r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld3r.4s { v0, v1, v2 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4f32_post_reg_ld3r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld3r.4s { v0, v1, v2 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #2 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld3 = call { <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld3r.v4f32.p0(ptr %A) %tmp = getelementptr float, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -5486,18 +4865,18 @@ define { <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_reg_ld3r(ptr % declare { <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld3r.v4f32.p0(ptr) nounwind readonly define { <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_imm_ld3r(ptr %A, ptr %ptr) nounwind { -; SDAG-LABEL: test_v2f32_post_imm_ld3r: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld3r.2s { v0, v1, v2 }, [x0], #12 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f32_post_imm_ld3r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld3r.2s { v0, v1, v2 }, [x0], #12 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f32_post_imm_ld3r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld3r.2s { v0, v1, v2 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #12 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f32_post_imm_ld3r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld3r.2s { v0, v1, v2 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #12 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld3 = call { <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld3r.v2f32.p0(ptr %A) %tmp = getelementptr float, ptr %A, i32 3 store ptr %tmp, ptr %ptr @@ -5505,19 +4884,19 @@ define { <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_imm_ld3r(ptr % } define { <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_reg_ld3r(ptr %A, ptr %ptr, i64 %inc) nounwind { -; SDAG-LABEL: test_v2f32_post_reg_ld3r: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ld3r.2s { v0, v1, v2 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f32_post_reg_ld3r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ld3r.2s { v0, v1, v2 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f32_post_reg_ld3r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld3r.2s { v0, v1, v2 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f32_post_reg_ld3r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld3r.2s { v0, v1, v2 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #2 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld3 = call { <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld3r.v2f32.p0(ptr %A) %tmp = getelementptr float, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -5528,18 +4907,18 @@ declare { <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld3r.v2f32. define { <2 x double>, <2 x double>, <2 x double> } @test_v2f64_post_imm_ld3r(ptr %A, ptr %ptr) nounwind { -; SDAG-LABEL: test_v2f64_post_imm_ld3r: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld3r.2d { v0, v1, v2 }, [x0], #24 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f64_post_imm_ld3r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld3r.2d { v0, v1, v2 }, [x0], #24 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f64_post_imm_ld3r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld3r.2d { v0, v1, v2 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #24 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f64_post_imm_ld3r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld3r.2d { v0, v1, v2 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #24 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld3 = call { <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld3r.v2f64.p0(ptr %A) %tmp = getelementptr double, ptr %A, i32 3 store ptr %tmp, ptr %ptr @@ -5547,19 +4926,19 @@ define { <2 x double>, <2 x double>, <2 x double> } @test_v2f64_post_imm_ld3r(pt } define { <2 x double>, <2 x double>, <2 x double> } @test_v2f64_post_reg_ld3r(ptr %A, ptr %ptr, i64 %inc) nounwind { -; SDAG-LABEL: test_v2f64_post_reg_ld3r: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ld3r.2d { v0, v1, v2 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f64_post_reg_ld3r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ld3r.2d { v0, v1, v2 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f64_post_reg_ld3r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld3r.2d { v0, v1, v2 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f64_post_reg_ld3r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld3r.2d { v0, v1, v2 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #3 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld3 = call { <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld3r.v2f64.p0(ptr %A) %tmp = getelementptr double, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -5569,18 +4948,18 @@ define { <2 x double>, <2 x double>, <2 x double> } @test_v2f64_post_reg_ld3r(pt declare { <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld3r.v2f64.p0(ptr) nounwind readonly define { <1 x double>, <1 x double>, <1 x double> } @test_v1f64_post_imm_ld3r(ptr %A, ptr %ptr) nounwind { -; SDAG-LABEL: test_v1f64_post_imm_ld3r: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld3r.1d { v0, v1, v2 }, [x0], #24 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v1f64_post_imm_ld3r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld3r.1d { v0, v1, v2 }, [x0], #24 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v1f64_post_imm_ld3r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld3r.1d { v0, v1, v2 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #24 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v1f64_post_imm_ld3r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld3r.1d { v0, v1, v2 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #24 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld3 = call { <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld3r.v1f64.p0(ptr %A) %tmp = getelementptr double, ptr %A, i32 3 store ptr %tmp, ptr %ptr @@ -5588,19 +4967,19 @@ define { <1 x double>, <1 x double>, <1 x double> } @test_v1f64_post_imm_ld3r(pt } define { <1 x double>, <1 x double>, <1 x double> } @test_v1f64_post_reg_ld3r(ptr %A, ptr %ptr, i64 %inc) nounwind { -; SDAG-LABEL: test_v1f64_post_reg_ld3r: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ld3r.1d { v0, v1, v2 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v1f64_post_reg_ld3r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ld3r.1d { v0, v1, v2 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v1f64_post_reg_ld3r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld3r.1d { v0, v1, v2 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v1f64_post_reg_ld3r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld3r.1d { v0, v1, v2 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #3 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld3 = call { <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld3r.v1f64.p0(ptr %A) %tmp = getelementptr double, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -5611,18 +4990,18 @@ declare { <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld3r.v1f define { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_imm_ld4r(ptr %A, ptr %ptr) nounwind { -; SDAG-LABEL: test_v16i8_post_imm_ld4r: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld4r.16b { v0, v1, v2, v3 }, [x0], #4 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v16i8_post_imm_ld4r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld4r.16b { v0, v1, v2, v3 }, [x0], #4 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v16i8_post_imm_ld4r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld4r.16b { v0, v1, v2, v3 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #4 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v16i8_post_imm_ld4r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld4r.16b { v0, v1, v2, v3 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #4 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld4 = call { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld4r.v16i8.p0(ptr %A) %tmp = getelementptr i8, ptr %A, i32 4 store ptr %tmp, ptr %ptr @@ -5630,18 +5009,18 @@ define { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_imm_ld4r( } define { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_reg_ld4r(ptr %A, ptr %ptr, i64 %inc) nounwind { -; SDAG-LABEL: test_v16i8_post_reg_ld4r: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld4r.16b { v0, v1, v2, v3 }, [x0], x2 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v16i8_post_reg_ld4r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld4r.16b { v0, v1, v2, v3 }, [x0], x2 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v16i8_post_reg_ld4r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld4r.16b { v0, v1, v2, v3 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v16i8_post_reg_ld4r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld4r.16b { v0, v1, v2, v3 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld4 = call { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld4r.v16i8.p0(ptr %A) %tmp = getelementptr i8, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -5652,18 +5031,18 @@ declare { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld4r.v define { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_imm_ld4r(ptr %A, ptr %ptr) nounwind { -; SDAG-LABEL: test_v8i8_post_imm_ld4r: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld4r.8b { v0, v1, v2, v3 }, [x0], #4 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i8_post_imm_ld4r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld4r.8b { v0, v1, v2, v3 }, [x0], #4 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i8_post_imm_ld4r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld4r.8b { v0, v1, v2, v3 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #4 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i8_post_imm_ld4r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld4r.8b { v0, v1, v2, v3 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #4 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld4 = call { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld4r.v8i8.p0(ptr %A) %tmp = getelementptr i8, ptr %A, i32 4 store ptr %tmp, ptr %ptr @@ -5671,18 +5050,18 @@ define { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_imm_ld4r(ptr % } define { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_reg_ld4r(ptr %A, ptr %ptr, i64 %inc) nounwind { -; SDAG-LABEL: test_v8i8_post_reg_ld4r: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld4r.8b { v0, v1, v2, v3 }, [x0], x2 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i8_post_reg_ld4r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld4r.8b { v0, v1, v2, v3 }, [x0], x2 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i8_post_reg_ld4r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld4r.8b { v0, v1, v2, v3 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i8_post_reg_ld4r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld4r.8b { v0, v1, v2, v3 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld4 = call { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld4r.v8i8.p0(ptr %A) %tmp = getelementptr i8, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -5693,18 +5072,18 @@ declare { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld4r.v8i8. define { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_imm_ld4r(ptr %A, ptr %ptr) nounwind { -; SDAG-LABEL: test_v8i16_post_imm_ld4r: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld4r.8h { v0, v1, v2, v3 }, [x0], #8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i16_post_imm_ld4r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld4r.8h { v0, v1, v2, v3 }, [x0], #8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i16_post_imm_ld4r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld4r.8h { v0, v1, v2, v3 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #8 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i16_post_imm_ld4r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld4r.8h { v0, v1, v2, v3 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #8 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld4 = call { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld4r.v8i16.p0(ptr %A) %tmp = getelementptr i16, ptr %A, i32 4 store ptr %tmp, ptr %ptr @@ -5712,19 +5091,19 @@ define { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_imm_ld4r( } define { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_reg_ld4r(ptr %A, ptr %ptr, i64 %inc) nounwind { -; SDAG-LABEL: test_v8i16_post_reg_ld4r: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #1 -; SDAG-NEXT: ld4r.8h { v0, v1, v2, v3 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i16_post_reg_ld4r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #1 +; CHECK-SD-NEXT: ld4r.8h { v0, v1, v2, v3 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i16_post_reg_ld4r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld4r.8h { v0, v1, v2, v3 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #1 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i16_post_reg_ld4r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld4r.8h { v0, v1, v2, v3 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #1 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld4 = call { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld4r.v8i16.p0(ptr %A) %tmp = getelementptr i16, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -5735,18 +5114,18 @@ declare { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld4r.v define { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_imm_ld4r(ptr %A, ptr %ptr) nounwind { -; SDAG-LABEL: test_v4i16_post_imm_ld4r: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld4r.4h { v0, v1, v2, v3 }, [x0], #8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i16_post_imm_ld4r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld4r.4h { v0, v1, v2, v3 }, [x0], #8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i16_post_imm_ld4r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld4r.4h { v0, v1, v2, v3 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #8 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i16_post_imm_ld4r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld4r.4h { v0, v1, v2, v3 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #8 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld4 = call { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld4r.v4i16.p0(ptr %A) %tmp = getelementptr i16, ptr %A, i32 4 store ptr %tmp, ptr %ptr @@ -5754,19 +5133,19 @@ define { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_imm_ld4r( } define { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_reg_ld4r(ptr %A, ptr %ptr, i64 %inc) nounwind { -; SDAG-LABEL: test_v4i16_post_reg_ld4r: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #1 -; SDAG-NEXT: ld4r.4h { v0, v1, v2, v3 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i16_post_reg_ld4r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #1 +; CHECK-SD-NEXT: ld4r.4h { v0, v1, v2, v3 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i16_post_reg_ld4r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld4r.4h { v0, v1, v2, v3 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #1 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i16_post_reg_ld4r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld4r.4h { v0, v1, v2, v3 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #1 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld4 = call { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld4r.v4i16.p0(ptr %A) %tmp = getelementptr i16, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -5777,18 +5156,18 @@ declare { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld4r.v define { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_imm_ld4r(ptr %A, ptr %ptr) nounwind { -; SDAG-LABEL: test_v4i32_post_imm_ld4r: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld4r.4s { v0, v1, v2, v3 }, [x0], #16 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i32_post_imm_ld4r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld4r.4s { v0, v1, v2, v3 }, [x0], #16 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i32_post_imm_ld4r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld4r.4s { v0, v1, v2, v3 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #16 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i32_post_imm_ld4r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld4r.4s { v0, v1, v2, v3 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #16 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld4 = call { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld4r.v4i32.p0(ptr %A) %tmp = getelementptr i32, ptr %A, i32 4 store ptr %tmp, ptr %ptr @@ -5796,19 +5175,19 @@ define { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_imm_ld4r( } define { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_reg_ld4r(ptr %A, ptr %ptr, i64 %inc) nounwind { -; SDAG-LABEL: test_v4i32_post_reg_ld4r: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ld4r.4s { v0, v1, v2, v3 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i32_post_reg_ld4r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ld4r.4s { v0, v1, v2, v3 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i32_post_reg_ld4r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld4r.4s { v0, v1, v2, v3 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i32_post_reg_ld4r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld4r.4s { v0, v1, v2, v3 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #2 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld4 = call { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld4r.v4i32.p0(ptr %A) %tmp = getelementptr i32, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -5818,18 +5197,18 @@ define { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_reg_ld4r( declare { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld4r.v4i32.p0(ptr) nounwind readonly define { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_imm_ld4r(ptr %A, ptr %ptr) nounwind { -; SDAG-LABEL: test_v2i32_post_imm_ld4r: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld4r.2s { v0, v1, v2, v3 }, [x0], #16 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i32_post_imm_ld4r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld4r.2s { v0, v1, v2, v3 }, [x0], #16 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i32_post_imm_ld4r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld4r.2s { v0, v1, v2, v3 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #16 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i32_post_imm_ld4r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld4r.2s { v0, v1, v2, v3 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #16 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld4 = call { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld4r.v2i32.p0(ptr %A) %tmp = getelementptr i32, ptr %A, i32 4 store ptr %tmp, ptr %ptr @@ -5837,19 +5216,19 @@ define { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_imm_ld4r( } define { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_reg_ld4r(ptr %A, ptr %ptr, i64 %inc) nounwind { -; SDAG-LABEL: test_v2i32_post_reg_ld4r: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ld4r.2s { v0, v1, v2, v3 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i32_post_reg_ld4r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ld4r.2s { v0, v1, v2, v3 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i32_post_reg_ld4r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld4r.2s { v0, v1, v2, v3 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i32_post_reg_ld4r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld4r.2s { v0, v1, v2, v3 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #2 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld4 = call { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld4r.v2i32.p0(ptr %A) %tmp = getelementptr i32, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -5860,18 +5239,18 @@ declare { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld4r.v define { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_imm_ld4r(ptr %A, ptr %ptr) nounwind { -; SDAG-LABEL: test_v2i64_post_imm_ld4r: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld4r.2d { v0, v1, v2, v3 }, [x0], #32 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i64_post_imm_ld4r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld4r.2d { v0, v1, v2, v3 }, [x0], #32 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i64_post_imm_ld4r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld4r.2d { v0, v1, v2, v3 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #32 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i64_post_imm_ld4r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld4r.2d { v0, v1, v2, v3 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #32 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld4 = call { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld4r.v2i64.p0(ptr %A) %tmp = getelementptr i64, ptr %A, i32 4 store ptr %tmp, ptr %ptr @@ -5879,19 +5258,19 @@ define { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_imm_ld4r( } define { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_reg_ld4r(ptr %A, ptr %ptr, i64 %inc) nounwind { -; SDAG-LABEL: test_v2i64_post_reg_ld4r: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ld4r.2d { v0, v1, v2, v3 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i64_post_reg_ld4r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ld4r.2d { v0, v1, v2, v3 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i64_post_reg_ld4r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld4r.2d { v0, v1, v2, v3 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i64_post_reg_ld4r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld4r.2d { v0, v1, v2, v3 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #3 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld4 = call { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld4r.v2i64.p0(ptr %A) %tmp = getelementptr i64, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -5901,18 +5280,18 @@ define { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_reg_ld4r( declare { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld4r.v2i64.p0(ptr) nounwind readonly define { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_imm_ld4r(ptr %A, ptr %ptr) nounwind { -; SDAG-LABEL: test_v1i64_post_imm_ld4r: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld4r.1d { v0, v1, v2, v3 }, [x0], #32 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v1i64_post_imm_ld4r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld4r.1d { v0, v1, v2, v3 }, [x0], #32 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v1i64_post_imm_ld4r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld4r.1d { v0, v1, v2, v3 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #32 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v1i64_post_imm_ld4r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld4r.1d { v0, v1, v2, v3 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #32 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld4 = call { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld4r.v1i64.p0(ptr %A) %tmp = getelementptr i64, ptr %A, i32 4 store ptr %tmp, ptr %ptr @@ -5920,19 +5299,19 @@ define { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_imm_ld4r( } define { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_reg_ld4r(ptr %A, ptr %ptr, i64 %inc) nounwind { -; SDAG-LABEL: test_v1i64_post_reg_ld4r: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ld4r.1d { v0, v1, v2, v3 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v1i64_post_reg_ld4r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ld4r.1d { v0, v1, v2, v3 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v1i64_post_reg_ld4r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld4r.1d { v0, v1, v2, v3 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v1i64_post_reg_ld4r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld4r.1d { v0, v1, v2, v3 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #3 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld4 = call { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld4r.v1i64.p0(ptr %A) %tmp = getelementptr i64, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -5943,18 +5322,18 @@ declare { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld4r.v define { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_imm_ld4r(ptr %A, ptr %ptr) nounwind { -; SDAG-LABEL: test_v4f32_post_imm_ld4r: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld4r.4s { v0, v1, v2, v3 }, [x0], #16 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4f32_post_imm_ld4r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld4r.4s { v0, v1, v2, v3 }, [x0], #16 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4f32_post_imm_ld4r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld4r.4s { v0, v1, v2, v3 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #16 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4f32_post_imm_ld4r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld4r.4s { v0, v1, v2, v3 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #16 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld4 = call { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld4r.v4f32.p0(ptr %A) %tmp = getelementptr float, ptr %A, i32 4 store ptr %tmp, ptr %ptr @@ -5962,19 +5341,19 @@ define { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_i } define { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_reg_ld4r(ptr %A, ptr %ptr, i64 %inc) nounwind { -; SDAG-LABEL: test_v4f32_post_reg_ld4r: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ld4r.4s { v0, v1, v2, v3 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4f32_post_reg_ld4r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ld4r.4s { v0, v1, v2, v3 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4f32_post_reg_ld4r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld4r.4s { v0, v1, v2, v3 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4f32_post_reg_ld4r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld4r.4s { v0, v1, v2, v3 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #2 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld4 = call { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld4r.v4f32.p0(ptr %A) %tmp = getelementptr float, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -5984,18 +5363,18 @@ define { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_r declare { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld4r.v4f32.p0(ptr) nounwind readonly define { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_imm_ld4r(ptr %A, ptr %ptr) nounwind { -; SDAG-LABEL: test_v2f32_post_imm_ld4r: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld4r.2s { v0, v1, v2, v3 }, [x0], #16 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f32_post_imm_ld4r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld4r.2s { v0, v1, v2, v3 }, [x0], #16 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f32_post_imm_ld4r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld4r.2s { v0, v1, v2, v3 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #16 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f32_post_imm_ld4r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld4r.2s { v0, v1, v2, v3 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #16 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld4 = call { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld4r.v2f32.p0(ptr %A) %tmp = getelementptr float, ptr %A, i32 4 store ptr %tmp, ptr %ptr @@ -6003,19 +5382,19 @@ define { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_i } define { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_reg_ld4r(ptr %A, ptr %ptr, i64 %inc) nounwind { -; SDAG-LABEL: test_v2f32_post_reg_ld4r: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ld4r.2s { v0, v1, v2, v3 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f32_post_reg_ld4r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ld4r.2s { v0, v1, v2, v3 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f32_post_reg_ld4r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld4r.2s { v0, v1, v2, v3 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f32_post_reg_ld4r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld4r.2s { v0, v1, v2, v3 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #2 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld4 = call { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld4r.v2f32.p0(ptr %A) %tmp = getelementptr float, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -6026,18 +5405,18 @@ declare { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neo define { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @test_v2f64_post_imm_ld4r(ptr %A, ptr %ptr) nounwind { -; SDAG-LABEL: test_v2f64_post_imm_ld4r: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld4r.2d { v0, v1, v2, v3 }, [x0], #32 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f64_post_imm_ld4r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld4r.2d { v0, v1, v2, v3 }, [x0], #32 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f64_post_imm_ld4r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld4r.2d { v0, v1, v2, v3 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #32 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f64_post_imm_ld4r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld4r.2d { v0, v1, v2, v3 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #32 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld4 = call { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld4r.v2f64.p0(ptr %A) %tmp = getelementptr double, ptr %A, i32 4 store ptr %tmp, ptr %ptr @@ -6045,19 +5424,19 @@ define { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @test_v2f64_po } define { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @test_v2f64_post_reg_ld4r(ptr %A, ptr %ptr, i64 %inc) nounwind { -; SDAG-LABEL: test_v2f64_post_reg_ld4r: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ld4r.2d { v0, v1, v2, v3 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f64_post_reg_ld4r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ld4r.2d { v0, v1, v2, v3 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f64_post_reg_ld4r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld4r.2d { v0, v1, v2, v3 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f64_post_reg_ld4r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld4r.2d { v0, v1, v2, v3 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #3 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld4 = call { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld4r.v2f64.p0(ptr %A) %tmp = getelementptr double, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -6067,18 +5446,18 @@ define { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @test_v2f64_po declare { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld4r.v2f64.p0(ptr) nounwind readonly define { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @test_v1f64_post_imm_ld4r(ptr %A, ptr %ptr) nounwind { -; SDAG-LABEL: test_v1f64_post_imm_ld4r: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld4r.1d { v0, v1, v2, v3 }, [x0], #32 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v1f64_post_imm_ld4r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld4r.1d { v0, v1, v2, v3 }, [x0], #32 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v1f64_post_imm_ld4r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld4r.1d { v0, v1, v2, v3 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, #32 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v1f64_post_imm_ld4r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld4r.1d { v0, v1, v2, v3 }, [x0] +; CHECK-GI-NEXT: add x8, x0, #32 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld4 = call { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld4r.v1f64.p0(ptr %A) %tmp = getelementptr double, ptr %A, i32 4 store ptr %tmp, ptr %ptr @@ -6086,19 +5465,19 @@ define { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @test_v1f64_po } define { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @test_v1f64_post_reg_ld4r(ptr %A, ptr %ptr, i64 %inc) nounwind { -; SDAG-LABEL: test_v1f64_post_reg_ld4r: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ld4r.1d { v0, v1, v2, v3 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v1f64_post_reg_ld4r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ld4r.1d { v0, v1, v2, v3 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v1f64_post_reg_ld4r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld4r.1d { v0, v1, v2, v3 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v1f64_post_reg_ld4r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld4r.1d { v0, v1, v2, v3 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #3 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld4 = call { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld4r.v1f64.p0(ptr %A) %tmp = getelementptr double, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -6109,22 +5488,22 @@ declare { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64 define { <16 x i8>, <16 x i8> } @test_v16i8_post_imm_ld2lane(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8> %C) nounwind { -; SDAG-LABEL: test_v16i8_post_imm_ld2lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: ld2.b { v0, v1 }[0], [x0], #2 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v16i8_post_imm_ld2lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: ld2.b { v0, v1 }[0], [x0], #2 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v16i8_post_imm_ld2lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: add x8, x0, #2 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: ld2.b { v0, v1 }[0], [x0] -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v16i8_post_imm_ld2lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: add x8, x0, #2 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: ld2.b { v0, v1 }[0], [x0] +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld2 = call { <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld2lane.v16i8.p0(<16 x i8> %B, <16 x i8> %C, i64 0, ptr %A) %tmp = getelementptr i8, ptr %A, i32 2 store ptr %tmp, ptr %ptr @@ -6132,22 +5511,22 @@ define { <16 x i8>, <16 x i8> } @test_v16i8_post_imm_ld2lane(ptr %A, ptr %ptr, < } define { <16 x i8>, <16 x i8> } @test_v16i8_post_reg_ld2lane(ptr %A, ptr %ptr, i64 %inc, <16 x i8> %B, <16 x i8> %C) nounwind { -; SDAG-LABEL: test_v16i8_post_reg_ld2lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: ld2.b { v0, v1 }[0], [x0], x2 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v16i8_post_reg_ld2lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: ld2.b { v0, v1 }[0], [x0], x2 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v16i8_post_reg_ld2lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: add x8, x0, x2 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: ld2.b { v0, v1 }[0], [x0] -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v16i8_post_reg_ld2lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: add x8, x0, x2 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: ld2.b { v0, v1 }[0], [x0] +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld2 = call { <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld2lane.v16i8.p0(<16 x i8> %B, <16 x i8> %C, i64 0, ptr %A) %tmp = getelementptr i8, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -6158,22 +5537,22 @@ declare { <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld2lane.v16i8.p0(<16 x i8>, define { <8 x i8>, <8 x i8> } @test_v8i8_post_imm_ld2lane(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %C) nounwind { -; SDAG-LABEL: test_v8i8_post_imm_ld2lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: ld2.b { v0, v1 }[0], [x0], #2 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i8_post_imm_ld2lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: ld2.b { v0, v1 }[0], [x0], #2 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i8_post_imm_ld2lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: add x8, x0, #2 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: ld2.b { v0, v1 }[0], [x0] -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i8_post_imm_ld2lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: add x8, x0, #2 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: ld2.b { v0, v1 }[0], [x0] +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld2 = call { <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld2lane.v8i8.p0(<8 x i8> %B, <8 x i8> %C, i64 0, ptr %A) %tmp = getelementptr i8, ptr %A, i32 2 store ptr %tmp, ptr %ptr @@ -6181,22 +5560,22 @@ define { <8 x i8>, <8 x i8> } @test_v8i8_post_imm_ld2lane(ptr %A, ptr %ptr, <8 x } define { <8 x i8>, <8 x i8> } @test_v8i8_post_reg_ld2lane(ptr %A, ptr %ptr, i64 %inc, <8 x i8> %B, <8 x i8> %C) nounwind { -; SDAG-LABEL: test_v8i8_post_reg_ld2lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: ld2.b { v0, v1 }[0], [x0], x2 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i8_post_reg_ld2lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: ld2.b { v0, v1 }[0], [x0], x2 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i8_post_reg_ld2lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: add x8, x0, x2 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: ld2.b { v0, v1 }[0], [x0] -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i8_post_reg_ld2lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: add x8, x0, x2 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: ld2.b { v0, v1 }[0], [x0] +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld2 = call { <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld2lane.v8i8.p0(<8 x i8> %B, <8 x i8> %C, i64 0, ptr %A) %tmp = getelementptr i8, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -6207,22 +5586,22 @@ declare { <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld2lane.v8i8.p0(<8 x i8>, <8 x define { <8 x i16>, <8 x i16> } @test_v8i16_post_imm_ld2lane(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16> %C) nounwind { -; SDAG-LABEL: test_v8i16_post_imm_ld2lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: ld2.h { v0, v1 }[0], [x0], #4 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i16_post_imm_ld2lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: ld2.h { v0, v1 }[0], [x0], #4 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i16_post_imm_ld2lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: add x8, x0, #4 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: ld2.h { v0, v1 }[0], [x0] -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i16_post_imm_ld2lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: add x8, x0, #4 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: ld2.h { v0, v1 }[0], [x0] +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld2 = call { <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld2lane.v8i16.p0(<8 x i16> %B, <8 x i16> %C, i64 0, ptr %A) %tmp = getelementptr i16, ptr %A, i32 2 store ptr %tmp, ptr %ptr @@ -6230,23 +5609,23 @@ define { <8 x i16>, <8 x i16> } @test_v8i16_post_imm_ld2lane(ptr %A, ptr %ptr, < } define { <8 x i16>, <8 x i16> } @test_v8i16_post_reg_ld2lane(ptr %A, ptr %ptr, i64 %inc, <8 x i16> %B, <8 x i16> %C) nounwind { -; SDAG-LABEL: test_v8i16_post_reg_ld2lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: lsl x8, x2, #1 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: ld2.h { v0, v1 }[0], [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i16_post_reg_ld2lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: lsl x8, x2, #1 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: ld2.h { v0, v1 }[0], [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i16_post_reg_ld2lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #1 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: ld2.h { v0, v1 }[0], [x0] -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i16_post_reg_ld2lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: add x8, x0, x2, lsl #1 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: ld2.h { v0, v1 }[0], [x0] +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld2 = call { <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld2lane.v8i16.p0(<8 x i16> %B, <8 x i16> %C, i64 0, ptr %A) %tmp = getelementptr i16, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -6257,22 +5636,22 @@ declare { <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld2lane.v8i16.p0(<8 x i16>, define { <4 x i16>, <4 x i16> } @test_v4i16_post_imm_ld2lane(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16> %C) nounwind { -; SDAG-LABEL: test_v4i16_post_imm_ld2lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: ld2.h { v0, v1 }[0], [x0], #4 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i16_post_imm_ld2lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: ld2.h { v0, v1 }[0], [x0], #4 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i16_post_imm_ld2lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: add x8, x0, #4 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: ld2.h { v0, v1 }[0], [x0] -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i16_post_imm_ld2lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: add x8, x0, #4 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: ld2.h { v0, v1 }[0], [x0] +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld2 = call { <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld2lane.v4i16.p0(<4 x i16> %B, <4 x i16> %C, i64 0, ptr %A) %tmp = getelementptr i16, ptr %A, i32 2 store ptr %tmp, ptr %ptr @@ -6280,23 +5659,23 @@ define { <4 x i16>, <4 x i16> } @test_v4i16_post_imm_ld2lane(ptr %A, ptr %ptr, < } define { <4 x i16>, <4 x i16> } @test_v4i16_post_reg_ld2lane(ptr %A, ptr %ptr, i64 %inc, <4 x i16> %B, <4 x i16> %C) nounwind { -; SDAG-LABEL: test_v4i16_post_reg_ld2lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: lsl x8, x2, #1 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: ld2.h { v0, v1 }[0], [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i16_post_reg_ld2lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: lsl x8, x2, #1 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: ld2.h { v0, v1 }[0], [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i16_post_reg_ld2lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #1 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: ld2.h { v0, v1 }[0], [x0] -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i16_post_reg_ld2lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: add x8, x0, x2, lsl #1 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: ld2.h { v0, v1 }[0], [x0] +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld2 = call { <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld2lane.v4i16.p0(<4 x i16> %B, <4 x i16> %C, i64 0, ptr %A) %tmp = getelementptr i16, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -6307,22 +5686,22 @@ declare { <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld2lane.v4i16.p0(<4 x i16>, define { <4 x i32>, <4 x i32> } @test_v4i32_post_imm_ld2lane(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32> %C) nounwind { -; SDAG-LABEL: test_v4i32_post_imm_ld2lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: ld2.s { v0, v1 }[0], [x0], #8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i32_post_imm_ld2lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: ld2.s { v0, v1 }[0], [x0], #8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i32_post_imm_ld2lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: add x8, x0, #8 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: ld2.s { v0, v1 }[0], [x0] -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i32_post_imm_ld2lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: add x8, x0, #8 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: ld2.s { v0, v1 }[0], [x0] +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld2 = call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2lane.v4i32.p0(<4 x i32> %B, <4 x i32> %C, i64 0, ptr %A) %tmp = getelementptr i32, ptr %A, i32 2 store ptr %tmp, ptr %ptr @@ -6330,23 +5709,23 @@ define { <4 x i32>, <4 x i32> } @test_v4i32_post_imm_ld2lane(ptr %A, ptr %ptr, < } define { <4 x i32>, <4 x i32> } @test_v4i32_post_reg_ld2lane(ptr %A, ptr %ptr, i64 %inc, <4 x i32> %B, <4 x i32> %C) nounwind { -; SDAG-LABEL: test_v4i32_post_reg_ld2lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: ld2.s { v0, v1 }[0], [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i32_post_reg_ld2lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: ld2.s { v0, v1 }[0], [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i32_post_reg_ld2lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: ld2.s { v0, v1 }[0], [x0] -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i32_post_reg_ld2lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: add x8, x0, x2, lsl #2 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: ld2.s { v0, v1 }[0], [x0] +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld2 = call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2lane.v4i32.p0(<4 x i32> %B, <4 x i32> %C, i64 0, ptr %A) %tmp = getelementptr i32, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -6357,22 +5736,22 @@ declare { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2lane.v4i32.p0(<4 x i32>, define { <2 x i32>, <2 x i32> } @test_v2i32_post_imm_ld2lane(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32> %C) nounwind { -; SDAG-LABEL: test_v2i32_post_imm_ld2lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: ld2.s { v0, v1 }[0], [x0], #8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i32_post_imm_ld2lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: ld2.s { v0, v1 }[0], [x0], #8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i32_post_imm_ld2lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: add x8, x0, #8 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: ld2.s { v0, v1 }[0], [x0] -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i32_post_imm_ld2lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: add x8, x0, #8 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: ld2.s { v0, v1 }[0], [x0] +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld2 = call { <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld2lane.v2i32.p0(<2 x i32> %B, <2 x i32> %C, i64 0, ptr %A) %tmp = getelementptr i32, ptr %A, i32 2 store ptr %tmp, ptr %ptr @@ -6380,23 +5759,23 @@ define { <2 x i32>, <2 x i32> } @test_v2i32_post_imm_ld2lane(ptr %A, ptr %ptr, < } define { <2 x i32>, <2 x i32> } @test_v2i32_post_reg_ld2lane(ptr %A, ptr %ptr, i64 %inc, <2 x i32> %B, <2 x i32> %C) nounwind { -; SDAG-LABEL: test_v2i32_post_reg_ld2lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: ld2.s { v0, v1 }[0], [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i32_post_reg_ld2lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: ld2.s { v0, v1 }[0], [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i32_post_reg_ld2lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: ld2.s { v0, v1 }[0], [x0] -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i32_post_reg_ld2lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: add x8, x0, x2, lsl #2 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: ld2.s { v0, v1 }[0], [x0] +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld2 = call { <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld2lane.v2i32.p0(<2 x i32> %B, <2 x i32> %C, i64 0, ptr %A) %tmp = getelementptr i32, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -6407,22 +5786,22 @@ declare { <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld2lane.v2i32.p0(<2 x i32>, define { <2 x i64>, <2 x i64> } @test_v2i64_post_imm_ld2lane(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64> %C) nounwind { -; SDAG-LABEL: test_v2i64_post_imm_ld2lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: ld2.d { v0, v1 }[0], [x0], #16 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i64_post_imm_ld2lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: ld2.d { v0, v1 }[0], [x0], #16 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i64_post_imm_ld2lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: add x8, x0, #16 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: ld2.d { v0, v1 }[0], [x0] -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i64_post_imm_ld2lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: add x8, x0, #16 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: ld2.d { v0, v1 }[0], [x0] +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld2 = call { <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld2lane.v2i64.p0(<2 x i64> %B, <2 x i64> %C, i64 0, ptr %A) %tmp = getelementptr i64, ptr %A, i32 2 store ptr %tmp, ptr %ptr @@ -6430,23 +5809,23 @@ define { <2 x i64>, <2 x i64> } @test_v2i64_post_imm_ld2lane(ptr %A, ptr %ptr, < } define { <2 x i64>, <2 x i64> } @test_v2i64_post_reg_ld2lane(ptr %A, ptr %ptr, i64 %inc, <2 x i64> %B, <2 x i64> %C) nounwind { -; SDAG-LABEL: test_v2i64_post_reg_ld2lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: ld2.d { v0, v1 }[0], [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i64_post_reg_ld2lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: ld2.d { v0, v1 }[0], [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i64_post_reg_ld2lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: ld2.d { v0, v1 }[0], [x0] -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i64_post_reg_ld2lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: add x8, x0, x2, lsl #3 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: ld2.d { v0, v1 }[0], [x0] +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld2 = call { <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld2lane.v2i64.p0(<2 x i64> %B, <2 x i64> %C, i64 0, ptr %A) %tmp = getelementptr i64, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -6457,22 +5836,22 @@ declare { <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld2lane.v2i64.p0(<2 x i64>, define { <1 x i64>, <1 x i64> } @test_v1i64_post_imm_ld2lane(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64> %C) nounwind { -; SDAG-LABEL: test_v1i64_post_imm_ld2lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: ld2.d { v0, v1 }[0], [x0], #16 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v1i64_post_imm_ld2lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: ld2.d { v0, v1 }[0], [x0], #16 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v1i64_post_imm_ld2lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: add x8, x0, #16 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: ld2.d { v0, v1 }[0], [x0] -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v1i64_post_imm_ld2lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: add x8, x0, #16 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: ld2.d { v0, v1 }[0], [x0] +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld2 = call { <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld2lane.v1i64.p0(<1 x i64> %B, <1 x i64> %C, i64 0, ptr %A) %tmp = getelementptr i64, ptr %A, i32 2 store ptr %tmp, ptr %ptr @@ -6480,23 +5859,23 @@ define { <1 x i64>, <1 x i64> } @test_v1i64_post_imm_ld2lane(ptr %A, ptr %ptr, < } define { <1 x i64>, <1 x i64> } @test_v1i64_post_reg_ld2lane(ptr %A, ptr %ptr, i64 %inc, <1 x i64> %B, <1 x i64> %C) nounwind { -; SDAG-LABEL: test_v1i64_post_reg_ld2lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: ld2.d { v0, v1 }[0], [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v1i64_post_reg_ld2lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: ld2.d { v0, v1 }[0], [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v1i64_post_reg_ld2lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: ld2.d { v0, v1 }[0], [x0] -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v1i64_post_reg_ld2lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: add x8, x0, x2, lsl #3 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: ld2.d { v0, v1 }[0], [x0] +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld2 = call { <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld2lane.v1i64.p0(<1 x i64> %B, <1 x i64> %C, i64 0, ptr %A) %tmp = getelementptr i64, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -6507,22 +5886,22 @@ declare { <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld2lane.v1i64.p0(<1 x i64>, define { <4 x float>, <4 x float> } @test_v4f32_post_imm_ld2lane(ptr %A, ptr %ptr, <4 x float> %B, <4 x float> %C) nounwind { -; SDAG-LABEL: test_v4f32_post_imm_ld2lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: ld2.s { v0, v1 }[0], [x0], #8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4f32_post_imm_ld2lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: ld2.s { v0, v1 }[0], [x0], #8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4f32_post_imm_ld2lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: add x8, x0, #8 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: ld2.s { v0, v1 }[0], [x0] -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4f32_post_imm_ld2lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: add x8, x0, #8 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: ld2.s { v0, v1 }[0], [x0] +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld2 = call { <4 x float>, <4 x float> } @llvm.aarch64.neon.ld2lane.v4f32.p0(<4 x float> %B, <4 x float> %C, i64 0, ptr %A) %tmp = getelementptr float, ptr %A, i32 2 store ptr %tmp, ptr %ptr @@ -6530,23 +5909,23 @@ define { <4 x float>, <4 x float> } @test_v4f32_post_imm_ld2lane(ptr %A, ptr %pt } define { <4 x float>, <4 x float> } @test_v4f32_post_reg_ld2lane(ptr %A, ptr %ptr, i64 %inc, <4 x float> %B, <4 x float> %C) nounwind { -; SDAG-LABEL: test_v4f32_post_reg_ld2lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: ld2.s { v0, v1 }[0], [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4f32_post_reg_ld2lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: ld2.s { v0, v1 }[0], [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4f32_post_reg_ld2lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: ld2.s { v0, v1 }[0], [x0] -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4f32_post_reg_ld2lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: add x8, x0, x2, lsl #2 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: ld2.s { v0, v1 }[0], [x0] +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld2 = call { <4 x float>, <4 x float> } @llvm.aarch64.neon.ld2lane.v4f32.p0(<4 x float> %B, <4 x float> %C, i64 0, ptr %A) %tmp = getelementptr float, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -6557,22 +5936,22 @@ declare { <4 x float>, <4 x float> } @llvm.aarch64.neon.ld2lane.v4f32.p0(<4 x fl define { <2 x float>, <2 x float> } @test_v2f32_post_imm_ld2lane(ptr %A, ptr %ptr, <2 x float> %B, <2 x float> %C) nounwind { -; SDAG-LABEL: test_v2f32_post_imm_ld2lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: ld2.s { v0, v1 }[0], [x0], #8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f32_post_imm_ld2lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: ld2.s { v0, v1 }[0], [x0], #8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f32_post_imm_ld2lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: add x8, x0, #8 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: ld2.s { v0, v1 }[0], [x0] -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f32_post_imm_ld2lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: add x8, x0, #8 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: ld2.s { v0, v1 }[0], [x0] +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld2 = call { <2 x float>, <2 x float> } @llvm.aarch64.neon.ld2lane.v2f32.p0(<2 x float> %B, <2 x float> %C, i64 0, ptr %A) %tmp = getelementptr float, ptr %A, i32 2 store ptr %tmp, ptr %ptr @@ -6580,23 +5959,23 @@ define { <2 x float>, <2 x float> } @test_v2f32_post_imm_ld2lane(ptr %A, ptr %pt } define { <2 x float>, <2 x float> } @test_v2f32_post_reg_ld2lane(ptr %A, ptr %ptr, i64 %inc, <2 x float> %B, <2 x float> %C) nounwind { -; SDAG-LABEL: test_v2f32_post_reg_ld2lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: ld2.s { v0, v1 }[0], [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f32_post_reg_ld2lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: ld2.s { v0, v1 }[0], [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f32_post_reg_ld2lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: ld2.s { v0, v1 }[0], [x0] -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f32_post_reg_ld2lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: add x8, x0, x2, lsl #2 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: ld2.s { v0, v1 }[0], [x0] +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld2 = call { <2 x float>, <2 x float> } @llvm.aarch64.neon.ld2lane.v2f32.p0(<2 x float> %B, <2 x float> %C, i64 0, ptr %A) %tmp = getelementptr float, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -6607,22 +5986,22 @@ declare { <2 x float>, <2 x float> } @llvm.aarch64.neon.ld2lane.v2f32.p0(<2 x fl define { <2 x double>, <2 x double> } @test_v2f64_post_imm_ld2lane(ptr %A, ptr %ptr, <2 x double> %B, <2 x double> %C) nounwind { -; SDAG-LABEL: test_v2f64_post_imm_ld2lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: ld2.d { v0, v1 }[0], [x0], #16 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f64_post_imm_ld2lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: ld2.d { v0, v1 }[0], [x0], #16 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f64_post_imm_ld2lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: add x8, x0, #16 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: ld2.d { v0, v1 }[0], [x0] -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f64_post_imm_ld2lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: add x8, x0, #16 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: ld2.d { v0, v1 }[0], [x0] +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld2 = call { <2 x double>, <2 x double> } @llvm.aarch64.neon.ld2lane.v2f64.p0(<2 x double> %B, <2 x double> %C, i64 0, ptr %A) %tmp = getelementptr double, ptr %A, i32 2 store ptr %tmp, ptr %ptr @@ -6630,23 +6009,23 @@ define { <2 x double>, <2 x double> } @test_v2f64_post_imm_ld2lane(ptr %A, ptr % } define { <2 x double>, <2 x double> } @test_v2f64_post_reg_ld2lane(ptr %A, ptr %ptr, i64 %inc, <2 x double> %B, <2 x double> %C) nounwind { -; SDAG-LABEL: test_v2f64_post_reg_ld2lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: ld2.d { v0, v1 }[0], [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f64_post_reg_ld2lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: ld2.d { v0, v1 }[0], [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f64_post_reg_ld2lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: ld2.d { v0, v1 }[0], [x0] -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f64_post_reg_ld2lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: add x8, x0, x2, lsl #3 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: ld2.d { v0, v1 }[0], [x0] +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld2 = call { <2 x double>, <2 x double> } @llvm.aarch64.neon.ld2lane.v2f64.p0(<2 x double> %B, <2 x double> %C, i64 0, ptr %A) %tmp = getelementptr double, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -6657,22 +6036,22 @@ declare { <2 x double>, <2 x double> } @llvm.aarch64.neon.ld2lane.v2f64.p0(<2 x define { <1 x double>, <1 x double> } @test_v1f64_post_imm_ld2lane(ptr %A, ptr %ptr, <1 x double> %B, <1 x double> %C) nounwind { -; SDAG-LABEL: test_v1f64_post_imm_ld2lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: ld2.d { v0, v1 }[0], [x0], #16 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v1f64_post_imm_ld2lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: ld2.d { v0, v1 }[0], [x0], #16 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v1f64_post_imm_ld2lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: add x8, x0, #16 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: ld2.d { v0, v1 }[0], [x0] -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v1f64_post_imm_ld2lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: add x8, x0, #16 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: ld2.d { v0, v1 }[0], [x0] +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld2 = call { <1 x double>, <1 x double> } @llvm.aarch64.neon.ld2lane.v1f64.p0(<1 x double> %B, <1 x double> %C, i64 0, ptr %A) %tmp = getelementptr double, ptr %A, i32 2 store ptr %tmp, ptr %ptr @@ -6680,23 +6059,23 @@ define { <1 x double>, <1 x double> } @test_v1f64_post_imm_ld2lane(ptr %A, ptr % } define { <1 x double>, <1 x double> } @test_v1f64_post_reg_ld2lane(ptr %A, ptr %ptr, i64 %inc, <1 x double> %B, <1 x double> %C) nounwind { -; SDAG-LABEL: test_v1f64_post_reg_ld2lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: ld2.d { v0, v1 }[0], [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v1f64_post_reg_ld2lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: ld2.d { v0, v1 }[0], [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v1f64_post_reg_ld2lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: ld2.d { v0, v1 }[0], [x0] -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v1f64_post_reg_ld2lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: add x8, x0, x2, lsl #3 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: ld2.d { v0, v1 }[0], [x0] +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld2 = call { <1 x double>, <1 x double> } @llvm.aarch64.neon.ld2lane.v1f64.p0(<1 x double> %B, <1 x double> %C, i64 0, ptr %A) %tmp = getelementptr double, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -6707,24 +6086,24 @@ declare { <1 x double>, <1 x double> } @llvm.aarch64.neon.ld2lane.v1f64.p0(<1 x define { <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_imm_ld3lane(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8> %C, <16 x i8> %D) nounwind { -; SDAG-LABEL: test_v16i8_post_imm_ld3lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ld3.b { v0, v1, v2 }[0], [x0], #3 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v16i8_post_imm_ld3lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ld3.b { v0, v1, v2 }[0], [x0], #3 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v16i8_post_imm_ld3lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: add x8, x0, #3 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ld3.b { v0, v1, v2 }[0], [x0] -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v16i8_post_imm_ld3lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: add x8, x0, #3 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ld3.b { v0, v1, v2 }[0], [x0] +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld3 = call { <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld3lane.v16i8.p0(<16 x i8> %B, <16 x i8> %C, <16 x i8> %D, i64 0, ptr %A) %tmp = getelementptr i8, ptr %A, i32 3 store ptr %tmp, ptr %ptr @@ -6732,24 +6111,24 @@ define { <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_imm_ld3lane(ptr %A, } define { <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_reg_ld3lane(ptr %A, ptr %ptr, i64 %inc, <16 x i8> %B, <16 x i8> %C, <16 x i8> %D) nounwind { -; SDAG-LABEL: test_v16i8_post_reg_ld3lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ld3.b { v0, v1, v2 }[0], [x0], x2 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v16i8_post_reg_ld3lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ld3.b { v0, v1, v2 }[0], [x0], x2 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v16i8_post_reg_ld3lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: add x8, x0, x2 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ld3.b { v0, v1, v2 }[0], [x0] -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v16i8_post_reg_ld3lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: add x8, x0, x2 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ld3.b { v0, v1, v2 }[0], [x0] +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld3 = call { <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld3lane.v16i8.p0(<16 x i8> %B, <16 x i8> %C, <16 x i8> %D, i64 0, ptr %A) %tmp = getelementptr i8, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -6760,24 +6139,24 @@ declare { <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld3lane.v16i8.p0( define { <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_imm_ld3lane(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %C, <8 x i8> %D) nounwind { -; SDAG-LABEL: test_v8i8_post_imm_ld3lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ld3.b { v0, v1, v2 }[0], [x0], #3 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i8_post_imm_ld3lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ld3.b { v0, v1, v2 }[0], [x0], #3 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i8_post_imm_ld3lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: add x8, x0, #3 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ld3.b { v0, v1, v2 }[0], [x0] -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i8_post_imm_ld3lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: add x8, x0, #3 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ld3.b { v0, v1, v2 }[0], [x0] +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld3 = call { <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld3lane.v8i8.p0(<8 x i8> %B, <8 x i8> %C, <8 x i8> %D, i64 0, ptr %A) %tmp = getelementptr i8, ptr %A, i32 3 store ptr %tmp, ptr %ptr @@ -6785,24 +6164,24 @@ define { <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_imm_ld3lane(ptr %A, ptr } define { <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_reg_ld3lane(ptr %A, ptr %ptr, i64 %inc, <8 x i8> %B, <8 x i8> %C, <8 x i8> %D) nounwind { -; SDAG-LABEL: test_v8i8_post_reg_ld3lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ld3.b { v0, v1, v2 }[0], [x0], x2 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i8_post_reg_ld3lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ld3.b { v0, v1, v2 }[0], [x0], x2 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i8_post_reg_ld3lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: add x8, x0, x2 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ld3.b { v0, v1, v2 }[0], [x0] -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i8_post_reg_ld3lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: add x8, x0, x2 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ld3.b { v0, v1, v2 }[0], [x0] +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld3 = call { <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld3lane.v8i8.p0(<8 x i8> %B, <8 x i8> %C, <8 x i8> %D, i64 0, ptr %A) %tmp = getelementptr i8, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -6813,24 +6192,24 @@ declare { <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld3lane.v8i8.p0(<8 x define { <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_imm_ld3lane(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16> %C, <8 x i16> %D) nounwind { -; SDAG-LABEL: test_v8i16_post_imm_ld3lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ld3.h { v0, v1, v2 }[0], [x0], #6 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i16_post_imm_ld3lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ld3.h { v0, v1, v2 }[0], [x0], #6 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i16_post_imm_ld3lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: add x8, x0, #6 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ld3.h { v0, v1, v2 }[0], [x0] -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i16_post_imm_ld3lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: add x8, x0, #6 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ld3.h { v0, v1, v2 }[0], [x0] +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld3 = call { <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld3lane.v8i16.p0(<8 x i16> %B, <8 x i16> %C, <8 x i16> %D, i64 0, ptr %A) %tmp = getelementptr i16, ptr %A, i32 3 store ptr %tmp, ptr %ptr @@ -6838,25 +6217,25 @@ define { <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_imm_ld3lane(ptr %A, } define { <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_reg_ld3lane(ptr %A, ptr %ptr, i64 %inc, <8 x i16> %B, <8 x i16> %C, <8 x i16> %D) nounwind { -; SDAG-LABEL: test_v8i16_post_reg_ld3lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: lsl x8, x2, #1 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ld3.h { v0, v1, v2 }[0], [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i16_post_reg_ld3lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: lsl x8, x2, #1 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ld3.h { v0, v1, v2 }[0], [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i16_post_reg_ld3lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #1 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ld3.h { v0, v1, v2 }[0], [x0] -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i16_post_reg_ld3lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: add x8, x0, x2, lsl #1 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ld3.h { v0, v1, v2 }[0], [x0] +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld3 = call { <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld3lane.v8i16.p0(<8 x i16> %B, <8 x i16> %C, <8 x i16> %D, i64 0, ptr %A) %tmp = getelementptr i16, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -6867,24 +6246,24 @@ declare { <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld3lane.v8i16.p0( define { <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_imm_ld3lane(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16> %C, <4 x i16> %D) nounwind { -; SDAG-LABEL: test_v4i16_post_imm_ld3lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ld3.h { v0, v1, v2 }[0], [x0], #6 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i16_post_imm_ld3lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ld3.h { v0, v1, v2 }[0], [x0], #6 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i16_post_imm_ld3lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: add x8, x0, #6 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ld3.h { v0, v1, v2 }[0], [x0] -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i16_post_imm_ld3lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: add x8, x0, #6 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ld3.h { v0, v1, v2 }[0], [x0] +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld3 = call { <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld3lane.v4i16.p0(<4 x i16> %B, <4 x i16> %C, <4 x i16> %D, i64 0, ptr %A) %tmp = getelementptr i16, ptr %A, i32 3 store ptr %tmp, ptr %ptr @@ -6892,25 +6271,25 @@ define { <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_imm_ld3lane(ptr %A, } define { <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_reg_ld3lane(ptr %A, ptr %ptr, i64 %inc, <4 x i16> %B, <4 x i16> %C, <4 x i16> %D) nounwind { -; SDAG-LABEL: test_v4i16_post_reg_ld3lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: lsl x8, x2, #1 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ld3.h { v0, v1, v2 }[0], [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i16_post_reg_ld3lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: lsl x8, x2, #1 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ld3.h { v0, v1, v2 }[0], [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i16_post_reg_ld3lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #1 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ld3.h { v0, v1, v2 }[0], [x0] -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i16_post_reg_ld3lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: add x8, x0, x2, lsl #1 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ld3.h { v0, v1, v2 }[0], [x0] +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld3 = call { <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld3lane.v4i16.p0(<4 x i16> %B, <4 x i16> %C, <4 x i16> %D, i64 0, ptr %A) %tmp = getelementptr i16, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -6921,24 +6300,24 @@ declare { <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld3lane.v4i16.p0( define { <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_imm_ld3lane(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32> %C, <4 x i32> %D) nounwind { -; SDAG-LABEL: test_v4i32_post_imm_ld3lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ld3.s { v0, v1, v2 }[0], [x0], #12 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i32_post_imm_ld3lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ld3.s { v0, v1, v2 }[0], [x0], #12 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i32_post_imm_ld3lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: add x8, x0, #12 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ld3.s { v0, v1, v2 }[0], [x0] -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i32_post_imm_ld3lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: add x8, x0, #12 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ld3.s { v0, v1, v2 }[0], [x0] +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld3 = call { <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld3lane.v4i32.p0(<4 x i32> %B, <4 x i32> %C, <4 x i32> %D, i64 0, ptr %A) %tmp = getelementptr i32, ptr %A, i32 3 store ptr %tmp, ptr %ptr @@ -6946,25 +6325,25 @@ define { <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_imm_ld3lane(ptr %A, } define { <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_reg_ld3lane(ptr %A, ptr %ptr, i64 %inc, <4 x i32> %B, <4 x i32> %C, <4 x i32> %D) nounwind { -; SDAG-LABEL: test_v4i32_post_reg_ld3lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ld3.s { v0, v1, v2 }[0], [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i32_post_reg_ld3lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ld3.s { v0, v1, v2 }[0], [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i32_post_reg_ld3lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ld3.s { v0, v1, v2 }[0], [x0] -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i32_post_reg_ld3lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: add x8, x0, x2, lsl #2 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ld3.s { v0, v1, v2 }[0], [x0] +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld3 = call { <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld3lane.v4i32.p0(<4 x i32> %B, <4 x i32> %C, <4 x i32> %D, i64 0, ptr %A) %tmp = getelementptr i32, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -6975,24 +6354,24 @@ declare { <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld3lane.v4i32.p0( define { <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_imm_ld3lane(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32> %C, <2 x i32> %D) nounwind { -; SDAG-LABEL: test_v2i32_post_imm_ld3lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ld3.s { v0, v1, v2 }[0], [x0], #12 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i32_post_imm_ld3lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ld3.s { v0, v1, v2 }[0], [x0], #12 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i32_post_imm_ld3lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: add x8, x0, #12 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ld3.s { v0, v1, v2 }[0], [x0] -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i32_post_imm_ld3lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: add x8, x0, #12 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ld3.s { v0, v1, v2 }[0], [x0] +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld3 = call { <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld3lane.v2i32.p0(<2 x i32> %B, <2 x i32> %C, <2 x i32> %D, i64 0, ptr %A) %tmp = getelementptr i32, ptr %A, i32 3 store ptr %tmp, ptr %ptr @@ -7000,25 +6379,25 @@ define { <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_imm_ld3lane(ptr %A, } define { <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_reg_ld3lane(ptr %A, ptr %ptr, i64 %inc, <2 x i32> %B, <2 x i32> %C, <2 x i32> %D) nounwind { -; SDAG-LABEL: test_v2i32_post_reg_ld3lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ld3.s { v0, v1, v2 }[0], [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i32_post_reg_ld3lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ld3.s { v0, v1, v2 }[0], [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i32_post_reg_ld3lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ld3.s { v0, v1, v2 }[0], [x0] -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i32_post_reg_ld3lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: add x8, x0, x2, lsl #2 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ld3.s { v0, v1, v2 }[0], [x0] +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld3 = call { <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld3lane.v2i32.p0(<2 x i32> %B, <2 x i32> %C, <2 x i32> %D, i64 0, ptr %A) %tmp = getelementptr i32, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -7029,24 +6408,24 @@ declare { <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld3lane.v2i32.p0( define { <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_imm_ld3lane(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64> %C, <2 x i64> %D) nounwind { -; SDAG-LABEL: test_v2i64_post_imm_ld3lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ld3.d { v0, v1, v2 }[0], [x0], #24 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i64_post_imm_ld3lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ld3.d { v0, v1, v2 }[0], [x0], #24 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i64_post_imm_ld3lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: add x8, x0, #24 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ld3.d { v0, v1, v2 }[0], [x0] -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i64_post_imm_ld3lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: add x8, x0, #24 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ld3.d { v0, v1, v2 }[0], [x0] +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld3 = call { <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld3lane.v2i64.p0(<2 x i64> %B, <2 x i64> %C, <2 x i64> %D, i64 0, ptr %A) %tmp = getelementptr i64, ptr %A, i32 3 store ptr %tmp, ptr %ptr @@ -7054,25 +6433,25 @@ define { <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_imm_ld3lane(ptr %A, } define { <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_reg_ld3lane(ptr %A, ptr %ptr, i64 %inc, <2 x i64> %B, <2 x i64> %C, <2 x i64> %D) nounwind { -; SDAG-LABEL: test_v2i64_post_reg_ld3lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ld3.d { v0, v1, v2 }[0], [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i64_post_reg_ld3lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ld3.d { v0, v1, v2 }[0], [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i64_post_reg_ld3lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ld3.d { v0, v1, v2 }[0], [x0] -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i64_post_reg_ld3lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: add x8, x0, x2, lsl #3 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ld3.d { v0, v1, v2 }[0], [x0] +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld3 = call { <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld3lane.v2i64.p0(<2 x i64> %B, <2 x i64> %C, <2 x i64> %D, i64 0, ptr %A) %tmp = getelementptr i64, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -7083,24 +6462,24 @@ declare { <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld3lane.v2i64.p0( define { <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_imm_ld3lane(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64> %C, <1 x i64> %D) nounwind { -; SDAG-LABEL: test_v1i64_post_imm_ld3lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ld3.d { v0, v1, v2 }[0], [x0], #24 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v1i64_post_imm_ld3lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ld3.d { v0, v1, v2 }[0], [x0], #24 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v1i64_post_imm_ld3lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: add x8, x0, #24 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ld3.d { v0, v1, v2 }[0], [x0] -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v1i64_post_imm_ld3lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: add x8, x0, #24 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ld3.d { v0, v1, v2 }[0], [x0] +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld3 = call { <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld3lane.v1i64.p0(<1 x i64> %B, <1 x i64> %C, <1 x i64> %D, i64 0, ptr %A) %tmp = getelementptr i64, ptr %A, i32 3 store ptr %tmp, ptr %ptr @@ -7108,25 +6487,25 @@ define { <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_imm_ld3lane(ptr %A, } define { <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_reg_ld3lane(ptr %A, ptr %ptr, i64 %inc, <1 x i64> %B, <1 x i64> %C, <1 x i64> %D) nounwind { -; SDAG-LABEL: test_v1i64_post_reg_ld3lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ld3.d { v0, v1, v2 }[0], [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v1i64_post_reg_ld3lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ld3.d { v0, v1, v2 }[0], [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v1i64_post_reg_ld3lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ld3.d { v0, v1, v2 }[0], [x0] -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v1i64_post_reg_ld3lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: add x8, x0, x2, lsl #3 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ld3.d { v0, v1, v2 }[0], [x0] +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld3 = call { <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld3lane.v1i64.p0(<1 x i64> %B, <1 x i64> %C, <1 x i64> %D, i64 0, ptr %A) %tmp = getelementptr i64, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -7137,24 +6516,24 @@ declare { <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld3lane.v1i64.p0( define { <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_imm_ld3lane(ptr %A, ptr %ptr, <4 x float> %B, <4 x float> %C, <4 x float> %D) nounwind { -; SDAG-LABEL: test_v4f32_post_imm_ld3lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ld3.s { v0, v1, v2 }[0], [x0], #12 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4f32_post_imm_ld3lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ld3.s { v0, v1, v2 }[0], [x0], #12 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4f32_post_imm_ld3lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: add x8, x0, #12 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ld3.s { v0, v1, v2 }[0], [x0] -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4f32_post_imm_ld3lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: add x8, x0, #12 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ld3.s { v0, v1, v2 }[0], [x0] +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld3 = call { <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld3lane.v4f32.p0(<4 x float> %B, <4 x float> %C, <4 x float> %D, i64 0, ptr %A) %tmp = getelementptr float, ptr %A, i32 3 store ptr %tmp, ptr %ptr @@ -7162,25 +6541,25 @@ define { <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_imm_ld3lane(pt } define { <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_reg_ld3lane(ptr %A, ptr %ptr, i64 %inc, <4 x float> %B, <4 x float> %C, <4 x float> %D) nounwind { -; SDAG-LABEL: test_v4f32_post_reg_ld3lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ld3.s { v0, v1, v2 }[0], [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4f32_post_reg_ld3lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ld3.s { v0, v1, v2 }[0], [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4f32_post_reg_ld3lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ld3.s { v0, v1, v2 }[0], [x0] -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4f32_post_reg_ld3lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: add x8, x0, x2, lsl #2 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ld3.s { v0, v1, v2 }[0], [x0] +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld3 = call { <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld3lane.v4f32.p0(<4 x float> %B, <4 x float> %C, <4 x float> %D, i64 0, ptr %A) %tmp = getelementptr float, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -7191,24 +6570,24 @@ declare { <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld3lane.v4f define { <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_imm_ld3lane(ptr %A, ptr %ptr, <2 x float> %B, <2 x float> %C, <2 x float> %D) nounwind { -; SDAG-LABEL: test_v2f32_post_imm_ld3lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ld3.s { v0, v1, v2 }[0], [x0], #12 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f32_post_imm_ld3lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ld3.s { v0, v1, v2 }[0], [x0], #12 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f32_post_imm_ld3lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: add x8, x0, #12 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ld3.s { v0, v1, v2 }[0], [x0] -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f32_post_imm_ld3lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: add x8, x0, #12 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ld3.s { v0, v1, v2 }[0], [x0] +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld3 = call { <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld3lane.v2f32.p0(<2 x float> %B, <2 x float> %C, <2 x float> %D, i64 0, ptr %A) %tmp = getelementptr float, ptr %A, i32 3 store ptr %tmp, ptr %ptr @@ -7216,25 +6595,25 @@ define { <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_imm_ld3lane(pt } define { <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_reg_ld3lane(ptr %A, ptr %ptr, i64 %inc, <2 x float> %B, <2 x float> %C, <2 x float> %D) nounwind { -; SDAG-LABEL: test_v2f32_post_reg_ld3lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ld3.s { v0, v1, v2 }[0], [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f32_post_reg_ld3lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ld3.s { v0, v1, v2 }[0], [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f32_post_reg_ld3lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ld3.s { v0, v1, v2 }[0], [x0] -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f32_post_reg_ld3lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: add x8, x0, x2, lsl #2 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ld3.s { v0, v1, v2 }[0], [x0] +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld3 = call { <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld3lane.v2f32.p0(<2 x float> %B, <2 x float> %C, <2 x float> %D, i64 0, ptr %A) %tmp = getelementptr float, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -7245,24 +6624,24 @@ declare { <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld3lane.v2f define { <2 x double>, <2 x double>, <2 x double> } @test_v2f64_post_imm_ld3lane(ptr %A, ptr %ptr, <2 x double> %B, <2 x double> %C, <2 x double> %D) nounwind { -; SDAG-LABEL: test_v2f64_post_imm_ld3lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ld3.d { v0, v1, v2 }[0], [x0], #24 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f64_post_imm_ld3lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ld3.d { v0, v1, v2 }[0], [x0], #24 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f64_post_imm_ld3lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: add x8, x0, #24 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ld3.d { v0, v1, v2 }[0], [x0] -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f64_post_imm_ld3lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: add x8, x0, #24 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ld3.d { v0, v1, v2 }[0], [x0] +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld3 = call { <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld3lane.v2f64.p0(<2 x double> %B, <2 x double> %C, <2 x double> %D, i64 0, ptr %A) %tmp = getelementptr double, ptr %A, i32 3 store ptr %tmp, ptr %ptr @@ -7270,25 +6649,25 @@ define { <2 x double>, <2 x double>, <2 x double> } @test_v2f64_post_imm_ld3lane } define { <2 x double>, <2 x double>, <2 x double> } @test_v2f64_post_reg_ld3lane(ptr %A, ptr %ptr, i64 %inc, <2 x double> %B, <2 x double> %C, <2 x double> %D) nounwind { -; SDAG-LABEL: test_v2f64_post_reg_ld3lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ld3.d { v0, v1, v2 }[0], [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f64_post_reg_ld3lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ld3.d { v0, v1, v2 }[0], [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f64_post_reg_ld3lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ld3.d { v0, v1, v2 }[0], [x0] -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f64_post_reg_ld3lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: add x8, x0, x2, lsl #3 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ld3.d { v0, v1, v2 }[0], [x0] +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld3 = call { <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld3lane.v2f64.p0(<2 x double> %B, <2 x double> %C, <2 x double> %D, i64 0, ptr %A) %tmp = getelementptr double, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -7299,24 +6678,24 @@ declare { <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld3lane. define { <1 x double>, <1 x double>, <1 x double> } @test_v1f64_post_imm_ld3lane(ptr %A, ptr %ptr, <1 x double> %B, <1 x double> %C, <1 x double> %D) nounwind { -; SDAG-LABEL: test_v1f64_post_imm_ld3lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ld3.d { v0, v1, v2 }[0], [x0], #24 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v1f64_post_imm_ld3lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ld3.d { v0, v1, v2 }[0], [x0], #24 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v1f64_post_imm_ld3lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: add x8, x0, #24 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ld3.d { v0, v1, v2 }[0], [x0] -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v1f64_post_imm_ld3lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: add x8, x0, #24 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ld3.d { v0, v1, v2 }[0], [x0] +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld3 = call { <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld3lane.v1f64.p0(<1 x double> %B, <1 x double> %C, <1 x double> %D, i64 0, ptr %A) %tmp = getelementptr double, ptr %A, i32 3 store ptr %tmp, ptr %ptr @@ -7324,25 +6703,25 @@ define { <1 x double>, <1 x double>, <1 x double> } @test_v1f64_post_imm_ld3lane } define { <1 x double>, <1 x double>, <1 x double> } @test_v1f64_post_reg_ld3lane(ptr %A, ptr %ptr, i64 %inc, <1 x double> %B, <1 x double> %C, <1 x double> %D) nounwind { -; SDAG-LABEL: test_v1f64_post_reg_ld3lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ld3.d { v0, v1, v2 }[0], [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v1f64_post_reg_ld3lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ld3.d { v0, v1, v2 }[0], [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v1f64_post_reg_ld3lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ld3.d { v0, v1, v2 }[0], [x0] -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v1f64_post_reg_ld3lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: add x8, x0, x2, lsl #3 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ld3.d { v0, v1, v2 }[0], [x0] +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld3 = call { <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld3lane.v1f64.p0(<1 x double> %B, <1 x double> %C, <1 x double> %D, i64 0, ptr %A) %tmp = getelementptr double, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -7353,26 +6732,26 @@ declare { <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld3lane. define { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_imm_ld4lane(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8> %C, <16 x i8> %D, <16 x i8> %E) nounwind { -; SDAG-LABEL: test_v16i8_post_imm_ld4lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ld4.b { v0, v1, v2, v3 }[0], [x0], #4 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v16i8_post_imm_ld4lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ld4.b { v0, v1, v2, v3 }[0], [x0], #4 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v16i8_post_imm_ld4lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: add x8, x0, #4 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ld4.b { v0, v1, v2, v3 }[0], [x0] -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v16i8_post_imm_ld4lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: add x8, x0, #4 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ld4.b { v0, v1, v2, v3 }[0], [x0] +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld4 = call { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld4lane.v16i8.p0(<16 x i8> %B, <16 x i8> %C, <16 x i8> %D, <16 x i8> %E, i64 0, ptr %A) %tmp = getelementptr i8, ptr %A, i32 4 store ptr %tmp, ptr %ptr @@ -7380,26 +6759,26 @@ define { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_imm_ld4la } define { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @test_v16i8_post_reg_ld4lane(ptr %A, ptr %ptr, i64 %inc, <16 x i8> %B, <16 x i8> %C, <16 x i8> %D, <16 x i8> %E) nounwind { -; SDAG-LABEL: test_v16i8_post_reg_ld4lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ld4.b { v0, v1, v2, v3 }[0], [x0], x2 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v16i8_post_reg_ld4lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ld4.b { v0, v1, v2, v3 }[0], [x0], x2 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v16i8_post_reg_ld4lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: add x8, x0, x2 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ld4.b { v0, v1, v2, v3 }[0], [x0] -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v16i8_post_reg_ld4lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: add x8, x0, x2 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ld4.b { v0, v1, v2, v3 }[0], [x0] +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld4 = call { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld4lane.v16i8.p0(<16 x i8> %B, <16 x i8> %C, <16 x i8> %D, <16 x i8> %E, i64 0, ptr %A) %tmp = getelementptr i8, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -7410,26 +6789,26 @@ declare { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld4lan define { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_imm_ld4lane(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %C, <8 x i8> %D, <8 x i8> %E) nounwind { -; SDAG-LABEL: test_v8i8_post_imm_ld4lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ld4.b { v0, v1, v2, v3 }[0], [x0], #4 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i8_post_imm_ld4lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ld4.b { v0, v1, v2, v3 }[0], [x0], #4 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i8_post_imm_ld4lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: add x8, x0, #4 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ld4.b { v0, v1, v2, v3 }[0], [x0] -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i8_post_imm_ld4lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: add x8, x0, #4 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ld4.b { v0, v1, v2, v3 }[0], [x0] +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld4 = call { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld4lane.v8i8.p0(<8 x i8> %B, <8 x i8> %C, <8 x i8> %D, <8 x i8> %E, i64 0, ptr %A) %tmp = getelementptr i8, ptr %A, i32 4 store ptr %tmp, ptr %ptr @@ -7437,26 +6816,26 @@ define { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_imm_ld4lane(pt } define { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @test_v8i8_post_reg_ld4lane(ptr %A, ptr %ptr, i64 %inc, <8 x i8> %B, <8 x i8> %C, <8 x i8> %D, <8 x i8> %E) nounwind { -; SDAG-LABEL: test_v8i8_post_reg_ld4lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ld4.b { v0, v1, v2, v3 }[0], [x0], x2 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i8_post_reg_ld4lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ld4.b { v0, v1, v2, v3 }[0], [x0], x2 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i8_post_reg_ld4lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: add x8, x0, x2 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ld4.b { v0, v1, v2, v3 }[0], [x0] -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i8_post_reg_ld4lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: add x8, x0, x2 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ld4.b { v0, v1, v2, v3 }[0], [x0] +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld4 = call { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld4lane.v8i8.p0(<8 x i8> %B, <8 x i8> %C, <8 x i8> %D, <8 x i8> %E, i64 0, ptr %A) %tmp = getelementptr i8, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -7467,26 +6846,26 @@ declare { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld4lane.v8 define { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_imm_ld4lane(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16> %C, <8 x i16> %D, <8 x i16> %E) nounwind { -; SDAG-LABEL: test_v8i16_post_imm_ld4lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ld4.h { v0, v1, v2, v3 }[0], [x0], #8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i16_post_imm_ld4lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ld4.h { v0, v1, v2, v3 }[0], [x0], #8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i16_post_imm_ld4lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: add x8, x0, #8 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ld4.h { v0, v1, v2, v3 }[0], [x0] -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i16_post_imm_ld4lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: add x8, x0, #8 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ld4.h { v0, v1, v2, v3 }[0], [x0] +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld4 = call { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld4lane.v8i16.p0(<8 x i16> %B, <8 x i16> %C, <8 x i16> %D, <8 x i16> %E, i64 0, ptr %A) %tmp = getelementptr i16, ptr %A, i32 4 store ptr %tmp, ptr %ptr @@ -7494,27 +6873,27 @@ define { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_imm_ld4la } define { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @test_v8i16_post_reg_ld4lane(ptr %A, ptr %ptr, i64 %inc, <8 x i16> %B, <8 x i16> %C, <8 x i16> %D, <8 x i16> %E) nounwind { -; SDAG-LABEL: test_v8i16_post_reg_ld4lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: lsl x8, x2, #1 -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ld4.h { v0, v1, v2, v3 }[0], [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i16_post_reg_ld4lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: lsl x8, x2, #1 +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ld4.h { v0, v1, v2, v3 }[0], [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i16_post_reg_ld4lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #1 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ld4.h { v0, v1, v2, v3 }[0], [x0] -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i16_post_reg_ld4lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: add x8, x0, x2, lsl #1 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ld4.h { v0, v1, v2, v3 }[0], [x0] +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld4 = call { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld4lane.v8i16.p0(<8 x i16> %B, <8 x i16> %C, <8 x i16> %D, <8 x i16> %E, i64 0, ptr %A) %tmp = getelementptr i16, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -7525,26 +6904,26 @@ declare { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld4lan define { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_imm_ld4lane(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16> %C, <4 x i16> %D, <4 x i16> %E) nounwind { -; SDAG-LABEL: test_v4i16_post_imm_ld4lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ld4.h { v0, v1, v2, v3 }[0], [x0], #8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i16_post_imm_ld4lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ld4.h { v0, v1, v2, v3 }[0], [x0], #8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i16_post_imm_ld4lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: add x8, x0, #8 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ld4.h { v0, v1, v2, v3 }[0], [x0] -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i16_post_imm_ld4lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: add x8, x0, #8 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ld4.h { v0, v1, v2, v3 }[0], [x0] +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld4 = call { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld4lane.v4i16.p0(<4 x i16> %B, <4 x i16> %C, <4 x i16> %D, <4 x i16> %E, i64 0, ptr %A) %tmp = getelementptr i16, ptr %A, i32 4 store ptr %tmp, ptr %ptr @@ -7552,27 +6931,27 @@ define { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_imm_ld4la } define { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @test_v4i16_post_reg_ld4lane(ptr %A, ptr %ptr, i64 %inc, <4 x i16> %B, <4 x i16> %C, <4 x i16> %D, <4 x i16> %E) nounwind { -; SDAG-LABEL: test_v4i16_post_reg_ld4lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: lsl x8, x2, #1 -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ld4.h { v0, v1, v2, v3 }[0], [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i16_post_reg_ld4lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: lsl x8, x2, #1 +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ld4.h { v0, v1, v2, v3 }[0], [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i16_post_reg_ld4lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #1 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ld4.h { v0, v1, v2, v3 }[0], [x0] -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i16_post_reg_ld4lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: add x8, x0, x2, lsl #1 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ld4.h { v0, v1, v2, v3 }[0], [x0] +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld4 = call { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld4lane.v4i16.p0(<4 x i16> %B, <4 x i16> %C, <4 x i16> %D, <4 x i16> %E, i64 0, ptr %A) %tmp = getelementptr i16, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -7583,26 +6962,26 @@ declare { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld4lan define { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_imm_ld4lane(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32> %C, <4 x i32> %D, <4 x i32> %E) nounwind { -; SDAG-LABEL: test_v4i32_post_imm_ld4lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ld4.s { v0, v1, v2, v3 }[0], [x0], #16 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i32_post_imm_ld4lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ld4.s { v0, v1, v2, v3 }[0], [x0], #16 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i32_post_imm_ld4lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: add x8, x0, #16 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ld4.s { v0, v1, v2, v3 }[0], [x0] -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i32_post_imm_ld4lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: add x8, x0, #16 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ld4.s { v0, v1, v2, v3 }[0], [x0] +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld4 = call { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld4lane.v4i32.p0(<4 x i32> %B, <4 x i32> %C, <4 x i32> %D, <4 x i32> %E, i64 0, ptr %A) %tmp = getelementptr i32, ptr %A, i32 4 store ptr %tmp, ptr %ptr @@ -7610,27 +6989,27 @@ define { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_imm_ld4la } define { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @test_v4i32_post_reg_ld4lane(ptr %A, ptr %ptr, i64 %inc, <4 x i32> %B, <4 x i32> %C, <4 x i32> %D, <4 x i32> %E) nounwind { -; SDAG-LABEL: test_v4i32_post_reg_ld4lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ld4.s { v0, v1, v2, v3 }[0], [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i32_post_reg_ld4lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ld4.s { v0, v1, v2, v3 }[0], [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i32_post_reg_ld4lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ld4.s { v0, v1, v2, v3 }[0], [x0] -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i32_post_reg_ld4lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: add x8, x0, x2, lsl #2 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ld4.s { v0, v1, v2, v3 }[0], [x0] +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld4 = call { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld4lane.v4i32.p0(<4 x i32> %B, <4 x i32> %C, <4 x i32> %D, <4 x i32> %E, i64 0, ptr %A) %tmp = getelementptr i32, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -7641,26 +7020,26 @@ declare { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld4lan define { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_imm_ld4lane(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32> %C, <2 x i32> %D, <2 x i32> %E) nounwind { -; SDAG-LABEL: test_v2i32_post_imm_ld4lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ld4.s { v0, v1, v2, v3 }[0], [x0], #16 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i32_post_imm_ld4lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ld4.s { v0, v1, v2, v3 }[0], [x0], #16 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i32_post_imm_ld4lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: add x8, x0, #16 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ld4.s { v0, v1, v2, v3 }[0], [x0] -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i32_post_imm_ld4lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: add x8, x0, #16 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ld4.s { v0, v1, v2, v3 }[0], [x0] +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld4 = call { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld4lane.v2i32.p0(<2 x i32> %B, <2 x i32> %C, <2 x i32> %D, <2 x i32> %E, i64 0, ptr %A) %tmp = getelementptr i32, ptr %A, i32 4 store ptr %tmp, ptr %ptr @@ -7668,27 +7047,27 @@ define { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_imm_ld4la } define { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @test_v2i32_post_reg_ld4lane(ptr %A, ptr %ptr, i64 %inc, <2 x i32> %B, <2 x i32> %C, <2 x i32> %D, <2 x i32> %E) nounwind { -; SDAG-LABEL: test_v2i32_post_reg_ld4lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ld4.s { v0, v1, v2, v3 }[0], [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i32_post_reg_ld4lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ld4.s { v0, v1, v2, v3 }[0], [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i32_post_reg_ld4lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ld4.s { v0, v1, v2, v3 }[0], [x0] -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i32_post_reg_ld4lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: add x8, x0, x2, lsl #2 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ld4.s { v0, v1, v2, v3 }[0], [x0] +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld4 = call { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld4lane.v2i32.p0(<2 x i32> %B, <2 x i32> %C, <2 x i32> %D, <2 x i32> %E, i64 0, ptr %A) %tmp = getelementptr i32, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -7699,26 +7078,26 @@ declare { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld4lan define { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_imm_ld4lane(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64> %C, <2 x i64> %D, <2 x i64> %E) nounwind { -; SDAG-LABEL: test_v2i64_post_imm_ld4lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ld4.d { v0, v1, v2, v3 }[0], [x0], #32 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i64_post_imm_ld4lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ld4.d { v0, v1, v2, v3 }[0], [x0], #32 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i64_post_imm_ld4lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: add x8, x0, #32 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ld4.d { v0, v1, v2, v3 }[0], [x0] -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i64_post_imm_ld4lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: add x8, x0, #32 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ld4.d { v0, v1, v2, v3 }[0], [x0] +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld4 = call { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld4lane.v2i64.p0(<2 x i64> %B, <2 x i64> %C, <2 x i64> %D, <2 x i64> %E, i64 0, ptr %A) %tmp = getelementptr i64, ptr %A, i32 4 store ptr %tmp, ptr %ptr @@ -7726,27 +7105,27 @@ define { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_imm_ld4la } define { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @test_v2i64_post_reg_ld4lane(ptr %A, ptr %ptr, i64 %inc, <2 x i64> %B, <2 x i64> %C, <2 x i64> %D, <2 x i64> %E) nounwind { -; SDAG-LABEL: test_v2i64_post_reg_ld4lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ld4.d { v0, v1, v2, v3 }[0], [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i64_post_reg_ld4lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ld4.d { v0, v1, v2, v3 }[0], [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i64_post_reg_ld4lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ld4.d { v0, v1, v2, v3 }[0], [x0] -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i64_post_reg_ld4lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: add x8, x0, x2, lsl #3 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ld4.d { v0, v1, v2, v3 }[0], [x0] +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld4 = call { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld4lane.v2i64.p0(<2 x i64> %B, <2 x i64> %C, <2 x i64> %D, <2 x i64> %E, i64 0, ptr %A) %tmp = getelementptr i64, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -7757,26 +7136,26 @@ declare { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld4lan define { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_imm_ld4lane(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64> %C, <1 x i64> %D, <1 x i64> %E) nounwind { -; SDAG-LABEL: test_v1i64_post_imm_ld4lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ld4.d { v0, v1, v2, v3 }[0], [x0], #32 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v1i64_post_imm_ld4lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ld4.d { v0, v1, v2, v3 }[0], [x0], #32 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v1i64_post_imm_ld4lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: add x8, x0, #32 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ld4.d { v0, v1, v2, v3 }[0], [x0] -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v1i64_post_imm_ld4lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: add x8, x0, #32 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ld4.d { v0, v1, v2, v3 }[0], [x0] +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld4 = call { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld4lane.v1i64.p0(<1 x i64> %B, <1 x i64> %C, <1 x i64> %D, <1 x i64> %E, i64 0, ptr %A) %tmp = getelementptr i64, ptr %A, i32 4 store ptr %tmp, ptr %ptr @@ -7784,27 +7163,27 @@ define { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_imm_ld4la } define { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @test_v1i64_post_reg_ld4lane(ptr %A, ptr %ptr, i64 %inc, <1 x i64> %B, <1 x i64> %C, <1 x i64> %D, <1 x i64> %E) nounwind { -; SDAG-LABEL: test_v1i64_post_reg_ld4lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ld4.d { v0, v1, v2, v3 }[0], [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v1i64_post_reg_ld4lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ld4.d { v0, v1, v2, v3 }[0], [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v1i64_post_reg_ld4lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ld4.d { v0, v1, v2, v3 }[0], [x0] -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v1i64_post_reg_ld4lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: add x8, x0, x2, lsl #3 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ld4.d { v0, v1, v2, v3 }[0], [x0] +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld4 = call { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld4lane.v1i64.p0(<1 x i64> %B, <1 x i64> %C, <1 x i64> %D, <1 x i64> %E, i64 0, ptr %A) %tmp = getelementptr i64, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -7815,26 +7194,26 @@ declare { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld4lan define { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_imm_ld4lane(ptr %A, ptr %ptr, <4 x float> %B, <4 x float> %C, <4 x float> %D, <4 x float> %E) nounwind { -; SDAG-LABEL: test_v4f32_post_imm_ld4lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ld4.s { v0, v1, v2, v3 }[0], [x0], #16 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4f32_post_imm_ld4lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ld4.s { v0, v1, v2, v3 }[0], [x0], #16 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4f32_post_imm_ld4lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: add x8, x0, #16 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ld4.s { v0, v1, v2, v3 }[0], [x0] -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4f32_post_imm_ld4lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: add x8, x0, #16 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ld4.s { v0, v1, v2, v3 }[0], [x0] +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld4 = call { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld4lane.v4f32.p0(<4 x float> %B, <4 x float> %C, <4 x float> %D, <4 x float> %E, i64 0, ptr %A) %tmp = getelementptr float, ptr %A, i32 4 store ptr %tmp, ptr %ptr @@ -7842,27 +7221,27 @@ define { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_i } define { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @test_v4f32_post_reg_ld4lane(ptr %A, ptr %ptr, i64 %inc, <4 x float> %B, <4 x float> %C, <4 x float> %D, <4 x float> %E) nounwind { -; SDAG-LABEL: test_v4f32_post_reg_ld4lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ld4.s { v0, v1, v2, v3 }[0], [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4f32_post_reg_ld4lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ld4.s { v0, v1, v2, v3 }[0], [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4f32_post_reg_ld4lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ld4.s { v0, v1, v2, v3 }[0], [x0] -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4f32_post_reg_ld4lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: add x8, x0, x2, lsl #2 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ld4.s { v0, v1, v2, v3 }[0], [x0] +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld4 = call { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld4lane.v4f32.p0(<4 x float> %B, <4 x float> %C, <4 x float> %D, <4 x float> %E, i64 0, ptr %A) %tmp = getelementptr float, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -7873,26 +7252,26 @@ declare { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neo define { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_imm_ld4lane(ptr %A, ptr %ptr, <2 x float> %B, <2 x float> %C, <2 x float> %D, <2 x float> %E) nounwind { -; SDAG-LABEL: test_v2f32_post_imm_ld4lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ld4.s { v0, v1, v2, v3 }[0], [x0], #16 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f32_post_imm_ld4lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ld4.s { v0, v1, v2, v3 }[0], [x0], #16 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f32_post_imm_ld4lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: add x8, x0, #16 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ld4.s { v0, v1, v2, v3 }[0], [x0] -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f32_post_imm_ld4lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: add x8, x0, #16 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ld4.s { v0, v1, v2, v3 }[0], [x0] +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld4 = call { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld4lane.v2f32.p0(<2 x float> %B, <2 x float> %C, <2 x float> %D, <2 x float> %E, i64 0, ptr %A) %tmp = getelementptr float, ptr %A, i32 4 store ptr %tmp, ptr %ptr @@ -7900,27 +7279,27 @@ define { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_i } define { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @test_v2f32_post_reg_ld4lane(ptr %A, ptr %ptr, i64 %inc, <2 x float> %B, <2 x float> %C, <2 x float> %D, <2 x float> %E) nounwind { -; SDAG-LABEL: test_v2f32_post_reg_ld4lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ld4.s { v0, v1, v2, v3 }[0], [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f32_post_reg_ld4lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ld4.s { v0, v1, v2, v3 }[0], [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f32_post_reg_ld4lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ld4.s { v0, v1, v2, v3 }[0], [x0] -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f32_post_reg_ld4lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: add x8, x0, x2, lsl #2 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ld4.s { v0, v1, v2, v3 }[0], [x0] +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld4 = call { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld4lane.v2f32.p0(<2 x float> %B, <2 x float> %C, <2 x float> %D, <2 x float> %E, i64 0, ptr %A) %tmp = getelementptr float, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -7931,26 +7310,26 @@ declare { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neo define { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @test_v2f64_post_imm_ld4lane(ptr %A, ptr %ptr, <2 x double> %B, <2 x double> %C, <2 x double> %D, <2 x double> %E) nounwind { -; SDAG-LABEL: test_v2f64_post_imm_ld4lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ld4.d { v0, v1, v2, v3 }[0], [x0], #32 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f64_post_imm_ld4lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ld4.d { v0, v1, v2, v3 }[0], [x0], #32 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f64_post_imm_ld4lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: add x8, x0, #32 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ld4.d { v0, v1, v2, v3 }[0], [x0] -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f64_post_imm_ld4lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: add x8, x0, #32 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ld4.d { v0, v1, v2, v3 }[0], [x0] +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld4 = call { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld4lane.v2f64.p0(<2 x double> %B, <2 x double> %C, <2 x double> %D, <2 x double> %E, i64 0, ptr %A) %tmp = getelementptr double, ptr %A, i32 4 store ptr %tmp, ptr %ptr @@ -7958,27 +7337,27 @@ define { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @test_v2f64_po } define { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @test_v2f64_post_reg_ld4lane(ptr %A, ptr %ptr, i64 %inc, <2 x double> %B, <2 x double> %C, <2 x double> %D, <2 x double> %E) nounwind { -; SDAG-LABEL: test_v2f64_post_reg_ld4lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ld4.d { v0, v1, v2, v3 }[0], [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f64_post_reg_ld4lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ld4.d { v0, v1, v2, v3 }[0], [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f64_post_reg_ld4lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ld4.d { v0, v1, v2, v3 }[0], [x0] -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f64_post_reg_ld4lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: add x8, x0, x2, lsl #3 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ld4.d { v0, v1, v2, v3 }[0], [x0] +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld4 = call { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld4lane.v2f64.p0(<2 x double> %B, <2 x double> %C, <2 x double> %D, <2 x double> %E, i64 0, ptr %A) %tmp = getelementptr double, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -7989,26 +7368,26 @@ declare { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64 define { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @test_v1f64_post_imm_ld4lane(ptr %A, ptr %ptr, <1 x double> %B, <1 x double> %C, <1 x double> %D, <1 x double> %E) nounwind { -; SDAG-LABEL: test_v1f64_post_imm_ld4lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ld4.d { v0, v1, v2, v3 }[0], [x0], #32 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v1f64_post_imm_ld4lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ld4.d { v0, v1, v2, v3 }[0], [x0], #32 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v1f64_post_imm_ld4lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: add x8, x0, #32 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ld4.d { v0, v1, v2, v3 }[0], [x0] -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v1f64_post_imm_ld4lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: add x8, x0, #32 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ld4.d { v0, v1, v2, v3 }[0], [x0] +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld4 = call { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld4lane.v1f64.p0(<1 x double> %B, <1 x double> %C, <1 x double> %D, <1 x double> %E, i64 0, ptr %A) %tmp = getelementptr double, ptr %A, i32 4 store ptr %tmp, ptr %ptr @@ -8016,27 +7395,27 @@ define { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @test_v1f64_po } define { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @test_v1f64_post_reg_ld4lane(ptr %A, ptr %ptr, i64 %inc, <1 x double> %B, <1 x double> %C, <1 x double> %D, <1 x double> %E) nounwind { -; SDAG-LABEL: test_v1f64_post_reg_ld4lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ld4.d { v0, v1, v2, v3 }[0], [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v1f64_post_reg_ld4lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ld4.d { v0, v1, v2, v3 }[0], [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v1f64_post_reg_ld4lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ld4.d { v0, v1, v2, v3 }[0], [x0] -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v1f64_post_reg_ld4lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: add x8, x0, x2, lsl #3 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ld4.d { v0, v1, v2, v3 }[0], [x0] +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %ld4 = call { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld4lane.v1f64.p0(<1 x double> %B, <1 x double> %C, <1 x double> %D, <1 x double> %E, i64 0, ptr %A) %tmp = getelementptr double, ptr %A, i64 %inc store ptr %tmp, ptr %ptr @@ -8047,42 +7426,42 @@ declare { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64 define ptr @test_v16i8_post_imm_st2(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8> %C) nounwind { -; SDAG-LABEL: test_v16i8_post_imm_st2: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: st2.16b { v0, v1 }, [x0], #32 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v16i8_post_imm_st2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: st2.16b { v0, v1 }, [x0], #32 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v16i8_post_imm_st2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: add x0, x0, #32 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: st2.16b { v0, v1 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v16i8_post_imm_st2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: add x0, x0, #32 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: st2.16b { v0, v1 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st2.v16i8.p0(<16 x i8> %B, <16 x i8> %C, ptr %A) %tmp = getelementptr i8, ptr %A, i32 32 ret ptr %tmp } define ptr @test_v16i8_post_reg_st2(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8> %C, i64 %inc) nounwind { -; SDAG-LABEL: test_v16i8_post_reg_st2: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: st2.16b { v0, v1 }, [x0], x2 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v16i8_post_reg_st2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: st2.16b { v0, v1 }, [x0], x2 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v16i8_post_reg_st2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: add x0, x0, x2 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: st2.16b { v0, v1 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v16i8_post_reg_st2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: add x0, x0, x2 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: st2.16b { v0, v1 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st2.v16i8.p0(<16 x i8> %B, <16 x i8> %C, ptr %A) %tmp = getelementptr i8, ptr %A, i64 %inc ret ptr %tmp @@ -8092,42 +7471,42 @@ declare void @llvm.aarch64.neon.st2.v16i8.p0(<16 x i8>, <16 x i8>, ptr) define ptr @test_v8i8_post_imm_st2(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %C) nounwind { -; SDAG-LABEL: test_v8i8_post_imm_st2: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 -; SDAG-NEXT: st2.8b { v0, v1 }, [x0], #16 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i8_post_imm_st2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 +; CHECK-SD-NEXT: st2.8b { v0, v1 }, [x0], #16 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i8_post_imm_st2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 -; CHECK-GISEL-NEXT: add x0, x0, #16 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 -; CHECK-GISEL-NEXT: st2.8b { v0, v1 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i8_post_imm_st2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 +; CHECK-GI-NEXT: add x0, x0, #16 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 +; CHECK-GI-NEXT: st2.8b { v0, v1 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st2.v8i8.p0(<8 x i8> %B, <8 x i8> %C, ptr %A) %tmp = getelementptr i8, ptr %A, i32 16 ret ptr %tmp } define ptr @test_v8i8_post_reg_st2(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %C, i64 %inc) nounwind { -; SDAG-LABEL: test_v8i8_post_reg_st2: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 -; SDAG-NEXT: st2.8b { v0, v1 }, [x0], x2 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i8_post_reg_st2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 +; CHECK-SD-NEXT: st2.8b { v0, v1 }, [x0], x2 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i8_post_reg_st2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 -; CHECK-GISEL-NEXT: add x0, x0, x2 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 -; CHECK-GISEL-NEXT: st2.8b { v0, v1 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i8_post_reg_st2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 +; CHECK-GI-NEXT: add x0, x0, x2 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 +; CHECK-GI-NEXT: st2.8b { v0, v1 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st2.v8i8.p0(<8 x i8> %B, <8 x i8> %C, ptr %A) %tmp = getelementptr i8, ptr %A, i64 %inc ret ptr %tmp @@ -8137,43 +7516,43 @@ declare void @llvm.aarch64.neon.st2.v8i8.p0(<8 x i8>, <8 x i8>, ptr) define ptr @test_v8i16_post_imm_st2(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16> %C) nounwind { -; SDAG-LABEL: test_v8i16_post_imm_st2: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: st2.8h { v0, v1 }, [x0], #32 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i16_post_imm_st2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: st2.8h { v0, v1 }, [x0], #32 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i16_post_imm_st2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: add x0, x0, #32 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: st2.8h { v0, v1 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i16_post_imm_st2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: add x0, x0, #32 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: st2.8h { v0, v1 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st2.v8i16.p0(<8 x i16> %B, <8 x i16> %C, ptr %A) %tmp = getelementptr i16, ptr %A, i32 16 ret ptr %tmp } define ptr @test_v8i16_post_reg_st2(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16> %C, i64 %inc) nounwind { -; SDAG-LABEL: test_v8i16_post_reg_st2: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #1 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: st2.8h { v0, v1 }, [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i16_post_reg_st2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #1 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: st2.8h { v0, v1 }, [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i16_post_reg_st2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #1 -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: st2.8h { v0, v1 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i16_post_reg_st2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #1 +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: st2.8h { v0, v1 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st2.v8i16.p0(<8 x i16> %B, <8 x i16> %C, ptr %A) %tmp = getelementptr i16, ptr %A, i64 %inc ret ptr %tmp @@ -8183,43 +7562,43 @@ declare void @llvm.aarch64.neon.st2.v8i16.p0(<8 x i16>, <8 x i16>, ptr) define ptr @test_v4i16_post_imm_st2(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16> %C) nounwind { -; SDAG-LABEL: test_v4i16_post_imm_st2: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 -; SDAG-NEXT: st2.4h { v0, v1 }, [x0], #16 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i16_post_imm_st2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 +; CHECK-SD-NEXT: st2.4h { v0, v1 }, [x0], #16 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i16_post_imm_st2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 -; CHECK-GISEL-NEXT: add x0, x0, #16 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 -; CHECK-GISEL-NEXT: st2.4h { v0, v1 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i16_post_imm_st2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 +; CHECK-GI-NEXT: add x0, x0, #16 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 +; CHECK-GI-NEXT: st2.4h { v0, v1 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st2.v4i16.p0(<4 x i16> %B, <4 x i16> %C, ptr %A) %tmp = getelementptr i16, ptr %A, i32 8 ret ptr %tmp } define ptr @test_v4i16_post_reg_st2(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16> %C, i64 %inc) nounwind { -; SDAG-LABEL: test_v4i16_post_reg_st2: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #1 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 -; SDAG-NEXT: st2.4h { v0, v1 }, [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i16_post_reg_st2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #1 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 +; CHECK-SD-NEXT: st2.4h { v0, v1 }, [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i16_post_reg_st2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #1 -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 -; CHECK-GISEL-NEXT: st2.4h { v0, v1 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i16_post_reg_st2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #1 +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 +; CHECK-GI-NEXT: st2.4h { v0, v1 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st2.v4i16.p0(<4 x i16> %B, <4 x i16> %C, ptr %A) %tmp = getelementptr i16, ptr %A, i64 %inc ret ptr %tmp @@ -8229,43 +7608,43 @@ declare void @llvm.aarch64.neon.st2.v4i16.p0(<4 x i16>, <4 x i16>, ptr) define ptr @test_v4i32_post_imm_st2(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32> %C) nounwind { -; SDAG-LABEL: test_v4i32_post_imm_st2: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: st2.4s { v0, v1 }, [x0], #32 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i32_post_imm_st2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: st2.4s { v0, v1 }, [x0], #32 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i32_post_imm_st2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: add x0, x0, #32 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: st2.4s { v0, v1 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i32_post_imm_st2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: add x0, x0, #32 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: st2.4s { v0, v1 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st2.v4i32.p0(<4 x i32> %B, <4 x i32> %C, ptr %A) %tmp = getelementptr i32, ptr %A, i32 8 ret ptr %tmp } define ptr @test_v4i32_post_reg_st2(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32> %C, i64 %inc) nounwind { -; SDAG-LABEL: test_v4i32_post_reg_st2: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: st2.4s { v0, v1 }, [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i32_post_reg_st2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: st2.4s { v0, v1 }, [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i32_post_reg_st2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: st2.4s { v0, v1 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i32_post_reg_st2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #2 +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: st2.4s { v0, v1 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st2.v4i32.p0(<4 x i32> %B, <4 x i32> %C, ptr %A) %tmp = getelementptr i32, ptr %A, i64 %inc ret ptr %tmp @@ -8275,43 +7654,43 @@ declare void @llvm.aarch64.neon.st2.v4i32.p0(<4 x i32>, <4 x i32>, ptr) define ptr @test_v2i32_post_imm_st2(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32> %C) nounwind { -; SDAG-LABEL: test_v2i32_post_imm_st2: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 -; SDAG-NEXT: st2.2s { v0, v1 }, [x0], #16 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i32_post_imm_st2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 +; CHECK-SD-NEXT: st2.2s { v0, v1 }, [x0], #16 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i32_post_imm_st2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 -; CHECK-GISEL-NEXT: add x0, x0, #16 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 -; CHECK-GISEL-NEXT: st2.2s { v0, v1 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i32_post_imm_st2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 +; CHECK-GI-NEXT: add x0, x0, #16 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 +; CHECK-GI-NEXT: st2.2s { v0, v1 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st2.v2i32.p0(<2 x i32> %B, <2 x i32> %C, ptr %A) %tmp = getelementptr i32, ptr %A, i32 4 ret ptr %tmp } define ptr @test_v2i32_post_reg_st2(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32> %C, i64 %inc) nounwind { -; SDAG-LABEL: test_v2i32_post_reg_st2: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 -; SDAG-NEXT: st2.2s { v0, v1 }, [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i32_post_reg_st2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 +; CHECK-SD-NEXT: st2.2s { v0, v1 }, [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i32_post_reg_st2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 -; CHECK-GISEL-NEXT: st2.2s { v0, v1 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i32_post_reg_st2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #2 +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 +; CHECK-GI-NEXT: st2.2s { v0, v1 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st2.v2i32.p0(<2 x i32> %B, <2 x i32> %C, ptr %A) %tmp = getelementptr i32, ptr %A, i64 %inc ret ptr %tmp @@ -8321,43 +7700,43 @@ declare void @llvm.aarch64.neon.st2.v2i32.p0(<2 x i32>, <2 x i32>, ptr) define ptr @test_v2i64_post_imm_st2(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64> %C) nounwind { -; SDAG-LABEL: test_v2i64_post_imm_st2: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: st2.2d { v0, v1 }, [x0], #32 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i64_post_imm_st2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: st2.2d { v0, v1 }, [x0], #32 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i64_post_imm_st2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: add x0, x0, #32 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: st2.2d { v0, v1 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i64_post_imm_st2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: add x0, x0, #32 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: st2.2d { v0, v1 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st2.v2i64.p0(<2 x i64> %B, <2 x i64> %C, ptr %A) %tmp = getelementptr i64, ptr %A, i64 4 ret ptr %tmp } define ptr @test_v2i64_post_reg_st2(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64> %C, i64 %inc) nounwind { -; SDAG-LABEL: test_v2i64_post_reg_st2: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: st2.2d { v0, v1 }, [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i64_post_reg_st2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: st2.2d { v0, v1 }, [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i64_post_reg_st2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: st2.2d { v0, v1 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i64_post_reg_st2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #3 +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: st2.2d { v0, v1 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st2.v2i64.p0(<2 x i64> %B, <2 x i64> %C, ptr %A) %tmp = getelementptr i64, ptr %A, i64 %inc ret ptr %tmp @@ -8367,43 +7746,43 @@ declare void @llvm.aarch64.neon.st2.v2i64.p0(<2 x i64>, <2 x i64>, ptr) define ptr @test_v1i64_post_imm_st2(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64> %C) nounwind { -; SDAG-LABEL: test_v1i64_post_imm_st2: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 -; SDAG-NEXT: st1.1d { v0, v1 }, [x0], #16 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v1i64_post_imm_st2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 +; CHECK-SD-NEXT: st1.1d { v0, v1 }, [x0], #16 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v1i64_post_imm_st2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 -; CHECK-GISEL-NEXT: add x0, x0, #16 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 -; CHECK-GISEL-NEXT: st1.1d { v0, v1 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v1i64_post_imm_st2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 +; CHECK-GI-NEXT: add x0, x0, #16 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 +; CHECK-GI-NEXT: st1.1d { v0, v1 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st2.v1i64.p0(<1 x i64> %B, <1 x i64> %C, ptr %A) %tmp = getelementptr i64, ptr %A, i64 2 ret ptr %tmp } define ptr @test_v1i64_post_reg_st2(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64> %C, i64 %inc) nounwind { -; SDAG-LABEL: test_v1i64_post_reg_st2: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 -; SDAG-NEXT: st1.1d { v0, v1 }, [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v1i64_post_reg_st2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 +; CHECK-SD-NEXT: st1.1d { v0, v1 }, [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v1i64_post_reg_st2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 -; CHECK-GISEL-NEXT: st1.1d { v0, v1 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v1i64_post_reg_st2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #3 +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 +; CHECK-GI-NEXT: st1.1d { v0, v1 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st2.v1i64.p0(<1 x i64> %B, <1 x i64> %C, ptr %A) %tmp = getelementptr i64, ptr %A, i64 %inc ret ptr %tmp @@ -8413,43 +7792,43 @@ declare void @llvm.aarch64.neon.st2.v1i64.p0(<1 x i64>, <1 x i64>, ptr) define ptr @test_v4f32_post_imm_st2(ptr %A, ptr %ptr, <4 x float> %B, <4 x float> %C) nounwind { -; SDAG-LABEL: test_v4f32_post_imm_st2: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: st2.4s { v0, v1 }, [x0], #32 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4f32_post_imm_st2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: st2.4s { v0, v1 }, [x0], #32 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4f32_post_imm_st2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: add x0, x0, #32 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: st2.4s { v0, v1 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4f32_post_imm_st2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: add x0, x0, #32 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: st2.4s { v0, v1 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st2.v4f32.p0(<4 x float> %B, <4 x float> %C, ptr %A) %tmp = getelementptr float, ptr %A, i32 8 ret ptr %tmp } define ptr @test_v4f32_post_reg_st2(ptr %A, ptr %ptr, <4 x float> %B, <4 x float> %C, i64 %inc) nounwind { -; SDAG-LABEL: test_v4f32_post_reg_st2: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: st2.4s { v0, v1 }, [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4f32_post_reg_st2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: st2.4s { v0, v1 }, [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4f32_post_reg_st2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: st2.4s { v0, v1 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4f32_post_reg_st2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #2 +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: st2.4s { v0, v1 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st2.v4f32.p0(<4 x float> %B, <4 x float> %C, ptr %A) %tmp = getelementptr float, ptr %A, i64 %inc ret ptr %tmp @@ -8459,43 +7838,43 @@ declare void @llvm.aarch64.neon.st2.v4f32.p0(<4 x float>, <4 x float>, ptr) define ptr @test_v2f32_post_imm_st2(ptr %A, ptr %ptr, <2 x float> %B, <2 x float> %C) nounwind { -; SDAG-LABEL: test_v2f32_post_imm_st2: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 -; SDAG-NEXT: st2.2s { v0, v1 }, [x0], #16 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f32_post_imm_st2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 +; CHECK-SD-NEXT: st2.2s { v0, v1 }, [x0], #16 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f32_post_imm_st2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 -; CHECK-GISEL-NEXT: add x0, x0, #16 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 -; CHECK-GISEL-NEXT: st2.2s { v0, v1 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f32_post_imm_st2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 +; CHECK-GI-NEXT: add x0, x0, #16 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 +; CHECK-GI-NEXT: st2.2s { v0, v1 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st2.v2f32.p0(<2 x float> %B, <2 x float> %C, ptr %A) %tmp = getelementptr float, ptr %A, i32 4 ret ptr %tmp } define ptr @test_v2f32_post_reg_st2(ptr %A, ptr %ptr, <2 x float> %B, <2 x float> %C, i64 %inc) nounwind { -; SDAG-LABEL: test_v2f32_post_reg_st2: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 -; SDAG-NEXT: st2.2s { v0, v1 }, [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f32_post_reg_st2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 +; CHECK-SD-NEXT: st2.2s { v0, v1 }, [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f32_post_reg_st2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 -; CHECK-GISEL-NEXT: st2.2s { v0, v1 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f32_post_reg_st2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #2 +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 +; CHECK-GI-NEXT: st2.2s { v0, v1 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st2.v2f32.p0(<2 x float> %B, <2 x float> %C, ptr %A) %tmp = getelementptr float, ptr %A, i64 %inc ret ptr %tmp @@ -8505,43 +7884,43 @@ declare void @llvm.aarch64.neon.st2.v2f32.p0(<2 x float>, <2 x float>, ptr) define ptr @test_v2f64_post_imm_st2(ptr %A, ptr %ptr, <2 x double> %B, <2 x double> %C) nounwind { -; SDAG-LABEL: test_v2f64_post_imm_st2: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: st2.2d { v0, v1 }, [x0], #32 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f64_post_imm_st2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: st2.2d { v0, v1 }, [x0], #32 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f64_post_imm_st2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: add x0, x0, #32 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: st2.2d { v0, v1 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f64_post_imm_st2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: add x0, x0, #32 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: st2.2d { v0, v1 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st2.v2f64.p0(<2 x double> %B, <2 x double> %C, ptr %A) %tmp = getelementptr double, ptr %A, i64 4 ret ptr %tmp } define ptr @test_v2f64_post_reg_st2(ptr %A, ptr %ptr, <2 x double> %B, <2 x double> %C, i64 %inc) nounwind { -; SDAG-LABEL: test_v2f64_post_reg_st2: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: st2.2d { v0, v1 }, [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f64_post_reg_st2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: st2.2d { v0, v1 }, [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f64_post_reg_st2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: st2.2d { v0, v1 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f64_post_reg_st2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #3 +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: st2.2d { v0, v1 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st2.v2f64.p0(<2 x double> %B, <2 x double> %C, ptr %A) %tmp = getelementptr double, ptr %A, i64 %inc ret ptr %tmp @@ -8551,43 +7930,43 @@ declare void @llvm.aarch64.neon.st2.v2f64.p0(<2 x double>, <2 x double>, ptr) define ptr @test_v1f64_post_imm_st2(ptr %A, ptr %ptr, <1 x double> %B, <1 x double> %C) nounwind { -; SDAG-LABEL: test_v1f64_post_imm_st2: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 -; SDAG-NEXT: st1.1d { v0, v1 }, [x0], #16 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v1f64_post_imm_st2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 +; CHECK-SD-NEXT: st1.1d { v0, v1 }, [x0], #16 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v1f64_post_imm_st2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 -; CHECK-GISEL-NEXT: add x0, x0, #16 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 -; CHECK-GISEL-NEXT: st1.1d { v0, v1 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v1f64_post_imm_st2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 +; CHECK-GI-NEXT: add x0, x0, #16 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 +; CHECK-GI-NEXT: st1.1d { v0, v1 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st2.v1f64.p0(<1 x double> %B, <1 x double> %C, ptr %A) %tmp = getelementptr double, ptr %A, i64 2 ret ptr %tmp } define ptr @test_v1f64_post_reg_st2(ptr %A, ptr %ptr, <1 x double> %B, <1 x double> %C, i64 %inc) nounwind { -; SDAG-LABEL: test_v1f64_post_reg_st2: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 -; SDAG-NEXT: st1.1d { v0, v1 }, [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v1f64_post_reg_st2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 +; CHECK-SD-NEXT: st1.1d { v0, v1 }, [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v1f64_post_reg_st2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 -; CHECK-GISEL-NEXT: st1.1d { v0, v1 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v1f64_post_reg_st2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #3 +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 +; CHECK-GI-NEXT: st1.1d { v0, v1 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st2.v1f64.p0(<1 x double> %B, <1 x double> %C, ptr %A) %tmp = getelementptr double, ptr %A, i64 %inc ret ptr %tmp @@ -8597,46 +7976,46 @@ declare void @llvm.aarch64.neon.st2.v1f64.p0(<1 x double>, <1 x double>, ptr) define ptr @test_v16i8_post_imm_st3(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8> %C, <16 x i8> %D) nounwind { -; SDAG-LABEL: test_v16i8_post_imm_st3: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: st3.16b { v0, v1, v2 }, [x0], #48 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v16i8_post_imm_st3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: st3.16b { v0, v1, v2 }, [x0], #48 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v16i8_post_imm_st3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, #48 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: st3.16b { v0, v1, v2 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v16i8_post_imm_st3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, #48 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: st3.16b { v0, v1, v2 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st3.v16i8.p0(<16 x i8> %B, <16 x i8> %C, <16 x i8> %D, ptr %A) %tmp = getelementptr i8, ptr %A, i32 48 ret ptr %tmp } define ptr @test_v16i8_post_reg_st3(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8> %C, <16 x i8> %D, i64 %inc) nounwind { -; SDAG-LABEL: test_v16i8_post_reg_st3: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: st3.16b { v0, v1, v2 }, [x0], x2 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v16i8_post_reg_st3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: st3.16b { v0, v1, v2 }, [x0], x2 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v16i8_post_reg_st3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, x2 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: st3.16b { v0, v1, v2 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v16i8_post_reg_st3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, x2 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: st3.16b { v0, v1, v2 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st3.v16i8.p0(<16 x i8> %B, <16 x i8> %C, <16 x i8> %D, ptr %A) %tmp = getelementptr i8, ptr %A, i64 %inc ret ptr %tmp @@ -8646,46 +8025,46 @@ declare void @llvm.aarch64.neon.st3.v16i8.p0(<16 x i8>, <16 x i8>, <16 x i8>, pt define ptr @test_v8i8_post_imm_st3(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %C, <8 x i8> %D) nounwind { -; SDAG-LABEL: test_v8i8_post_imm_st3: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 -; SDAG-NEXT: st3.8b { v0, v1, v2 }, [x0], #24 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i8_post_imm_st3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-SD-NEXT: st3.8b { v0, v1, v2 }, [x0], #24 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i8_post_imm_st3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, #24 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 -; CHECK-GISEL-NEXT: st3.8b { v0, v1, v2 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i8_post_imm_st3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, #24 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-GI-NEXT: st3.8b { v0, v1, v2 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st3.v8i8.p0(<8 x i8> %B, <8 x i8> %C, <8 x i8> %D, ptr %A) %tmp = getelementptr i8, ptr %A, i32 24 ret ptr %tmp } define ptr @test_v8i8_post_reg_st3(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %C, <8 x i8> %D, i64 %inc) nounwind { -; SDAG-LABEL: test_v8i8_post_reg_st3: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 -; SDAG-NEXT: st3.8b { v0, v1, v2 }, [x0], x2 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i8_post_reg_st3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-SD-NEXT: st3.8b { v0, v1, v2 }, [x0], x2 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i8_post_reg_st3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, x2 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 -; CHECK-GISEL-NEXT: st3.8b { v0, v1, v2 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i8_post_reg_st3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, x2 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-GI-NEXT: st3.8b { v0, v1, v2 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st3.v8i8.p0(<8 x i8> %B, <8 x i8> %C, <8 x i8> %D, ptr %A) %tmp = getelementptr i8, ptr %A, i64 %inc ret ptr %tmp @@ -8695,47 +8074,47 @@ declare void @llvm.aarch64.neon.st3.v8i8.p0(<8 x i8>, <8 x i8>, <8 x i8>, ptr) define ptr @test_v8i16_post_imm_st3(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16> %C, <8 x i16> %D) nounwind { -; SDAG-LABEL: test_v8i16_post_imm_st3: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: st3.8h { v0, v1, v2 }, [x0], #48 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i16_post_imm_st3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: st3.8h { v0, v1, v2 }, [x0], #48 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i16_post_imm_st3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, #48 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: st3.8h { v0, v1, v2 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i16_post_imm_st3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, #48 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: st3.8h { v0, v1, v2 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st3.v8i16.p0(<8 x i16> %B, <8 x i16> %C, <8 x i16> %D, ptr %A) %tmp = getelementptr i16, ptr %A, i32 24 ret ptr %tmp } define ptr @test_v8i16_post_reg_st3(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16> %C, <8 x i16> %D, i64 %inc) nounwind { -; SDAG-LABEL: test_v8i16_post_reg_st3: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: lsl x8, x2, #1 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: st3.8h { v0, v1, v2 }, [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i16_post_reg_st3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: lsl x8, x2, #1 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: st3.8h { v0, v1, v2 }, [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i16_post_reg_st3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #1 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: st3.8h { v0, v1, v2 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i16_post_reg_st3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #1 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: st3.8h { v0, v1, v2 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st3.v8i16.p0(<8 x i16> %B, <8 x i16> %C, <8 x i16> %D, ptr %A) %tmp = getelementptr i16, ptr %A, i64 %inc ret ptr %tmp @@ -8745,47 +8124,47 @@ declare void @llvm.aarch64.neon.st3.v8i16.p0(<8 x i16>, <8 x i16>, <8 x i16>, pt define ptr @test_v4i16_post_imm_st3(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16> %C, <4 x i16> %D) nounwind { -; SDAG-LABEL: test_v4i16_post_imm_st3: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 -; SDAG-NEXT: st3.4h { v0, v1, v2 }, [x0], #24 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i16_post_imm_st3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-SD-NEXT: st3.4h { v0, v1, v2 }, [x0], #24 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i16_post_imm_st3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, #24 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 -; CHECK-GISEL-NEXT: st3.4h { v0, v1, v2 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i16_post_imm_st3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, #24 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-GI-NEXT: st3.4h { v0, v1, v2 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st3.v4i16.p0(<4 x i16> %B, <4 x i16> %C, <4 x i16> %D, ptr %A) %tmp = getelementptr i16, ptr %A, i32 12 ret ptr %tmp } define ptr @test_v4i16_post_reg_st3(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16> %C, <4 x i16> %D, i64 %inc) nounwind { -; SDAG-LABEL: test_v4i16_post_reg_st3: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 -; SDAG-NEXT: lsl x8, x2, #1 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 -; SDAG-NEXT: st3.4h { v0, v1, v2 }, [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i16_post_reg_st3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-SD-NEXT: lsl x8, x2, #1 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-SD-NEXT: st3.4h { v0, v1, v2 }, [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i16_post_reg_st3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #1 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 -; CHECK-GISEL-NEXT: st3.4h { v0, v1, v2 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i16_post_reg_st3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #1 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-GI-NEXT: st3.4h { v0, v1, v2 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st3.v4i16.p0(<4 x i16> %B, <4 x i16> %C, <4 x i16> %D, ptr %A) %tmp = getelementptr i16, ptr %A, i64 %inc ret ptr %tmp @@ -8795,47 +8174,47 @@ declare void @llvm.aarch64.neon.st3.v4i16.p0(<4 x i16>, <4 x i16>, <4 x i16>, pt define ptr @test_v4i32_post_imm_st3(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32> %C, <4 x i32> %D) nounwind { -; SDAG-LABEL: test_v4i32_post_imm_st3: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: st3.4s { v0, v1, v2 }, [x0], #48 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i32_post_imm_st3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: st3.4s { v0, v1, v2 }, [x0], #48 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i32_post_imm_st3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, #48 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: st3.4s { v0, v1, v2 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i32_post_imm_st3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, #48 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: st3.4s { v0, v1, v2 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st3.v4i32.p0(<4 x i32> %B, <4 x i32> %C, <4 x i32> %D, ptr %A) %tmp = getelementptr i32, ptr %A, i32 12 ret ptr %tmp } define ptr @test_v4i32_post_reg_st3(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32> %C, <4 x i32> %D, i64 %inc) nounwind { -; SDAG-LABEL: test_v4i32_post_reg_st3: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: st3.4s { v0, v1, v2 }, [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i32_post_reg_st3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: st3.4s { v0, v1, v2 }, [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i32_post_reg_st3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: st3.4s { v0, v1, v2 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i32_post_reg_st3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #2 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: st3.4s { v0, v1, v2 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st3.v4i32.p0(<4 x i32> %B, <4 x i32> %C, <4 x i32> %D, ptr %A) %tmp = getelementptr i32, ptr %A, i64 %inc ret ptr %tmp @@ -8845,47 +8224,47 @@ declare void @llvm.aarch64.neon.st3.v4i32.p0(<4 x i32>, <4 x i32>, <4 x i32>, pt define ptr @test_v2i32_post_imm_st3(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32> %C, <2 x i32> %D) nounwind { -; SDAG-LABEL: test_v2i32_post_imm_st3: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 -; SDAG-NEXT: st3.2s { v0, v1, v2 }, [x0], #24 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i32_post_imm_st3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-SD-NEXT: st3.2s { v0, v1, v2 }, [x0], #24 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i32_post_imm_st3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, #24 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 -; CHECK-GISEL-NEXT: st3.2s { v0, v1, v2 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i32_post_imm_st3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, #24 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-GI-NEXT: st3.2s { v0, v1, v2 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st3.v2i32.p0(<2 x i32> %B, <2 x i32> %C, <2 x i32> %D, ptr %A) %tmp = getelementptr i32, ptr %A, i32 6 ret ptr %tmp } define ptr @test_v2i32_post_reg_st3(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32> %C, <2 x i32> %D, i64 %inc) nounwind { -; SDAG-LABEL: test_v2i32_post_reg_st3: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 -; SDAG-NEXT: st3.2s { v0, v1, v2 }, [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i32_post_reg_st3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-SD-NEXT: st3.2s { v0, v1, v2 }, [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i32_post_reg_st3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 -; CHECK-GISEL-NEXT: st3.2s { v0, v1, v2 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i32_post_reg_st3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #2 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-GI-NEXT: st3.2s { v0, v1, v2 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st3.v2i32.p0(<2 x i32> %B, <2 x i32> %C, <2 x i32> %D, ptr %A) %tmp = getelementptr i32, ptr %A, i64 %inc ret ptr %tmp @@ -8895,47 +8274,47 @@ declare void @llvm.aarch64.neon.st3.v2i32.p0(<2 x i32>, <2 x i32>, <2 x i32>, pt define ptr @test_v2i64_post_imm_st3(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64> %C, <2 x i64> %D) nounwind { -; SDAG-LABEL: test_v2i64_post_imm_st3: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: st3.2d { v0, v1, v2 }, [x0], #48 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i64_post_imm_st3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: st3.2d { v0, v1, v2 }, [x0], #48 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i64_post_imm_st3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, #48 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: st3.2d { v0, v1, v2 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i64_post_imm_st3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, #48 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: st3.2d { v0, v1, v2 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st3.v2i64.p0(<2 x i64> %B, <2 x i64> %C, <2 x i64> %D, ptr %A) %tmp = getelementptr i64, ptr %A, i64 6 ret ptr %tmp } define ptr @test_v2i64_post_reg_st3(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64> %C, <2 x i64> %D, i64 %inc) nounwind { -; SDAG-LABEL: test_v2i64_post_reg_st3: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: st3.2d { v0, v1, v2 }, [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i64_post_reg_st3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: st3.2d { v0, v1, v2 }, [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i64_post_reg_st3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: st3.2d { v0, v1, v2 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i64_post_reg_st3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #3 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: st3.2d { v0, v1, v2 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st3.v2i64.p0(<2 x i64> %B, <2 x i64> %C, <2 x i64> %D, ptr %A) %tmp = getelementptr i64, ptr %A, i64 %inc ret ptr %tmp @@ -8945,47 +8324,47 @@ declare void @llvm.aarch64.neon.st3.v2i64.p0(<2 x i64>, <2 x i64>, <2 x i64>, pt define ptr @test_v1i64_post_imm_st3(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64> %C, <1 x i64> %D) nounwind { -; SDAG-LABEL: test_v1i64_post_imm_st3: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 -; SDAG-NEXT: st1.1d { v0, v1, v2 }, [x0], #24 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v1i64_post_imm_st3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-SD-NEXT: st1.1d { v0, v1, v2 }, [x0], #24 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v1i64_post_imm_st3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, #24 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 -; CHECK-GISEL-NEXT: st1.1d { v0, v1, v2 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v1i64_post_imm_st3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, #24 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-GI-NEXT: st1.1d { v0, v1, v2 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st3.v1i64.p0(<1 x i64> %B, <1 x i64> %C, <1 x i64> %D, ptr %A) %tmp = getelementptr i64, ptr %A, i64 3 ret ptr %tmp } define ptr @test_v1i64_post_reg_st3(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64> %C, <1 x i64> %D, i64 %inc) nounwind { -; SDAG-LABEL: test_v1i64_post_reg_st3: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 -; SDAG-NEXT: st1.1d { v0, v1, v2 }, [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v1i64_post_reg_st3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-SD-NEXT: st1.1d { v0, v1, v2 }, [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v1i64_post_reg_st3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 -; CHECK-GISEL-NEXT: st1.1d { v0, v1, v2 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v1i64_post_reg_st3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #3 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-GI-NEXT: st1.1d { v0, v1, v2 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st3.v1i64.p0(<1 x i64> %B, <1 x i64> %C, <1 x i64> %D, ptr %A) %tmp = getelementptr i64, ptr %A, i64 %inc ret ptr %tmp @@ -8995,47 +8374,47 @@ declare void @llvm.aarch64.neon.st3.v1i64.p0(<1 x i64>, <1 x i64>, <1 x i64>, pt define ptr @test_v4f32_post_imm_st3(ptr %A, ptr %ptr, <4 x float> %B, <4 x float> %C, <4 x float> %D) nounwind { -; SDAG-LABEL: test_v4f32_post_imm_st3: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: st3.4s { v0, v1, v2 }, [x0], #48 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4f32_post_imm_st3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: st3.4s { v0, v1, v2 }, [x0], #48 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4f32_post_imm_st3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, #48 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: st3.4s { v0, v1, v2 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4f32_post_imm_st3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, #48 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: st3.4s { v0, v1, v2 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st3.v4f32.p0(<4 x float> %B, <4 x float> %C, <4 x float> %D, ptr %A) %tmp = getelementptr float, ptr %A, i32 12 ret ptr %tmp } define ptr @test_v4f32_post_reg_st3(ptr %A, ptr %ptr, <4 x float> %B, <4 x float> %C, <4 x float> %D, i64 %inc) nounwind { -; SDAG-LABEL: test_v4f32_post_reg_st3: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: st3.4s { v0, v1, v2 }, [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4f32_post_reg_st3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: st3.4s { v0, v1, v2 }, [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4f32_post_reg_st3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: st3.4s { v0, v1, v2 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4f32_post_reg_st3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #2 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: st3.4s { v0, v1, v2 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st3.v4f32.p0(<4 x float> %B, <4 x float> %C, <4 x float> %D, ptr %A) %tmp = getelementptr float, ptr %A, i64 %inc ret ptr %tmp @@ -9045,47 +8424,47 @@ declare void @llvm.aarch64.neon.st3.v4f32.p0(<4 x float>, <4 x float>, <4 x floa define ptr @test_v2f32_post_imm_st3(ptr %A, ptr %ptr, <2 x float> %B, <2 x float> %C, <2 x float> %D) nounwind { -; SDAG-LABEL: test_v2f32_post_imm_st3: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 -; SDAG-NEXT: st3.2s { v0, v1, v2 }, [x0], #24 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f32_post_imm_st3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-SD-NEXT: st3.2s { v0, v1, v2 }, [x0], #24 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f32_post_imm_st3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, #24 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 -; CHECK-GISEL-NEXT: st3.2s { v0, v1, v2 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f32_post_imm_st3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, #24 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-GI-NEXT: st3.2s { v0, v1, v2 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st3.v2f32.p0(<2 x float> %B, <2 x float> %C, <2 x float> %D, ptr %A) %tmp = getelementptr float, ptr %A, i32 6 ret ptr %tmp } define ptr @test_v2f32_post_reg_st3(ptr %A, ptr %ptr, <2 x float> %B, <2 x float> %C, <2 x float> %D, i64 %inc) nounwind { -; SDAG-LABEL: test_v2f32_post_reg_st3: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 -; SDAG-NEXT: st3.2s { v0, v1, v2 }, [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f32_post_reg_st3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-SD-NEXT: st3.2s { v0, v1, v2 }, [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f32_post_reg_st3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 -; CHECK-GISEL-NEXT: st3.2s { v0, v1, v2 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f32_post_reg_st3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #2 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-GI-NEXT: st3.2s { v0, v1, v2 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st3.v2f32.p0(<2 x float> %B, <2 x float> %C, <2 x float> %D, ptr %A) %tmp = getelementptr float, ptr %A, i64 %inc ret ptr %tmp @@ -9095,47 +8474,47 @@ declare void @llvm.aarch64.neon.st3.v2f32.p0(<2 x float>, <2 x float>, <2 x floa define ptr @test_v2f64_post_imm_st3(ptr %A, ptr %ptr, <2 x double> %B, <2 x double> %C, <2 x double> %D) nounwind { -; SDAG-LABEL: test_v2f64_post_imm_st3: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: st3.2d { v0, v1, v2 }, [x0], #48 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f64_post_imm_st3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: st3.2d { v0, v1, v2 }, [x0], #48 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f64_post_imm_st3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, #48 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: st3.2d { v0, v1, v2 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f64_post_imm_st3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, #48 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: st3.2d { v0, v1, v2 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st3.v2f64.p0(<2 x double> %B, <2 x double> %C, <2 x double> %D, ptr %A) %tmp = getelementptr double, ptr %A, i64 6 ret ptr %tmp } define ptr @test_v2f64_post_reg_st3(ptr %A, ptr %ptr, <2 x double> %B, <2 x double> %C, <2 x double> %D, i64 %inc) nounwind { -; SDAG-LABEL: test_v2f64_post_reg_st3: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: st3.2d { v0, v1, v2 }, [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f64_post_reg_st3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: st3.2d { v0, v1, v2 }, [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f64_post_reg_st3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: st3.2d { v0, v1, v2 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f64_post_reg_st3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #3 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: st3.2d { v0, v1, v2 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st3.v2f64.p0(<2 x double> %B, <2 x double> %C, <2 x double> %D, ptr %A) %tmp = getelementptr double, ptr %A, i64 %inc ret ptr %tmp @@ -9145,47 +8524,47 @@ declare void @llvm.aarch64.neon.st3.v2f64.p0(<2 x double>, <2 x double>, <2 x do define ptr @test_v1f64_post_imm_st3(ptr %A, ptr %ptr, <1 x double> %B, <1 x double> %C, <1 x double> %D) nounwind { -; SDAG-LABEL: test_v1f64_post_imm_st3: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 -; SDAG-NEXT: st1.1d { v0, v1, v2 }, [x0], #24 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v1f64_post_imm_st3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-SD-NEXT: st1.1d { v0, v1, v2 }, [x0], #24 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v1f64_post_imm_st3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, #24 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 -; CHECK-GISEL-NEXT: st1.1d { v0, v1, v2 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v1f64_post_imm_st3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, #24 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-GI-NEXT: st1.1d { v0, v1, v2 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st3.v1f64.p0(<1 x double> %B, <1 x double> %C, <1 x double> %D, ptr %A) %tmp = getelementptr double, ptr %A, i64 3 ret ptr %tmp } define ptr @test_v1f64_post_reg_st3(ptr %A, ptr %ptr, <1 x double> %B, <1 x double> %C, <1 x double> %D, i64 %inc) nounwind { -; SDAG-LABEL: test_v1f64_post_reg_st3: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 -; SDAG-NEXT: st1.1d { v0, v1, v2 }, [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v1f64_post_reg_st3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-SD-NEXT: st1.1d { v0, v1, v2 }, [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v1f64_post_reg_st3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 -; CHECK-GISEL-NEXT: st1.1d { v0, v1, v2 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v1f64_post_reg_st3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #3 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-GI-NEXT: st1.1d { v0, v1, v2 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st3.v1f64.p0(<1 x double> %B, <1 x double> %C, <1 x double> %D, ptr %A) %tmp = getelementptr double, ptr %A, i64 %inc ret ptr %tmp @@ -9195,50 +8574,50 @@ declare void @llvm.aarch64.neon.st3.v1f64.p0(<1 x double>, <1 x double>, <1 x do define ptr @test_v16i8_post_imm_st4(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8> %C, <16 x i8> %D, <16 x i8> %E) nounwind { -; SDAG-LABEL: test_v16i8_post_imm_st4: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: st4.16b { v0, v1, v2, v3 }, [x0], #64 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v16i8_post_imm_st4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: st4.16b { v0, v1, v2, v3 }, [x0], #64 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v16i8_post_imm_st4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, #64 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: st4.16b { v0, v1, v2, v3 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v16i8_post_imm_st4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, #64 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: st4.16b { v0, v1, v2, v3 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st4.v16i8.p0(<16 x i8> %B, <16 x i8> %C, <16 x i8> %D, <16 x i8> %E, ptr %A) %tmp = getelementptr i8, ptr %A, i32 64 ret ptr %tmp } define ptr @test_v16i8_post_reg_st4(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8> %C, <16 x i8> %D, <16 x i8> %E, i64 %inc) nounwind { -; SDAG-LABEL: test_v16i8_post_reg_st4: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: st4.16b { v0, v1, v2, v3 }, [x0], x2 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v16i8_post_reg_st4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: st4.16b { v0, v1, v2, v3 }, [x0], x2 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v16i8_post_reg_st4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, x2 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: st4.16b { v0, v1, v2, v3 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v16i8_post_reg_st4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, x2 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: st4.16b { v0, v1, v2, v3 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st4.v16i8.p0(<16 x i8> %B, <16 x i8> %C, <16 x i8> %D, <16 x i8> %E, ptr %A) %tmp = getelementptr i8, ptr %A, i64 %inc ret ptr %tmp @@ -9248,50 +8627,50 @@ declare void @llvm.aarch64.neon.st4.v16i8.p0(<16 x i8>, <16 x i8>, <16 x i8>, <1 define ptr @test_v8i8_post_imm_st4(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %C, <8 x i8> %D, <8 x i8> %E) nounwind { -; SDAG-LABEL: test_v8i8_post_imm_st4: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: st4.8b { v0, v1, v2, v3 }, [x0], #32 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i8_post_imm_st4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: st4.8b { v0, v1, v2, v3 }, [x0], #32 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i8_post_imm_st4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, #32 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: st4.8b { v0, v1, v2, v3 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i8_post_imm_st4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, #32 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: st4.8b { v0, v1, v2, v3 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st4.v8i8.p0(<8 x i8> %B, <8 x i8> %C, <8 x i8> %D, <8 x i8> %E, ptr %A) %tmp = getelementptr i8, ptr %A, i32 32 ret ptr %tmp } define ptr @test_v8i8_post_reg_st4(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %C, <8 x i8> %D, <8 x i8> %E, i64 %inc) nounwind { -; SDAG-LABEL: test_v8i8_post_reg_st4: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: st4.8b { v0, v1, v2, v3 }, [x0], x2 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i8_post_reg_st4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: st4.8b { v0, v1, v2, v3 }, [x0], x2 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i8_post_reg_st4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, x2 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: st4.8b { v0, v1, v2, v3 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i8_post_reg_st4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, x2 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: st4.8b { v0, v1, v2, v3 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st4.v8i8.p0(<8 x i8> %B, <8 x i8> %C, <8 x i8> %D, <8 x i8> %E, ptr %A) %tmp = getelementptr i8, ptr %A, i64 %inc ret ptr %tmp @@ -9301,51 +8680,51 @@ declare void @llvm.aarch64.neon.st4.v8i8.p0(<8 x i8>, <8 x i8>, <8 x i8>, <8 x i define ptr @test_v8i16_post_imm_st4(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16> %C, <8 x i16> %D, <8 x i16> %E) nounwind { -; SDAG-LABEL: test_v8i16_post_imm_st4: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: st4.8h { v0, v1, v2, v3 }, [x0], #64 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i16_post_imm_st4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: st4.8h { v0, v1, v2, v3 }, [x0], #64 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i16_post_imm_st4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, #64 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: st4.8h { v0, v1, v2, v3 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i16_post_imm_st4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, #64 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: st4.8h { v0, v1, v2, v3 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st4.v8i16.p0(<8 x i16> %B, <8 x i16> %C, <8 x i16> %D, <8 x i16> %E, ptr %A) %tmp = getelementptr i16, ptr %A, i32 32 ret ptr %tmp } define ptr @test_v8i16_post_reg_st4(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16> %C, <8 x i16> %D, <8 x i16> %E, i64 %inc) nounwind { -; SDAG-LABEL: test_v8i16_post_reg_st4: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: lsl x8, x2, #1 -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: st4.8h { v0, v1, v2, v3 }, [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i16_post_reg_st4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: lsl x8, x2, #1 +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: st4.8h { v0, v1, v2, v3 }, [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i16_post_reg_st4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #1 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: st4.8h { v0, v1, v2, v3 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i16_post_reg_st4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #1 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: st4.8h { v0, v1, v2, v3 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st4.v8i16.p0(<8 x i16> %B, <8 x i16> %C, <8 x i16> %D, <8 x i16> %E, ptr %A) %tmp = getelementptr i16, ptr %A, i64 %inc ret ptr %tmp @@ -9355,51 +8734,51 @@ declare void @llvm.aarch64.neon.st4.v8i16.p0(<8 x i16>, <8 x i16>, <8 x i16>, <8 define ptr @test_v4i16_post_imm_st4(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16> %C, <4 x i16> %D, <4 x i16> %E) nounwind { -; SDAG-LABEL: test_v4i16_post_imm_st4: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: st4.4h { v0, v1, v2, v3 }, [x0], #32 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i16_post_imm_st4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: st4.4h { v0, v1, v2, v3 }, [x0], #32 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i16_post_imm_st4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, #32 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: st4.4h { v0, v1, v2, v3 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i16_post_imm_st4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, #32 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: st4.4h { v0, v1, v2, v3 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st4.v4i16.p0(<4 x i16> %B, <4 x i16> %C, <4 x i16> %D, <4 x i16> %E, ptr %A) %tmp = getelementptr i16, ptr %A, i32 16 ret ptr %tmp } define ptr @test_v4i16_post_reg_st4(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16> %C, <4 x i16> %D, <4 x i16> %E, i64 %inc) nounwind { -; SDAG-LABEL: test_v4i16_post_reg_st4: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: lsl x8, x2, #1 -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: st4.4h { v0, v1, v2, v3 }, [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i16_post_reg_st4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: lsl x8, x2, #1 +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: st4.4h { v0, v1, v2, v3 }, [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i16_post_reg_st4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #1 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: st4.4h { v0, v1, v2, v3 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i16_post_reg_st4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #1 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: st4.4h { v0, v1, v2, v3 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st4.v4i16.p0(<4 x i16> %B, <4 x i16> %C, <4 x i16> %D, <4 x i16> %E, ptr %A) %tmp = getelementptr i16, ptr %A, i64 %inc ret ptr %tmp @@ -9409,51 +8788,51 @@ declare void @llvm.aarch64.neon.st4.v4i16.p0(<4 x i16>, <4 x i16>, <4 x i16>,<4 define ptr @test_v4i32_post_imm_st4(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32> %C, <4 x i32> %D, <4 x i32> %E) nounwind { -; SDAG-LABEL: test_v4i32_post_imm_st4: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: st4.4s { v0, v1, v2, v3 }, [x0], #64 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i32_post_imm_st4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: st4.4s { v0, v1, v2, v3 }, [x0], #64 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i32_post_imm_st4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, #64 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: st4.4s { v0, v1, v2, v3 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i32_post_imm_st4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, #64 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: st4.4s { v0, v1, v2, v3 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st4.v4i32.p0(<4 x i32> %B, <4 x i32> %C, <4 x i32> %D, <4 x i32> %E, ptr %A) %tmp = getelementptr i32, ptr %A, i32 16 ret ptr %tmp } define ptr @test_v4i32_post_reg_st4(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32> %C, <4 x i32> %D, <4 x i32> %E, i64 %inc) nounwind { -; SDAG-LABEL: test_v4i32_post_reg_st4: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: st4.4s { v0, v1, v2, v3 }, [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i32_post_reg_st4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: st4.4s { v0, v1, v2, v3 }, [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i32_post_reg_st4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: st4.4s { v0, v1, v2, v3 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i32_post_reg_st4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #2 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: st4.4s { v0, v1, v2, v3 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st4.v4i32.p0(<4 x i32> %B, <4 x i32> %C, <4 x i32> %D, <4 x i32> %E, ptr %A) %tmp = getelementptr i32, ptr %A, i64 %inc ret ptr %tmp @@ -9463,51 +8842,51 @@ declare void @llvm.aarch64.neon.st4.v4i32.p0(<4 x i32>, <4 x i32>, <4 x i32>,<4 define ptr @test_v2i32_post_imm_st4(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32> %C, <2 x i32> %D, <2 x i32> %E) nounwind { -; SDAG-LABEL: test_v2i32_post_imm_st4: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: st4.2s { v0, v1, v2, v3 }, [x0], #32 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i32_post_imm_st4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: st4.2s { v0, v1, v2, v3 }, [x0], #32 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i32_post_imm_st4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, #32 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: st4.2s { v0, v1, v2, v3 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i32_post_imm_st4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, #32 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: st4.2s { v0, v1, v2, v3 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st4.v2i32.p0(<2 x i32> %B, <2 x i32> %C, <2 x i32> %D, <2 x i32> %E, ptr %A) %tmp = getelementptr i32, ptr %A, i32 8 ret ptr %tmp } define ptr @test_v2i32_post_reg_st4(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32> %C, <2 x i32> %D, <2 x i32> %E, i64 %inc) nounwind { -; SDAG-LABEL: test_v2i32_post_reg_st4: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: st4.2s { v0, v1, v2, v3 }, [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i32_post_reg_st4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: st4.2s { v0, v1, v2, v3 }, [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i32_post_reg_st4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: st4.2s { v0, v1, v2, v3 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i32_post_reg_st4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #2 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: st4.2s { v0, v1, v2, v3 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st4.v2i32.p0(<2 x i32> %B, <2 x i32> %C, <2 x i32> %D, <2 x i32> %E, ptr %A) %tmp = getelementptr i32, ptr %A, i64 %inc ret ptr %tmp @@ -9517,51 +8896,51 @@ declare void @llvm.aarch64.neon.st4.v2i32.p0(<2 x i32>, <2 x i32>, <2 x i32>, <2 define ptr @test_v2i64_post_imm_st4(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64> %C, <2 x i64> %D, <2 x i64> %E) nounwind { -; SDAG-LABEL: test_v2i64_post_imm_st4: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: st4.2d { v0, v1, v2, v3 }, [x0], #64 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i64_post_imm_st4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: st4.2d { v0, v1, v2, v3 }, [x0], #64 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i64_post_imm_st4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, #64 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: st4.2d { v0, v1, v2, v3 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i64_post_imm_st4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, #64 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: st4.2d { v0, v1, v2, v3 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st4.v2i64.p0(<2 x i64> %B, <2 x i64> %C, <2 x i64> %D, <2 x i64> %E, ptr %A) %tmp = getelementptr i64, ptr %A, i64 8 ret ptr %tmp } define ptr @test_v2i64_post_reg_st4(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64> %C, <2 x i64> %D, <2 x i64> %E, i64 %inc) nounwind { -; SDAG-LABEL: test_v2i64_post_reg_st4: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: st4.2d { v0, v1, v2, v3 }, [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i64_post_reg_st4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: st4.2d { v0, v1, v2, v3 }, [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i64_post_reg_st4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: st4.2d { v0, v1, v2, v3 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i64_post_reg_st4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #3 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: st4.2d { v0, v1, v2, v3 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st4.v2i64.p0(<2 x i64> %B, <2 x i64> %C, <2 x i64> %D, <2 x i64> %E, ptr %A) %tmp = getelementptr i64, ptr %A, i64 %inc ret ptr %tmp @@ -9571,51 +8950,51 @@ declare void @llvm.aarch64.neon.st4.v2i64.p0(<2 x i64>, <2 x i64>, <2 x i64>,<2 define ptr @test_v1i64_post_imm_st4(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64> %C, <1 x i64> %D, <1 x i64> %E) nounwind { -; SDAG-LABEL: test_v1i64_post_imm_st4: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: st1.1d { v0, v1, v2, v3 }, [x0], #32 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v1i64_post_imm_st4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: st1.1d { v0, v1, v2, v3 }, [x0], #32 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v1i64_post_imm_st4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, #32 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: st1.1d { v0, v1, v2, v3 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v1i64_post_imm_st4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, #32 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: st1.1d { v0, v1, v2, v3 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st4.v1i64.p0(<1 x i64> %B, <1 x i64> %C, <1 x i64> %D, <1 x i64> %E, ptr %A) %tmp = getelementptr i64, ptr %A, i64 4 ret ptr %tmp } define ptr @test_v1i64_post_reg_st4(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64> %C, <1 x i64> %D, <1 x i64> %E, i64 %inc) nounwind { -; SDAG-LABEL: test_v1i64_post_reg_st4: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: st1.1d { v0, v1, v2, v3 }, [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v1i64_post_reg_st4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: st1.1d { v0, v1, v2, v3 }, [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v1i64_post_reg_st4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: st1.1d { v0, v1, v2, v3 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v1i64_post_reg_st4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #3 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: st1.1d { v0, v1, v2, v3 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st4.v1i64.p0(<1 x i64> %B, <1 x i64> %C, <1 x i64> %D, <1 x i64> %E, ptr %A) %tmp = getelementptr i64, ptr %A, i64 %inc ret ptr %tmp @@ -9625,51 +9004,51 @@ declare void @llvm.aarch64.neon.st4.v1i64.p0(<1 x i64>, <1 x i64>, <1 x i64>,<1 define ptr @test_v4f32_post_imm_st4(ptr %A, ptr %ptr, <4 x float> %B, <4 x float> %C, <4 x float> %D, <4 x float> %E) nounwind { -; SDAG-LABEL: test_v4f32_post_imm_st4: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: st4.4s { v0, v1, v2, v3 }, [x0], #64 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4f32_post_imm_st4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: st4.4s { v0, v1, v2, v3 }, [x0], #64 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4f32_post_imm_st4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, #64 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: st4.4s { v0, v1, v2, v3 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4f32_post_imm_st4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, #64 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: st4.4s { v0, v1, v2, v3 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st4.v4f32.p0(<4 x float> %B, <4 x float> %C, <4 x float> %D, <4 x float> %E, ptr %A) %tmp = getelementptr float, ptr %A, i32 16 ret ptr %tmp } define ptr @test_v4f32_post_reg_st4(ptr %A, ptr %ptr, <4 x float> %B, <4 x float> %C, <4 x float> %D, <4 x float> %E, i64 %inc) nounwind { -; SDAG-LABEL: test_v4f32_post_reg_st4: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: st4.4s { v0, v1, v2, v3 }, [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4f32_post_reg_st4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: st4.4s { v0, v1, v2, v3 }, [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4f32_post_reg_st4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: st4.4s { v0, v1, v2, v3 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4f32_post_reg_st4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #2 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: st4.4s { v0, v1, v2, v3 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st4.v4f32.p0(<4 x float> %B, <4 x float> %C, <4 x float> %D, <4 x float> %E, ptr %A) %tmp = getelementptr float, ptr %A, i64 %inc ret ptr %tmp @@ -9679,51 +9058,51 @@ declare void @llvm.aarch64.neon.st4.v4f32.p0(<4 x float>, <4 x float>, <4 x floa define ptr @test_v2f32_post_imm_st4(ptr %A, ptr %ptr, <2 x float> %B, <2 x float> %C, <2 x float> %D, <2 x float> %E) nounwind { -; SDAG-LABEL: test_v2f32_post_imm_st4: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: st4.2s { v0, v1, v2, v3 }, [x0], #32 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f32_post_imm_st4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: st4.2s { v0, v1, v2, v3 }, [x0], #32 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f32_post_imm_st4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, #32 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: st4.2s { v0, v1, v2, v3 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f32_post_imm_st4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, #32 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: st4.2s { v0, v1, v2, v3 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st4.v2f32.p0(<2 x float> %B, <2 x float> %C, <2 x float> %D, <2 x float> %E, ptr %A) %tmp = getelementptr float, ptr %A, i32 8 ret ptr %tmp } define ptr @test_v2f32_post_reg_st4(ptr %A, ptr %ptr, <2 x float> %B, <2 x float> %C, <2 x float> %D, <2 x float> %E, i64 %inc) nounwind { -; SDAG-LABEL: test_v2f32_post_reg_st4: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: st4.2s { v0, v1, v2, v3 }, [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f32_post_reg_st4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: st4.2s { v0, v1, v2, v3 }, [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f32_post_reg_st4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: st4.2s { v0, v1, v2, v3 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f32_post_reg_st4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #2 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: st4.2s { v0, v1, v2, v3 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st4.v2f32.p0(<2 x float> %B, <2 x float> %C, <2 x float> %D, <2 x float> %E, ptr %A) %tmp = getelementptr float, ptr %A, i64 %inc ret ptr %tmp @@ -9733,51 +9112,51 @@ declare void @llvm.aarch64.neon.st4.v2f32.p0(<2 x float>, <2 x float>, <2 x floa define ptr @test_v2f64_post_imm_st4(ptr %A, ptr %ptr, <2 x double> %B, <2 x double> %C, <2 x double> %D, <2 x double> %E) nounwind { -; SDAG-LABEL: test_v2f64_post_imm_st4: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: st4.2d { v0, v1, v2, v3 }, [x0], #64 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f64_post_imm_st4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: st4.2d { v0, v1, v2, v3 }, [x0], #64 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f64_post_imm_st4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, #64 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: st4.2d { v0, v1, v2, v3 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f64_post_imm_st4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, #64 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: st4.2d { v0, v1, v2, v3 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st4.v2f64.p0(<2 x double> %B, <2 x double> %C, <2 x double> %D, <2 x double> %E, ptr %A) %tmp = getelementptr double, ptr %A, i64 8 ret ptr %tmp } define ptr @test_v2f64_post_reg_st4(ptr %A, ptr %ptr, <2 x double> %B, <2 x double> %C, <2 x double> %D, <2 x double> %E, i64 %inc) nounwind { -; SDAG-LABEL: test_v2f64_post_reg_st4: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: st4.2d { v0, v1, v2, v3 }, [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f64_post_reg_st4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: st4.2d { v0, v1, v2, v3 }, [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f64_post_reg_st4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: st4.2d { v0, v1, v2, v3 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f64_post_reg_st4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #3 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: st4.2d { v0, v1, v2, v3 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st4.v2f64.p0(<2 x double> %B, <2 x double> %C, <2 x double> %D, <2 x double> %E, ptr %A) %tmp = getelementptr double, ptr %A, i64 %inc ret ptr %tmp @@ -9787,51 +9166,51 @@ declare void @llvm.aarch64.neon.st4.v2f64.p0(<2 x double>, <2 x double>, <2 x do define ptr @test_v1f64_post_imm_st4(ptr %A, ptr %ptr, <1 x double> %B, <1 x double> %C, <1 x double> %D, <1 x double> %E) nounwind { -; SDAG-LABEL: test_v1f64_post_imm_st4: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: st1.1d { v0, v1, v2, v3 }, [x0], #32 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v1f64_post_imm_st4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: st1.1d { v0, v1, v2, v3 }, [x0], #32 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v1f64_post_imm_st4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, #32 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: st1.1d { v0, v1, v2, v3 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v1f64_post_imm_st4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, #32 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: st1.1d { v0, v1, v2, v3 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st4.v1f64.p0(<1 x double> %B, <1 x double> %C, <1 x double> %D, <1 x double> %E, ptr %A) %tmp = getelementptr double, ptr %A, i64 4 ret ptr %tmp } define ptr @test_v1f64_post_reg_st4(ptr %A, ptr %ptr, <1 x double> %B, <1 x double> %C, <1 x double> %D, <1 x double> %E, i64 %inc) nounwind { -; SDAG-LABEL: test_v1f64_post_reg_st4: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: st1.1d { v0, v1, v2, v3 }, [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v1f64_post_reg_st4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: st1.1d { v0, v1, v2, v3 }, [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v1f64_post_reg_st4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: st1.1d { v0, v1, v2, v3 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v1f64_post_reg_st4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #3 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: st1.1d { v0, v1, v2, v3 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st4.v1f64.p0(<1 x double> %B, <1 x double> %C, <1 x double> %D, <1 x double> %E, ptr %A) %tmp = getelementptr double, ptr %A, i64 %inc ret ptr %tmp @@ -9841,42 +9220,42 @@ declare void @llvm.aarch64.neon.st4.v1f64.p0(<1 x double>, <1 x double>, <1 x do define ptr @test_v16i8_post_imm_st1x2(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8> %C) nounwind { -; SDAG-LABEL: test_v16i8_post_imm_st1x2: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: st1.16b { v0, v1 }, [x0], #32 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v16i8_post_imm_st1x2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: st1.16b { v0, v1 }, [x0], #32 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v16i8_post_imm_st1x2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: add x0, x0, #32 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: st1.16b { v0, v1 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v16i8_post_imm_st1x2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: add x0, x0, #32 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: st1.16b { v0, v1 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st1x2.v16i8.p0(<16 x i8> %B, <16 x i8> %C, ptr %A) %tmp = getelementptr i8, ptr %A, i32 32 ret ptr %tmp } define ptr @test_v16i8_post_reg_st1x2(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8> %C, i64 %inc) nounwind { -; SDAG-LABEL: test_v16i8_post_reg_st1x2: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: st1.16b { v0, v1 }, [x0], x2 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v16i8_post_reg_st1x2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: st1.16b { v0, v1 }, [x0], x2 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v16i8_post_reg_st1x2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: add x0, x0, x2 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: st1.16b { v0, v1 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v16i8_post_reg_st1x2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: add x0, x0, x2 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: st1.16b { v0, v1 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st1x2.v16i8.p0(<16 x i8> %B, <16 x i8> %C, ptr %A) %tmp = getelementptr i8, ptr %A, i64 %inc ret ptr %tmp @@ -9886,42 +9265,42 @@ declare void @llvm.aarch64.neon.st1x2.v16i8.p0(<16 x i8>, <16 x i8>, ptr) define ptr @test_v8i8_post_imm_st1x2(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %C) nounwind { -; SDAG-LABEL: test_v8i8_post_imm_st1x2: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 -; SDAG-NEXT: st1.8b { v0, v1 }, [x0], #16 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i8_post_imm_st1x2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 +; CHECK-SD-NEXT: st1.8b { v0, v1 }, [x0], #16 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i8_post_imm_st1x2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 -; CHECK-GISEL-NEXT: add x0, x0, #16 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 -; CHECK-GISEL-NEXT: st1.8b { v0, v1 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i8_post_imm_st1x2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 +; CHECK-GI-NEXT: add x0, x0, #16 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 +; CHECK-GI-NEXT: st1.8b { v0, v1 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st1x2.v8i8.p0(<8 x i8> %B, <8 x i8> %C, ptr %A) %tmp = getelementptr i8, ptr %A, i32 16 ret ptr %tmp } define ptr @test_v8i8_post_reg_st1x2(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %C, i64 %inc) nounwind { -; SDAG-LABEL: test_v8i8_post_reg_st1x2: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 -; SDAG-NEXT: st1.8b { v0, v1 }, [x0], x2 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i8_post_reg_st1x2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 +; CHECK-SD-NEXT: st1.8b { v0, v1 }, [x0], x2 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i8_post_reg_st1x2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 -; CHECK-GISEL-NEXT: add x0, x0, x2 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 -; CHECK-GISEL-NEXT: st1.8b { v0, v1 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i8_post_reg_st1x2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 +; CHECK-GI-NEXT: add x0, x0, x2 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 +; CHECK-GI-NEXT: st1.8b { v0, v1 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st1x2.v8i8.p0(<8 x i8> %B, <8 x i8> %C, ptr %A) %tmp = getelementptr i8, ptr %A, i64 %inc ret ptr %tmp @@ -9931,43 +9310,43 @@ declare void @llvm.aarch64.neon.st1x2.v8i8.p0(<8 x i8>, <8 x i8>, ptr) define ptr @test_v8i16_post_imm_st1x2(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16> %C) nounwind { -; SDAG-LABEL: test_v8i16_post_imm_st1x2: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: st1.8h { v0, v1 }, [x0], #32 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i16_post_imm_st1x2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: st1.8h { v0, v1 }, [x0], #32 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i16_post_imm_st1x2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: add x0, x0, #32 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: st1.8h { v0, v1 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i16_post_imm_st1x2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: add x0, x0, #32 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: st1.8h { v0, v1 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st1x2.v8i16.p0(<8 x i16> %B, <8 x i16> %C, ptr %A) %tmp = getelementptr i16, ptr %A, i32 16 ret ptr %tmp } define ptr @test_v8i16_post_reg_st1x2(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16> %C, i64 %inc) nounwind { -; SDAG-LABEL: test_v8i16_post_reg_st1x2: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #1 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: st1.8h { v0, v1 }, [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i16_post_reg_st1x2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #1 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: st1.8h { v0, v1 }, [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i16_post_reg_st1x2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #1 -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: st1.8h { v0, v1 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i16_post_reg_st1x2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #1 +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: st1.8h { v0, v1 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st1x2.v8i16.p0(<8 x i16> %B, <8 x i16> %C, ptr %A) %tmp = getelementptr i16, ptr %A, i64 %inc ret ptr %tmp @@ -9977,43 +9356,43 @@ declare void @llvm.aarch64.neon.st1x2.v8i16.p0(<8 x i16>, <8 x i16>, ptr) define ptr @test_v4i16_post_imm_st1x2(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16> %C) nounwind { -; SDAG-LABEL: test_v4i16_post_imm_st1x2: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 -; SDAG-NEXT: st1.4h { v0, v1 }, [x0], #16 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i16_post_imm_st1x2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 +; CHECK-SD-NEXT: st1.4h { v0, v1 }, [x0], #16 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i16_post_imm_st1x2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 -; CHECK-GISEL-NEXT: add x0, x0, #16 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 -; CHECK-GISEL-NEXT: st1.4h { v0, v1 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i16_post_imm_st1x2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 +; CHECK-GI-NEXT: add x0, x0, #16 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 +; CHECK-GI-NEXT: st1.4h { v0, v1 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st1x2.v4i16.p0(<4 x i16> %B, <4 x i16> %C, ptr %A) %tmp = getelementptr i16, ptr %A, i32 8 ret ptr %tmp } define ptr @test_v4i16_post_reg_st1x2(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16> %C, i64 %inc) nounwind { -; SDAG-LABEL: test_v4i16_post_reg_st1x2: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #1 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 -; SDAG-NEXT: st1.4h { v0, v1 }, [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i16_post_reg_st1x2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #1 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 +; CHECK-SD-NEXT: st1.4h { v0, v1 }, [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i16_post_reg_st1x2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #1 -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 -; CHECK-GISEL-NEXT: st1.4h { v0, v1 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i16_post_reg_st1x2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #1 +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 +; CHECK-GI-NEXT: st1.4h { v0, v1 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st1x2.v4i16.p0(<4 x i16> %B, <4 x i16> %C, ptr %A) %tmp = getelementptr i16, ptr %A, i64 %inc ret ptr %tmp @@ -10023,43 +9402,43 @@ declare void @llvm.aarch64.neon.st1x2.v4i16.p0(<4 x i16>, <4 x i16>, ptr) define ptr @test_v4i32_post_imm_st1x2(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32> %C) nounwind { -; SDAG-LABEL: test_v4i32_post_imm_st1x2: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: st1.4s { v0, v1 }, [x0], #32 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i32_post_imm_st1x2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: st1.4s { v0, v1 }, [x0], #32 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i32_post_imm_st1x2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: add x0, x0, #32 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: st1.4s { v0, v1 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i32_post_imm_st1x2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: add x0, x0, #32 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: st1.4s { v0, v1 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st1x2.v4i32.p0(<4 x i32> %B, <4 x i32> %C, ptr %A) %tmp = getelementptr i32, ptr %A, i32 8 ret ptr %tmp } define ptr @test_v4i32_post_reg_st1x2(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32> %C, i64 %inc) nounwind { -; SDAG-LABEL: test_v4i32_post_reg_st1x2: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: st1.4s { v0, v1 }, [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i32_post_reg_st1x2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: st1.4s { v0, v1 }, [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i32_post_reg_st1x2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: st1.4s { v0, v1 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i32_post_reg_st1x2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #2 +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: st1.4s { v0, v1 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st1x2.v4i32.p0(<4 x i32> %B, <4 x i32> %C, ptr %A) %tmp = getelementptr i32, ptr %A, i64 %inc ret ptr %tmp @@ -10069,43 +9448,43 @@ declare void @llvm.aarch64.neon.st1x2.v4i32.p0(<4 x i32>, <4 x i32>, ptr) define ptr @test_v2i32_post_imm_st1x2(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32> %C) nounwind { -; SDAG-LABEL: test_v2i32_post_imm_st1x2: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 -; SDAG-NEXT: st1.2s { v0, v1 }, [x0], #16 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i32_post_imm_st1x2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 +; CHECK-SD-NEXT: st1.2s { v0, v1 }, [x0], #16 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i32_post_imm_st1x2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 -; CHECK-GISEL-NEXT: add x0, x0, #16 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 -; CHECK-GISEL-NEXT: st1.2s { v0, v1 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i32_post_imm_st1x2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 +; CHECK-GI-NEXT: add x0, x0, #16 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 +; CHECK-GI-NEXT: st1.2s { v0, v1 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st1x2.v2i32.p0(<2 x i32> %B, <2 x i32> %C, ptr %A) %tmp = getelementptr i32, ptr %A, i32 4 ret ptr %tmp } define ptr @test_v2i32_post_reg_st1x2(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32> %C, i64 %inc) nounwind { -; SDAG-LABEL: test_v2i32_post_reg_st1x2: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 -; SDAG-NEXT: st1.2s { v0, v1 }, [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i32_post_reg_st1x2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 +; CHECK-SD-NEXT: st1.2s { v0, v1 }, [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i32_post_reg_st1x2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 -; CHECK-GISEL-NEXT: st1.2s { v0, v1 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i32_post_reg_st1x2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #2 +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 +; CHECK-GI-NEXT: st1.2s { v0, v1 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st1x2.v2i32.p0(<2 x i32> %B, <2 x i32> %C, ptr %A) %tmp = getelementptr i32, ptr %A, i64 %inc ret ptr %tmp @@ -10115,43 +9494,43 @@ declare void @llvm.aarch64.neon.st1x2.v2i32.p0(<2 x i32>, <2 x i32>, ptr) define ptr @test_v2i64_post_imm_st1x2(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64> %C) nounwind { -; SDAG-LABEL: test_v2i64_post_imm_st1x2: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: st1.2d { v0, v1 }, [x0], #32 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i64_post_imm_st1x2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: st1.2d { v0, v1 }, [x0], #32 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i64_post_imm_st1x2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: add x0, x0, #32 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: st1.2d { v0, v1 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i64_post_imm_st1x2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: add x0, x0, #32 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: st1.2d { v0, v1 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st1x2.v2i64.p0(<2 x i64> %B, <2 x i64> %C, ptr %A) %tmp = getelementptr i64, ptr %A, i64 4 ret ptr %tmp } define ptr @test_v2i64_post_reg_st1x2(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64> %C, i64 %inc) nounwind { -; SDAG-LABEL: test_v2i64_post_reg_st1x2: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: st1.2d { v0, v1 }, [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i64_post_reg_st1x2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: st1.2d { v0, v1 }, [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i64_post_reg_st1x2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: st1.2d { v0, v1 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i64_post_reg_st1x2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #3 +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: st1.2d { v0, v1 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st1x2.v2i64.p0(<2 x i64> %B, <2 x i64> %C, ptr %A) %tmp = getelementptr i64, ptr %A, i64 %inc ret ptr %tmp @@ -10161,43 +9540,43 @@ declare void @llvm.aarch64.neon.st1x2.v2i64.p0(<2 x i64>, <2 x i64>, ptr) define ptr @test_v1i64_post_imm_st1x2(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64> %C) nounwind { -; SDAG-LABEL: test_v1i64_post_imm_st1x2: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 -; SDAG-NEXT: st1.1d { v0, v1 }, [x0], #16 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v1i64_post_imm_st1x2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 +; CHECK-SD-NEXT: st1.1d { v0, v1 }, [x0], #16 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v1i64_post_imm_st1x2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 -; CHECK-GISEL-NEXT: add x0, x0, #16 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 -; CHECK-GISEL-NEXT: st1.1d { v0, v1 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v1i64_post_imm_st1x2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 +; CHECK-GI-NEXT: add x0, x0, #16 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 +; CHECK-GI-NEXT: st1.1d { v0, v1 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st1x2.v1i64.p0(<1 x i64> %B, <1 x i64> %C, ptr %A) %tmp = getelementptr i64, ptr %A, i64 2 ret ptr %tmp } define ptr @test_v1i64_post_reg_st1x2(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64> %C, i64 %inc) nounwind { -; SDAG-LABEL: test_v1i64_post_reg_st1x2: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 -; SDAG-NEXT: st1.1d { v0, v1 }, [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v1i64_post_reg_st1x2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 +; CHECK-SD-NEXT: st1.1d { v0, v1 }, [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v1i64_post_reg_st1x2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 -; CHECK-GISEL-NEXT: st1.1d { v0, v1 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v1i64_post_reg_st1x2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #3 +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 +; CHECK-GI-NEXT: st1.1d { v0, v1 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st1x2.v1i64.p0(<1 x i64> %B, <1 x i64> %C, ptr %A) %tmp = getelementptr i64, ptr %A, i64 %inc ret ptr %tmp @@ -10207,43 +9586,43 @@ declare void @llvm.aarch64.neon.st1x2.v1i64.p0(<1 x i64>, <1 x i64>, ptr) define ptr @test_v4f32_post_imm_st1x2(ptr %A, ptr %ptr, <4 x float> %B, <4 x float> %C) nounwind { -; SDAG-LABEL: test_v4f32_post_imm_st1x2: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: st1.4s { v0, v1 }, [x0], #32 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4f32_post_imm_st1x2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: st1.4s { v0, v1 }, [x0], #32 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4f32_post_imm_st1x2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: add x0, x0, #32 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: st1.4s { v0, v1 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4f32_post_imm_st1x2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: add x0, x0, #32 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: st1.4s { v0, v1 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st1x2.v4f32.p0(<4 x float> %B, <4 x float> %C, ptr %A) %tmp = getelementptr float, ptr %A, i32 8 ret ptr %tmp } define ptr @test_v4f32_post_reg_st1x2(ptr %A, ptr %ptr, <4 x float> %B, <4 x float> %C, i64 %inc) nounwind { -; SDAG-LABEL: test_v4f32_post_reg_st1x2: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: st1.4s { v0, v1 }, [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4f32_post_reg_st1x2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: st1.4s { v0, v1 }, [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4f32_post_reg_st1x2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: st1.4s { v0, v1 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4f32_post_reg_st1x2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #2 +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: st1.4s { v0, v1 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st1x2.v4f32.p0(<4 x float> %B, <4 x float> %C, ptr %A) %tmp = getelementptr float, ptr %A, i64 %inc ret ptr %tmp @@ -10253,43 +9632,43 @@ declare void @llvm.aarch64.neon.st1x2.v4f32.p0(<4 x float>, <4 x float>, ptr) define ptr @test_v2f32_post_imm_st1x2(ptr %A, ptr %ptr, <2 x float> %B, <2 x float> %C) nounwind { -; SDAG-LABEL: test_v2f32_post_imm_st1x2: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 -; SDAG-NEXT: st1.2s { v0, v1 }, [x0], #16 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f32_post_imm_st1x2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 +; CHECK-SD-NEXT: st1.2s { v0, v1 }, [x0], #16 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f32_post_imm_st1x2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 -; CHECK-GISEL-NEXT: add x0, x0, #16 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 -; CHECK-GISEL-NEXT: st1.2s { v0, v1 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f32_post_imm_st1x2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 +; CHECK-GI-NEXT: add x0, x0, #16 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 +; CHECK-GI-NEXT: st1.2s { v0, v1 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st1x2.v2f32.p0(<2 x float> %B, <2 x float> %C, ptr %A) %tmp = getelementptr float, ptr %A, i32 4 ret ptr %tmp } define ptr @test_v2f32_post_reg_st1x2(ptr %A, ptr %ptr, <2 x float> %B, <2 x float> %C, i64 %inc) nounwind { -; SDAG-LABEL: test_v2f32_post_reg_st1x2: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 -; SDAG-NEXT: st1.2s { v0, v1 }, [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f32_post_reg_st1x2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 +; CHECK-SD-NEXT: st1.2s { v0, v1 }, [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f32_post_reg_st1x2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 -; CHECK-GISEL-NEXT: st1.2s { v0, v1 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f32_post_reg_st1x2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #2 +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 +; CHECK-GI-NEXT: st1.2s { v0, v1 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st1x2.v2f32.p0(<2 x float> %B, <2 x float> %C, ptr %A) %tmp = getelementptr float, ptr %A, i64 %inc ret ptr %tmp @@ -10299,43 +9678,43 @@ declare void @llvm.aarch64.neon.st1x2.v2f32.p0(<2 x float>, <2 x float>, ptr) define ptr @test_v2f64_post_imm_st1x2(ptr %A, ptr %ptr, <2 x double> %B, <2 x double> %C) nounwind { -; SDAG-LABEL: test_v2f64_post_imm_st1x2: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: st1.2d { v0, v1 }, [x0], #32 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f64_post_imm_st1x2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: st1.2d { v0, v1 }, [x0], #32 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f64_post_imm_st1x2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: add x0, x0, #32 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: st1.2d { v0, v1 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f64_post_imm_st1x2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: add x0, x0, #32 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: st1.2d { v0, v1 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st1x2.v2f64.p0(<2 x double> %B, <2 x double> %C, ptr %A) %tmp = getelementptr double, ptr %A, i64 4 ret ptr %tmp } define ptr @test_v2f64_post_reg_st1x2(ptr %A, ptr %ptr, <2 x double> %B, <2 x double> %C, i64 %inc) nounwind { -; SDAG-LABEL: test_v2f64_post_reg_st1x2: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: st1.2d { v0, v1 }, [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f64_post_reg_st1x2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: st1.2d { v0, v1 }, [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f64_post_reg_st1x2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: st1.2d { v0, v1 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f64_post_reg_st1x2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #3 +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: st1.2d { v0, v1 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st1x2.v2f64.p0(<2 x double> %B, <2 x double> %C, ptr %A) %tmp = getelementptr double, ptr %A, i64 %inc ret ptr %tmp @@ -10345,43 +9724,43 @@ declare void @llvm.aarch64.neon.st1x2.v2f64.p0(<2 x double>, <2 x double>, ptr) define ptr @test_v1f64_post_imm_st1x2(ptr %A, ptr %ptr, <1 x double> %B, <1 x double> %C) nounwind { -; SDAG-LABEL: test_v1f64_post_imm_st1x2: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 -; SDAG-NEXT: st1.1d { v0, v1 }, [x0], #16 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v1f64_post_imm_st1x2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 +; CHECK-SD-NEXT: st1.1d { v0, v1 }, [x0], #16 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v1f64_post_imm_st1x2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 -; CHECK-GISEL-NEXT: add x0, x0, #16 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 -; CHECK-GISEL-NEXT: st1.1d { v0, v1 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v1f64_post_imm_st1x2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 +; CHECK-GI-NEXT: add x0, x0, #16 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 +; CHECK-GI-NEXT: st1.1d { v0, v1 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st1x2.v1f64.p0(<1 x double> %B, <1 x double> %C, ptr %A) %tmp = getelementptr double, ptr %A, i64 2 ret ptr %tmp } define ptr @test_v1f64_post_reg_st1x2(ptr %A, ptr %ptr, <1 x double> %B, <1 x double> %C, i64 %inc) nounwind { -; SDAG-LABEL: test_v1f64_post_reg_st1x2: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 -; SDAG-NEXT: st1.1d { v0, v1 }, [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v1f64_post_reg_st1x2: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 +; CHECK-SD-NEXT: st1.1d { v0, v1 }, [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v1f64_post_reg_st1x2: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 -; CHECK-GISEL-NEXT: st1.1d { v0, v1 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v1f64_post_reg_st1x2: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #3 +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1 def $d0_d1 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1 def $d0_d1 +; CHECK-GI-NEXT: st1.1d { v0, v1 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st1x2.v1f64.p0(<1 x double> %B, <1 x double> %C, ptr %A) %tmp = getelementptr double, ptr %A, i64 %inc ret ptr %tmp @@ -10391,46 +9770,46 @@ declare void @llvm.aarch64.neon.st1x2.v1f64.p0(<1 x double>, <1 x double>, ptr) define ptr @test_v16i8_post_imm_st1x3(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8> %C, <16 x i8> %D) nounwind { -; SDAG-LABEL: test_v16i8_post_imm_st1x3: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: st1.16b { v0, v1, v2 }, [x0], #48 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v16i8_post_imm_st1x3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: st1.16b { v0, v1, v2 }, [x0], #48 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v16i8_post_imm_st1x3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, #48 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: st1.16b { v0, v1, v2 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v16i8_post_imm_st1x3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, #48 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: st1.16b { v0, v1, v2 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st1x3.v16i8.p0(<16 x i8> %B, <16 x i8> %C, <16 x i8> %D, ptr %A) %tmp = getelementptr i8, ptr %A, i32 48 ret ptr %tmp } define ptr @test_v16i8_post_reg_st1x3(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8> %C, <16 x i8> %D, i64 %inc) nounwind { -; SDAG-LABEL: test_v16i8_post_reg_st1x3: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: st1.16b { v0, v1, v2 }, [x0], x2 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v16i8_post_reg_st1x3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: st1.16b { v0, v1, v2 }, [x0], x2 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v16i8_post_reg_st1x3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, x2 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: st1.16b { v0, v1, v2 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v16i8_post_reg_st1x3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, x2 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: st1.16b { v0, v1, v2 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st1x3.v16i8.p0(<16 x i8> %B, <16 x i8> %C, <16 x i8> %D, ptr %A) %tmp = getelementptr i8, ptr %A, i64 %inc ret ptr %tmp @@ -10440,46 +9819,46 @@ declare void @llvm.aarch64.neon.st1x3.v16i8.p0(<16 x i8>, <16 x i8>, <16 x i8>, define ptr @test_v8i8_post_imm_st1x3(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %C, <8 x i8> %D) nounwind { -; SDAG-LABEL: test_v8i8_post_imm_st1x3: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 -; SDAG-NEXT: st1.8b { v0, v1, v2 }, [x0], #24 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i8_post_imm_st1x3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-SD-NEXT: st1.8b { v0, v1, v2 }, [x0], #24 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i8_post_imm_st1x3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, #24 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 -; CHECK-GISEL-NEXT: st1.8b { v0, v1, v2 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i8_post_imm_st1x3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, #24 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-GI-NEXT: st1.8b { v0, v1, v2 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st1x3.v8i8.p0(<8 x i8> %B, <8 x i8> %C, <8 x i8> %D, ptr %A) %tmp = getelementptr i8, ptr %A, i32 24 ret ptr %tmp } define ptr @test_v8i8_post_reg_st1x3(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %C, <8 x i8> %D, i64 %inc) nounwind { -; SDAG-LABEL: test_v8i8_post_reg_st1x3: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 -; SDAG-NEXT: st1.8b { v0, v1, v2 }, [x0], x2 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i8_post_reg_st1x3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-SD-NEXT: st1.8b { v0, v1, v2 }, [x0], x2 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i8_post_reg_st1x3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, x2 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 -; CHECK-GISEL-NEXT: st1.8b { v0, v1, v2 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i8_post_reg_st1x3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, x2 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-GI-NEXT: st1.8b { v0, v1, v2 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st1x3.v8i8.p0(<8 x i8> %B, <8 x i8> %C, <8 x i8> %D, ptr %A) %tmp = getelementptr i8, ptr %A, i64 %inc ret ptr %tmp @@ -10489,47 +9868,47 @@ declare void @llvm.aarch64.neon.st1x3.v8i8.p0(<8 x i8>, <8 x i8>, <8 x i8>, ptr) define ptr @test_v8i16_post_imm_st1x3(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16> %C, <8 x i16> %D) nounwind { -; SDAG-LABEL: test_v8i16_post_imm_st1x3: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: st1.8h { v0, v1, v2 }, [x0], #48 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i16_post_imm_st1x3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: st1.8h { v0, v1, v2 }, [x0], #48 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i16_post_imm_st1x3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, #48 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: st1.8h { v0, v1, v2 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i16_post_imm_st1x3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, #48 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: st1.8h { v0, v1, v2 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st1x3.v8i16.p0(<8 x i16> %B, <8 x i16> %C, <8 x i16> %D, ptr %A) %tmp = getelementptr i16, ptr %A, i32 24 ret ptr %tmp } define ptr @test_v8i16_post_reg_st1x3(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16> %C, <8 x i16> %D, i64 %inc) nounwind { -; SDAG-LABEL: test_v8i16_post_reg_st1x3: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: lsl x8, x2, #1 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: st1.8h { v0, v1, v2 }, [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i16_post_reg_st1x3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: lsl x8, x2, #1 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: st1.8h { v0, v1, v2 }, [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i16_post_reg_st1x3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #1 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: st1.8h { v0, v1, v2 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i16_post_reg_st1x3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #1 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: st1.8h { v0, v1, v2 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st1x3.v8i16.p0(<8 x i16> %B, <8 x i16> %C, <8 x i16> %D, ptr %A) %tmp = getelementptr i16, ptr %A, i64 %inc ret ptr %tmp @@ -10539,47 +9918,47 @@ declare void @llvm.aarch64.neon.st1x3.v8i16.p0(<8 x i16>, <8 x i16>, <8 x i16>, define ptr @test_v4i16_post_imm_st1x3(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16> %C, <4 x i16> %D) nounwind { -; SDAG-LABEL: test_v4i16_post_imm_st1x3: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 -; SDAG-NEXT: st1.4h { v0, v1, v2 }, [x0], #24 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i16_post_imm_st1x3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-SD-NEXT: st1.4h { v0, v1, v2 }, [x0], #24 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i16_post_imm_st1x3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, #24 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 -; CHECK-GISEL-NEXT: st1.4h { v0, v1, v2 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i16_post_imm_st1x3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, #24 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-GI-NEXT: st1.4h { v0, v1, v2 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st1x3.v4i16.p0(<4 x i16> %B, <4 x i16> %C, <4 x i16> %D, ptr %A) %tmp = getelementptr i16, ptr %A, i32 12 ret ptr %tmp } define ptr @test_v4i16_post_reg_st1x3(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16> %C, <4 x i16> %D, i64 %inc) nounwind { -; SDAG-LABEL: test_v4i16_post_reg_st1x3: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 -; SDAG-NEXT: lsl x8, x2, #1 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 -; SDAG-NEXT: st1.4h { v0, v1, v2 }, [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i16_post_reg_st1x3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-SD-NEXT: lsl x8, x2, #1 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-SD-NEXT: st1.4h { v0, v1, v2 }, [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i16_post_reg_st1x3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #1 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 -; CHECK-GISEL-NEXT: st1.4h { v0, v1, v2 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i16_post_reg_st1x3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #1 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-GI-NEXT: st1.4h { v0, v1, v2 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st1x3.v4i16.p0(<4 x i16> %B, <4 x i16> %C, <4 x i16> %D, ptr %A) %tmp = getelementptr i16, ptr %A, i64 %inc ret ptr %tmp @@ -10589,47 +9968,47 @@ declare void @llvm.aarch64.neon.st1x3.v4i16.p0(<4 x i16>, <4 x i16>, <4 x i16>, define ptr @test_v4i32_post_imm_st1x3(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32> %C, <4 x i32> %D) nounwind { -; SDAG-LABEL: test_v4i32_post_imm_st1x3: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: st1.4s { v0, v1, v2 }, [x0], #48 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i32_post_imm_st1x3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: st1.4s { v0, v1, v2 }, [x0], #48 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i32_post_imm_st1x3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, #48 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: st1.4s { v0, v1, v2 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i32_post_imm_st1x3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, #48 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: st1.4s { v0, v1, v2 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st1x3.v4i32.p0(<4 x i32> %B, <4 x i32> %C, <4 x i32> %D, ptr %A) %tmp = getelementptr i32, ptr %A, i32 12 ret ptr %tmp } define ptr @test_v4i32_post_reg_st1x3(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32> %C, <4 x i32> %D, i64 %inc) nounwind { -; SDAG-LABEL: test_v4i32_post_reg_st1x3: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: st1.4s { v0, v1, v2 }, [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i32_post_reg_st1x3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: st1.4s { v0, v1, v2 }, [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i32_post_reg_st1x3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: st1.4s { v0, v1, v2 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i32_post_reg_st1x3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #2 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: st1.4s { v0, v1, v2 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st1x3.v4i32.p0(<4 x i32> %B, <4 x i32> %C, <4 x i32> %D, ptr %A) %tmp = getelementptr i32, ptr %A, i64 %inc ret ptr %tmp @@ -10639,47 +10018,47 @@ declare void @llvm.aarch64.neon.st1x3.v4i32.p0(<4 x i32>, <4 x i32>, <4 x i32>, define ptr @test_v2i32_post_imm_st1x3(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32> %C, <2 x i32> %D) nounwind { -; SDAG-LABEL: test_v2i32_post_imm_st1x3: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 -; SDAG-NEXT: st1.2s { v0, v1, v2 }, [x0], #24 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i32_post_imm_st1x3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-SD-NEXT: st1.2s { v0, v1, v2 }, [x0], #24 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i32_post_imm_st1x3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, #24 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 -; CHECK-GISEL-NEXT: st1.2s { v0, v1, v2 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i32_post_imm_st1x3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, #24 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-GI-NEXT: st1.2s { v0, v1, v2 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st1x3.v2i32.p0(<2 x i32> %B, <2 x i32> %C, <2 x i32> %D, ptr %A) %tmp = getelementptr i32, ptr %A, i32 6 ret ptr %tmp } define ptr @test_v2i32_post_reg_st1x3(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32> %C, <2 x i32> %D, i64 %inc) nounwind { -; SDAG-LABEL: test_v2i32_post_reg_st1x3: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 -; SDAG-NEXT: st1.2s { v0, v1, v2 }, [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i32_post_reg_st1x3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-SD-NEXT: st1.2s { v0, v1, v2 }, [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i32_post_reg_st1x3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 -; CHECK-GISEL-NEXT: st1.2s { v0, v1, v2 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i32_post_reg_st1x3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #2 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-GI-NEXT: st1.2s { v0, v1, v2 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st1x3.v2i32.p0(<2 x i32> %B, <2 x i32> %C, <2 x i32> %D, ptr %A) %tmp = getelementptr i32, ptr %A, i64 %inc ret ptr %tmp @@ -10689,47 +10068,47 @@ declare void @llvm.aarch64.neon.st1x3.v2i32.p0(<2 x i32>, <2 x i32>, <2 x i32>, define ptr @test_v2i64_post_imm_st1x3(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64> %C, <2 x i64> %D) nounwind { -; SDAG-LABEL: test_v2i64_post_imm_st1x3: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: st1.2d { v0, v1, v2 }, [x0], #48 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i64_post_imm_st1x3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: st1.2d { v0, v1, v2 }, [x0], #48 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i64_post_imm_st1x3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, #48 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: st1.2d { v0, v1, v2 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i64_post_imm_st1x3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, #48 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: st1.2d { v0, v1, v2 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st1x3.v2i64.p0(<2 x i64> %B, <2 x i64> %C, <2 x i64> %D, ptr %A) %tmp = getelementptr i64, ptr %A, i64 6 ret ptr %tmp } define ptr @test_v2i64_post_reg_st1x3(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64> %C, <2 x i64> %D, i64 %inc) nounwind { -; SDAG-LABEL: test_v2i64_post_reg_st1x3: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: st1.2d { v0, v1, v2 }, [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i64_post_reg_st1x3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: st1.2d { v0, v1, v2 }, [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i64_post_reg_st1x3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: st1.2d { v0, v1, v2 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i64_post_reg_st1x3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #3 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: st1.2d { v0, v1, v2 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st1x3.v2i64.p0(<2 x i64> %B, <2 x i64> %C, <2 x i64> %D, ptr %A) %tmp = getelementptr i64, ptr %A, i64 %inc ret ptr %tmp @@ -10739,47 +10118,47 @@ declare void @llvm.aarch64.neon.st1x3.v2i64.p0(<2 x i64>, <2 x i64>, <2 x i64>, define ptr @test_v1i64_post_imm_st1x3(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64> %C, <1 x i64> %D) nounwind { -; SDAG-LABEL: test_v1i64_post_imm_st1x3: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 -; SDAG-NEXT: st1.1d { v0, v1, v2 }, [x0], #24 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v1i64_post_imm_st1x3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-SD-NEXT: st1.1d { v0, v1, v2 }, [x0], #24 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v1i64_post_imm_st1x3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, #24 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 -; CHECK-GISEL-NEXT: st1.1d { v0, v1, v2 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v1i64_post_imm_st1x3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, #24 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-GI-NEXT: st1.1d { v0, v1, v2 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st1x3.v1i64.p0(<1 x i64> %B, <1 x i64> %C, <1 x i64> %D, ptr %A) %tmp = getelementptr i64, ptr %A, i64 3 ret ptr %tmp } define ptr @test_v1i64_post_reg_st1x3(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64> %C, <1 x i64> %D, i64 %inc) nounwind { -; SDAG-LABEL: test_v1i64_post_reg_st1x3: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 -; SDAG-NEXT: st1.1d { v0, v1, v2 }, [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v1i64_post_reg_st1x3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-SD-NEXT: st1.1d { v0, v1, v2 }, [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v1i64_post_reg_st1x3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 -; CHECK-GISEL-NEXT: st1.1d { v0, v1, v2 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v1i64_post_reg_st1x3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #3 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-GI-NEXT: st1.1d { v0, v1, v2 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st1x3.v1i64.p0(<1 x i64> %B, <1 x i64> %C, <1 x i64> %D, ptr %A) %tmp = getelementptr i64, ptr %A, i64 %inc ret ptr %tmp @@ -10789,47 +10168,47 @@ declare void @llvm.aarch64.neon.st1x3.v1i64.p0(<1 x i64>, <1 x i64>, <1 x i64>, define ptr @test_v4f32_post_imm_st1x3(ptr %A, ptr %ptr, <4 x float> %B, <4 x float> %C, <4 x float> %D) nounwind { -; SDAG-LABEL: test_v4f32_post_imm_st1x3: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: st1.4s { v0, v1, v2 }, [x0], #48 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4f32_post_imm_st1x3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: st1.4s { v0, v1, v2 }, [x0], #48 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4f32_post_imm_st1x3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, #48 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: st1.4s { v0, v1, v2 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4f32_post_imm_st1x3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, #48 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: st1.4s { v0, v1, v2 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st1x3.v4f32.p0(<4 x float> %B, <4 x float> %C, <4 x float> %D, ptr %A) %tmp = getelementptr float, ptr %A, i32 12 ret ptr %tmp } define ptr @test_v4f32_post_reg_st1x3(ptr %A, ptr %ptr, <4 x float> %B, <4 x float> %C, <4 x float> %D, i64 %inc) nounwind { -; SDAG-LABEL: test_v4f32_post_reg_st1x3: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: st1.4s { v0, v1, v2 }, [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4f32_post_reg_st1x3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: st1.4s { v0, v1, v2 }, [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4f32_post_reg_st1x3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: st1.4s { v0, v1, v2 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4f32_post_reg_st1x3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #2 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: st1.4s { v0, v1, v2 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st1x3.v4f32.p0(<4 x float> %B, <4 x float> %C, <4 x float> %D, ptr %A) %tmp = getelementptr float, ptr %A, i64 %inc ret ptr %tmp @@ -10839,47 +10218,47 @@ declare void @llvm.aarch64.neon.st1x3.v4f32.p0(<4 x float>, <4 x float>, <4 x fl define ptr @test_v2f32_post_imm_st1x3(ptr %A, ptr %ptr, <2 x float> %B, <2 x float> %C, <2 x float> %D) nounwind { -; SDAG-LABEL: test_v2f32_post_imm_st1x3: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 -; SDAG-NEXT: st1.2s { v0, v1, v2 }, [x0], #24 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f32_post_imm_st1x3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-SD-NEXT: st1.2s { v0, v1, v2 }, [x0], #24 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f32_post_imm_st1x3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, #24 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 -; CHECK-GISEL-NEXT: st1.2s { v0, v1, v2 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f32_post_imm_st1x3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, #24 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-GI-NEXT: st1.2s { v0, v1, v2 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st1x3.v2f32.p0(<2 x float> %B, <2 x float> %C, <2 x float> %D, ptr %A) %tmp = getelementptr float, ptr %A, i32 6 ret ptr %tmp } define ptr @test_v2f32_post_reg_st1x3(ptr %A, ptr %ptr, <2 x float> %B, <2 x float> %C, <2 x float> %D, i64 %inc) nounwind { -; SDAG-LABEL: test_v2f32_post_reg_st1x3: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 -; SDAG-NEXT: st1.2s { v0, v1, v2 }, [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f32_post_reg_st1x3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-SD-NEXT: st1.2s { v0, v1, v2 }, [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f32_post_reg_st1x3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 -; CHECK-GISEL-NEXT: st1.2s { v0, v1, v2 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f32_post_reg_st1x3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #2 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-GI-NEXT: st1.2s { v0, v1, v2 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st1x3.v2f32.p0(<2 x float> %B, <2 x float> %C, <2 x float> %D, ptr %A) %tmp = getelementptr float, ptr %A, i64 %inc ret ptr %tmp @@ -10889,47 +10268,47 @@ declare void @llvm.aarch64.neon.st1x3.v2f32.p0(<2 x float>, <2 x float>, <2 x fl define ptr @test_v2f64_post_imm_st1x3(ptr %A, ptr %ptr, <2 x double> %B, <2 x double> %C, <2 x double> %D) nounwind { -; SDAG-LABEL: test_v2f64_post_imm_st1x3: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: st1.2d { v0, v1, v2 }, [x0], #48 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f64_post_imm_st1x3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: st1.2d { v0, v1, v2 }, [x0], #48 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f64_post_imm_st1x3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, #48 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: st1.2d { v0, v1, v2 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f64_post_imm_st1x3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, #48 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: st1.2d { v0, v1, v2 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st1x3.v2f64.p0(<2 x double> %B, <2 x double> %C, <2 x double> %D, ptr %A) %tmp = getelementptr double, ptr %A, i64 6 ret ptr %tmp } define ptr @test_v2f64_post_reg_st1x3(ptr %A, ptr %ptr, <2 x double> %B, <2 x double> %C, <2 x double> %D, i64 %inc) nounwind { -; SDAG-LABEL: test_v2f64_post_reg_st1x3: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: st1.2d { v0, v1, v2 }, [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f64_post_reg_st1x3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: st1.2d { v0, v1, v2 }, [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f64_post_reg_st1x3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: st1.2d { v0, v1, v2 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f64_post_reg_st1x3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #3 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: st1.2d { v0, v1, v2 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st1x3.v2f64.p0(<2 x double> %B, <2 x double> %C, <2 x double> %D, ptr %A) %tmp = getelementptr double, ptr %A, i64 %inc ret ptr %tmp @@ -10939,47 +10318,47 @@ declare void @llvm.aarch64.neon.st1x3.v2f64.p0(<2 x double>, <2 x double>, <2 x define ptr @test_v1f64_post_imm_st1x3(ptr %A, ptr %ptr, <1 x double> %B, <1 x double> %C, <1 x double> %D) nounwind { -; SDAG-LABEL: test_v1f64_post_imm_st1x3: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 -; SDAG-NEXT: st1.1d { v0, v1, v2 }, [x0], #24 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v1f64_post_imm_st1x3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-SD-NEXT: st1.1d { v0, v1, v2 }, [x0], #24 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v1f64_post_imm_st1x3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, #24 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 -; CHECK-GISEL-NEXT: st1.1d { v0, v1, v2 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v1f64_post_imm_st1x3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, #24 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-GI-NEXT: st1.1d { v0, v1, v2 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st1x3.v1f64.p0(<1 x double> %B, <1 x double> %C, <1 x double> %D, ptr %A) %tmp = getelementptr double, ptr %A, i64 3 ret ptr %tmp } define ptr @test_v1f64_post_reg_st1x3(ptr %A, ptr %ptr, <1 x double> %B, <1 x double> %C, <1 x double> %D, i64 %inc) nounwind { -; SDAG-LABEL: test_v1f64_post_reg_st1x3: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 -; SDAG-NEXT: st1.1d { v0, v1, v2 }, [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v1f64_post_reg_st1x3: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-SD-NEXT: st1.1d { v0, v1, v2 }, [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v1f64_post_reg_st1x3: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 -; CHECK-GISEL-NEXT: st1.1d { v0, v1, v2 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v1f64_post_reg_st1x3: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #3 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2 def $d0_d1_d2 +; CHECK-GI-NEXT: st1.1d { v0, v1, v2 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st1x3.v1f64.p0(<1 x double> %B, <1 x double> %C, <1 x double> %D, ptr %A) %tmp = getelementptr double, ptr %A, i64 %inc ret ptr %tmp @@ -10989,50 +10368,50 @@ declare void @llvm.aarch64.neon.st1x3.v1f64.p0(<1 x double>, <1 x double>, <1 x define ptr @test_v16i8_post_imm_st1x4(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8> %C, <16 x i8> %D, <16 x i8> %E) nounwind { -; SDAG-LABEL: test_v16i8_post_imm_st1x4: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: st1.16b { v0, v1, v2, v3 }, [x0], #64 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v16i8_post_imm_st1x4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: st1.16b { v0, v1, v2, v3 }, [x0], #64 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v16i8_post_imm_st1x4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, #64 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: st1.16b { v0, v1, v2, v3 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v16i8_post_imm_st1x4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, #64 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: st1.16b { v0, v1, v2, v3 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st1x4.v16i8.p0(<16 x i8> %B, <16 x i8> %C, <16 x i8> %D, <16 x i8> %E, ptr %A) %tmp = getelementptr i8, ptr %A, i32 64 ret ptr %tmp } define ptr @test_v16i8_post_reg_st1x4(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8> %C, <16 x i8> %D, <16 x i8> %E, i64 %inc) nounwind { -; SDAG-LABEL: test_v16i8_post_reg_st1x4: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: st1.16b { v0, v1, v2, v3 }, [x0], x2 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v16i8_post_reg_st1x4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: st1.16b { v0, v1, v2, v3 }, [x0], x2 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v16i8_post_reg_st1x4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, x2 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: st1.16b { v0, v1, v2, v3 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v16i8_post_reg_st1x4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, x2 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: st1.16b { v0, v1, v2, v3 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st1x4.v16i8.p0(<16 x i8> %B, <16 x i8> %C, <16 x i8> %D, <16 x i8> %E, ptr %A) %tmp = getelementptr i8, ptr %A, i64 %inc ret ptr %tmp @@ -11042,50 +10421,50 @@ declare void @llvm.aarch64.neon.st1x4.v16i8.p0(<16 x i8>, <16 x i8>, <16 x i8>, define ptr @test_v8i8_post_imm_st1x4(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %C, <8 x i8> %D, <8 x i8> %E) nounwind { -; SDAG-LABEL: test_v8i8_post_imm_st1x4: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: st1.8b { v0, v1, v2, v3 }, [x0], #32 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i8_post_imm_st1x4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: st1.8b { v0, v1, v2, v3 }, [x0], #32 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i8_post_imm_st1x4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, #32 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: st1.8b { v0, v1, v2, v3 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i8_post_imm_st1x4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, #32 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: st1.8b { v0, v1, v2, v3 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st1x4.v8i8.p0(<8 x i8> %B, <8 x i8> %C, <8 x i8> %D, <8 x i8> %E, ptr %A) %tmp = getelementptr i8, ptr %A, i32 32 ret ptr %tmp } define ptr @test_v8i8_post_reg_st1x4(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %C, <8 x i8> %D, <8 x i8> %E, i64 %inc) nounwind { -; SDAG-LABEL: test_v8i8_post_reg_st1x4: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: st1.8b { v0, v1, v2, v3 }, [x0], x2 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i8_post_reg_st1x4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: st1.8b { v0, v1, v2, v3 }, [x0], x2 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i8_post_reg_st1x4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, x2 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: st1.8b { v0, v1, v2, v3 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i8_post_reg_st1x4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, x2 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: st1.8b { v0, v1, v2, v3 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st1x4.v8i8.p0(<8 x i8> %B, <8 x i8> %C, <8 x i8> %D, <8 x i8> %E, ptr %A) %tmp = getelementptr i8, ptr %A, i64 %inc ret ptr %tmp @@ -11095,51 +10474,51 @@ declare void @llvm.aarch64.neon.st1x4.v8i8.p0(<8 x i8>, <8 x i8>, <8 x i8>, <8 x define ptr @test_v8i16_post_imm_st1x4(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16> %C, <8 x i16> %D, <8 x i16> %E) nounwind { -; SDAG-LABEL: test_v8i16_post_imm_st1x4: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: st1.8h { v0, v1, v2, v3 }, [x0], #64 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i16_post_imm_st1x4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: st1.8h { v0, v1, v2, v3 }, [x0], #64 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i16_post_imm_st1x4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, #64 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: st1.8h { v0, v1, v2, v3 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i16_post_imm_st1x4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, #64 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: st1.8h { v0, v1, v2, v3 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st1x4.v8i16.p0(<8 x i16> %B, <8 x i16> %C, <8 x i16> %D, <8 x i16> %E, ptr %A) %tmp = getelementptr i16, ptr %A, i32 32 ret ptr %tmp } define ptr @test_v8i16_post_reg_st1x4(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16> %C, <8 x i16> %D, <8 x i16> %E, i64 %inc) nounwind { -; SDAG-LABEL: test_v8i16_post_reg_st1x4: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: lsl x8, x2, #1 -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: st1.8h { v0, v1, v2, v3 }, [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i16_post_reg_st1x4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: lsl x8, x2, #1 +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: st1.8h { v0, v1, v2, v3 }, [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i16_post_reg_st1x4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #1 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: st1.8h { v0, v1, v2, v3 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i16_post_reg_st1x4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #1 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: st1.8h { v0, v1, v2, v3 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st1x4.v8i16.p0(<8 x i16> %B, <8 x i16> %C, <8 x i16> %D, <8 x i16> %E, ptr %A) %tmp = getelementptr i16, ptr %A, i64 %inc ret ptr %tmp @@ -11149,51 +10528,51 @@ declare void @llvm.aarch64.neon.st1x4.v8i16.p0(<8 x i16>, <8 x i16>, <8 x i16>, define ptr @test_v4i16_post_imm_st1x4(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16> %C, <4 x i16> %D, <4 x i16> %E) nounwind { -; SDAG-LABEL: test_v4i16_post_imm_st1x4: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: st1.4h { v0, v1, v2, v3 }, [x0], #32 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i16_post_imm_st1x4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: st1.4h { v0, v1, v2, v3 }, [x0], #32 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i16_post_imm_st1x4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, #32 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: st1.4h { v0, v1, v2, v3 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i16_post_imm_st1x4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, #32 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: st1.4h { v0, v1, v2, v3 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st1x4.v4i16.p0(<4 x i16> %B, <4 x i16> %C, <4 x i16> %D, <4 x i16> %E, ptr %A) %tmp = getelementptr i16, ptr %A, i32 16 ret ptr %tmp } define ptr @test_v4i16_post_reg_st1x4(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16> %C, <4 x i16> %D, <4 x i16> %E, i64 %inc) nounwind { -; SDAG-LABEL: test_v4i16_post_reg_st1x4: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: lsl x8, x2, #1 -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: st1.4h { v0, v1, v2, v3 }, [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i16_post_reg_st1x4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: lsl x8, x2, #1 +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: st1.4h { v0, v1, v2, v3 }, [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i16_post_reg_st1x4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #1 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: st1.4h { v0, v1, v2, v3 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i16_post_reg_st1x4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #1 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: st1.4h { v0, v1, v2, v3 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st1x4.v4i16.p0(<4 x i16> %B, <4 x i16> %C, <4 x i16> %D, <4 x i16> %E, ptr %A) %tmp = getelementptr i16, ptr %A, i64 %inc ret ptr %tmp @@ -11203,51 +10582,51 @@ declare void @llvm.aarch64.neon.st1x4.v4i16.p0(<4 x i16>, <4 x i16>, <4 x i16>,< define ptr @test_v4i32_post_imm_st1x4(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32> %C, <4 x i32> %D, <4 x i32> %E) nounwind { -; SDAG-LABEL: test_v4i32_post_imm_st1x4: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: st1.4s { v0, v1, v2, v3 }, [x0], #64 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i32_post_imm_st1x4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: st1.4s { v0, v1, v2, v3 }, [x0], #64 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i32_post_imm_st1x4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, #64 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: st1.4s { v0, v1, v2, v3 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i32_post_imm_st1x4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, #64 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: st1.4s { v0, v1, v2, v3 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st1x4.v4i32.p0(<4 x i32> %B, <4 x i32> %C, <4 x i32> %D, <4 x i32> %E, ptr %A) %tmp = getelementptr i32, ptr %A, i32 16 ret ptr %tmp } define ptr @test_v4i32_post_reg_st1x4(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32> %C, <4 x i32> %D, <4 x i32> %E, i64 %inc) nounwind { -; SDAG-LABEL: test_v4i32_post_reg_st1x4: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: st1.4s { v0, v1, v2, v3 }, [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i32_post_reg_st1x4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: st1.4s { v0, v1, v2, v3 }, [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i32_post_reg_st1x4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: st1.4s { v0, v1, v2, v3 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i32_post_reg_st1x4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #2 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: st1.4s { v0, v1, v2, v3 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st1x4.v4i32.p0(<4 x i32> %B, <4 x i32> %C, <4 x i32> %D, <4 x i32> %E, ptr %A) %tmp = getelementptr i32, ptr %A, i64 %inc ret ptr %tmp @@ -11257,51 +10636,51 @@ declare void @llvm.aarch64.neon.st1x4.v4i32.p0(<4 x i32>, <4 x i32>, <4 x i32>,< define ptr @test_v2i32_post_imm_st1x4(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32> %C, <2 x i32> %D, <2 x i32> %E) nounwind { -; SDAG-LABEL: test_v2i32_post_imm_st1x4: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: st1.2s { v0, v1, v2, v3 }, [x0], #32 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i32_post_imm_st1x4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: st1.2s { v0, v1, v2, v3 }, [x0], #32 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i32_post_imm_st1x4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, #32 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: st1.2s { v0, v1, v2, v3 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i32_post_imm_st1x4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, #32 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: st1.2s { v0, v1, v2, v3 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st1x4.v2i32.p0(<2 x i32> %B, <2 x i32> %C, <2 x i32> %D, <2 x i32> %E, ptr %A) %tmp = getelementptr i32, ptr %A, i32 8 ret ptr %tmp } define ptr @test_v2i32_post_reg_st1x4(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32> %C, <2 x i32> %D, <2 x i32> %E, i64 %inc) nounwind { -; SDAG-LABEL: test_v2i32_post_reg_st1x4: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: st1.2s { v0, v1, v2, v3 }, [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i32_post_reg_st1x4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: st1.2s { v0, v1, v2, v3 }, [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i32_post_reg_st1x4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: st1.2s { v0, v1, v2, v3 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i32_post_reg_st1x4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #2 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: st1.2s { v0, v1, v2, v3 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st1x4.v2i32.p0(<2 x i32> %B, <2 x i32> %C, <2 x i32> %D, <2 x i32> %E, ptr %A) %tmp = getelementptr i32, ptr %A, i64 %inc ret ptr %tmp @@ -11311,51 +10690,51 @@ declare void @llvm.aarch64.neon.st1x4.v2i32.p0(<2 x i32>, <2 x i32>, <2 x i32>, define ptr @test_v2i64_post_imm_st1x4(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64> %C, <2 x i64> %D, <2 x i64> %E) nounwind { -; SDAG-LABEL: test_v2i64_post_imm_st1x4: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: st1.2d { v0, v1, v2, v3 }, [x0], #64 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i64_post_imm_st1x4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: st1.2d { v0, v1, v2, v3 }, [x0], #64 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i64_post_imm_st1x4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, #64 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: st1.2d { v0, v1, v2, v3 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i64_post_imm_st1x4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, #64 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: st1.2d { v0, v1, v2, v3 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st1x4.v2i64.p0(<2 x i64> %B, <2 x i64> %C, <2 x i64> %D, <2 x i64> %E, ptr %A) %tmp = getelementptr i64, ptr %A, i64 8 ret ptr %tmp } define ptr @test_v2i64_post_reg_st1x4(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64> %C, <2 x i64> %D, <2 x i64> %E, i64 %inc) nounwind { -; SDAG-LABEL: test_v2i64_post_reg_st1x4: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: st1.2d { v0, v1, v2, v3 }, [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i64_post_reg_st1x4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: st1.2d { v0, v1, v2, v3 }, [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i64_post_reg_st1x4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: st1.2d { v0, v1, v2, v3 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i64_post_reg_st1x4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #3 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: st1.2d { v0, v1, v2, v3 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st1x4.v2i64.p0(<2 x i64> %B, <2 x i64> %C, <2 x i64> %D, <2 x i64> %E, ptr %A) %tmp = getelementptr i64, ptr %A, i64 %inc ret ptr %tmp @@ -11365,51 +10744,51 @@ declare void @llvm.aarch64.neon.st1x4.v2i64.p0(<2 x i64>, <2 x i64>, <2 x i64>,< define ptr @test_v1i64_post_imm_st1x4(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64> %C, <1 x i64> %D, <1 x i64> %E) nounwind { -; SDAG-LABEL: test_v1i64_post_imm_st1x4: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: st1.1d { v0, v1, v2, v3 }, [x0], #32 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v1i64_post_imm_st1x4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: st1.1d { v0, v1, v2, v3 }, [x0], #32 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v1i64_post_imm_st1x4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, #32 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: st1.1d { v0, v1, v2, v3 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v1i64_post_imm_st1x4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, #32 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: st1.1d { v0, v1, v2, v3 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st1x4.v1i64.p0(<1 x i64> %B, <1 x i64> %C, <1 x i64> %D, <1 x i64> %E, ptr %A) %tmp = getelementptr i64, ptr %A, i64 4 ret ptr %tmp } define ptr @test_v1i64_post_reg_st1x4(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64> %C, <1 x i64> %D, <1 x i64> %E, i64 %inc) nounwind { -; SDAG-LABEL: test_v1i64_post_reg_st1x4: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: st1.1d { v0, v1, v2, v3 }, [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v1i64_post_reg_st1x4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: st1.1d { v0, v1, v2, v3 }, [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v1i64_post_reg_st1x4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: st1.1d { v0, v1, v2, v3 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v1i64_post_reg_st1x4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #3 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: st1.1d { v0, v1, v2, v3 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st1x4.v1i64.p0(<1 x i64> %B, <1 x i64> %C, <1 x i64> %D, <1 x i64> %E, ptr %A) %tmp = getelementptr i64, ptr %A, i64 %inc ret ptr %tmp @@ -11419,51 +10798,51 @@ declare void @llvm.aarch64.neon.st1x4.v1i64.p0(<1 x i64>, <1 x i64>, <1 x i64>,< define ptr @test_v4f32_post_imm_st1x4(ptr %A, ptr %ptr, <4 x float> %B, <4 x float> %C, <4 x float> %D, <4 x float> %E) nounwind { -; SDAG-LABEL: test_v4f32_post_imm_st1x4: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: st1.4s { v0, v1, v2, v3 }, [x0], #64 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4f32_post_imm_st1x4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: st1.4s { v0, v1, v2, v3 }, [x0], #64 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4f32_post_imm_st1x4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, #64 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: st1.4s { v0, v1, v2, v3 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4f32_post_imm_st1x4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, #64 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: st1.4s { v0, v1, v2, v3 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st1x4.v4f32.p0(<4 x float> %B, <4 x float> %C, <4 x float> %D, <4 x float> %E, ptr %A) %tmp = getelementptr float, ptr %A, i32 16 ret ptr %tmp } define ptr @test_v4f32_post_reg_st1x4(ptr %A, ptr %ptr, <4 x float> %B, <4 x float> %C, <4 x float> %D, <4 x float> %E, i64 %inc) nounwind { -; SDAG-LABEL: test_v4f32_post_reg_st1x4: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: st1.4s { v0, v1, v2, v3 }, [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4f32_post_reg_st1x4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: st1.4s { v0, v1, v2, v3 }, [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4f32_post_reg_st1x4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: st1.4s { v0, v1, v2, v3 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4f32_post_reg_st1x4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #2 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: st1.4s { v0, v1, v2, v3 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st1x4.v4f32.p0(<4 x float> %B, <4 x float> %C, <4 x float> %D, <4 x float> %E, ptr %A) %tmp = getelementptr float, ptr %A, i64 %inc ret ptr %tmp @@ -11473,51 +10852,51 @@ declare void @llvm.aarch64.neon.st1x4.v4f32.p0(<4 x float>, <4 x float>, <4 x fl define ptr @test_v2f32_post_imm_st1x4(ptr %A, ptr %ptr, <2 x float> %B, <2 x float> %C, <2 x float> %D, <2 x float> %E) nounwind { -; SDAG-LABEL: test_v2f32_post_imm_st1x4: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: st1.2s { v0, v1, v2, v3 }, [x0], #32 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f32_post_imm_st1x4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: st1.2s { v0, v1, v2, v3 }, [x0], #32 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f32_post_imm_st1x4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, #32 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: st1.2s { v0, v1, v2, v3 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f32_post_imm_st1x4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, #32 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: st1.2s { v0, v1, v2, v3 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st1x4.v2f32.p0(<2 x float> %B, <2 x float> %C, <2 x float> %D, <2 x float> %E, ptr %A) %tmp = getelementptr float, ptr %A, i32 8 ret ptr %tmp } define ptr @test_v2f32_post_reg_st1x4(ptr %A, ptr %ptr, <2 x float> %B, <2 x float> %C, <2 x float> %D, <2 x float> %E, i64 %inc) nounwind { -; SDAG-LABEL: test_v2f32_post_reg_st1x4: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: st1.2s { v0, v1, v2, v3 }, [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f32_post_reg_st1x4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: st1.2s { v0, v1, v2, v3 }, [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f32_post_reg_st1x4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: st1.2s { v0, v1, v2, v3 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f32_post_reg_st1x4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #2 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: st1.2s { v0, v1, v2, v3 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st1x4.v2f32.p0(<2 x float> %B, <2 x float> %C, <2 x float> %D, <2 x float> %E, ptr %A) %tmp = getelementptr float, ptr %A, i64 %inc ret ptr %tmp @@ -11527,51 +10906,51 @@ declare void @llvm.aarch64.neon.st1x4.v2f32.p0(<2 x float>, <2 x float>, <2 x fl define ptr @test_v2f64_post_imm_st1x4(ptr %A, ptr %ptr, <2 x double> %B, <2 x double> %C, <2 x double> %D, <2 x double> %E) nounwind { -; SDAG-LABEL: test_v2f64_post_imm_st1x4: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: st1.2d { v0, v1, v2, v3 }, [x0], #64 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f64_post_imm_st1x4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: st1.2d { v0, v1, v2, v3 }, [x0], #64 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f64_post_imm_st1x4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, #64 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: st1.2d { v0, v1, v2, v3 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f64_post_imm_st1x4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, #64 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: st1.2d { v0, v1, v2, v3 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st1x4.v2f64.p0(<2 x double> %B, <2 x double> %C, <2 x double> %D, <2 x double> %E, ptr %A) %tmp = getelementptr double, ptr %A, i64 8 ret ptr %tmp } define ptr @test_v2f64_post_reg_st1x4(ptr %A, ptr %ptr, <2 x double> %B, <2 x double> %C, <2 x double> %D, <2 x double> %E, i64 %inc) nounwind { -; SDAG-LABEL: test_v2f64_post_reg_st1x4: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: st1.2d { v0, v1, v2, v3 }, [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f64_post_reg_st1x4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: st1.2d { v0, v1, v2, v3 }, [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f64_post_reg_st1x4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: st1.2d { v0, v1, v2, v3 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f64_post_reg_st1x4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #3 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: st1.2d { v0, v1, v2, v3 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st1x4.v2f64.p0(<2 x double> %B, <2 x double> %C, <2 x double> %D, <2 x double> %E, ptr %A) %tmp = getelementptr double, ptr %A, i64 %inc ret ptr %tmp @@ -11581,51 +10960,51 @@ declare void @llvm.aarch64.neon.st1x4.v2f64.p0(<2 x double>, <2 x double>, <2 x define ptr @test_v1f64_post_imm_st1x4(ptr %A, ptr %ptr, <1 x double> %B, <1 x double> %C, <1 x double> %D, <1 x double> %E) nounwind { -; SDAG-LABEL: test_v1f64_post_imm_st1x4: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: st1.1d { v0, v1, v2, v3 }, [x0], #32 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v1f64_post_imm_st1x4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: st1.1d { v0, v1, v2, v3 }, [x0], #32 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v1f64_post_imm_st1x4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, #32 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: st1.1d { v0, v1, v2, v3 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v1f64_post_imm_st1x4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, #32 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: st1.1d { v0, v1, v2, v3 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st1x4.v1f64.p0(<1 x double> %B, <1 x double> %C, <1 x double> %D, <1 x double> %E, ptr %A) %tmp = getelementptr double, ptr %A, i64 4 ret ptr %tmp } define ptr @test_v1f64_post_reg_st1x4(ptr %A, ptr %ptr, <1 x double> %B, <1 x double> %C, <1 x double> %D, <1 x double> %E, i64 %inc) nounwind { -; SDAG-LABEL: test_v1f64_post_reg_st1x4: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; SDAG-NEXT: st1.1d { v0, v1, v2, v3 }, [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v1f64_post_reg_st1x4: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-SD-NEXT: st1.1d { v0, v1, v2, v3 }, [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v1f64_post_reg_st1x4: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 -; CHECK-GISEL-NEXT: st1.1d { v0, v1, v2, v3 }, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v1f64_post_reg_st1x4: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #3 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $d0_d1_d2_d3 def $d0_d1_d2_d3 +; CHECK-GI-NEXT: st1.1d { v0, v1, v2, v3 }, [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st1x4.v1f64.p0(<1 x double> %B, <1 x double> %C, <1 x double> %D, <1 x double> %E, ptr %A) %tmp = getelementptr double, ptr %A, i64 %inc ret ptr %tmp @@ -11634,42 +11013,42 @@ define ptr @test_v1f64_post_reg_st1x4(ptr %A, ptr %ptr, <1 x double> %B, <1 x do declare void @llvm.aarch64.neon.st1x4.v1f64.p0(<1 x double>, <1 x double>, <1 x double>, <1 x double>, ptr) define ptr @test_v16i8_post_imm_st2lane(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8> %C) nounwind { -; SDAG-LABEL: test_v16i8_post_imm_st2lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: st2.b { v0, v1 }[0], [x0], #2 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v16i8_post_imm_st2lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: st2.b { v0, v1 }[0], [x0], #2 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v16i8_post_imm_st2lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: add x0, x0, #2 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: st2.b { v0, v1 }[0], [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v16i8_post_imm_st2lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: add x0, x0, #2 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: st2.b { v0, v1 }[0], [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st2lane.v16i8.p0(<16 x i8> %B, <16 x i8> %C, i64 0, ptr %A) %tmp = getelementptr i8, ptr %A, i32 2 ret ptr %tmp } define ptr @test_v16i8_post_reg_st2lane(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8> %C, i64 %inc) nounwind { -; SDAG-LABEL: test_v16i8_post_reg_st2lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: st2.b { v0, v1 }[0], [x0], x2 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v16i8_post_reg_st2lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: st2.b { v0, v1 }[0], [x0], x2 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v16i8_post_reg_st2lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: add x0, x0, x2 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: st2.b { v0, v1 }[0], [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v16i8_post_reg_st2lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: add x0, x0, x2 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: st2.b { v0, v1 }[0], [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st2lane.v16i8.p0(<16 x i8> %B, <16 x i8> %C, i64 0, ptr %A) %tmp = getelementptr i8, ptr %A, i64 %inc ret ptr %tmp @@ -11679,42 +11058,42 @@ declare void @llvm.aarch64.neon.st2lane.v16i8.p0(<16 x i8>, <16 x i8>, i64, ptr) define ptr @test_v8i8_post_imm_st2lane(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %C) nounwind { -; SDAG-LABEL: test_v8i8_post_imm_st2lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: st2.b { v0, v1 }[0], [x0], #2 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i8_post_imm_st2lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: st2.b { v0, v1 }[0], [x0], #2 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i8_post_imm_st2lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: add x0, x0, #2 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: st2.b { v0, v1 }[0], [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i8_post_imm_st2lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: add x0, x0, #2 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: st2.b { v0, v1 }[0], [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st2lane.v8i8.p0(<8 x i8> %B, <8 x i8> %C, i64 0, ptr %A) %tmp = getelementptr i8, ptr %A, i32 2 ret ptr %tmp } define ptr @test_v8i8_post_reg_st2lane(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %C, i64 %inc) nounwind { -; SDAG-LABEL: test_v8i8_post_reg_st2lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: st2.b { v0, v1 }[0], [x0], x2 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i8_post_reg_st2lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: st2.b { v0, v1 }[0], [x0], x2 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i8_post_reg_st2lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: add x0, x0, x2 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: st2.b { v0, v1 }[0], [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i8_post_reg_st2lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: add x0, x0, x2 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: st2.b { v0, v1 }[0], [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st2lane.v8i8.p0(<8 x i8> %B, <8 x i8> %C, i64 0, ptr %A) %tmp = getelementptr i8, ptr %A, i64 %inc ret ptr %tmp @@ -11724,43 +11103,43 @@ declare void @llvm.aarch64.neon.st2lane.v8i8.p0(<8 x i8>, <8 x i8>, i64, ptr) define ptr @test_v8i16_post_imm_st2lane(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16> %C) nounwind { -; SDAG-LABEL: test_v8i16_post_imm_st2lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: st2.h { v0, v1 }[0], [x0], #4 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i16_post_imm_st2lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: st2.h { v0, v1 }[0], [x0], #4 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i16_post_imm_st2lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: add x0, x0, #4 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: st2.h { v0, v1 }[0], [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i16_post_imm_st2lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: add x0, x0, #4 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: st2.h { v0, v1 }[0], [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st2lane.v8i16.p0(<8 x i16> %B, <8 x i16> %C, i64 0, ptr %A) %tmp = getelementptr i16, ptr %A, i32 2 ret ptr %tmp } define ptr @test_v8i16_post_reg_st2lane(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16> %C, i64 %inc) nounwind { -; SDAG-LABEL: test_v8i16_post_reg_st2lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #1 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: st2.h { v0, v1 }[0], [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i16_post_reg_st2lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #1 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: st2.h { v0, v1 }[0], [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i16_post_reg_st2lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #1 -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: st2.h { v0, v1 }[0], [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i16_post_reg_st2lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #1 +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: st2.h { v0, v1 }[0], [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st2lane.v8i16.p0(<8 x i16> %B, <8 x i16> %C, i64 0, ptr %A) %tmp = getelementptr i16, ptr %A, i64 %inc ret ptr %tmp @@ -11770,43 +11149,43 @@ declare void @llvm.aarch64.neon.st2lane.v8i16.p0(<8 x i16>, <8 x i16>, i64, ptr) define ptr @test_v4i16_post_imm_st2lane(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16> %C) nounwind { -; SDAG-LABEL: test_v4i16_post_imm_st2lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: st2.h { v0, v1 }[0], [x0], #4 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i16_post_imm_st2lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: st2.h { v0, v1 }[0], [x0], #4 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i16_post_imm_st2lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: add x0, x0, #4 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: st2.h { v0, v1 }[0], [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i16_post_imm_st2lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: add x0, x0, #4 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: st2.h { v0, v1 }[0], [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st2lane.v4i16.p0(<4 x i16> %B, <4 x i16> %C, i64 0, ptr %A) %tmp = getelementptr i16, ptr %A, i32 2 ret ptr %tmp } define ptr @test_v4i16_post_reg_st2lane(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16> %C, i64 %inc) nounwind { -; SDAG-LABEL: test_v4i16_post_reg_st2lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #1 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: st2.h { v0, v1 }[0], [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i16_post_reg_st2lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #1 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: st2.h { v0, v1 }[0], [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i16_post_reg_st2lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #1 -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: st2.h { v0, v1 }[0], [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i16_post_reg_st2lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #1 +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: st2.h { v0, v1 }[0], [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st2lane.v4i16.p0(<4 x i16> %B, <4 x i16> %C, i64 0, ptr %A) %tmp = getelementptr i16, ptr %A, i64 %inc ret ptr %tmp @@ -11816,43 +11195,43 @@ declare void @llvm.aarch64.neon.st2lane.v4i16.p0(<4 x i16>, <4 x i16>, i64, ptr) define ptr @test_v4i32_post_imm_st2lane(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32> %C) nounwind { -; SDAG-LABEL: test_v4i32_post_imm_st2lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: st2.s { v0, v1 }[0], [x0], #8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i32_post_imm_st2lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: st2.s { v0, v1 }[0], [x0], #8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i32_post_imm_st2lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: add x0, x0, #8 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: st2.s { v0, v1 }[0], [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i32_post_imm_st2lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: add x0, x0, #8 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: st2.s { v0, v1 }[0], [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st2lane.v4i32.p0(<4 x i32> %B, <4 x i32> %C, i64 0, ptr %A) %tmp = getelementptr i32, ptr %A, i32 2 ret ptr %tmp } define ptr @test_v4i32_post_reg_st2lane(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32> %C, i64 %inc) nounwind { -; SDAG-LABEL: test_v4i32_post_reg_st2lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: st2.s { v0, v1 }[0], [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i32_post_reg_st2lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: st2.s { v0, v1 }[0], [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i32_post_reg_st2lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: st2.s { v0, v1 }[0], [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i32_post_reg_st2lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #2 +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: st2.s { v0, v1 }[0], [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st2lane.v4i32.p0(<4 x i32> %B, <4 x i32> %C, i64 0, ptr %A) %tmp = getelementptr i32, ptr %A, i64 %inc ret ptr %tmp @@ -11862,43 +11241,43 @@ declare void @llvm.aarch64.neon.st2lane.v4i32.p0(<4 x i32>, <4 x i32>, i64, ptr) define ptr @test_v2i32_post_imm_st2lane(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32> %C) nounwind { -; SDAG-LABEL: test_v2i32_post_imm_st2lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: st2.s { v0, v1 }[0], [x0], #8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i32_post_imm_st2lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: st2.s { v0, v1 }[0], [x0], #8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i32_post_imm_st2lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: add x0, x0, #8 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: st2.s { v0, v1 }[0], [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i32_post_imm_st2lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: add x0, x0, #8 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: st2.s { v0, v1 }[0], [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st2lane.v2i32.p0(<2 x i32> %B, <2 x i32> %C, i64 0, ptr %A) %tmp = getelementptr i32, ptr %A, i32 2 ret ptr %tmp } define ptr @test_v2i32_post_reg_st2lane(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32> %C, i64 %inc) nounwind { -; SDAG-LABEL: test_v2i32_post_reg_st2lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: st2.s { v0, v1 }[0], [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i32_post_reg_st2lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: st2.s { v0, v1 }[0], [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i32_post_reg_st2lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: st2.s { v0, v1 }[0], [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i32_post_reg_st2lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #2 +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: st2.s { v0, v1 }[0], [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st2lane.v2i32.p0(<2 x i32> %B, <2 x i32> %C, i64 0, ptr %A) %tmp = getelementptr i32, ptr %A, i64 %inc ret ptr %tmp @@ -11908,43 +11287,43 @@ declare void @llvm.aarch64.neon.st2lane.v2i32.p0(<2 x i32>, <2 x i32>, i64, ptr) define ptr @test_v2i64_post_imm_st2lane(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64> %C) nounwind { -; SDAG-LABEL: test_v2i64_post_imm_st2lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: st2.d { v0, v1 }[0], [x0], #16 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i64_post_imm_st2lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: st2.d { v0, v1 }[0], [x0], #16 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i64_post_imm_st2lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: add x0, x0, #16 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: st2.d { v0, v1 }[0], [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i64_post_imm_st2lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: add x0, x0, #16 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: st2.d { v0, v1 }[0], [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st2lane.v2i64.p0(<2 x i64> %B, <2 x i64> %C, i64 0, ptr %A) %tmp = getelementptr i64, ptr %A, i64 2 ret ptr %tmp } define ptr @test_v2i64_post_reg_st2lane(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64> %C, i64 %inc) nounwind { -; SDAG-LABEL: test_v2i64_post_reg_st2lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: st2.d { v0, v1 }[0], [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i64_post_reg_st2lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: st2.d { v0, v1 }[0], [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i64_post_reg_st2lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: st2.d { v0, v1 }[0], [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i64_post_reg_st2lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #3 +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: st2.d { v0, v1 }[0], [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st2lane.v2i64.p0(<2 x i64> %B, <2 x i64> %C, i64 0, ptr %A) %tmp = getelementptr i64, ptr %A, i64 %inc ret ptr %tmp @@ -11954,43 +11333,43 @@ declare void @llvm.aarch64.neon.st2lane.v2i64.p0(<2 x i64>, <2 x i64>, i64, ptr) define ptr @test_v1i64_post_imm_st2lane(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64> %C) nounwind { -; SDAG-LABEL: test_v1i64_post_imm_st2lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: st2.d { v0, v1 }[0], [x0], #16 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v1i64_post_imm_st2lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: st2.d { v0, v1 }[0], [x0], #16 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v1i64_post_imm_st2lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: add x0, x0, #16 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: st2.d { v0, v1 }[0], [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v1i64_post_imm_st2lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: add x0, x0, #16 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: st2.d { v0, v1 }[0], [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st2lane.v1i64.p0(<1 x i64> %B, <1 x i64> %C, i64 0, ptr %A) %tmp = getelementptr i64, ptr %A, i64 2 ret ptr %tmp } define ptr @test_v1i64_post_reg_st2lane(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64> %C, i64 %inc) nounwind { -; SDAG-LABEL: test_v1i64_post_reg_st2lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: st2.d { v0, v1 }[0], [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v1i64_post_reg_st2lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: st2.d { v0, v1 }[0], [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v1i64_post_reg_st2lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: st2.d { v0, v1 }[0], [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v1i64_post_reg_st2lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #3 +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: st2.d { v0, v1 }[0], [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st2lane.v1i64.p0(<1 x i64> %B, <1 x i64> %C, i64 0, ptr %A) %tmp = getelementptr i64, ptr %A, i64 %inc ret ptr %tmp @@ -12000,43 +11379,43 @@ declare void @llvm.aarch64.neon.st2lane.v1i64.p0(<1 x i64>, <1 x i64>, i64, ptr) define ptr @test_v4f32_post_imm_st2lane(ptr %A, ptr %ptr, <4 x float> %B, <4 x float> %C) nounwind { -; SDAG-LABEL: test_v4f32_post_imm_st2lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: st2.s { v0, v1 }[0], [x0], #8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4f32_post_imm_st2lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: st2.s { v0, v1 }[0], [x0], #8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4f32_post_imm_st2lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: add x0, x0, #8 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: st2.s { v0, v1 }[0], [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4f32_post_imm_st2lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: add x0, x0, #8 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: st2.s { v0, v1 }[0], [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st2lane.v4f32.p0(<4 x float> %B, <4 x float> %C, i64 0, ptr %A) %tmp = getelementptr float, ptr %A, i32 2 ret ptr %tmp } define ptr @test_v4f32_post_reg_st2lane(ptr %A, ptr %ptr, <4 x float> %B, <4 x float> %C, i64 %inc) nounwind { -; SDAG-LABEL: test_v4f32_post_reg_st2lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: st2.s { v0, v1 }[0], [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4f32_post_reg_st2lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: st2.s { v0, v1 }[0], [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4f32_post_reg_st2lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: st2.s { v0, v1 }[0], [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4f32_post_reg_st2lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #2 +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: st2.s { v0, v1 }[0], [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st2lane.v4f32.p0(<4 x float> %B, <4 x float> %C, i64 0, ptr %A) %tmp = getelementptr float, ptr %A, i64 %inc ret ptr %tmp @@ -12046,43 +11425,43 @@ declare void @llvm.aarch64.neon.st2lane.v4f32.p0(<4 x float>, <4 x float>, i64, define ptr @test_v2f32_post_imm_st2lane(ptr %A, ptr %ptr, <2 x float> %B, <2 x float> %C) nounwind { -; SDAG-LABEL: test_v2f32_post_imm_st2lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: st2.s { v0, v1 }[0], [x0], #8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f32_post_imm_st2lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: st2.s { v0, v1 }[0], [x0], #8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f32_post_imm_st2lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: add x0, x0, #8 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: st2.s { v0, v1 }[0], [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f32_post_imm_st2lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: add x0, x0, #8 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: st2.s { v0, v1 }[0], [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st2lane.v2f32.p0(<2 x float> %B, <2 x float> %C, i64 0, ptr %A) %tmp = getelementptr float, ptr %A, i32 2 ret ptr %tmp } define ptr @test_v2f32_post_reg_st2lane(ptr %A, ptr %ptr, <2 x float> %B, <2 x float> %C, i64 %inc) nounwind { -; SDAG-LABEL: test_v2f32_post_reg_st2lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: st2.s { v0, v1 }[0], [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f32_post_reg_st2lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: st2.s { v0, v1 }[0], [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f32_post_reg_st2lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: st2.s { v0, v1 }[0], [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f32_post_reg_st2lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #2 +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: st2.s { v0, v1 }[0], [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st2lane.v2f32.p0(<2 x float> %B, <2 x float> %C, i64 0, ptr %A) %tmp = getelementptr float, ptr %A, i64 %inc ret ptr %tmp @@ -12092,43 +11471,43 @@ declare void @llvm.aarch64.neon.st2lane.v2f32.p0(<2 x float>, <2 x float>, i64, define ptr @test_v2f64_post_imm_st2lane(ptr %A, ptr %ptr, <2 x double> %B, <2 x double> %C) nounwind { -; SDAG-LABEL: test_v2f64_post_imm_st2lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: st2.d { v0, v1 }[0], [x0], #16 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f64_post_imm_st2lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: st2.d { v0, v1 }[0], [x0], #16 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f64_post_imm_st2lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: add x0, x0, #16 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: st2.d { v0, v1 }[0], [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f64_post_imm_st2lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: add x0, x0, #16 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: st2.d { v0, v1 }[0], [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st2lane.v2f64.p0(<2 x double> %B, <2 x double> %C, i64 0, ptr %A) %tmp = getelementptr double, ptr %A, i64 2 ret ptr %tmp } define ptr @test_v2f64_post_reg_st2lane(ptr %A, ptr %ptr, <2 x double> %B, <2 x double> %C, i64 %inc) nounwind { -; SDAG-LABEL: test_v2f64_post_reg_st2lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: st2.d { v0, v1 }[0], [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f64_post_reg_st2lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: st2.d { v0, v1 }[0], [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f64_post_reg_st2lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: st2.d { v0, v1 }[0], [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f64_post_reg_st2lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #3 +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: st2.d { v0, v1 }[0], [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st2lane.v2f64.p0(<2 x double> %B, <2 x double> %C, i64 0, ptr %A) %tmp = getelementptr double, ptr %A, i64 %inc ret ptr %tmp @@ -12138,43 +11517,43 @@ declare void @llvm.aarch64.neon.st2lane.v2f64.p0(<2 x double>, <2 x double>, i64 define ptr @test_v1f64_post_imm_st2lane(ptr %A, ptr %ptr, <1 x double> %B, <1 x double> %C) nounwind { -; SDAG-LABEL: test_v1f64_post_imm_st2lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: st2.d { v0, v1 }[0], [x0], #16 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v1f64_post_imm_st2lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: st2.d { v0, v1 }[0], [x0], #16 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v1f64_post_imm_st2lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: add x0, x0, #16 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: st2.d { v0, v1 }[0], [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v1f64_post_imm_st2lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: add x0, x0, #16 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: st2.d { v0, v1 }[0], [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st2lane.v1f64.p0(<1 x double> %B, <1 x double> %C, i64 0, ptr %A) %tmp = getelementptr double, ptr %A, i64 2 ret ptr %tmp } define ptr @test_v1f64_post_reg_st2lane(ptr %A, ptr %ptr, <1 x double> %B, <1 x double> %C, i64 %inc) nounwind { -; SDAG-LABEL: test_v1f64_post_reg_st2lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 -; SDAG-NEXT: st2.d { v0, v1 }[0], [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v1f64_post_reg_st2lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 +; CHECK-SD-NEXT: st2.d { v0, v1 }[0], [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v1f64_post_reg_st2lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 -; CHECK-GISEL-NEXT: st2.d { v0, v1 }[0], [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v1f64_post_reg_st2lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #3 +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: st2.d { v0, v1 }[0], [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st2lane.v1f64.p0(<1 x double> %B, <1 x double> %C, i64 0, ptr %A) %tmp = getelementptr double, ptr %A, i64 %inc ret ptr %tmp @@ -12184,46 +11563,46 @@ declare void @llvm.aarch64.neon.st2lane.v1f64.p0(<1 x double>, <1 x double>, i64 define ptr @test_v16i8_post_imm_st3lane(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8> %C, <16 x i8> %D) nounwind { -; SDAG-LABEL: test_v16i8_post_imm_st3lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: st3.b { v0, v1, v2 }[0], [x0], #3 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v16i8_post_imm_st3lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: st3.b { v0, v1, v2 }[0], [x0], #3 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v16i8_post_imm_st3lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, #3 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: st3.b { v0, v1, v2 }[0], [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v16i8_post_imm_st3lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, #3 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: st3.b { v0, v1, v2 }[0], [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st3lane.v16i8.p0(<16 x i8> %B, <16 x i8> %C, <16 x i8> %D, i64 0, ptr %A) %tmp = getelementptr i8, ptr %A, i32 3 ret ptr %tmp } define ptr @test_v16i8_post_reg_st3lane(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8> %C, <16 x i8> %D, i64 %inc) nounwind { -; SDAG-LABEL: test_v16i8_post_reg_st3lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: st3.b { v0, v1, v2 }[0], [x0], x2 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v16i8_post_reg_st3lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: st3.b { v0, v1, v2 }[0], [x0], x2 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v16i8_post_reg_st3lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, x2 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: st3.b { v0, v1, v2 }[0], [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v16i8_post_reg_st3lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, x2 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: st3.b { v0, v1, v2 }[0], [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st3lane.v16i8.p0(<16 x i8> %B, <16 x i8> %C, <16 x i8> %D, i64 0, ptr %A) %tmp = getelementptr i8, ptr %A, i64 %inc ret ptr %tmp @@ -12233,46 +11612,46 @@ declare void @llvm.aarch64.neon.st3lane.v16i8.p0(<16 x i8>, <16 x i8>, <16 x i8> define ptr @test_v8i8_post_imm_st3lane(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %C, <8 x i8> %D) nounwind { -; SDAG-LABEL: test_v8i8_post_imm_st3lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: st3.b { v0, v1, v2 }[0], [x0], #3 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i8_post_imm_st3lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: st3.b { v0, v1, v2 }[0], [x0], #3 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i8_post_imm_st3lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, #3 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: st3.b { v0, v1, v2 }[0], [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i8_post_imm_st3lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, #3 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: st3.b { v0, v1, v2 }[0], [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st3lane.v8i8.p0(<8 x i8> %B, <8 x i8> %C, <8 x i8> %D, i64 0, ptr %A) %tmp = getelementptr i8, ptr %A, i32 3 ret ptr %tmp } define ptr @test_v8i8_post_reg_st3lane(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %C, <8 x i8> %D, i64 %inc) nounwind { -; SDAG-LABEL: test_v8i8_post_reg_st3lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: st3.b { v0, v1, v2 }[0], [x0], x2 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i8_post_reg_st3lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: st3.b { v0, v1, v2 }[0], [x0], x2 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i8_post_reg_st3lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, x2 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: st3.b { v0, v1, v2 }[0], [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i8_post_reg_st3lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, x2 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: st3.b { v0, v1, v2 }[0], [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st3lane.v8i8.p0(<8 x i8> %B, <8 x i8> %C, <8 x i8> %D, i64 0, ptr %A) %tmp = getelementptr i8, ptr %A, i64 %inc ret ptr %tmp @@ -12282,47 +11661,47 @@ declare void @llvm.aarch64.neon.st3lane.v8i8.p0(<8 x i8>, <8 x i8>, <8 x i8>, i6 define ptr @test_v8i16_post_imm_st3lane(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16> %C, <8 x i16> %D) nounwind { -; SDAG-LABEL: test_v8i16_post_imm_st3lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: st3.h { v0, v1, v2 }[0], [x0], #6 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i16_post_imm_st3lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: st3.h { v0, v1, v2 }[0], [x0], #6 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i16_post_imm_st3lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, #6 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: st3.h { v0, v1, v2 }[0], [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i16_post_imm_st3lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, #6 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: st3.h { v0, v1, v2 }[0], [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st3lane.v8i16.p0(<8 x i16> %B, <8 x i16> %C, <8 x i16> %D, i64 0, ptr %A) %tmp = getelementptr i16, ptr %A, i32 3 ret ptr %tmp } define ptr @test_v8i16_post_reg_st3lane(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16> %C, <8 x i16> %D, i64 %inc) nounwind { -; SDAG-LABEL: test_v8i16_post_reg_st3lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: lsl x8, x2, #1 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: st3.h { v0, v1, v2 }[0], [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i16_post_reg_st3lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: lsl x8, x2, #1 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: st3.h { v0, v1, v2 }[0], [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i16_post_reg_st3lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #1 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: st3.h { v0, v1, v2 }[0], [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i16_post_reg_st3lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #1 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: st3.h { v0, v1, v2 }[0], [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st3lane.v8i16.p0(<8 x i16> %B, <8 x i16> %C, <8 x i16> %D, i64 0, ptr %A) %tmp = getelementptr i16, ptr %A, i64 %inc ret ptr %tmp @@ -12332,47 +11711,47 @@ declare void @llvm.aarch64.neon.st3lane.v8i16.p0(<8 x i16>, <8 x i16>, <8 x i16> define ptr @test_v4i16_post_imm_st3lane(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16> %C, <4 x i16> %D) nounwind { -; SDAG-LABEL: test_v4i16_post_imm_st3lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: st3.h { v0, v1, v2 }[0], [x0], #6 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i16_post_imm_st3lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: st3.h { v0, v1, v2 }[0], [x0], #6 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i16_post_imm_st3lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, #6 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: st3.h { v0, v1, v2 }[0], [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i16_post_imm_st3lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, #6 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: st3.h { v0, v1, v2 }[0], [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st3lane.v4i16.p0(<4 x i16> %B, <4 x i16> %C, <4 x i16> %D, i64 0, ptr %A) %tmp = getelementptr i16, ptr %A, i32 3 ret ptr %tmp } define ptr @test_v4i16_post_reg_st3lane(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16> %C, <4 x i16> %D, i64 %inc) nounwind { -; SDAG-LABEL: test_v4i16_post_reg_st3lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: lsl x8, x2, #1 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: st3.h { v0, v1, v2 }[0], [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i16_post_reg_st3lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: lsl x8, x2, #1 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: st3.h { v0, v1, v2 }[0], [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i16_post_reg_st3lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #1 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: st3.h { v0, v1, v2 }[0], [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i16_post_reg_st3lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #1 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: st3.h { v0, v1, v2 }[0], [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st3lane.v4i16.p0(<4 x i16> %B, <4 x i16> %C, <4 x i16> %D, i64 0, ptr %A) %tmp = getelementptr i16, ptr %A, i64 %inc ret ptr %tmp @@ -12382,47 +11761,47 @@ declare void @llvm.aarch64.neon.st3lane.v4i16.p0(<4 x i16>, <4 x i16>, <4 x i16> define ptr @test_v4i32_post_imm_st3lane(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32> %C, <4 x i32> %D) nounwind { -; SDAG-LABEL: test_v4i32_post_imm_st3lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: st3.s { v0, v1, v2 }[0], [x0], #12 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i32_post_imm_st3lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: st3.s { v0, v1, v2 }[0], [x0], #12 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i32_post_imm_st3lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, #12 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: st3.s { v0, v1, v2 }[0], [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i32_post_imm_st3lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, #12 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: st3.s { v0, v1, v2 }[0], [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st3lane.v4i32.p0(<4 x i32> %B, <4 x i32> %C, <4 x i32> %D, i64 0, ptr %A) %tmp = getelementptr i32, ptr %A, i32 3 ret ptr %tmp } define ptr @test_v4i32_post_reg_st3lane(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32> %C, <4 x i32> %D, i64 %inc) nounwind { -; SDAG-LABEL: test_v4i32_post_reg_st3lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: st3.s { v0, v1, v2 }[0], [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i32_post_reg_st3lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: st3.s { v0, v1, v2 }[0], [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i32_post_reg_st3lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: st3.s { v0, v1, v2 }[0], [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i32_post_reg_st3lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #2 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: st3.s { v0, v1, v2 }[0], [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st3lane.v4i32.p0(<4 x i32> %B, <4 x i32> %C, <4 x i32> %D, i64 0, ptr %A) %tmp = getelementptr i32, ptr %A, i64 %inc ret ptr %tmp @@ -12432,47 +11811,47 @@ declare void @llvm.aarch64.neon.st3lane.v4i32.p0(<4 x i32>, <4 x i32>, <4 x i32> define ptr @test_v2i32_post_imm_st3lane(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32> %C, <2 x i32> %D) nounwind { -; SDAG-LABEL: test_v2i32_post_imm_st3lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: st3.s { v0, v1, v2 }[0], [x0], #12 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i32_post_imm_st3lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: st3.s { v0, v1, v2 }[0], [x0], #12 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i32_post_imm_st3lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, #12 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: st3.s { v0, v1, v2 }[0], [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i32_post_imm_st3lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, #12 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: st3.s { v0, v1, v2 }[0], [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st3lane.v2i32.p0(<2 x i32> %B, <2 x i32> %C, <2 x i32> %D, i64 0, ptr %A) %tmp = getelementptr i32, ptr %A, i32 3 ret ptr %tmp } define ptr @test_v2i32_post_reg_st3lane(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32> %C, <2 x i32> %D, i64 %inc) nounwind { -; SDAG-LABEL: test_v2i32_post_reg_st3lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: st3.s { v0, v1, v2 }[0], [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i32_post_reg_st3lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: st3.s { v0, v1, v2 }[0], [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i32_post_reg_st3lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: st3.s { v0, v1, v2 }[0], [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i32_post_reg_st3lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #2 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: st3.s { v0, v1, v2 }[0], [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st3lane.v2i32.p0(<2 x i32> %B, <2 x i32> %C, <2 x i32> %D, i64 0, ptr %A) %tmp = getelementptr i32, ptr %A, i64 %inc ret ptr %tmp @@ -12482,47 +11861,47 @@ declare void @llvm.aarch64.neon.st3lane.v2i32.p0(<2 x i32>, <2 x i32>, <2 x i32> define ptr @test_v2i64_post_imm_st3lane(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64> %C, <2 x i64> %D) nounwind { -; SDAG-LABEL: test_v2i64_post_imm_st3lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: st3.d { v0, v1, v2 }[0], [x0], #24 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i64_post_imm_st3lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: st3.d { v0, v1, v2 }[0], [x0], #24 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i64_post_imm_st3lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, #24 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: st3.d { v0, v1, v2 }[0], [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i64_post_imm_st3lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, #24 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: st3.d { v0, v1, v2 }[0], [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st3lane.v2i64.p0(<2 x i64> %B, <2 x i64> %C, <2 x i64> %D, i64 0, ptr %A) %tmp = getelementptr i64, ptr %A, i64 3 ret ptr %tmp } define ptr @test_v2i64_post_reg_st3lane(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64> %C, <2 x i64> %D, i64 %inc) nounwind { -; SDAG-LABEL: test_v2i64_post_reg_st3lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: st3.d { v0, v1, v2 }[0], [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i64_post_reg_st3lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: st3.d { v0, v1, v2 }[0], [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i64_post_reg_st3lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: st3.d { v0, v1, v2 }[0], [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i64_post_reg_st3lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #3 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: st3.d { v0, v1, v2 }[0], [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st3lane.v2i64.p0(<2 x i64> %B, <2 x i64> %C, <2 x i64> %D, i64 0, ptr %A) %tmp = getelementptr i64, ptr %A, i64 %inc ret ptr %tmp @@ -12532,47 +11911,47 @@ declare void @llvm.aarch64.neon.st3lane.v2i64.p0(<2 x i64>, <2 x i64>, <2 x i64> define ptr @test_v1i64_post_imm_st3lane(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64> %C, <1 x i64> %D) nounwind { -; SDAG-LABEL: test_v1i64_post_imm_st3lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: st3.d { v0, v1, v2 }[0], [x0], #24 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v1i64_post_imm_st3lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: st3.d { v0, v1, v2 }[0], [x0], #24 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v1i64_post_imm_st3lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, #24 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: st3.d { v0, v1, v2 }[0], [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v1i64_post_imm_st3lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, #24 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: st3.d { v0, v1, v2 }[0], [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st3lane.v1i64.p0(<1 x i64> %B, <1 x i64> %C, <1 x i64> %D, i64 0, ptr %A) %tmp = getelementptr i64, ptr %A, i64 3 ret ptr %tmp } define ptr @test_v1i64_post_reg_st3lane(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64> %C, <1 x i64> %D, i64 %inc) nounwind { -; SDAG-LABEL: test_v1i64_post_reg_st3lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: st3.d { v0, v1, v2 }[0], [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v1i64_post_reg_st3lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: st3.d { v0, v1, v2 }[0], [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v1i64_post_reg_st3lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: st3.d { v0, v1, v2 }[0], [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v1i64_post_reg_st3lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #3 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: st3.d { v0, v1, v2 }[0], [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st3lane.v1i64.p0(<1 x i64> %B, <1 x i64> %C, <1 x i64> %D, i64 0, ptr %A) %tmp = getelementptr i64, ptr %A, i64 %inc ret ptr %tmp @@ -12582,47 +11961,47 @@ declare void @llvm.aarch64.neon.st3lane.v1i64.p0(<1 x i64>, <1 x i64>, <1 x i64> define ptr @test_v4f32_post_imm_st3lane(ptr %A, ptr %ptr, <4 x float> %B, <4 x float> %C, <4 x float> %D) nounwind { -; SDAG-LABEL: test_v4f32_post_imm_st3lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: st3.s { v0, v1, v2 }[0], [x0], #12 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4f32_post_imm_st3lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: st3.s { v0, v1, v2 }[0], [x0], #12 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4f32_post_imm_st3lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, #12 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: st3.s { v0, v1, v2 }[0], [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4f32_post_imm_st3lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, #12 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: st3.s { v0, v1, v2 }[0], [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st3lane.v4f32.p0(<4 x float> %B, <4 x float> %C, <4 x float> %D, i64 0, ptr %A) %tmp = getelementptr float, ptr %A, i32 3 ret ptr %tmp } define ptr @test_v4f32_post_reg_st3lane(ptr %A, ptr %ptr, <4 x float> %B, <4 x float> %C, <4 x float> %D, i64 %inc) nounwind { -; SDAG-LABEL: test_v4f32_post_reg_st3lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: st3.s { v0, v1, v2 }[0], [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4f32_post_reg_st3lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: st3.s { v0, v1, v2 }[0], [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4f32_post_reg_st3lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: st3.s { v0, v1, v2 }[0], [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4f32_post_reg_st3lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #2 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: st3.s { v0, v1, v2 }[0], [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st3lane.v4f32.p0(<4 x float> %B, <4 x float> %C, <4 x float> %D, i64 0, ptr %A) %tmp = getelementptr float, ptr %A, i64 %inc ret ptr %tmp @@ -12632,47 +12011,47 @@ declare void @llvm.aarch64.neon.st3lane.v4f32.p0(<4 x float>, <4 x float>, <4 x define ptr @test_v2f32_post_imm_st3lane(ptr %A, ptr %ptr, <2 x float> %B, <2 x float> %C, <2 x float> %D) nounwind { -; SDAG-LABEL: test_v2f32_post_imm_st3lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: st3.s { v0, v1, v2 }[0], [x0], #12 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f32_post_imm_st3lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: st3.s { v0, v1, v2 }[0], [x0], #12 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f32_post_imm_st3lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, #12 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: st3.s { v0, v1, v2 }[0], [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f32_post_imm_st3lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, #12 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: st3.s { v0, v1, v2 }[0], [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st3lane.v2f32.p0(<2 x float> %B, <2 x float> %C, <2 x float> %D, i64 0, ptr %A) %tmp = getelementptr float, ptr %A, i32 3 ret ptr %tmp } define ptr @test_v2f32_post_reg_st3lane(ptr %A, ptr %ptr, <2 x float> %B, <2 x float> %C, <2 x float> %D, i64 %inc) nounwind { -; SDAG-LABEL: test_v2f32_post_reg_st3lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: st3.s { v0, v1, v2 }[0], [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f32_post_reg_st3lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: st3.s { v0, v1, v2 }[0], [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f32_post_reg_st3lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: st3.s { v0, v1, v2 }[0], [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f32_post_reg_st3lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #2 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: st3.s { v0, v1, v2 }[0], [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st3lane.v2f32.p0(<2 x float> %B, <2 x float> %C, <2 x float> %D, i64 0, ptr %A) %tmp = getelementptr float, ptr %A, i64 %inc ret ptr %tmp @@ -12682,47 +12061,47 @@ declare void @llvm.aarch64.neon.st3lane.v2f32.p0(<2 x float>, <2 x float>, <2 x define ptr @test_v2f64_post_imm_st3lane(ptr %A, ptr %ptr, <2 x double> %B, <2 x double> %C, <2 x double> %D) nounwind { -; SDAG-LABEL: test_v2f64_post_imm_st3lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: st3.d { v0, v1, v2 }[0], [x0], #24 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f64_post_imm_st3lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: st3.d { v0, v1, v2 }[0], [x0], #24 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f64_post_imm_st3lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, #24 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: st3.d { v0, v1, v2 }[0], [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f64_post_imm_st3lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, #24 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: st3.d { v0, v1, v2 }[0], [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st3lane.v2f64.p0(<2 x double> %B, <2 x double> %C, <2 x double> %D, i64 0, ptr %A) %tmp = getelementptr double, ptr %A, i64 3 ret ptr %tmp } define ptr @test_v2f64_post_reg_st3lane(ptr %A, ptr %ptr, <2 x double> %B, <2 x double> %C, <2 x double> %D, i64 %inc) nounwind { -; SDAG-LABEL: test_v2f64_post_reg_st3lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: st3.d { v0, v1, v2 }[0], [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f64_post_reg_st3lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: st3.d { v0, v1, v2 }[0], [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f64_post_reg_st3lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: st3.d { v0, v1, v2 }[0], [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f64_post_reg_st3lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #3 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: st3.d { v0, v1, v2 }[0], [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st3lane.v2f64.p0(<2 x double> %B, <2 x double> %C, <2 x double> %D, i64 0, ptr %A) %tmp = getelementptr double, ptr %A, i64 %inc ret ptr %tmp @@ -12732,47 +12111,47 @@ declare void @llvm.aarch64.neon.st3lane.v2f64.p0(<2 x double>, <2 x double>, <2 define ptr @test_v1f64_post_imm_st3lane(ptr %A, ptr %ptr, <1 x double> %B, <1 x double> %C, <1 x double> %D) nounwind { -; SDAG-LABEL: test_v1f64_post_imm_st3lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: st3.d { v0, v1, v2 }[0], [x0], #24 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v1f64_post_imm_st3lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: st3.d { v0, v1, v2 }[0], [x0], #24 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v1f64_post_imm_st3lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, #24 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: st3.d { v0, v1, v2 }[0], [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v1f64_post_imm_st3lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, #24 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: st3.d { v0, v1, v2 }[0], [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st3lane.v1f64.p0(<1 x double> %B, <1 x double> %C, <1 x double> %D, i64 0, ptr %A) %tmp = getelementptr double, ptr %A, i64 3 ret ptr %tmp } define ptr @test_v1f64_post_reg_st3lane(ptr %A, ptr %ptr, <1 x double> %B, <1 x double> %C, <1 x double> %D, i64 %inc) nounwind { -; SDAG-LABEL: test_v1f64_post_reg_st3lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 -; SDAG-NEXT: st3.d { v0, v1, v2 }[0], [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v1f64_post_reg_st3lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-SD-NEXT: st3.d { v0, v1, v2 }[0], [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v1f64_post_reg_st3lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 -; CHECK-GISEL-NEXT: st3.d { v0, v1, v2 }[0], [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v1f64_post_reg_st3lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #3 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2 def $q0_q1_q2 +; CHECK-GI-NEXT: st3.d { v0, v1, v2 }[0], [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st3lane.v1f64.p0(<1 x double> %B, <1 x double> %C, <1 x double> %D, i64 0, ptr %A) %tmp = getelementptr double, ptr %A, i64 %inc ret ptr %tmp @@ -12782,50 +12161,50 @@ declare void @llvm.aarch64.neon.st3lane.v1f64.p0(<1 x double>, <1 x double>, <1 define ptr @test_v16i8_post_imm_st4lane(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8> %C, <16 x i8> %D, <16 x i8> %E) nounwind { -; SDAG-LABEL: test_v16i8_post_imm_st4lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: st4.b { v0, v1, v2, v3 }[0], [x0], #4 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v16i8_post_imm_st4lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: st4.b { v0, v1, v2, v3 }[0], [x0], #4 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v16i8_post_imm_st4lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, #4 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: st4.b { v0, v1, v2, v3 }[0], [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v16i8_post_imm_st4lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, #4 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: st4.b { v0, v1, v2, v3 }[0], [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st4lane.v16i8.p0(<16 x i8> %B, <16 x i8> %C, <16 x i8> %D, <16 x i8> %E, i64 0, ptr %A) %tmp = getelementptr i8, ptr %A, i32 4 ret ptr %tmp } define ptr @test_v16i8_post_reg_st4lane(ptr %A, ptr %ptr, <16 x i8> %B, <16 x i8> %C, <16 x i8> %D, <16 x i8> %E, i64 %inc) nounwind { -; SDAG-LABEL: test_v16i8_post_reg_st4lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: st4.b { v0, v1, v2, v3 }[0], [x0], x2 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v16i8_post_reg_st4lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: st4.b { v0, v1, v2, v3 }[0], [x0], x2 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v16i8_post_reg_st4lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, x2 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: st4.b { v0, v1, v2, v3 }[0], [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v16i8_post_reg_st4lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, x2 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: st4.b { v0, v1, v2, v3 }[0], [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st4lane.v16i8.p0(<16 x i8> %B, <16 x i8> %C, <16 x i8> %D, <16 x i8> %E, i64 0, ptr %A) %tmp = getelementptr i8, ptr %A, i64 %inc ret ptr %tmp @@ -12835,50 +12214,50 @@ declare void @llvm.aarch64.neon.st4lane.v16i8.p0(<16 x i8>, <16 x i8>, <16 x i8> define ptr @test_v8i8_post_imm_st4lane(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %C, <8 x i8> %D, <8 x i8> %E) nounwind { -; SDAG-LABEL: test_v8i8_post_imm_st4lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: st4.b { v0, v1, v2, v3 }[0], [x0], #4 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i8_post_imm_st4lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: st4.b { v0, v1, v2, v3 }[0], [x0], #4 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i8_post_imm_st4lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, #4 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: st4.b { v0, v1, v2, v3 }[0], [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i8_post_imm_st4lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, #4 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: st4.b { v0, v1, v2, v3 }[0], [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st4lane.v8i8.p0(<8 x i8> %B, <8 x i8> %C, <8 x i8> %D, <8 x i8> %E, i64 0, ptr %A) %tmp = getelementptr i8, ptr %A, i32 4 ret ptr %tmp } define ptr @test_v8i8_post_reg_st4lane(ptr %A, ptr %ptr, <8 x i8> %B, <8 x i8> %C, <8 x i8> %D, <8 x i8> %E, i64 %inc) nounwind { -; SDAG-LABEL: test_v8i8_post_reg_st4lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: st4.b { v0, v1, v2, v3 }[0], [x0], x2 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i8_post_reg_st4lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: st4.b { v0, v1, v2, v3 }[0], [x0], x2 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i8_post_reg_st4lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, x2 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: st4.b { v0, v1, v2, v3 }[0], [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i8_post_reg_st4lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, x2 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: st4.b { v0, v1, v2, v3 }[0], [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st4lane.v8i8.p0(<8 x i8> %B, <8 x i8> %C, <8 x i8> %D, <8 x i8> %E, i64 0, ptr %A) %tmp = getelementptr i8, ptr %A, i64 %inc ret ptr %tmp @@ -12888,51 +12267,51 @@ declare void @llvm.aarch64.neon.st4lane.v8i8.p0(<8 x i8>, <8 x i8>, <8 x i8>, <8 define ptr @test_v8i16_post_imm_st4lane(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16> %C, <8 x i16> %D, <8 x i16> %E) nounwind { -; SDAG-LABEL: test_v8i16_post_imm_st4lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: st4.h { v0, v1, v2, v3 }[0], [x0], #8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i16_post_imm_st4lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: st4.h { v0, v1, v2, v3 }[0], [x0], #8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i16_post_imm_st4lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, #8 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: st4.h { v0, v1, v2, v3 }[0], [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i16_post_imm_st4lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, #8 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: st4.h { v0, v1, v2, v3 }[0], [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st4lane.v8i16.p0(<8 x i16> %B, <8 x i16> %C, <8 x i16> %D, <8 x i16> %E, i64 0, ptr %A) %tmp = getelementptr i16, ptr %A, i32 4 ret ptr %tmp } define ptr @test_v8i16_post_reg_st4lane(ptr %A, ptr %ptr, <8 x i16> %B, <8 x i16> %C, <8 x i16> %D, <8 x i16> %E, i64 %inc) nounwind { -; SDAG-LABEL: test_v8i16_post_reg_st4lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: lsl x8, x2, #1 -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: st4.h { v0, v1, v2, v3 }[0], [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i16_post_reg_st4lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: lsl x8, x2, #1 +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: st4.h { v0, v1, v2, v3 }[0], [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i16_post_reg_st4lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #1 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: st4.h { v0, v1, v2, v3 }[0], [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i16_post_reg_st4lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #1 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: st4.h { v0, v1, v2, v3 }[0], [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st4lane.v8i16.p0(<8 x i16> %B, <8 x i16> %C, <8 x i16> %D, <8 x i16> %E, i64 0, ptr %A) %tmp = getelementptr i16, ptr %A, i64 %inc ret ptr %tmp @@ -12942,51 +12321,51 @@ declare void @llvm.aarch64.neon.st4lane.v8i16.p0(<8 x i16>, <8 x i16>, <8 x i16> define ptr @test_v4i16_post_imm_st4lane(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16> %C, <4 x i16> %D, <4 x i16> %E) nounwind { -; SDAG-LABEL: test_v4i16_post_imm_st4lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: st4.h { v0, v1, v2, v3 }[0], [x0], #8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i16_post_imm_st4lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: st4.h { v0, v1, v2, v3 }[0], [x0], #8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i16_post_imm_st4lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, #8 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: st4.h { v0, v1, v2, v3 }[0], [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i16_post_imm_st4lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, #8 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: st4.h { v0, v1, v2, v3 }[0], [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st4lane.v4i16.p0(<4 x i16> %B, <4 x i16> %C, <4 x i16> %D, <4 x i16> %E, i64 0, ptr %A) %tmp = getelementptr i16, ptr %A, i32 4 ret ptr %tmp } define ptr @test_v4i16_post_reg_st4lane(ptr %A, ptr %ptr, <4 x i16> %B, <4 x i16> %C, <4 x i16> %D, <4 x i16> %E, i64 %inc) nounwind { -; SDAG-LABEL: test_v4i16_post_reg_st4lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: lsl x8, x2, #1 -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: st4.h { v0, v1, v2, v3 }[0], [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i16_post_reg_st4lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: lsl x8, x2, #1 +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: st4.h { v0, v1, v2, v3 }[0], [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i16_post_reg_st4lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #1 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: st4.h { v0, v1, v2, v3 }[0], [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i16_post_reg_st4lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #1 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: st4.h { v0, v1, v2, v3 }[0], [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st4lane.v4i16.p0(<4 x i16> %B, <4 x i16> %C, <4 x i16> %D, <4 x i16> %E, i64 0, ptr %A) %tmp = getelementptr i16, ptr %A, i64 %inc ret ptr %tmp @@ -12996,51 +12375,51 @@ declare void @llvm.aarch64.neon.st4lane.v4i16.p0(<4 x i16>, <4 x i16>, <4 x i16> define ptr @test_v4i32_post_imm_st4lane(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32> %C, <4 x i32> %D, <4 x i32> %E) nounwind { -; SDAG-LABEL: test_v4i32_post_imm_st4lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: st4.s { v0, v1, v2, v3 }[0], [x0], #16 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i32_post_imm_st4lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: st4.s { v0, v1, v2, v3 }[0], [x0], #16 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i32_post_imm_st4lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, #16 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: st4.s { v0, v1, v2, v3 }[0], [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i32_post_imm_st4lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, #16 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: st4.s { v0, v1, v2, v3 }[0], [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st4lane.v4i32.p0(<4 x i32> %B, <4 x i32> %C, <4 x i32> %D, <4 x i32> %E, i64 0, ptr %A) %tmp = getelementptr i32, ptr %A, i32 4 ret ptr %tmp } define ptr @test_v4i32_post_reg_st4lane(ptr %A, ptr %ptr, <4 x i32> %B, <4 x i32> %C, <4 x i32> %D, <4 x i32> %E, i64 %inc) nounwind { -; SDAG-LABEL: test_v4i32_post_reg_st4lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: st4.s { v0, v1, v2, v3 }[0], [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i32_post_reg_st4lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: st4.s { v0, v1, v2, v3 }[0], [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i32_post_reg_st4lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: st4.s { v0, v1, v2, v3 }[0], [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i32_post_reg_st4lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #2 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: st4.s { v0, v1, v2, v3 }[0], [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st4lane.v4i32.p0(<4 x i32> %B, <4 x i32> %C, <4 x i32> %D, <4 x i32> %E, i64 0, ptr %A) %tmp = getelementptr i32, ptr %A, i64 %inc ret ptr %tmp @@ -13050,51 +12429,51 @@ declare void @llvm.aarch64.neon.st4lane.v4i32.p0(<4 x i32>, <4 x i32>, <4 x i32> define ptr @test_v2i32_post_imm_st4lane(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32> %C, <2 x i32> %D, <2 x i32> %E) nounwind { -; SDAG-LABEL: test_v2i32_post_imm_st4lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: st4.s { v0, v1, v2, v3 }[0], [x0], #16 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i32_post_imm_st4lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: st4.s { v0, v1, v2, v3 }[0], [x0], #16 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i32_post_imm_st4lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, #16 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: st4.s { v0, v1, v2, v3 }[0], [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i32_post_imm_st4lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, #16 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: st4.s { v0, v1, v2, v3 }[0], [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st4lane.v2i32.p0(<2 x i32> %B, <2 x i32> %C, <2 x i32> %D, <2 x i32> %E, i64 0, ptr %A) %tmp = getelementptr i32, ptr %A, i32 4 ret ptr %tmp } define ptr @test_v2i32_post_reg_st4lane(ptr %A, ptr %ptr, <2 x i32> %B, <2 x i32> %C, <2 x i32> %D, <2 x i32> %E, i64 %inc) nounwind { -; SDAG-LABEL: test_v2i32_post_reg_st4lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: st4.s { v0, v1, v2, v3 }[0], [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i32_post_reg_st4lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: st4.s { v0, v1, v2, v3 }[0], [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i32_post_reg_st4lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: st4.s { v0, v1, v2, v3 }[0], [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i32_post_reg_st4lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #2 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: st4.s { v0, v1, v2, v3 }[0], [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st4lane.v2i32.p0(<2 x i32> %B, <2 x i32> %C, <2 x i32> %D, <2 x i32> %E, i64 0, ptr %A) %tmp = getelementptr i32, ptr %A, i64 %inc ret ptr %tmp @@ -13104,51 +12483,51 @@ declare void @llvm.aarch64.neon.st4lane.v2i32.p0(<2 x i32>, <2 x i32>, <2 x i32> define ptr @test_v2i64_post_imm_st4lane(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64> %C, <2 x i64> %D, <2 x i64> %E) nounwind { -; SDAG-LABEL: test_v2i64_post_imm_st4lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: st4.d { v0, v1, v2, v3 }[0], [x0], #32 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i64_post_imm_st4lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: st4.d { v0, v1, v2, v3 }[0], [x0], #32 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i64_post_imm_st4lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, #32 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: st4.d { v0, v1, v2, v3 }[0], [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i64_post_imm_st4lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, #32 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: st4.d { v0, v1, v2, v3 }[0], [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st4lane.v2i64.p0(<2 x i64> %B, <2 x i64> %C, <2 x i64> %D, <2 x i64> %E, i64 0, ptr %A) %tmp = getelementptr i64, ptr %A, i64 4 ret ptr %tmp } define ptr @test_v2i64_post_reg_st4lane(ptr %A, ptr %ptr, <2 x i64> %B, <2 x i64> %C, <2 x i64> %D, <2 x i64> %E, i64 %inc) nounwind { -; SDAG-LABEL: test_v2i64_post_reg_st4lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: st4.d { v0, v1, v2, v3 }[0], [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i64_post_reg_st4lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: st4.d { v0, v1, v2, v3 }[0], [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i64_post_reg_st4lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: st4.d { v0, v1, v2, v3 }[0], [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i64_post_reg_st4lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #3 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: st4.d { v0, v1, v2, v3 }[0], [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st4lane.v2i64.p0(<2 x i64> %B, <2 x i64> %C, <2 x i64> %D, <2 x i64> %E, i64 0, ptr %A) %tmp = getelementptr i64, ptr %A, i64 %inc ret ptr %tmp @@ -13158,51 +12537,51 @@ declare void @llvm.aarch64.neon.st4lane.v2i64.p0(<2 x i64>, <2 x i64>, <2 x i64> define ptr @test_v1i64_post_imm_st4lane(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64> %C, <1 x i64> %D, <1 x i64> %E) nounwind { -; SDAG-LABEL: test_v1i64_post_imm_st4lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: st4.d { v0, v1, v2, v3 }[0], [x0], #32 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v1i64_post_imm_st4lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: st4.d { v0, v1, v2, v3 }[0], [x0], #32 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v1i64_post_imm_st4lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, #32 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: st4.d { v0, v1, v2, v3 }[0], [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v1i64_post_imm_st4lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, #32 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: st4.d { v0, v1, v2, v3 }[0], [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st4lane.v1i64.p0(<1 x i64> %B, <1 x i64> %C, <1 x i64> %D, <1 x i64> %E, i64 0, ptr %A) %tmp = getelementptr i64, ptr %A, i64 4 ret ptr %tmp } define ptr @test_v1i64_post_reg_st4lane(ptr %A, ptr %ptr, <1 x i64> %B, <1 x i64> %C, <1 x i64> %D, <1 x i64> %E, i64 %inc) nounwind { -; SDAG-LABEL: test_v1i64_post_reg_st4lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: st4.d { v0, v1, v2, v3 }[0], [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v1i64_post_reg_st4lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: st4.d { v0, v1, v2, v3 }[0], [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v1i64_post_reg_st4lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: st4.d { v0, v1, v2, v3 }[0], [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v1i64_post_reg_st4lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #3 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: st4.d { v0, v1, v2, v3 }[0], [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st4lane.v1i64.p0(<1 x i64> %B, <1 x i64> %C, <1 x i64> %D, <1 x i64> %E, i64 0, ptr %A) %tmp = getelementptr i64, ptr %A, i64 %inc ret ptr %tmp @@ -13212,51 +12591,51 @@ declare void @llvm.aarch64.neon.st4lane.v1i64.p0(<1 x i64>, <1 x i64>, <1 x i64> define ptr @test_v4f32_post_imm_st4lane(ptr %A, ptr %ptr, <4 x float> %B, <4 x float> %C, <4 x float> %D, <4 x float> %E) nounwind { -; SDAG-LABEL: test_v4f32_post_imm_st4lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: st4.s { v0, v1, v2, v3 }[0], [x0], #16 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4f32_post_imm_st4lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: st4.s { v0, v1, v2, v3 }[0], [x0], #16 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4f32_post_imm_st4lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, #16 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: st4.s { v0, v1, v2, v3 }[0], [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4f32_post_imm_st4lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, #16 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: st4.s { v0, v1, v2, v3 }[0], [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st4lane.v4f32.p0(<4 x float> %B, <4 x float> %C, <4 x float> %D, <4 x float> %E, i64 0, ptr %A) %tmp = getelementptr float, ptr %A, i32 4 ret ptr %tmp } define ptr @test_v4f32_post_reg_st4lane(ptr %A, ptr %ptr, <4 x float> %B, <4 x float> %C, <4 x float> %D, <4 x float> %E, i64 %inc) nounwind { -; SDAG-LABEL: test_v4f32_post_reg_st4lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: st4.s { v0, v1, v2, v3 }[0], [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4f32_post_reg_st4lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: st4.s { v0, v1, v2, v3 }[0], [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4f32_post_reg_st4lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: st4.s { v0, v1, v2, v3 }[0], [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4f32_post_reg_st4lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #2 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: st4.s { v0, v1, v2, v3 }[0], [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st4lane.v4f32.p0(<4 x float> %B, <4 x float> %C, <4 x float> %D, <4 x float> %E, i64 0, ptr %A) %tmp = getelementptr float, ptr %A, i64 %inc ret ptr %tmp @@ -13266,51 +12645,51 @@ declare void @llvm.aarch64.neon.st4lane.v4f32.p0(<4 x float>, <4 x float>, <4 x define ptr @test_v2f32_post_imm_st4lane(ptr %A, ptr %ptr, <2 x float> %B, <2 x float> %C, <2 x float> %D, <2 x float> %E) nounwind { -; SDAG-LABEL: test_v2f32_post_imm_st4lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: st4.s { v0, v1, v2, v3 }[0], [x0], #16 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f32_post_imm_st4lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: st4.s { v0, v1, v2, v3 }[0], [x0], #16 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f32_post_imm_st4lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, #16 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: st4.s { v0, v1, v2, v3 }[0], [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f32_post_imm_st4lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, #16 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: st4.s { v0, v1, v2, v3 }[0], [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st4lane.v2f32.p0(<2 x float> %B, <2 x float> %C, <2 x float> %D, <2 x float> %E, i64 0, ptr %A) %tmp = getelementptr float, ptr %A, i32 4 ret ptr %tmp } define ptr @test_v2f32_post_reg_st4lane(ptr %A, ptr %ptr, <2 x float> %B, <2 x float> %C, <2 x float> %D, <2 x float> %E, i64 %inc) nounwind { -; SDAG-LABEL: test_v2f32_post_reg_st4lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: st4.s { v0, v1, v2, v3 }[0], [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f32_post_reg_st4lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: st4.s { v0, v1, v2, v3 }[0], [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f32_post_reg_st4lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: st4.s { v0, v1, v2, v3 }[0], [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f32_post_reg_st4lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #2 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: st4.s { v0, v1, v2, v3 }[0], [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st4lane.v2f32.p0(<2 x float> %B, <2 x float> %C, <2 x float> %D, <2 x float> %E, i64 0, ptr %A) %tmp = getelementptr float, ptr %A, i64 %inc ret ptr %tmp @@ -13320,51 +12699,51 @@ declare void @llvm.aarch64.neon.st4lane.v2f32.p0(<2 x float>, <2 x float>, <2 x define ptr @test_v2f64_post_imm_st4lane(ptr %A, ptr %ptr, <2 x double> %B, <2 x double> %C, <2 x double> %D, <2 x double> %E) nounwind { -; SDAG-LABEL: test_v2f64_post_imm_st4lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: st4.d { v0, v1, v2, v3 }[0], [x0], #32 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f64_post_imm_st4lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: st4.d { v0, v1, v2, v3 }[0], [x0], #32 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f64_post_imm_st4lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, #32 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: st4.d { v0, v1, v2, v3 }[0], [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f64_post_imm_st4lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, #32 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: st4.d { v0, v1, v2, v3 }[0], [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st4lane.v2f64.p0(<2 x double> %B, <2 x double> %C, <2 x double> %D, <2 x double> %E, i64 0, ptr %A) %tmp = getelementptr double, ptr %A, i64 4 ret ptr %tmp } define ptr @test_v2f64_post_reg_st4lane(ptr %A, ptr %ptr, <2 x double> %B, <2 x double> %C, <2 x double> %D, <2 x double> %E, i64 %inc) nounwind { -; SDAG-LABEL: test_v2f64_post_reg_st4lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: st4.d { v0, v1, v2, v3 }[0], [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f64_post_reg_st4lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: st4.d { v0, v1, v2, v3 }[0], [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f64_post_reg_st4lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: st4.d { v0, v1, v2, v3 }[0], [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f64_post_reg_st4lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $q0 killed $q0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #3 +; CHECK-GI-NEXT: ; kill: def $q1 killed $q1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q2 killed $q2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $q3 killed $q3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: st4.d { v0, v1, v2, v3 }[0], [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st4lane.v2f64.p0(<2 x double> %B, <2 x double> %C, <2 x double> %D, <2 x double> %E, i64 0, ptr %A) %tmp = getelementptr double, ptr %A, i64 %inc ret ptr %tmp @@ -13374,51 +12753,51 @@ declare void @llvm.aarch64.neon.st4lane.v2f64.p0(<2 x double>, <2 x double>, <2 define ptr @test_v1f64_post_imm_st4lane(ptr %A, ptr %ptr, <1 x double> %B, <1 x double> %C, <1 x double> %D, <1 x double> %E) nounwind { -; SDAG-LABEL: test_v1f64_post_imm_st4lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: st4.d { v0, v1, v2, v3 }[0], [x0], #32 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v1f64_post_imm_st4lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: st4.d { v0, v1, v2, v3 }[0], [x0], #32 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v1f64_post_imm_st4lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, #32 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: st4.d { v0, v1, v2, v3 }[0], [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v1f64_post_imm_st4lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, #32 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: st4.d { v0, v1, v2, v3 }[0], [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st4lane.v1f64.p0(<1 x double> %B, <1 x double> %C, <1 x double> %D, <1 x double> %E, i64 0, ptr %A) %tmp = getelementptr double, ptr %A, i64 4 ret ptr %tmp } define ptr @test_v1f64_post_reg_st4lane(ptr %A, ptr %ptr, <1 x double> %B, <1 x double> %C, <1 x double> %D, <1 x double> %E, i64 %inc) nounwind { -; SDAG-LABEL: test_v1f64_post_reg_st4lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; SDAG-NEXT: st4.d { v0, v1, v2, v3 }[0], [x0], x8 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v1f64_post_reg_st4lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-SD-NEXT: st4.d { v0, v1, v2, v3 }[0], [x0], x8 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v1f64_post_reg_st4lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: mov x8, x0 -; CHECK-GISEL-NEXT: add x0, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 -; CHECK-GISEL-NEXT: st4.d { v0, v1, v2, v3 }[0], [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v1f64_post_reg_st4lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: mov x8, x0 +; CHECK-GI-NEXT: add x0, x0, x2, lsl #3 +; CHECK-GI-NEXT: ; kill: def $d1 killed $d1 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $d2 killed $d2 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: ; kill: def $d3 killed $d3 killed $q0_q1_q2_q3 def $q0_q1_q2_q3 +; CHECK-GI-NEXT: st4.d { v0, v1, v2, v3 }[0], [x8] +; CHECK-GI-NEXT: ret call void @llvm.aarch64.neon.st4lane.v1f64.p0(<1 x double> %B, <1 x double> %C, <1 x double> %D, <1 x double> %E, i64 0, ptr %A) %tmp = getelementptr double, ptr %A, i64 %inc ret ptr %tmp @@ -13427,18 +12806,18 @@ define ptr @test_v1f64_post_reg_st4lane(ptr %A, ptr %ptr, <1 x double> %B, <1 x declare void @llvm.aarch64.neon.st4lane.v1f64.p0(<1 x double>, <1 x double>, <1 x double>, <1 x double>, i64, ptr) define <16 x i8> @test_v16i8_post_imm_ld1r(ptr %bar, ptr %ptr) { -; SDAG-LABEL: test_v16i8_post_imm_ld1r: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld1r.16b { v0 }, [x0], #1 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v16i8_post_imm_ld1r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld1r.16b { v0 }, [x0], #1 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v16i8_post_imm_ld1r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ldrb w8, [x0], #1 -; CHECK-GISEL-NEXT: str x0, [x1] -; CHECK-GISEL-NEXT: dup.16b v0, w8 -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v16i8_post_imm_ld1r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ldrb w8, [x0], #1 +; CHECK-GI-NEXT: str x0, [x1] +; CHECK-GI-NEXT: dup.16b v0, w8 +; CHECK-GI-NEXT: ret %tmp1 = load i8, ptr %bar %tmp2 = insertelement <16 x i8> , i8 %tmp1, i32 0 %tmp3 = insertelement <16 x i8> %tmp2, i8 %tmp1, i32 1 @@ -13462,18 +12841,18 @@ define <16 x i8> @test_v16i8_post_imm_ld1r(ptr %bar, ptr %ptr) { } define <16 x i8> @test_v16i8_post_reg_ld1r(ptr %bar, ptr %ptr, i64 %inc) { -; SDAG-LABEL: test_v16i8_post_reg_ld1r: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld1r.16b { v0 }, [x0], x2 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v16i8_post_reg_ld1r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld1r.16b { v0 }, [x0], x2 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v16i8_post_reg_ld1r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1r.16b { v0 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v16i8_post_reg_ld1r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1r.16b { v0 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %tmp1 = load i8, ptr %bar %tmp2 = insertelement <16 x i8> , i8 %tmp1, i32 0 %tmp3 = insertelement <16 x i8> %tmp2, i8 %tmp1, i32 1 @@ -13497,18 +12876,18 @@ define <16 x i8> @test_v16i8_post_reg_ld1r(ptr %bar, ptr %ptr, i64 %inc) { } define <8 x i8> @test_v8i8_post_imm_ld1r(ptr %bar, ptr %ptr) { -; SDAG-LABEL: test_v8i8_post_imm_ld1r: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld1r.8b { v0 }, [x0], #1 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i8_post_imm_ld1r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld1r.8b { v0 }, [x0], #1 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i8_post_imm_ld1r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ldrb w8, [x0], #1 -; CHECK-GISEL-NEXT: str x0, [x1] -; CHECK-GISEL-NEXT: dup.8b v0, w8 -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i8_post_imm_ld1r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ldrb w8, [x0], #1 +; CHECK-GI-NEXT: str x0, [x1] +; CHECK-GI-NEXT: dup.8b v0, w8 +; CHECK-GI-NEXT: ret %tmp1 = load i8, ptr %bar %tmp2 = insertelement <8 x i8> , i8 %tmp1, i32 0 %tmp3 = insertelement <8 x i8> %tmp2, i8 %tmp1, i32 1 @@ -13524,18 +12903,18 @@ define <8 x i8> @test_v8i8_post_imm_ld1r(ptr %bar, ptr %ptr) { } define <8 x i8> @test_v8i8_post_reg_ld1r(ptr %bar, ptr %ptr, i64 %inc) { -; SDAG-LABEL: test_v8i8_post_reg_ld1r: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld1r.8b { v0 }, [x0], x2 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i8_post_reg_ld1r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld1r.8b { v0 }, [x0], x2 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i8_post_reg_ld1r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1r.8b { v0 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i8_post_reg_ld1r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1r.8b { v0 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %tmp1 = load i8, ptr %bar %tmp2 = insertelement <8 x i8> , i8 %tmp1, i32 0 %tmp3 = insertelement <8 x i8> %tmp2, i8 %tmp1, i32 1 @@ -13551,18 +12930,18 @@ define <8 x i8> @test_v8i8_post_reg_ld1r(ptr %bar, ptr %ptr, i64 %inc) { } define <8 x i16> @test_v8i16_post_imm_ld1r(ptr %bar, ptr %ptr) { -; SDAG-LABEL: test_v8i16_post_imm_ld1r: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld1r.8h { v0 }, [x0], #2 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i16_post_imm_ld1r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld1r.8h { v0 }, [x0], #2 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i16_post_imm_ld1r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ldrh w8, [x0], #2 -; CHECK-GISEL-NEXT: str x0, [x1] -; CHECK-GISEL-NEXT: dup.8h v0, w8 -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i16_post_imm_ld1r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ldrh w8, [x0], #2 +; CHECK-GI-NEXT: str x0, [x1] +; CHECK-GI-NEXT: dup.8h v0, w8 +; CHECK-GI-NEXT: ret %tmp1 = load i16, ptr %bar %tmp2 = insertelement <8 x i16> , i16 %tmp1, i32 0 %tmp3 = insertelement <8 x i16> %tmp2, i16 %tmp1, i32 1 @@ -13578,19 +12957,19 @@ define <8 x i16> @test_v8i16_post_imm_ld1r(ptr %bar, ptr %ptr) { } define <8 x i16> @test_v8i16_post_reg_ld1r(ptr %bar, ptr %ptr, i64 %inc) { -; SDAG-LABEL: test_v8i16_post_reg_ld1r: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #1 -; SDAG-NEXT: ld1r.8h { v0 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i16_post_reg_ld1r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #1 +; CHECK-SD-NEXT: ld1r.8h { v0 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i16_post_reg_ld1r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1r.8h { v0 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #1 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i16_post_reg_ld1r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1r.8h { v0 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #1 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %tmp1 = load i16, ptr %bar %tmp2 = insertelement <8 x i16> , i16 %tmp1, i32 0 %tmp3 = insertelement <8 x i16> %tmp2, i16 %tmp1, i32 1 @@ -13606,18 +12985,18 @@ define <8 x i16> @test_v8i16_post_reg_ld1r(ptr %bar, ptr %ptr, i64 %inc) { } define <4 x i16> @test_v4i16_post_imm_ld1r(ptr %bar, ptr %ptr) { -; SDAG-LABEL: test_v4i16_post_imm_ld1r: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld1r.4h { v0 }, [x0], #2 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i16_post_imm_ld1r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld1r.4h { v0 }, [x0], #2 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i16_post_imm_ld1r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ldrh w8, [x0], #2 -; CHECK-GISEL-NEXT: str x0, [x1] -; CHECK-GISEL-NEXT: dup.4h v0, w8 -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i16_post_imm_ld1r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ldrh w8, [x0], #2 +; CHECK-GI-NEXT: str x0, [x1] +; CHECK-GI-NEXT: dup.4h v0, w8 +; CHECK-GI-NEXT: ret %tmp1 = load i16, ptr %bar %tmp2 = insertelement <4 x i16> , i16 %tmp1, i32 0 %tmp3 = insertelement <4 x i16> %tmp2, i16 %tmp1, i32 1 @@ -13629,19 +13008,19 @@ define <4 x i16> @test_v4i16_post_imm_ld1r(ptr %bar, ptr %ptr) { } define <4 x i16> @test_v4i16_post_reg_ld1r(ptr %bar, ptr %ptr, i64 %inc) { -; SDAG-LABEL: test_v4i16_post_reg_ld1r: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #1 -; SDAG-NEXT: ld1r.4h { v0 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i16_post_reg_ld1r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #1 +; CHECK-SD-NEXT: ld1r.4h { v0 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i16_post_reg_ld1r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1r.4h { v0 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #1 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i16_post_reg_ld1r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1r.4h { v0 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #1 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %tmp1 = load i16, ptr %bar %tmp2 = insertelement <4 x i16> , i16 %tmp1, i32 0 %tmp3 = insertelement <4 x i16> %tmp2, i16 %tmp1, i32 1 @@ -13653,18 +13032,18 @@ define <4 x i16> @test_v4i16_post_reg_ld1r(ptr %bar, ptr %ptr, i64 %inc) { } define <4 x i32> @test_v4i32_post_imm_ld1r(ptr %bar, ptr %ptr) { -; SDAG-LABEL: test_v4i32_post_imm_ld1r: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld1r.4s { v0 }, [x0], #4 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i32_post_imm_ld1r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld1r.4s { v0 }, [x0], #4 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i32_post_imm_ld1r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ldr w8, [x0], #4 -; CHECK-GISEL-NEXT: str x0, [x1] -; CHECK-GISEL-NEXT: dup.4s v0, w8 -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i32_post_imm_ld1r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ldr w8, [x0], #4 +; CHECK-GI-NEXT: str x0, [x1] +; CHECK-GI-NEXT: dup.4s v0, w8 +; CHECK-GI-NEXT: ret %tmp1 = load i32, ptr %bar %tmp2 = insertelement <4 x i32> , i32 %tmp1, i32 0 %tmp3 = insertelement <4 x i32> %tmp2, i32 %tmp1, i32 1 @@ -13676,19 +13055,19 @@ define <4 x i32> @test_v4i32_post_imm_ld1r(ptr %bar, ptr %ptr) { } define <4 x i32> @test_v4i32_post_reg_ld1r(ptr %bar, ptr %ptr, i64 %inc) { -; SDAG-LABEL: test_v4i32_post_reg_ld1r: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ld1r.4s { v0 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i32_post_reg_ld1r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ld1r.4s { v0 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i32_post_reg_ld1r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1r.4s { v0 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i32_post_reg_ld1r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1r.4s { v0 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #2 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %tmp1 = load i32, ptr %bar %tmp2 = insertelement <4 x i32> , i32 %tmp1, i32 0 %tmp3 = insertelement <4 x i32> %tmp2, i32 %tmp1, i32 1 @@ -13700,18 +13079,18 @@ define <4 x i32> @test_v4i32_post_reg_ld1r(ptr %bar, ptr %ptr, i64 %inc) { } define <2 x i32> @test_v2i32_post_imm_ld1r(ptr %bar, ptr %ptr) { -; SDAG-LABEL: test_v2i32_post_imm_ld1r: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld1r.2s { v0 }, [x0], #4 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i32_post_imm_ld1r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld1r.2s { v0 }, [x0], #4 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i32_post_imm_ld1r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ldr w8, [x0], #4 -; CHECK-GISEL-NEXT: str x0, [x1] -; CHECK-GISEL-NEXT: dup.2s v0, w8 -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i32_post_imm_ld1r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ldr w8, [x0], #4 +; CHECK-GI-NEXT: str x0, [x1] +; CHECK-GI-NEXT: dup.2s v0, w8 +; CHECK-GI-NEXT: ret %tmp1 = load i32, ptr %bar %tmp2 = insertelement <2 x i32> , i32 %tmp1, i32 0 %tmp3 = insertelement <2 x i32> %tmp2, i32 %tmp1, i32 1 @@ -13721,19 +13100,19 @@ define <2 x i32> @test_v2i32_post_imm_ld1r(ptr %bar, ptr %ptr) { } define <2 x i32> @test_v2i32_post_reg_ld1r(ptr %bar, ptr %ptr, i64 %inc) { -; SDAG-LABEL: test_v2i32_post_reg_ld1r: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ld1r.2s { v0 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i32_post_reg_ld1r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ld1r.2s { v0 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i32_post_reg_ld1r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1r.2s { v0 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i32_post_reg_ld1r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1r.2s { v0 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #2 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %tmp1 = load i32, ptr %bar %tmp2 = insertelement <2 x i32> , i32 %tmp1, i32 0 %tmp3 = insertelement <2 x i32> %tmp2, i32 %tmp1, i32 1 @@ -13743,18 +13122,18 @@ define <2 x i32> @test_v2i32_post_reg_ld1r(ptr %bar, ptr %ptr, i64 %inc) { } define <2 x i64> @test_v2i64_post_imm_ld1r(ptr %bar, ptr %ptr) { -; SDAG-LABEL: test_v2i64_post_imm_ld1r: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld1r.2d { v0 }, [x0], #8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i64_post_imm_ld1r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld1r.2d { v0 }, [x0], #8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i64_post_imm_ld1r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ldr x8, [x0], #8 -; CHECK-GISEL-NEXT: str x0, [x1] -; CHECK-GISEL-NEXT: dup.2d v0, x8 -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i64_post_imm_ld1r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ldr x8, [x0], #8 +; CHECK-GI-NEXT: str x0, [x1] +; CHECK-GI-NEXT: dup.2d v0, x8 +; CHECK-GI-NEXT: ret %tmp1 = load i64, ptr %bar %tmp2 = insertelement <2 x i64> , i64 %tmp1, i32 0 %tmp3 = insertelement <2 x i64> %tmp2, i64 %tmp1, i32 1 @@ -13764,19 +13143,19 @@ define <2 x i64> @test_v2i64_post_imm_ld1r(ptr %bar, ptr %ptr) { } define <2 x i64> @test_v2i64_post_reg_ld1r(ptr %bar, ptr %ptr, i64 %inc) { -; SDAG-LABEL: test_v2i64_post_reg_ld1r: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ld1r.2d { v0 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i64_post_reg_ld1r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ld1r.2d { v0 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i64_post_reg_ld1r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1r.2d { v0 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i64_post_reg_ld1r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1r.2d { v0 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #3 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %tmp1 = load i64, ptr %bar %tmp2 = insertelement <2 x i64> , i64 %tmp1, i32 0 %tmp3 = insertelement <2 x i64> %tmp2, i64 %tmp1, i32 1 @@ -13786,18 +13165,18 @@ define <2 x i64> @test_v2i64_post_reg_ld1r(ptr %bar, ptr %ptr, i64 %inc) { } define <4 x float> @test_v4f32_post_imm_ld1r(ptr %bar, ptr %ptr) { -; SDAG-LABEL: test_v4f32_post_imm_ld1r: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld1r.4s { v0 }, [x0], #4 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4f32_post_imm_ld1r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld1r.4s { v0 }, [x0], #4 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4f32_post_imm_ld1r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ldr s0, [x0], #4 -; CHECK-GISEL-NEXT: str x0, [x1] -; CHECK-GISEL-NEXT: dup.4s v0, v0[0] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4f32_post_imm_ld1r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ldr s0, [x0], #4 +; CHECK-GI-NEXT: str x0, [x1] +; CHECK-GI-NEXT: dup.4s v0, v0[0] +; CHECK-GI-NEXT: ret %tmp1 = load float, ptr %bar %tmp2 = insertelement <4 x float> , float %tmp1, i32 0 %tmp3 = insertelement <4 x float> %tmp2, float %tmp1, i32 1 @@ -13809,19 +13188,19 @@ define <4 x float> @test_v4f32_post_imm_ld1r(ptr %bar, ptr %ptr) { } define <4 x float> @test_v4f32_post_reg_ld1r(ptr %bar, ptr %ptr, i64 %inc) { -; SDAG-LABEL: test_v4f32_post_reg_ld1r: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ld1r.4s { v0 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4f32_post_reg_ld1r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ld1r.4s { v0 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4f32_post_reg_ld1r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1r.4s { v0 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4f32_post_reg_ld1r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1r.4s { v0 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #2 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %tmp1 = load float, ptr %bar %tmp2 = insertelement <4 x float> , float %tmp1, i32 0 %tmp3 = insertelement <4 x float> %tmp2, float %tmp1, i32 1 @@ -13833,18 +13212,18 @@ define <4 x float> @test_v4f32_post_reg_ld1r(ptr %bar, ptr %ptr, i64 %inc) { } define <2 x float> @test_v2f32_post_imm_ld1r(ptr %bar, ptr %ptr) { -; SDAG-LABEL: test_v2f32_post_imm_ld1r: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld1r.2s { v0 }, [x0], #4 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f32_post_imm_ld1r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld1r.2s { v0 }, [x0], #4 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f32_post_imm_ld1r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ldr s0, [x0], #4 -; CHECK-GISEL-NEXT: str x0, [x1] -; CHECK-GISEL-NEXT: dup.2s v0, v0[0] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f32_post_imm_ld1r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ldr s0, [x0], #4 +; CHECK-GI-NEXT: str x0, [x1] +; CHECK-GI-NEXT: dup.2s v0, v0[0] +; CHECK-GI-NEXT: ret %tmp1 = load float, ptr %bar %tmp2 = insertelement <2 x float> , float %tmp1, i32 0 %tmp3 = insertelement <2 x float> %tmp2, float %tmp1, i32 1 @@ -13854,19 +13233,19 @@ define <2 x float> @test_v2f32_post_imm_ld1r(ptr %bar, ptr %ptr) { } define <2 x float> @test_v2f32_post_reg_ld1r(ptr %bar, ptr %ptr, i64 %inc) { -; SDAG-LABEL: test_v2f32_post_reg_ld1r: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ld1r.2s { v0 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f32_post_reg_ld1r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ld1r.2s { v0 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f32_post_reg_ld1r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1r.2s { v0 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f32_post_reg_ld1r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1r.2s { v0 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #2 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %tmp1 = load float, ptr %bar %tmp2 = insertelement <2 x float> , float %tmp1, i32 0 %tmp3 = insertelement <2 x float> %tmp2, float %tmp1, i32 1 @@ -13876,18 +13255,18 @@ define <2 x float> @test_v2f32_post_reg_ld1r(ptr %bar, ptr %ptr, i64 %inc) { } define <2 x double> @test_v2f64_post_imm_ld1r(ptr %bar, ptr %ptr) { -; SDAG-LABEL: test_v2f64_post_imm_ld1r: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld1r.2d { v0 }, [x0], #8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f64_post_imm_ld1r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld1r.2d { v0 }, [x0], #8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f64_post_imm_ld1r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ldr d0, [x0], #8 -; CHECK-GISEL-NEXT: str x0, [x1] -; CHECK-GISEL-NEXT: dup.2d v0, v0[0] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f64_post_imm_ld1r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ldr d0, [x0], #8 +; CHECK-GI-NEXT: str x0, [x1] +; CHECK-GI-NEXT: dup.2d v0, v0[0] +; CHECK-GI-NEXT: ret %tmp1 = load double, ptr %bar %tmp2 = insertelement <2 x double> , double %tmp1, i32 0 %tmp3 = insertelement <2 x double> %tmp2, double %tmp1, i32 1 @@ -13897,19 +13276,19 @@ define <2 x double> @test_v2f64_post_imm_ld1r(ptr %bar, ptr %ptr) { } define <2 x double> @test_v2f64_post_reg_ld1r(ptr %bar, ptr %ptr, i64 %inc) { -; SDAG-LABEL: test_v2f64_post_reg_ld1r: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ld1r.2d { v0 }, [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f64_post_reg_ld1r: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ld1r.2d { v0 }, [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f64_post_reg_ld1r: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ld1r.2d { v0 }, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f64_post_reg_ld1r: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ld1r.2d { v0 }, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #3 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %tmp1 = load double, ptr %bar %tmp2 = insertelement <2 x double> , double %tmp1, i32 0 %tmp3 = insertelement <2 x double> %tmp2, double %tmp1, i32 1 @@ -13919,18 +13298,18 @@ define <2 x double> @test_v2f64_post_reg_ld1r(ptr %bar, ptr %ptr, i64 %inc) { } define <16 x i8> @test_v16i8_post_imm_ld1lane(ptr %bar, ptr %ptr, <16 x i8> %A) { -; SDAG-LABEL: test_v16i8_post_imm_ld1lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld1.b { v0 }[1], [x0], #1 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v16i8_post_imm_ld1lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld1.b { v0 }[1], [x0], #1 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v16i8_post_imm_ld1lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ldrb w8, [x0], #1 -; CHECK-GISEL-NEXT: str x0, [x1] -; CHECK-GISEL-NEXT: mov.b v0[1], w8 -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v16i8_post_imm_ld1lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ldrb w8, [x0], #1 +; CHECK-GI-NEXT: str x0, [x1] +; CHECK-GI-NEXT: mov.b v0[1], w8 +; CHECK-GI-NEXT: ret %tmp1 = load i8, ptr %bar %tmp2 = insertelement <16 x i8> %A, i8 %tmp1, i32 1 %tmp3 = getelementptr i8, ptr %bar, i64 1 @@ -13939,19 +13318,19 @@ define <16 x i8> @test_v16i8_post_imm_ld1lane(ptr %bar, ptr %ptr, <16 x i8> %A) } define <16 x i8> @test_v16i8_post_reg_ld1lane(ptr %bar, ptr %ptr, i64 %inc, <16 x i8> %A) { -; SDAG-LABEL: test_v16i8_post_reg_ld1lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld1.b { v0 }[1], [x0], x2 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v16i8_post_reg_ld1lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld1.b { v0 }[1], [x0], x2 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v16i8_post_reg_ld1lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ldr b1, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: mov.b v0[1], v1[0] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v16i8_post_reg_ld1lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ldr b1, [x0] +; CHECK-GI-NEXT: add x8, x0, x2 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: mov.b v0[1], v1[0] +; CHECK-GI-NEXT: ret %tmp1 = load i8, ptr %bar %tmp2 = insertelement <16 x i8> %A, i8 %tmp1, i32 1 %tmp3 = getelementptr i8, ptr %bar, i64 %inc @@ -13960,22 +13339,22 @@ define <16 x i8> @test_v16i8_post_reg_ld1lane(ptr %bar, ptr %ptr, i64 %inc, <16 } define <8 x i8> @test_v8i8_post_imm_ld1lane(ptr %bar, ptr %ptr, <8 x i8> %A) { -; SDAG-LABEL: test_v8i8_post_imm_ld1lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d0 killed $d0 def $q0 -; SDAG-NEXT: ld1.b { v0 }[1], [x0], #1 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i8_post_imm_ld1lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 def $q0 +; CHECK-SD-NEXT: ld1.b { v0 }[1], [x0], #1 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i8_post_imm_ld1lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ldrb w8, [x0], #1 -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 def $q0 -; CHECK-GISEL-NEXT: str x0, [x1] -; CHECK-GISEL-NEXT: mov.b v0[1], w8 -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0 -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i8_post_imm_ld1lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ldrb w8, [x0], #1 +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 def $q0 +; CHECK-GI-NEXT: str x0, [x1] +; CHECK-GI-NEXT: mov.b v0[1], w8 +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0 +; CHECK-GI-NEXT: ret %tmp1 = load i8, ptr %bar %tmp2 = insertelement <8 x i8> %A, i8 %tmp1, i32 1 %tmp3 = getelementptr i8, ptr %bar, i64 1 @@ -13984,23 +13363,23 @@ define <8 x i8> @test_v8i8_post_imm_ld1lane(ptr %bar, ptr %ptr, <8 x i8> %A) { } define <8 x i8> @test_v8i8_post_reg_ld1lane(ptr %bar, ptr %ptr, i64 %inc, <8 x i8> %A) { -; SDAG-LABEL: test_v8i8_post_reg_ld1lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d0 killed $d0 def $q0 -; SDAG-NEXT: ld1.b { v0 }[1], [x0], x2 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i8_post_reg_ld1lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 def $q0 +; CHECK-SD-NEXT: ld1.b { v0 }[1], [x0], x2 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i8_post_reg_ld1lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ldr b1, [x0] -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 def $q0 -; CHECK-GISEL-NEXT: add x8, x0, x2 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: mov.b v0[1], v1[0] -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0 -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i8_post_reg_ld1lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ldr b1, [x0] +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 def $q0 +; CHECK-GI-NEXT: add x8, x0, x2 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: mov.b v0[1], v1[0] +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0 +; CHECK-GI-NEXT: ret %tmp1 = load i8, ptr %bar %tmp2 = insertelement <8 x i8> %A, i8 %tmp1, i32 1 %tmp3 = getelementptr i8, ptr %bar, i64 %inc @@ -14009,18 +13388,18 @@ define <8 x i8> @test_v8i8_post_reg_ld1lane(ptr %bar, ptr %ptr, i64 %inc, <8 x i } define <8 x i16> @test_v8i16_post_imm_ld1lane(ptr %bar, ptr %ptr, <8 x i16> %A) { -; SDAG-LABEL: test_v8i16_post_imm_ld1lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld1.h { v0 }[1], [x0], #2 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i16_post_imm_ld1lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld1.h { v0 }[1], [x0], #2 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i16_post_imm_ld1lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ldrh w8, [x0], #2 -; CHECK-GISEL-NEXT: str x0, [x1] -; CHECK-GISEL-NEXT: mov.h v0[1], w8 -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i16_post_imm_ld1lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ldrh w8, [x0], #2 +; CHECK-GI-NEXT: str x0, [x1] +; CHECK-GI-NEXT: mov.h v0[1], w8 +; CHECK-GI-NEXT: ret %tmp1 = load i16, ptr %bar %tmp2 = insertelement <8 x i16> %A, i16 %tmp1, i32 1 %tmp3 = getelementptr i16, ptr %bar, i64 1 @@ -14029,20 +13408,20 @@ define <8 x i16> @test_v8i16_post_imm_ld1lane(ptr %bar, ptr %ptr, <8 x i16> %A) } define <8 x i16> @test_v8i16_post_reg_ld1lane(ptr %bar, ptr %ptr, i64 %inc, <8 x i16> %A) { -; SDAG-LABEL: test_v8i16_post_reg_ld1lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #1 -; SDAG-NEXT: ld1.h { v0 }[1], [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v8i16_post_reg_ld1lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #1 +; CHECK-SD-NEXT: ld1.h { v0 }[1], [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v8i16_post_reg_ld1lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ldr h1, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #1 -; CHECK-GISEL-NEXT: mov.h v0[1], v1[0] -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v8i16_post_reg_ld1lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ldr h1, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #1 +; CHECK-GI-NEXT: mov.h v0[1], v1[0] +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %tmp1 = load i16, ptr %bar %tmp2 = insertelement <8 x i16> %A, i16 %tmp1, i32 1 %tmp3 = getelementptr i16, ptr %bar, i64 %inc @@ -14051,22 +13430,22 @@ define <8 x i16> @test_v8i16_post_reg_ld1lane(ptr %bar, ptr %ptr, i64 %inc, <8 x } define <4 x i16> @test_v4i16_post_imm_ld1lane(ptr %bar, ptr %ptr, <4 x i16> %A) { -; SDAG-LABEL: test_v4i16_post_imm_ld1lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d0 killed $d0 def $q0 -; SDAG-NEXT: ld1.h { v0 }[1], [x0], #2 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i16_post_imm_ld1lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 def $q0 +; CHECK-SD-NEXT: ld1.h { v0 }[1], [x0], #2 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i16_post_imm_ld1lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ldrh w8, [x0], #2 -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 def $q0 -; CHECK-GISEL-NEXT: str x0, [x1] -; CHECK-GISEL-NEXT: mov.h v0[1], w8 -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0 -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i16_post_imm_ld1lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ldrh w8, [x0], #2 +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 def $q0 +; CHECK-GI-NEXT: str x0, [x1] +; CHECK-GI-NEXT: mov.h v0[1], w8 +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0 +; CHECK-GI-NEXT: ret %tmp1 = load i16, ptr %bar %tmp2 = insertelement <4 x i16> %A, i16 %tmp1, i32 1 %tmp3 = getelementptr i16, ptr %bar, i64 1 @@ -14075,24 +13454,24 @@ define <4 x i16> @test_v4i16_post_imm_ld1lane(ptr %bar, ptr %ptr, <4 x i16> %A) } define <4 x i16> @test_v4i16_post_reg_ld1lane(ptr %bar, ptr %ptr, i64 %inc, <4 x i16> %A) { -; SDAG-LABEL: test_v4i16_post_reg_ld1lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #1 -; SDAG-NEXT: ; kill: def $d0 killed $d0 def $q0 -; SDAG-NEXT: ld1.h { v0 }[1], [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i16_post_reg_ld1lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #1 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 def $q0 +; CHECK-SD-NEXT: ld1.h { v0 }[1], [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i16_post_reg_ld1lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ldr h1, [x0] -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 def $q0 -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #1 -; CHECK-GISEL-NEXT: mov.h v0[1], v1[0] -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0 -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i16_post_reg_ld1lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ldr h1, [x0] +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 def $q0 +; CHECK-GI-NEXT: add x8, x0, x2, lsl #1 +; CHECK-GI-NEXT: mov.h v0[1], v1[0] +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0 +; CHECK-GI-NEXT: ret %tmp1 = load i16, ptr %bar %tmp2 = insertelement <4 x i16> %A, i16 %tmp1, i32 1 %tmp3 = getelementptr i16, ptr %bar, i64 %inc @@ -14101,18 +13480,18 @@ define <4 x i16> @test_v4i16_post_reg_ld1lane(ptr %bar, ptr %ptr, i64 %inc, <4 x } define <4 x i32> @test_v4i32_post_imm_ld1lane(ptr %bar, ptr %ptr, <4 x i32> %A) { -; SDAG-LABEL: test_v4i32_post_imm_ld1lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld1.s { v0 }[1], [x0], #4 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i32_post_imm_ld1lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld1.s { v0 }[1], [x0], #4 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i32_post_imm_ld1lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ldr w8, [x0], #4 -; CHECK-GISEL-NEXT: str x0, [x1] -; CHECK-GISEL-NEXT: mov.s v0[1], w8 -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i32_post_imm_ld1lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ldr w8, [x0], #4 +; CHECK-GI-NEXT: str x0, [x1] +; CHECK-GI-NEXT: mov.s v0[1], w8 +; CHECK-GI-NEXT: ret %tmp1 = load i32, ptr %bar %tmp2 = insertelement <4 x i32> %A, i32 %tmp1, i32 1 %tmp3 = getelementptr i32, ptr %bar, i64 1 @@ -14121,20 +13500,20 @@ define <4 x i32> @test_v4i32_post_imm_ld1lane(ptr %bar, ptr %ptr, <4 x i32> %A) } define <4 x i32> @test_v4i32_post_reg_ld1lane(ptr %bar, ptr %ptr, i64 %inc, <4 x i32> %A) { -; SDAG-LABEL: test_v4i32_post_reg_ld1lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ld1.s { v0 }[1], [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i32_post_reg_ld1lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ld1.s { v0 }[1], [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i32_post_reg_ld1lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ldr s1, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: mov.s v0[1], v1[0] -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i32_post_reg_ld1lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ldr s1, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #2 +; CHECK-GI-NEXT: mov.s v0[1], v1[0] +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %tmp1 = load i32, ptr %bar %tmp2 = insertelement <4 x i32> %A, i32 %tmp1, i32 1 %tmp3 = getelementptr i32, ptr %bar, i64 %inc @@ -14143,22 +13522,22 @@ define <4 x i32> @test_v4i32_post_reg_ld1lane(ptr %bar, ptr %ptr, i64 %inc, <4 x } define <2 x i32> @test_v2i32_post_imm_ld1lane(ptr %bar, ptr %ptr, <2 x i32> %A) { -; SDAG-LABEL: test_v2i32_post_imm_ld1lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d0 killed $d0 def $q0 -; SDAG-NEXT: ld1.s { v0 }[1], [x0], #4 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i32_post_imm_ld1lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 def $q0 +; CHECK-SD-NEXT: ld1.s { v0 }[1], [x0], #4 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i32_post_imm_ld1lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ldr w8, [x0], #4 -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 def $q0 -; CHECK-GISEL-NEXT: str x0, [x1] -; CHECK-GISEL-NEXT: mov.s v0[1], w8 -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0 -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i32_post_imm_ld1lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ldr w8, [x0], #4 +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 def $q0 +; CHECK-GI-NEXT: str x0, [x1] +; CHECK-GI-NEXT: mov.s v0[1], w8 +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0 +; CHECK-GI-NEXT: ret %tmp1 = load i32, ptr %bar %tmp2 = insertelement <2 x i32> %A, i32 %tmp1, i32 1 %tmp3 = getelementptr i32, ptr %bar, i64 1 @@ -14167,24 +13546,24 @@ define <2 x i32> @test_v2i32_post_imm_ld1lane(ptr %bar, ptr %ptr, <2 x i32> %A) } define <2 x i32> @test_v2i32_post_reg_ld1lane(ptr %bar, ptr %ptr, i64 %inc, <2 x i32> %A) { -; SDAG-LABEL: test_v2i32_post_reg_ld1lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ; kill: def $d0 killed $d0 def $q0 -; SDAG-NEXT: ld1.s { v0 }[1], [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i32_post_reg_ld1lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 def $q0 +; CHECK-SD-NEXT: ld1.s { v0 }[1], [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i32_post_reg_ld1lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ldr s1, [x0] -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 def $q0 -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: mov.s v0[1], v1[0] -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0 -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i32_post_reg_ld1lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ldr s1, [x0] +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 def $q0 +; CHECK-GI-NEXT: add x8, x0, x2, lsl #2 +; CHECK-GI-NEXT: mov.s v0[1], v1[0] +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0 +; CHECK-GI-NEXT: ret %tmp1 = load i32, ptr %bar %tmp2 = insertelement <2 x i32> %A, i32 %tmp1, i32 1 %tmp3 = getelementptr i32, ptr %bar, i64 %inc @@ -14193,18 +13572,18 @@ define <2 x i32> @test_v2i32_post_reg_ld1lane(ptr %bar, ptr %ptr, i64 %inc, <2 x } define <2 x i64> @test_v2i64_post_imm_ld1lane(ptr %bar, ptr %ptr, <2 x i64> %A) { -; SDAG-LABEL: test_v2i64_post_imm_ld1lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld1.d { v0 }[1], [x0], #8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i64_post_imm_ld1lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld1.d { v0 }[1], [x0], #8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i64_post_imm_ld1lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ldr x8, [x0], #8 -; CHECK-GISEL-NEXT: str x0, [x1] -; CHECK-GISEL-NEXT: mov.d v0[1], x8 -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i64_post_imm_ld1lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ldr x8, [x0], #8 +; CHECK-GI-NEXT: str x0, [x1] +; CHECK-GI-NEXT: mov.d v0[1], x8 +; CHECK-GI-NEXT: ret %tmp1 = load i64, ptr %bar %tmp2 = insertelement <2 x i64> %A, i64 %tmp1, i32 1 %tmp3 = getelementptr i64, ptr %bar, i64 1 @@ -14213,20 +13592,20 @@ define <2 x i64> @test_v2i64_post_imm_ld1lane(ptr %bar, ptr %ptr, <2 x i64> %A) } define <2 x i64> @test_v2i64_post_reg_ld1lane(ptr %bar, ptr %ptr, i64 %inc, <2 x i64> %A) { -; SDAG-LABEL: test_v2i64_post_reg_ld1lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ld1.d { v0 }[1], [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2i64_post_reg_ld1lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ld1.d { v0 }[1], [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2i64_post_reg_ld1lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ldr d1, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: mov.d v0[1], v1[0] -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2i64_post_reg_ld1lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ldr d1, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #3 +; CHECK-GI-NEXT: mov.d v0[1], v1[0] +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %tmp1 = load i64, ptr %bar %tmp2 = insertelement <2 x i64> %A, i64 %tmp1, i32 1 %tmp3 = getelementptr i64, ptr %bar, i64 %inc @@ -14235,18 +13614,18 @@ define <2 x i64> @test_v2i64_post_reg_ld1lane(ptr %bar, ptr %ptr, i64 %inc, <2 x } define <4 x float> @test_v4f32_post_imm_ld1lane(ptr %bar, ptr %ptr, <4 x float> %A) { -; SDAG-LABEL: test_v4f32_post_imm_ld1lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld1.s { v0 }[1], [x0], #4 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4f32_post_imm_ld1lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld1.s { v0 }[1], [x0], #4 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4f32_post_imm_ld1lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ldr s1, [x0], #4 -; CHECK-GISEL-NEXT: str x0, [x1] -; CHECK-GISEL-NEXT: mov.s v0[1], v1[0] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4f32_post_imm_ld1lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ldr s1, [x0], #4 +; CHECK-GI-NEXT: str x0, [x1] +; CHECK-GI-NEXT: mov.s v0[1], v1[0] +; CHECK-GI-NEXT: ret %tmp1 = load float, ptr %bar %tmp2 = insertelement <4 x float> %A, float %tmp1, i32 1 %tmp3 = getelementptr float, ptr %bar, i64 1 @@ -14255,20 +13634,20 @@ define <4 x float> @test_v4f32_post_imm_ld1lane(ptr %bar, ptr %ptr, <4 x float> } define <4 x float> @test_v4f32_post_reg_ld1lane(ptr %bar, ptr %ptr, i64 %inc, <4 x float> %A) { -; SDAG-LABEL: test_v4f32_post_reg_ld1lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ld1.s { v0 }[1], [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4f32_post_reg_ld1lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ld1.s { v0 }[1], [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4f32_post_reg_ld1lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ldr s1, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: mov.s v0[1], v1[0] -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4f32_post_reg_ld1lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ldr s1, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #2 +; CHECK-GI-NEXT: mov.s v0[1], v1[0] +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %tmp1 = load float, ptr %bar %tmp2 = insertelement <4 x float> %A, float %tmp1, i32 1 %tmp3 = getelementptr float, ptr %bar, i64 %inc @@ -14277,22 +13656,22 @@ define <4 x float> @test_v4f32_post_reg_ld1lane(ptr %bar, ptr %ptr, i64 %inc, <4 } define <2 x float> @test_v2f32_post_imm_ld1lane(ptr %bar, ptr %ptr, <2 x float> %A) { -; SDAG-LABEL: test_v2f32_post_imm_ld1lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $d0 killed $d0 def $q0 -; SDAG-NEXT: ld1.s { v0 }[1], [x0], #4 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f32_post_imm_ld1lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 def $q0 +; CHECK-SD-NEXT: ld1.s { v0 }[1], [x0], #4 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f32_post_imm_ld1lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ldr s1, [x0], #4 -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 def $q0 -; CHECK-GISEL-NEXT: str x0, [x1] -; CHECK-GISEL-NEXT: mov.s v0[1], v1[0] -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0 -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f32_post_imm_ld1lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ldr s1, [x0], #4 +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 def $q0 +; CHECK-GI-NEXT: str x0, [x1] +; CHECK-GI-NEXT: mov.s v0[1], v1[0] +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0 +; CHECK-GI-NEXT: ret %tmp1 = load float, ptr %bar %tmp2 = insertelement <2 x float> %A, float %tmp1, i32 1 %tmp3 = getelementptr float, ptr %bar, i64 1 @@ -14301,24 +13680,24 @@ define <2 x float> @test_v2f32_post_imm_ld1lane(ptr %bar, ptr %ptr, <2 x float> } define <2 x float> @test_v2f32_post_reg_ld1lane(ptr %bar, ptr %ptr, i64 %inc, <2 x float> %A) { -; SDAG-LABEL: test_v2f32_post_reg_ld1lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #2 -; SDAG-NEXT: ; kill: def $d0 killed $d0 def $q0 -; SDAG-NEXT: ld1.s { v0 }[1], [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f32_post_reg_ld1lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #2 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 def $q0 +; CHECK-SD-NEXT: ld1.s { v0 }[1], [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f32_post_reg_ld1lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ldr s1, [x0] -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 def $q0 -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #2 -; CHECK-GISEL-NEXT: mov.s v0[1], v1[0] -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0 -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f32_post_reg_ld1lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ldr s1, [x0] +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 def $q0 +; CHECK-GI-NEXT: add x8, x0, x2, lsl #2 +; CHECK-GI-NEXT: mov.s v0[1], v1[0] +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0 +; CHECK-GI-NEXT: ret %tmp1 = load float, ptr %bar %tmp2 = insertelement <2 x float> %A, float %tmp1, i32 1 %tmp3 = getelementptr float, ptr %bar, i64 %inc @@ -14327,18 +13706,18 @@ define <2 x float> @test_v2f32_post_reg_ld1lane(ptr %bar, ptr %ptr, i64 %inc, <2 } define <2 x double> @test_v2f64_post_imm_ld1lane(ptr %bar, ptr %ptr, <2 x double> %A) { -; SDAG-LABEL: test_v2f64_post_imm_ld1lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld1.d { v0 }[1], [x0], #8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f64_post_imm_ld1lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld1.d { v0 }[1], [x0], #8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f64_post_imm_ld1lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ldr d1, [x0], #8 -; CHECK-GISEL-NEXT: str x0, [x1] -; CHECK-GISEL-NEXT: mov.d v0[1], v1[0] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f64_post_imm_ld1lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ldr d1, [x0], #8 +; CHECK-GI-NEXT: str x0, [x1] +; CHECK-GI-NEXT: mov.d v0[1], v1[0] +; CHECK-GI-NEXT: ret %tmp1 = load double, ptr %bar %tmp2 = insertelement <2 x double> %A, double %tmp1, i32 1 %tmp3 = getelementptr double, ptr %bar, i64 1 @@ -14347,20 +13726,20 @@ define <2 x double> @test_v2f64_post_imm_ld1lane(ptr %bar, ptr %ptr, <2 x double } define <2 x double> @test_v2f64_post_reg_ld1lane(ptr %bar, ptr %ptr, i64 %inc, <2 x double> %A) { -; SDAG-LABEL: test_v2f64_post_reg_ld1lane: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #3 -; SDAG-NEXT: ld1.d { v0 }[1], [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v2f64_post_reg_ld1lane: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #3 +; CHECK-SD-NEXT: ld1.d { v0 }[1], [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v2f64_post_reg_ld1lane: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ldr d1, [x0] -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #3 -; CHECK-GISEL-NEXT: mov.d v0[1], v1[0] -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v2f64_post_reg_ld1lane: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ldr d1, [x0] +; CHECK-GI-NEXT: add x8, x0, x2, lsl #3 +; CHECK-GI-NEXT: mov.d v0[1], v1[0] +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: ret %tmp1 = load double, ptr %bar %tmp2 = insertelement <2 x double> %A, double %tmp1, i32 1 %tmp3 = getelementptr double, ptr %bar, i64 %inc @@ -14396,34 +13775,34 @@ define <4 x float> @test_v4f32_post_reg_ld1lane_dep_vec_on_load(ptr %bar, ptr %p ; legalizer to run. We achieve that using the ctpop. ; PR23265 define <4 x i16> @test_v4i16_post_reg_ld1lane_forced_narrow(ptr %bar, ptr %ptr, i64 %inc, <4 x i16> %A, ptr %d) { -; SDAG-LABEL: test_v4i16_post_reg_ld1lane_forced_narrow: -; SDAG: ; %bb.0: -; SDAG-NEXT: lsl x8, x2, #1 -; SDAG-NEXT: ; kill: def $d0 killed $d0 def $q0 -; SDAG-NEXT: ld1.h { v0 }[1], [x0], x8 -; SDAG-NEXT: str x0, [x1] -; SDAG-NEXT: ldr d1, [x3] -; SDAG-NEXT: ; kill: def $d0 killed $d0 killed $q0 -; SDAG-NEXT: cnt.8b v1, v1 -; SDAG-NEXT: uaddlp.4h v1, v1 -; SDAG-NEXT: uaddlp.2s v1, v1 -; SDAG-NEXT: str d1, [x3] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_v4i16_post_reg_ld1lane_forced_narrow: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: lsl x8, x2, #1 +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 def $q0 +; CHECK-SD-NEXT: ld1.h { v0 }[1], [x0], x8 +; CHECK-SD-NEXT: str x0, [x1] +; CHECK-SD-NEXT: ldr d1, [x3] +; CHECK-SD-NEXT: ; kill: def $d0 killed $d0 killed $q0 +; CHECK-SD-NEXT: cnt.8b v1, v1 +; CHECK-SD-NEXT: uaddlp.4h v1, v1 +; CHECK-SD-NEXT: uaddlp.2s v1, v1 +; CHECK-SD-NEXT: str d1, [x3] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_v4i16_post_reg_ld1lane_forced_narrow: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: add x8, x0, x2, lsl #1 -; CHECK-GISEL-NEXT: ldr h1, [x0] -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 def $q0 -; CHECK-GISEL-NEXT: str x8, [x1] -; CHECK-GISEL-NEXT: mov.h v0[1], v1[0] -; CHECK-GISEL-NEXT: ldr d2, [x3] -; CHECK-GISEL-NEXT: ; kill: def $d0 killed $d0 killed $q0 -; CHECK-GISEL-NEXT: cnt.8b v2, v2 -; CHECK-GISEL-NEXT: uaddlp.4h v2, v2 -; CHECK-GISEL-NEXT: uaddlp.2s v1, v2 -; CHECK-GISEL-NEXT: str d1, [x3] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_v4i16_post_reg_ld1lane_forced_narrow: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: add x8, x0, x2, lsl #1 +; CHECK-GI-NEXT: ldr h1, [x0] +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 def $q0 +; CHECK-GI-NEXT: str x8, [x1] +; CHECK-GI-NEXT: mov.h v0[1], v1[0] +; CHECK-GI-NEXT: ldr d2, [x3] +; CHECK-GI-NEXT: ; kill: def $d0 killed $d0 killed $q0 +; CHECK-GI-NEXT: cnt.8b v2, v2 +; CHECK-GI-NEXT: uaddlp.4h v2, v2 +; CHECK-GI-NEXT: uaddlp.2s v1, v2 +; CHECK-GI-NEXT: str d1, [x3] +; CHECK-GI-NEXT: ret %tmp1 = load i16, ptr %bar %tmp2 = insertelement <4 x i16> %A, i16 %tmp1, i32 1 %tmp3 = getelementptr i16, ptr %bar, i64 %inc @@ -14437,27 +13816,27 @@ define <4 x i16> @test_v4i16_post_reg_ld1lane_forced_narrow(ptr %bar, ptr %ptr, declare <2 x i32> @llvm.ctpop.v2i32(<2 x i32>) define void @test_ld1lane_build(ptr %ptr0, ptr %ptr1, ptr %ptr2, ptr %ptr3, ptr %out) { -; SDAG-LABEL: test_ld1lane_build: -; SDAG: ; %bb.0: -; SDAG-NEXT: ldr s0, [x2] -; SDAG-NEXT: ldr s1, [x0] -; SDAG-NEXT: ld1.s { v0 }[1], [x3] -; SDAG-NEXT: ld1.s { v1 }[1], [x1] -; SDAG-NEXT: sub.2s v0, v1, v0 -; SDAG-NEXT: str d0, [x4] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_ld1lane_build: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ldr s0, [x2] +; CHECK-SD-NEXT: ldr s1, [x0] +; CHECK-SD-NEXT: ld1.s { v0 }[1], [x3] +; CHECK-SD-NEXT: ld1.s { v1 }[1], [x1] +; CHECK-SD-NEXT: sub.2s v0, v1, v0 +; CHECK-SD-NEXT: str d0, [x4] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_ld1lane_build: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ldr s0, [x0] -; CHECK-GISEL-NEXT: ldr s1, [x1] -; CHECK-GISEL-NEXT: ldr s2, [x2] -; CHECK-GISEL-NEXT: ldr s3, [x3] -; CHECK-GISEL-NEXT: mov.s v0[1], v1[0] -; CHECK-GISEL-NEXT: mov.s v2[1], v3[0] -; CHECK-GISEL-NEXT: sub.2s v0, v0, v2 -; CHECK-GISEL-NEXT: str d0, [x4] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_ld1lane_build: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ldr s0, [x0] +; CHECK-GI-NEXT: ldr s1, [x1] +; CHECK-GI-NEXT: ldr s2, [x2] +; CHECK-GI-NEXT: ldr s3, [x3] +; CHECK-GI-NEXT: mov.s v0[1], v1[0] +; CHECK-GI-NEXT: mov.s v2[1], v3[0] +; CHECK-GI-NEXT: sub.2s v0, v0, v2 +; CHECK-GI-NEXT: str d0, [x4] +; CHECK-GI-NEXT: ret %load0 = load i32, ptr %ptr0, align 4 %load1 = load i32, ptr %ptr1, align 4 %vec0_0 = insertelement <2 x i32> undef, i32 %load0, i32 0 @@ -14474,28 +13853,28 @@ define void @test_ld1lane_build(ptr %ptr0, ptr %ptr1, ptr %ptr2, ptr %ptr3, ptr } define void @test_ld1lane_build_i16(ptr %a, ptr %b, ptr %c, ptr %d, <4 x i16> %e, ptr %p) { -; SDAG-LABEL: test_ld1lane_build_i16: -; SDAG: ; %bb.0: -; SDAG-NEXT: ldr h1, [x0] -; SDAG-NEXT: ld1.h { v1 }[1], [x1] -; SDAG-NEXT: ld1.h { v1 }[2], [x2] -; SDAG-NEXT: ld1.h { v1 }[3], [x3] -; SDAG-NEXT: sub.4h v0, v1, v0 -; SDAG-NEXT: str d0, [x4] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_ld1lane_build_i16: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ldr h1, [x0] +; CHECK-SD-NEXT: ld1.h { v1 }[1], [x1] +; CHECK-SD-NEXT: ld1.h { v1 }[2], [x2] +; CHECK-SD-NEXT: ld1.h { v1 }[3], [x3] +; CHECK-SD-NEXT: sub.4h v0, v1, v0 +; CHECK-SD-NEXT: str d0, [x4] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_ld1lane_build_i16: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ldr h1, [x0] -; CHECK-GISEL-NEXT: ldr h2, [x1] -; CHECK-GISEL-NEXT: mov.h v1[1], v2[0] -; CHECK-GISEL-NEXT: ldr h2, [x2] -; CHECK-GISEL-NEXT: mov.h v1[2], v2[0] -; CHECK-GISEL-NEXT: ldr h2, [x3] -; CHECK-GISEL-NEXT: mov.h v1[3], v2[0] -; CHECK-GISEL-NEXT: sub.4h v0, v1, v0 -; CHECK-GISEL-NEXT: str d0, [x4] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_ld1lane_build_i16: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ldr h1, [x0] +; CHECK-GI-NEXT: ldr h2, [x1] +; CHECK-GI-NEXT: mov.h v1[1], v2[0] +; CHECK-GI-NEXT: ldr h2, [x2] +; CHECK-GI-NEXT: mov.h v1[2], v2[0] +; CHECK-GI-NEXT: ldr h2, [x3] +; CHECK-GI-NEXT: mov.h v1[3], v2[0] +; CHECK-GI-NEXT: sub.4h v0, v1, v0 +; CHECK-GI-NEXT: str d0, [x4] +; CHECK-GI-NEXT: ret %ld.a = load i16, ptr %a %ld.b = load i16, ptr %b %ld.c = load i16, ptr %c @@ -14510,34 +13889,34 @@ define void @test_ld1lane_build_i16(ptr %a, ptr %b, ptr %c, ptr %d, <4 x i16> % } define void @test_ld1lane_build_half(ptr %a, ptr %b, ptr %c, ptr %d, <4 x half> %e, ptr %p) { -; SDAG-LABEL: test_ld1lane_build_half: -; SDAG: ; %bb.0: -; SDAG-NEXT: ldr h1, [x0] -; SDAG-NEXT: fcvtl v0.4s, v0.4h -; SDAG-NEXT: ld1.h { v1 }[1], [x1] -; SDAG-NEXT: ld1.h { v1 }[2], [x2] -; SDAG-NEXT: ld1.h { v1 }[3], [x3] -; SDAG-NEXT: fcvtl v1.4s, v1.4h -; SDAG-NEXT: fsub.4s v0, v1, v0 -; SDAG-NEXT: fcvtn v0.4h, v0.4s -; SDAG-NEXT: str d0, [x4] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_ld1lane_build_half: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ldr h1, [x0] +; CHECK-SD-NEXT: fcvtl v0.4s, v0.4h +; CHECK-SD-NEXT: ld1.h { v1 }[1], [x1] +; CHECK-SD-NEXT: ld1.h { v1 }[2], [x2] +; CHECK-SD-NEXT: ld1.h { v1 }[3], [x3] +; CHECK-SD-NEXT: fcvtl v1.4s, v1.4h +; CHECK-SD-NEXT: fsub.4s v0, v1, v0 +; CHECK-SD-NEXT: fcvtn v0.4h, v0.4s +; CHECK-SD-NEXT: str d0, [x4] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_ld1lane_build_half: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ldr h1, [x0] -; CHECK-GISEL-NEXT: ldr h2, [x1] -; CHECK-GISEL-NEXT: fcvtl v0.4s, v0.4h -; CHECK-GISEL-NEXT: mov.h v1[1], v2[0] -; CHECK-GISEL-NEXT: ldr h2, [x2] -; CHECK-GISEL-NEXT: mov.h v1[2], v2[0] -; CHECK-GISEL-NEXT: ldr h2, [x3] -; CHECK-GISEL-NEXT: mov.h v1[3], v2[0] -; CHECK-GISEL-NEXT: fcvtl v1.4s, v1.4h -; CHECK-GISEL-NEXT: fsub.4s v0, v1, v0 -; CHECK-GISEL-NEXT: fcvtn v0.4h, v0.4s -; CHECK-GISEL-NEXT: str d0, [x4] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_ld1lane_build_half: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ldr h1, [x0] +; CHECK-GI-NEXT: ldr h2, [x1] +; CHECK-GI-NEXT: fcvtl v0.4s, v0.4h +; CHECK-GI-NEXT: mov.h v1[1], v2[0] +; CHECK-GI-NEXT: ldr h2, [x2] +; CHECK-GI-NEXT: mov.h v1[2], v2[0] +; CHECK-GI-NEXT: ldr h2, [x3] +; CHECK-GI-NEXT: mov.h v1[3], v2[0] +; CHECK-GI-NEXT: fcvtl v1.4s, v1.4h +; CHECK-GI-NEXT: fsub.4s v0, v1, v0 +; CHECK-GI-NEXT: fcvtn v0.4h, v0.4s +; CHECK-GI-NEXT: str d0, [x4] +; CHECK-GI-NEXT: ret %ld.a = load half, ptr %a %ld.b = load half, ptr %b %ld.c = load half, ptr %c @@ -14552,42 +13931,42 @@ define void @test_ld1lane_build_half(ptr %a, ptr %b, ptr %c, ptr %d, <4 x half> } define void @test_ld1lane_build_i8(ptr %a, ptr %b, ptr %c, ptr %d, ptr %e, ptr %f, ptr %g, ptr %h, <8 x i8> %v, ptr %p) { -; SDAG-LABEL: test_ld1lane_build_i8: -; SDAG: ; %bb.0: -; SDAG-NEXT: ldr b1, [x0] -; SDAG-NEXT: ldr x8, [sp] -; SDAG-NEXT: ld1.b { v1 }[1], [x1] -; SDAG-NEXT: ld1.b { v1 }[2], [x2] -; SDAG-NEXT: ld1.b { v1 }[3], [x3] -; SDAG-NEXT: ld1.b { v1 }[4], [x4] -; SDAG-NEXT: ld1.b { v1 }[5], [x5] -; SDAG-NEXT: ld1.b { v1 }[6], [x6] -; SDAG-NEXT: ld1.b { v1 }[7], [x7] -; SDAG-NEXT: sub.8b v0, v1, v0 -; SDAG-NEXT: str d0, [x8] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_ld1lane_build_i8: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ldr b1, [x0] +; CHECK-SD-NEXT: ldr x8, [sp] +; CHECK-SD-NEXT: ld1.b { v1 }[1], [x1] +; CHECK-SD-NEXT: ld1.b { v1 }[2], [x2] +; CHECK-SD-NEXT: ld1.b { v1 }[3], [x3] +; CHECK-SD-NEXT: ld1.b { v1 }[4], [x4] +; CHECK-SD-NEXT: ld1.b { v1 }[5], [x5] +; CHECK-SD-NEXT: ld1.b { v1 }[6], [x6] +; CHECK-SD-NEXT: ld1.b { v1 }[7], [x7] +; CHECK-SD-NEXT: sub.8b v0, v1, v0 +; CHECK-SD-NEXT: str d0, [x8] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_ld1lane_build_i8: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ldr b1, [x0] -; CHECK-GISEL-NEXT: ldr b2, [x1] -; CHECK-GISEL-NEXT: ldr x8, [sp] -; CHECK-GISEL-NEXT: mov.b v1[1], v2[0] -; CHECK-GISEL-NEXT: ldr b2, [x2] -; CHECK-GISEL-NEXT: mov.b v1[2], v2[0] -; CHECK-GISEL-NEXT: ldr b2, [x3] -; CHECK-GISEL-NEXT: mov.b v1[3], v2[0] -; CHECK-GISEL-NEXT: ldr b2, [x4] -; CHECK-GISEL-NEXT: mov.b v1[4], v2[0] -; CHECK-GISEL-NEXT: ldr b2, [x5] -; CHECK-GISEL-NEXT: mov.b v1[5], v2[0] -; CHECK-GISEL-NEXT: ldr b2, [x6] -; CHECK-GISEL-NEXT: mov.b v1[6], v2[0] -; CHECK-GISEL-NEXT: ldr b2, [x7] -; CHECK-GISEL-NEXT: mov.b v1[7], v2[0] -; CHECK-GISEL-NEXT: sub.8b v0, v1, v0 -; CHECK-GISEL-NEXT: str d0, [x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_ld1lane_build_i8: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ldr b1, [x0] +; CHECK-GI-NEXT: ldr b2, [x1] +; CHECK-GI-NEXT: ldr x8, [sp] +; CHECK-GI-NEXT: mov.b v1[1], v2[0] +; CHECK-GI-NEXT: ldr b2, [x2] +; CHECK-GI-NEXT: mov.b v1[2], v2[0] +; CHECK-GI-NEXT: ldr b2, [x3] +; CHECK-GI-NEXT: mov.b v1[3], v2[0] +; CHECK-GI-NEXT: ldr b2, [x4] +; CHECK-GI-NEXT: mov.b v1[4], v2[0] +; CHECK-GI-NEXT: ldr b2, [x5] +; CHECK-GI-NEXT: mov.b v1[5], v2[0] +; CHECK-GI-NEXT: ldr b2, [x6] +; CHECK-GI-NEXT: mov.b v1[6], v2[0] +; CHECK-GI-NEXT: ldr b2, [x7] +; CHECK-GI-NEXT: mov.b v1[7], v2[0] +; CHECK-GI-NEXT: sub.8b v0, v1, v0 +; CHECK-GI-NEXT: str d0, [x8] +; CHECK-GI-NEXT: ret %ld.a = load i8, ptr %a %ld.b = load i8, ptr %b %ld.c = load i8, ptr %c @@ -14610,24 +13989,24 @@ define void @test_ld1lane_build_i8(ptr %a, ptr %b, ptr %c, ptr %d, ptr %e, ptr } define <4 x i32> @test_inc_cycle(<4 x i32> %vec, ptr %in) { -; SDAG-LABEL: test_inc_cycle: -; SDAG: ; %bb.0: -; SDAG-NEXT: ld1.s { v0 }[0], [x0] -; SDAG-NEXT: adrp x9, _var@PAGE -; SDAG-NEXT: fmov x8, d0 -; SDAG-NEXT: add x8, x0, x8, lsl #2 -; SDAG-NEXT: str x8, [x9, _var@PAGEOFF] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: test_inc_cycle: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ld1.s { v0 }[0], [x0] +; CHECK-SD-NEXT: adrp x9, _var@PAGE +; CHECK-SD-NEXT: fmov x8, d0 +; CHECK-SD-NEXT: add x8, x0, x8, lsl #2 +; CHECK-SD-NEXT: str x8, [x9, _var@PAGEOFF] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: test_inc_cycle: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: ldr s1, [x0] -; CHECK-GISEL-NEXT: adrp x9, _var@PAGE -; CHECK-GISEL-NEXT: mov.s v0[0], v1[0] -; CHECK-GISEL-NEXT: fmov x8, d0 -; CHECK-GISEL-NEXT: add x8, x0, x8, lsl #2 -; CHECK-GISEL-NEXT: str x8, [x9, _var@PAGEOFF] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: test_inc_cycle: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: ldr s1, [x0] +; CHECK-GI-NEXT: adrp x9, _var@PAGE +; CHECK-GI-NEXT: mov.s v0[0], v1[0] +; CHECK-GI-NEXT: fmov x8, d0 +; CHECK-GI-NEXT: add x8, x0, x8, lsl #2 +; CHECK-GI-NEXT: str x8, [x9, _var@PAGEOFF] +; CHECK-GI-NEXT: ret %elt = load i32, ptr %in %newvec = insertelement <4 x i32> %vec, i32 %elt, i32 0 @@ -14644,69 +14023,69 @@ define <4 x i32> @test_inc_cycle(<4 x i32> %vec, ptr %in) { @var = global ptr null define i8 @load_single_extract_variable_index_i8(ptr %A, i32 %idx) { -; SDAG-LABEL: load_single_extract_variable_index_i8: -; SDAG: ; %bb.0: -; SDAG-NEXT: sub sp, sp, #16 -; SDAG-NEXT: .cfi_def_cfa_offset 16 -; SDAG-NEXT: mov x8, sp -; SDAG-NEXT: ldr q0, [x0] -; SDAG-NEXT: ; kill: def $w1 killed $w1 def $x1 -; SDAG-NEXT: bfxil x8, x1, #0, #4 -; SDAG-NEXT: str q0, [sp] -; SDAG-NEXT: ldrb w0, [x8] -; SDAG-NEXT: add sp, sp, #16 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: load_single_extract_variable_index_i8: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: sub sp, sp, #16 +; CHECK-SD-NEXT: .cfi_def_cfa_offset 16 +; CHECK-SD-NEXT: mov x8, sp +; CHECK-SD-NEXT: ldr q0, [x0] +; CHECK-SD-NEXT: ; kill: def $w1 killed $w1 def $x1 +; CHECK-SD-NEXT: bfxil x8, x1, #0, #4 +; CHECK-SD-NEXT: str q0, [sp] +; CHECK-SD-NEXT: ldrb w0, [x8] +; CHECK-SD-NEXT: add sp, sp, #16 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: load_single_extract_variable_index_i8: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov w8, w1 -; CHECK-GISEL-NEXT: and x8, x8, #0xf -; CHECK-GISEL-NEXT: ldrb w0, [x0, x8] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: load_single_extract_variable_index_i8: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov w8, w1 +; CHECK-GI-NEXT: and x8, x8, #0xf +; CHECK-GI-NEXT: ldrb w0, [x0, x8] +; CHECK-GI-NEXT: ret %lv = load <16 x i8>, ptr %A %e = extractelement <16 x i8> %lv, i32 %idx ret i8 %e } define i16 @load_single_extract_variable_index_i16(ptr %A, i32 %idx) { -; SDAG-LABEL: load_single_extract_variable_index_i16: -; SDAG: ; %bb.0: -; SDAG-NEXT: sub sp, sp, #16 -; SDAG-NEXT: .cfi_def_cfa_offset 16 -; SDAG-NEXT: mov x8, sp -; SDAG-NEXT: ldr q0, [x0] -; SDAG-NEXT: ; kill: def $w1 killed $w1 def $x1 -; SDAG-NEXT: bfi x8, x1, #1, #3 -; SDAG-NEXT: str q0, [sp] -; SDAG-NEXT: ldrh w0, [x8] -; SDAG-NEXT: add sp, sp, #16 -; SDAG-NEXT: ret +; CHECK-SD-LABEL: load_single_extract_variable_index_i16: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: sub sp, sp, #16 +; CHECK-SD-NEXT: .cfi_def_cfa_offset 16 +; CHECK-SD-NEXT: mov x8, sp +; CHECK-SD-NEXT: ldr q0, [x0] +; CHECK-SD-NEXT: ; kill: def $w1 killed $w1 def $x1 +; CHECK-SD-NEXT: bfi x8, x1, #1, #3 +; CHECK-SD-NEXT: str q0, [sp] +; CHECK-SD-NEXT: ldrh w0, [x8] +; CHECK-SD-NEXT: add sp, sp, #16 +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: load_single_extract_variable_index_i16: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov w8, w1 -; CHECK-GISEL-NEXT: and x8, x8, #0x7 -; CHECK-GISEL-NEXT: ldrh w0, [x0, x8, lsl #1] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: load_single_extract_variable_index_i16: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov w8, w1 +; CHECK-GI-NEXT: and x8, x8, #0x7 +; CHECK-GI-NEXT: ldrh w0, [x0, x8, lsl #1] +; CHECK-GI-NEXT: ret %lv = load <8 x i16>, ptr %A %e = extractelement <8 x i16> %lv, i32 %idx ret i16 %e } define i32 @load_single_extract_variable_index_i32(ptr %A, i32 %idx) { -; SDAG-LABEL: load_single_extract_variable_index_i32: -; SDAG: ; %bb.0: -; SDAG-NEXT: ; kill: def $w1 killed $w1 def $x1 -; SDAG-NEXT: and x8, x1, #0x3 -; SDAG-NEXT: ldr w0, [x0, x8, lsl #2] -; SDAG-NEXT: ret +; CHECK-SD-LABEL: load_single_extract_variable_index_i32: +; CHECK-SD: ; %bb.0: +; CHECK-SD-NEXT: ; kill: def $w1 killed $w1 def $x1 +; CHECK-SD-NEXT: and x8, x1, #0x3 +; CHECK-SD-NEXT: ldr w0, [x0, x8, lsl #2] +; CHECK-SD-NEXT: ret ; -; CHECK-GISEL-LABEL: load_single_extract_variable_index_i32: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: mov w8, w1 -; CHECK-GISEL-NEXT: and x8, x8, #0x3 -; CHECK-GISEL-NEXT: ldr w0, [x0, x8, lsl #2] -; CHECK-GISEL-NEXT: ret +; CHECK-GI-LABEL: load_single_extract_variable_index_i32: +; CHECK-GI: ; %bb.0: +; CHECK-GI-NEXT: mov w8, w1 +; CHECK-GI-NEXT: and x8, x8, #0x3 +; CHECK-GI-NEXT: ldr w0, [x0, x8, lsl #2] +; CHECK-GI-NEXT: ret %lv = load <4 x i32>, ptr %A %e = extractelement <4 x i32> %lv, i32 %idx ret i32 %e @@ -14751,17 +14130,11 @@ define i32 @load_single_extract_valid_const_index_v3i32(ptr %A, i32 %idx) { } define i32 @load_single_extract_variable_index_masked_i32(ptr %A, i32 %idx) { -; SDAG-LABEL: load_single_extract_variable_index_masked_i32: -; SDAG: ; %bb.0: -; SDAG-NEXT: and w8, w1, #0x3 -; SDAG-NEXT: ldr w0, [x0, w8, uxtw #2] -; SDAG-NEXT: ret -; -; CHECK-GISEL-LABEL: load_single_extract_variable_index_masked_i32: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: and w8, w1, #0x3 -; CHECK-GISEL-NEXT: ldr w0, [x0, w8, uxtw #2] -; CHECK-GISEL-NEXT: ret +; CHECK-LABEL: load_single_extract_variable_index_masked_i32: +; CHECK: ; %bb.0: +; CHECK-NEXT: and w8, w1, #0x3 +; CHECK-NEXT: ldr w0, [x0, w8, uxtw #2] +; CHECK-NEXT: ret %idx.x = and i32 %idx, 3 %lv = load <4 x i32>, ptr %A %e = extractelement <4 x i32> %lv, i32 %idx.x @@ -14769,17 +14142,11 @@ define i32 @load_single_extract_variable_index_masked_i32(ptr %A, i32 %idx) { } define i32 @load_single_extract_variable_index_masked2_i32(ptr %A, i32 %idx) { -; SDAG-LABEL: load_single_extract_variable_index_masked2_i32: -; SDAG: ; %bb.0: -; SDAG-NEXT: and w8, w1, #0x1 -; SDAG-NEXT: ldr w0, [x0, w8, uxtw #2] -; SDAG-NEXT: ret -; -; CHECK-GISEL-LABEL: load_single_extract_variable_index_masked2_i32: -; CHECK-GISEL: ; %bb.0: -; CHECK-GISEL-NEXT: and w8, w1, #0x1 -; CHECK-GISEL-NEXT: ldr w0, [x0, w8, uxtw #2] -; CHECK-GISEL-NEXT: ret +; CHECK-LABEL: load_single_extract_variable_index_masked2_i32: +; CHECK: ; %bb.0: +; CHECK-NEXT: and w8, w1, #0x1 +; CHECK-NEXT: ldr w0, [x0, w8, uxtw #2] +; CHECK-NEXT: ret %idx.x = and i32 %idx, 1 %lv = load <4 x i32>, ptr %A %e = extractelement <4 x i32> %lv, i32 %idx.x diff --git a/llvm/test/CodeGen/AArch64/arm64-neon-copy.ll b/llvm/test/CodeGen/AArch64/arm64-neon-copy.ll index 8f322ab1c362..328b782c1495 100644 --- a/llvm/test/CodeGen/AArch64/arm64-neon-copy.ll +++ b/llvm/test/CodeGen/AArch64/arm64-neon-copy.ll @@ -1,5 +1,12 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc < %s -verify-machineinstrs -mtriple=aarch64-none-linux-gnu -mattr=+neon -fp-contract=fast | FileCheck %s +; RUN: llc < %s -verify-machineinstrs -mtriple=aarch64-none-linux-gnu -mattr=+neon | FileCheck %s --check-prefixes=CHECK,CHECK-SD +; RUN: llc < %s -verify-machineinstrs -mtriple=aarch64-none-linux-gnu -mattr=+neon -global-isel -global-isel-abort=2 2>&1 | FileCheck %s --check-prefixes=CHECK,CHECK-GI + +; CHECK-GI: warning: Instruction selection used fallback path for test_bitcastv2f32tov1f64 +; CHECK-GI-NEXT: warning: Instruction selection used fallback path for test_bitcastv1f64tov2f32 +; CHECK-GI-NEXT: warning: Instruction selection used fallback path for test_extracts_inserts_varidx_insert +; CHECK-GI-NEXT: warning: Instruction selection used fallback path for test_concat_v1i32_undef +; CHECK-GI-NEXT: warning: Instruction selection used fallback path for test_concat_diff_v1i32_v1i32 define <16 x i8> @ins16bw(<16 x i8> %tmp1, i8 %tmp2) { ; CHECK-LABEL: ins16bw: @@ -71,33 +78,54 @@ define <2 x i32> @ins2sw(<2 x i32> %tmp1, i32 %tmp2) { } define <16 x i8> @ins16b16(<16 x i8> %tmp1, <16 x i8> %tmp2) { -; CHECK-LABEL: ins16b16: -; CHECK: // %bb.0: -; CHECK-NEXT: mov v1.b[15], v0.b[2] -; CHECK-NEXT: mov v0.16b, v1.16b -; CHECK-NEXT: ret +; CHECK-SD-LABEL: ins16b16: +; CHECK-SD: // %bb.0: +; CHECK-SD-NEXT: mov v1.b[15], v0.b[2] +; CHECK-SD-NEXT: mov v0.16b, v1.16b +; CHECK-SD-NEXT: ret +; +; CHECK-GI-LABEL: ins16b16: +; CHECK-GI: // %bb.0: +; CHECK-GI-NEXT: mov b2, v0.b[2] +; CHECK-GI-NEXT: mov v0.16b, v1.16b +; CHECK-GI-NEXT: mov v0.b[15], v2.b[0] +; CHECK-GI-NEXT: ret %tmp3 = extractelement <16 x i8> %tmp1, i32 2 %tmp4 = insertelement <16 x i8> %tmp2, i8 %tmp3, i32 15 ret <16 x i8> %tmp4 } define <8 x i16> @ins8h8(<8 x i16> %tmp1, <8 x i16> %tmp2) { -; CHECK-LABEL: ins8h8: -; CHECK: // %bb.0: -; CHECK-NEXT: mov v1.h[7], v0.h[2] -; CHECK-NEXT: mov v0.16b, v1.16b -; CHECK-NEXT: ret +; CHECK-SD-LABEL: ins8h8: +; CHECK-SD: // %bb.0: +; CHECK-SD-NEXT: mov v1.h[7], v0.h[2] +; CHECK-SD-NEXT: mov v0.16b, v1.16b +; CHECK-SD-NEXT: ret +; +; CHECK-GI-LABEL: ins8h8: +; CHECK-GI: // %bb.0: +; CHECK-GI-NEXT: mov h2, v0.h[2] +; CHECK-GI-NEXT: mov v0.16b, v1.16b +; CHECK-GI-NEXT: mov v0.h[7], v2.h[0] +; CHECK-GI-NEXT: ret %tmp3 = extractelement <8 x i16> %tmp1, i32 2 %tmp4 = insertelement <8 x i16> %tmp2, i16 %tmp3, i32 7 ret <8 x i16> %tmp4 } define <4 x i32> @ins4s4(<4 x i32> %tmp1, <4 x i32> %tmp2) { -; CHECK-LABEL: ins4s4: -; CHECK: // %bb.0: -; CHECK-NEXT: mov v1.s[1], v0.s[2] -; CHECK-NEXT: mov v0.16b, v1.16b -; CHECK-NEXT: ret +; CHECK-SD-LABEL: ins4s4: +; CHECK-SD: // %bb.0: +; CHECK-SD-NEXT: mov v1.s[1], v0.s[2] +; CHECK-SD-NEXT: mov v0.16b, v1.16b +; CHECK-SD-NEXT: ret +; +; CHECK-GI-LABEL: ins4s4: +; CHECK-GI: // %bb.0: +; CHECK-GI-NEXT: mov s2, v0.s[2] +; CHECK-GI-NEXT: mov v0.16b, v1.16b +; CHECK-GI-NEXT: mov v0.s[1], v2.s[0] +; CHECK-GI-NEXT: ret %tmp3 = extractelement <4 x i32> %tmp1, i32 2 %tmp4 = insertelement <4 x i32> %tmp2, i32 %tmp3, i32 1 ret <4 x i32> %tmp4 @@ -115,11 +143,18 @@ define <2 x i64> @ins2d2(<2 x i64> %tmp1, <2 x i64> %tmp2) { } define <4 x float> @ins4f4(<4 x float> %tmp1, <4 x float> %tmp2) { -; CHECK-LABEL: ins4f4: -; CHECK: // %bb.0: -; CHECK-NEXT: mov v1.s[1], v0.s[2] -; CHECK-NEXT: mov v0.16b, v1.16b -; CHECK-NEXT: ret +; CHECK-SD-LABEL: ins4f4: +; CHECK-SD: // %bb.0: +; CHECK-SD-NEXT: mov v1.s[1], v0.s[2] +; CHECK-SD-NEXT: mov v0.16b, v1.16b +; CHECK-SD-NEXT: ret +; +; CHECK-GI-LABEL: ins4f4: +; CHECK-GI: // %bb.0: +; CHECK-GI-NEXT: mov s2, v0.s[2] +; CHECK-GI-NEXT: mov v0.16b, v1.16b +; CHECK-GI-NEXT: mov v0.s[1], v2.s[0] +; CHECK-GI-NEXT: ret %tmp3 = extractelement <4 x float> %tmp1, i32 2 %tmp4 = insertelement <4 x float> %tmp2, float %tmp3, i32 1 ret <4 x float> %tmp4 @@ -137,36 +172,60 @@ define <2 x double> @ins2df2(<2 x double> %tmp1, <2 x double> %tmp2) { } define <16 x i8> @ins8b16(<8 x i8> %tmp1, <16 x i8> %tmp2) { -; CHECK-LABEL: ins8b16: -; CHECK: // %bb.0: -; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0 -; CHECK-NEXT: mov v1.b[15], v0.b[2] -; CHECK-NEXT: mov v0.16b, v1.16b -; CHECK-NEXT: ret +; CHECK-SD-LABEL: ins8b16: +; CHECK-SD: // %bb.0: +; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0 +; CHECK-SD-NEXT: mov v1.b[15], v0.b[2] +; CHECK-SD-NEXT: mov v0.16b, v1.16b +; CHECK-SD-NEXT: ret +; +; CHECK-GI-LABEL: ins8b16: +; CHECK-GI: // %bb.0: +; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q0 +; CHECK-GI-NEXT: mov b2, v0.b[2] +; CHECK-GI-NEXT: mov v0.16b, v1.16b +; CHECK-GI-NEXT: mov v0.b[15], v2.b[0] +; CHECK-GI-NEXT: ret %tmp3 = extractelement <8 x i8> %tmp1, i32 2 %tmp4 = insertelement <16 x i8> %tmp2, i8 %tmp3, i32 15 ret <16 x i8> %tmp4 } define <8 x i16> @ins4h8(<4 x i16> %tmp1, <8 x i16> %tmp2) { -; CHECK-LABEL: ins4h8: -; CHECK: // %bb.0: -; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0 -; CHECK-NEXT: mov v1.h[7], v0.h[2] -; CHECK-NEXT: mov v0.16b, v1.16b -; CHECK-NEXT: ret +; CHECK-SD-LABEL: ins4h8: +; CHECK-SD: // %bb.0: +; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0 +; CHECK-SD-NEXT: mov v1.h[7], v0.h[2] +; CHECK-SD-NEXT: mov v0.16b, v1.16b +; CHECK-SD-NEXT: ret +; +; CHECK-GI-LABEL: ins4h8: +; CHECK-GI: // %bb.0: +; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q0 +; CHECK-GI-NEXT: mov h2, v0.h[2] +; CHECK-GI-NEXT: mov v0.16b, v1.16b +; CHECK-GI-NEXT: mov v0.h[7], v2.h[0] +; CHECK-GI-NEXT: ret %tmp3 = extractelement <4 x i16> %tmp1, i32 2 %tmp4 = insertelement <8 x i16> %tmp2, i16 %tmp3, i32 7 ret <8 x i16> %tmp4 } define <4 x i32> @ins2s4(<2 x i32> %tmp1, <4 x i32> %tmp2) { -; CHECK-LABEL: ins2s4: -; CHECK: // %bb.0: -; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0 -; CHECK-NEXT: mov v1.s[1], v0.s[1] -; CHECK-NEXT: mov v0.16b, v1.16b -; CHECK-NEXT: ret +; CHECK-SD-LABEL: ins2s4: +; CHECK-SD: // %bb.0: +; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0 +; CHECK-SD-NEXT: mov v1.s[1], v0.s[1] +; CHECK-SD-NEXT: mov v0.16b, v1.16b +; CHECK-SD-NEXT: ret +; +; CHECK-GI-LABEL: ins2s4: +; CHECK-GI: // %bb.0: +; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q0 +; CHECK-GI-NEXT: mov s2, v0.s[1] +; CHECK-GI-NEXT: mov v0.16b, v1.16b +; CHECK-GI-NEXT: mov v0.s[1], v2.s[0] +; CHECK-GI-NEXT: ret %tmp3 = extractelement <2 x i32> %tmp1, i32 1 %tmp4 = insertelement <4 x i32> %tmp2, i32 %tmp3, i32 1 ret <4 x i32> %tmp4 @@ -185,12 +244,20 @@ define <2 x i64> @ins1d2(<1 x i64> %tmp1, <2 x i64> %tmp2) { } define <4 x float> @ins2f4(<2 x float> %tmp1, <4 x float> %tmp2) { -; CHECK-LABEL: ins2f4: -; CHECK: // %bb.0: -; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0 -; CHECK-NEXT: mov v1.s[1], v0.s[1] -; CHECK-NEXT: mov v0.16b, v1.16b -; CHECK-NEXT: ret +; CHECK-SD-LABEL: ins2f4: +; CHECK-SD: // %bb.0: +; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0 +; CHECK-SD-NEXT: mov v1.s[1], v0.s[1] +; CHECK-SD-NEXT: mov v0.16b, v1.16b +; CHECK-SD-NEXT: ret +; +; CHECK-GI-LABEL: ins2f4: +; CHECK-GI: // %bb.0: +; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q0 +; CHECK-GI-NEXT: mov s2, v0.s[1] +; CHECK-GI-NEXT: mov v0.16b, v1.16b +; CHECK-GI-NEXT: mov v0.s[1], v2.s[0] +; CHECK-GI-NEXT: ret %tmp3 = extractelement <2 x float> %tmp1, i32 1 %tmp4 = insertelement <4 x float> %tmp2, float %tmp3, i32 1 ret <4 x float> %tmp4 @@ -220,36 +287,60 @@ define <2 x double> @ins1f2_args_flipped(<2 x double> %tmp2, <1 x double> %tmp1) } define <8 x i8> @ins16b8(<16 x i8> %tmp1, <8 x i8> %tmp2) { -; CHECK-LABEL: ins16b8: -; CHECK: // %bb.0: -; CHECK-NEXT: // kill: def $d1 killed $d1 def $q1 -; CHECK-NEXT: mov v1.b[7], v0.b[2] -; CHECK-NEXT: fmov d0, d1 -; CHECK-NEXT: ret +; CHECK-SD-LABEL: ins16b8: +; CHECK-SD: // %bb.0: +; CHECK-SD-NEXT: // kill: def $d1 killed $d1 def $q1 +; CHECK-SD-NEXT: mov v1.b[7], v0.b[2] +; CHECK-SD-NEXT: fmov d0, d1 +; CHECK-SD-NEXT: ret +; +; CHECK-GI-LABEL: ins16b8: +; CHECK-GI: // %bb.0: +; CHECK-GI-NEXT: mov b2, v0.b[2] +; CHECK-GI-NEXT: fmov d0, d1 +; CHECK-GI-NEXT: mov v0.b[7], v2.b[0] +; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0 +; CHECK-GI-NEXT: ret %tmp3 = extractelement <16 x i8> %tmp1, i32 2 %tmp4 = insertelement <8 x i8> %tmp2, i8 %tmp3, i32 7 ret <8 x i8> %tmp4 } define <4 x i16> @ins8h4(<8 x i16> %tmp1, <4 x i16> %tmp2) { -; CHECK-LABEL: ins8h4: -; CHECK: // %bb.0: -; CHECK-NEXT: // kill: def $d1 killed $d1 def $q1 -; CHECK-NEXT: mov v1.h[3], v0.h[2] -; CHECK-NEXT: fmov d0, d1 -; CHECK-NEXT: ret +; CHECK-SD-LABEL: ins8h4: +; CHECK-SD: // %bb.0: +; CHECK-SD-NEXT: // kill: def $d1 killed $d1 def $q1 +; CHECK-SD-NEXT: mov v1.h[3], v0.h[2] +; CHECK-SD-NEXT: fmov d0, d1 +; CHECK-SD-NEXT: ret +; +; CHECK-GI-LABEL: ins8h4: +; CHECK-GI: // %bb.0: +; CHECK-GI-NEXT: mov h2, v0.h[2] +; CHECK-GI-NEXT: fmov d0, d1 +; CHECK-GI-NEXT: mov v0.h[3], v2.h[0] +; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0 +; CHECK-GI-NEXT: ret %tmp3 = extractelement <8 x i16> %tmp1, i32 2 %tmp4 = insertelement <4 x i16> %tmp2, i16 %tmp3, i32 3 ret <4 x i16> %tmp4 } define <2 x i32> @ins4s2(<4 x i32> %tmp1, <2 x i32> %tmp2) { -; CHECK-LABEL: ins4s2: -; CHECK: // %bb.0: -; CHECK-NEXT: // kill: def $d1 killed $d1 def $q1 -; CHECK-NEXT: mov v1.s[1], v0.s[2] -; CHECK-NEXT: fmov d0, d1 -; CHECK-NEXT: ret +; CHECK-SD-LABEL: ins4s2: +; CHECK-SD: // %bb.0: +; CHECK-SD-NEXT: // kill: def $d1 killed $d1 def $q1 +; CHECK-SD-NEXT: mov v1.s[1], v0.s[2] +; CHECK-SD-NEXT: fmov d0, d1 +; CHECK-SD-NEXT: ret +; +; CHECK-GI-LABEL: ins4s2: +; CHECK-GI: // %bb.0: +; CHECK-GI-NEXT: mov s2, v0.s[2] +; CHECK-GI-NEXT: fmov d0, d1 +; CHECK-GI-NEXT: mov v0.s[1], v2.s[0] +; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0 +; CHECK-GI-NEXT: ret %tmp3 = extractelement <4 x i32> %tmp1, i32 2 %tmp4 = insertelement <2 x i32> %tmp2, i32 %tmp3, i32 1 ret <2 x i32> %tmp4 @@ -266,49 +357,80 @@ define <1 x i64> @ins2d1(<2 x i64> %tmp1, <1 x i64> %tmp2) { } define <2 x float> @ins4f2(<4 x float> %tmp1, <2 x float> %tmp2) { -; CHECK-LABEL: ins4f2: -; CHECK: // %bb.0: -; CHECK-NEXT: // kill: def $d1 killed $d1 def $q1 -; CHECK-NEXT: mov v1.s[1], v0.s[2] -; CHECK-NEXT: fmov d0, d1 -; CHECK-NEXT: ret +; CHECK-SD-LABEL: ins4f2: +; CHECK-SD: // %bb.0: +; CHECK-SD-NEXT: // kill: def $d1 killed $d1 def $q1 +; CHECK-SD-NEXT: mov v1.s[1], v0.s[2] +; CHECK-SD-NEXT: fmov d0, d1 +; CHECK-SD-NEXT: ret +; +; CHECK-GI-LABEL: ins4f2: +; CHECK-GI: // %bb.0: +; CHECK-GI-NEXT: mov s2, v0.s[2] +; CHECK-GI-NEXT: fmov d0, d1 +; CHECK-GI-NEXT: mov v0.s[1], v2.s[0] +; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0 +; CHECK-GI-NEXT: ret %tmp3 = extractelement <4 x float> %tmp1, i32 2 %tmp4 = insertelement <2 x float> %tmp2, float %tmp3, i32 1 ret <2 x float> %tmp4 } define <1 x double> @ins2f1(<2 x double> %tmp1, <1 x double> %tmp2) { -; CHECK-LABEL: ins2f1: -; CHECK: // %bb.0: -; CHECK-NEXT: ext v0.16b, v0.16b, v0.16b, #8 -; CHECK-NEXT: // kill: def $d0 killed $d0 killed $q0 -; CHECK-NEXT: ret +; CHECK-SD-LABEL: ins2f1: +; CHECK-SD: // %bb.0: +; CHECK-SD-NEXT: ext v0.16b, v0.16b, v0.16b, #8 +; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0 +; CHECK-SD-NEXT: ret +; +; CHECK-GI-LABEL: ins2f1: +; CHECK-GI: // %bb.0: +; CHECK-GI-NEXT: mov d0, v0.d[1] +; CHECK-GI-NEXT: ret %tmp3 = extractelement <2 x double> %tmp1, i32 1 %tmp4 = insertelement <1 x double> %tmp2, double %tmp3, i32 0 ret <1 x double> %tmp4 } define <8 x i8> @ins8b8(<8 x i8> %tmp1, <8 x i8> %tmp2) { -; CHECK-LABEL: ins8b8: -; CHECK: // %bb.0: -; CHECK-NEXT: // kill: def $d1 killed $d1 def $q1 -; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0 -; CHECK-NEXT: mov v1.b[4], v0.b[2] -; CHECK-NEXT: fmov d0, d1 -; CHECK-NEXT: ret +; CHECK-SD-LABEL: ins8b8: +; CHECK-SD: // %bb.0: +; CHECK-SD-NEXT: // kill: def $d1 killed $d1 def $q1 +; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0 +; CHECK-SD-NEXT: mov v1.b[4], v0.b[2] +; CHECK-SD-NEXT: fmov d0, d1 +; CHECK-SD-NEXT: ret +; +; CHECK-GI-LABEL: ins8b8: +; CHECK-GI: // %bb.0: +; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q0 +; CHECK-GI-NEXT: mov b2, v0.b[2] +; CHECK-GI-NEXT: fmov d0, d1 +; CHECK-GI-NEXT: mov v0.b[4], v2.b[0] +; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0 +; CHECK-GI-NEXT: ret %tmp3 = extractelement <8 x i8> %tmp1, i32 2 %tmp4 = insertelement <8 x i8> %tmp2, i8 %tmp3, i32 4 ret <8 x i8> %tmp4 } define <4 x i16> @ins4h4(<4 x i16> %tmp1, <4 x i16> %tmp2) { -; CHECK-LABEL: ins4h4: -; CHECK: // %bb.0: -; CHECK-NEXT: // kill: def $d1 killed $d1 def $q1 -; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0 -; CHECK-NEXT: mov v1.h[3], v0.h[2] -; CHECK-NEXT: fmov d0, d1 -; CHECK-NEXT: ret +; CHECK-SD-LABEL: ins4h4: +; CHECK-SD: // %bb.0: +; CHECK-SD-NEXT: // kill: def $d1 killed $d1 def $q1 +; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0 +; CHECK-SD-NEXT: mov v1.h[3], v0.h[2] +; CHECK-SD-NEXT: fmov d0, d1 +; CHECK-SD-NEXT: ret +; +; CHECK-GI-LABEL: ins4h4: +; CHECK-GI: // %bb.0: +; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q0 +; CHECK-GI-NEXT: mov h2, v0.h[2] +; CHECK-GI-NEXT: fmov d0, d1 +; CHECK-GI-NEXT: mov v0.h[3], v2.h[0] +; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0 +; CHECK-GI-NEXT: ret %tmp3 = extractelement <4 x i16> %tmp1, i32 2 %tmp4 = insertelement <4 x i16> %tmp2, i16 %tmp3, i32 3 ret <4 x i16> %tmp4 @@ -379,19 +501,31 @@ define i32 @umovw8h(<8 x i16> %tmp1) { } define i32 @umovw4s(<4 x i32> %tmp1) { -; CHECK-LABEL: umovw4s: -; CHECK: // %bb.0: -; CHECK-NEXT: mov w0, v0.s[2] -; CHECK-NEXT: ret +; CHECK-SD-LABEL: umovw4s: +; CHECK-SD: // %bb.0: +; CHECK-SD-NEXT: mov w0, v0.s[2] +; CHECK-SD-NEXT: ret +; +; CHECK-GI-LABEL: umovw4s: +; CHECK-GI: // %bb.0: +; CHECK-GI-NEXT: mov s0, v0.s[2] +; CHECK-GI-NEXT: fmov w0, s0 +; CHECK-GI-NEXT: ret %tmp3 = extractelement <4 x i32> %tmp1, i32 2 ret i32 %tmp3 } define i64 @umovx2d(<2 x i64> %tmp1) { -; CHECK-LABEL: umovx2d: -; CHECK: // %bb.0: -; CHECK-NEXT: mov x0, v0.d[1] -; CHECK-NEXT: ret +; CHECK-SD-LABEL: umovx2d: +; CHECK-SD: // %bb.0: +; CHECK-SD-NEXT: mov x0, v0.d[1] +; CHECK-SD-NEXT: ret +; +; CHECK-GI-LABEL: umovx2d: +; CHECK-GI: // %bb.0: +; CHECK-GI-NEXT: mov d0, v0.d[1] +; CHECK-GI-NEXT: fmov x0, d0 +; CHECK-GI-NEXT: ret %tmp3 = extractelement <2 x i64> %tmp1, i32 1 ret i64 %tmp3 } @@ -419,21 +553,33 @@ define i32 @umovw4h(<4 x i16> %tmp1) { } define i32 @umovw2s(<2 x i32> %tmp1) { -; CHECK-LABEL: umovw2s: -; CHECK: // %bb.0: -; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0 -; CHECK-NEXT: mov w0, v0.s[1] -; CHECK-NEXT: ret +; CHECK-SD-LABEL: umovw2s: +; CHECK-SD: // %bb.0: +; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0 +; CHECK-SD-NEXT: mov w0, v0.s[1] +; CHECK-SD-NEXT: ret +; +; CHECK-GI-LABEL: umovw2s: +; CHECK-GI: // %bb.0: +; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q0 +; CHECK-GI-NEXT: mov s0, v0.s[1] +; CHECK-GI-NEXT: fmov w0, s0 +; CHECK-GI-NEXT: ret %tmp3 = extractelement <2 x i32> %tmp1, i32 1 ret i32 %tmp3 } define i64 @umovx1d(<1 x i64> %tmp1) { -; CHECK-LABEL: umovx1d: -; CHECK: // %bb.0: -; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0 -; CHECK-NEXT: fmov x0, d0 -; CHECK-NEXT: ret +; CHECK-SD-LABEL: umovx1d: +; CHECK-SD: // %bb.0: +; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0 +; CHECK-SD-NEXT: fmov x0, d0 +; CHECK-SD-NEXT: ret +; +; CHECK-GI-LABEL: umovx1d: +; CHECK-GI: // %bb.0: +; CHECK-GI-NEXT: fmov x0, d0 +; CHECK-GI-NEXT: ret %tmp3 = extractelement <1 x i64> %tmp1, i32 0 ret i64 %tmp3 } @@ -552,22 +698,37 @@ define i64 @smovx2s(<2 x i32> %tmp1) { } define <8 x i8> @test_vcopy_lane_s8(<8 x i8> %v1, <8 x i8> %v2) { -; CHECK-LABEL: test_vcopy_lane_s8: -; CHECK: // %bb.0: -; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0 -; CHECK-NEXT: // kill: def $d1 killed $d1 def $q1 -; CHECK-NEXT: mov v0.b[5], v1.b[3] -; CHECK-NEXT: // kill: def $d0 killed $d0 killed $q0 -; CHECK-NEXT: ret +; CHECK-SD-LABEL: test_vcopy_lane_s8: +; CHECK-SD: // %bb.0: +; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0 +; CHECK-SD-NEXT: // kill: def $d1 killed $d1 def $q1 +; CHECK-SD-NEXT: mov v0.b[5], v1.b[3] +; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0 +; CHECK-SD-NEXT: ret +; +; CHECK-GI-LABEL: test_vcopy_lane_s8: +; CHECK-GI: // %bb.0: +; CHECK-GI-NEXT: // kill: def $d1 killed $d1 def $q1 +; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q0 +; CHECK-GI-NEXT: mov b1, v1.b[3] +; CHECK-GI-NEXT: mov v0.b[5], v1.b[0] +; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0 +; CHECK-GI-NEXT: ret %vset_lane = shufflevector <8 x i8> %v1, <8 x i8> %v2, <8 x i32> ret <8 x i8> %vset_lane } define <16 x i8> @test_vcopyq_laneq_s8(<16 x i8> %v1, <16 x i8> %v2) { -; CHECK-LABEL: test_vcopyq_laneq_s8: -; CHECK: // %bb.0: -; CHECK-NEXT: mov v0.b[14], v1.b[6] -; CHECK-NEXT: ret +; CHECK-SD-LABEL: test_vcopyq_laneq_s8: +; CHECK-SD: // %bb.0: +; CHECK-SD-NEXT: mov v0.b[14], v1.b[6] +; CHECK-SD-NEXT: ret +; +; CHECK-GI-LABEL: test_vcopyq_laneq_s8: +; CHECK-GI: // %bb.0: +; CHECK-GI-NEXT: mov b1, v1.b[6] +; CHECK-GI-NEXT: mov v0.b[14], v1.b[0] +; CHECK-GI-NEXT: ret %vset_lane = shufflevector <16 x i8> %v1, <16 x i8> %v2, <16 x i32> ret <16 x i8> %vset_lane } @@ -585,11 +746,18 @@ define <8 x i8> @test_vcopy_lane_swap_s8(<8 x i8> %v1, <8 x i8> %v2) { } define <16 x i8> @test_vcopyq_laneq_swap_s8(<16 x i8> %v1, <16 x i8> %v2) { -; CHECK-LABEL: test_vcopyq_laneq_swap_s8: -; CHECK: // %bb.0: -; CHECK-NEXT: mov v1.b[0], v0.b[15] -; CHECK-NEXT: mov v0.16b, v1.16b -; CHECK-NEXT: ret +; CHECK-SD-LABEL: test_vcopyq_laneq_swap_s8: +; CHECK-SD: // %bb.0: +; CHECK-SD-NEXT: mov v1.b[0], v0.b[15] +; CHECK-SD-NEXT: mov v0.16b, v1.16b +; CHECK-SD-NEXT: ret +; +; CHECK-GI-LABEL: test_vcopyq_laneq_swap_s8: +; CHECK-GI: // %bb.0: +; CHECK-GI-NEXT: mov b2, v0.b[15] +; CHECK-GI-NEXT: mov v0.16b, v1.16b +; CHECK-GI-NEXT: mov v0.b[0], v2.b[0] +; CHECK-GI-NEXT: ret %vset_lane = shufflevector <16 x i8> %v1, <16 x i8> %v2, <16 x i32> ret <16 x i8> %vset_lane } @@ -774,28 +942,46 @@ define <2 x i64> @test_vdupq_lane_s64(<1 x i64> %v1) #0 { } define <8 x i8> @test_vdup_laneq_s8(<16 x i8> %v1) #0 { -; CHECK-LABEL: test_vdup_laneq_s8: -; CHECK: // %bb.0: -; CHECK-NEXT: dup v0.8b, v0.b[5] -; CHECK-NEXT: ret +; CHECK-SD-LABEL: test_vdup_laneq_s8: +; CHECK-SD: // %bb.0: +; CHECK-SD-NEXT: dup v0.8b, v0.b[5] +; CHECK-SD-NEXT: ret +; +; CHECK-GI-LABEL: test_vdup_laneq_s8: +; CHECK-GI: // %bb.0: +; CHECK-GI-NEXT: dup v0.16b, v0.b[5] +; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0 +; CHECK-GI-NEXT: ret %shuffle = shufflevector <16 x i8> %v1, <16 x i8> undef, <8 x i32> ret <8 x i8> %shuffle } define <4 x i16> @test_vdup_laneq_s16(<8 x i16> %v1) #0 { -; CHECK-LABEL: test_vdup_laneq_s16: -; CHECK: // %bb.0: -; CHECK-NEXT: dup v0.4h, v0.h[2] -; CHECK-NEXT: ret +; CHECK-SD-LABEL: test_vdup_laneq_s16: +; CHECK-SD: // %bb.0: +; CHECK-SD-NEXT: dup v0.4h, v0.h[2] +; CHECK-SD-NEXT: ret +; +; CHECK-GI-LABEL: test_vdup_laneq_s16: +; CHECK-GI: // %bb.0: +; CHECK-GI-NEXT: dup v0.8h, v0.h[2] +; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0 +; CHECK-GI-NEXT: ret %shuffle = shufflevector <8 x i16> %v1, <8 x i16> undef, <4 x i32> ret <4 x i16> %shuffle } define <2 x i32> @test_vdup_laneq_s32(<4 x i32> %v1) #0 { -; CHECK-LABEL: test_vdup_laneq_s32: -; CHECK: // %bb.0: -; CHECK-NEXT: dup v0.2s, v0.s[1] -; CHECK-NEXT: ret +; CHECK-SD-LABEL: test_vdup_laneq_s32: +; CHECK-SD: // %bb.0: +; CHECK-SD-NEXT: dup v0.2s, v0.s[1] +; CHECK-SD-NEXT: ret +; +; CHECK-GI-LABEL: test_vdup_laneq_s32: +; CHECK-GI: // %bb.0: +; CHECK-GI-NEXT: dup v0.4s, v0.s[1] +; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0 +; CHECK-GI-NEXT: ret %shuffle = shufflevector <4 x i32> %v1, <4 x i32> undef, <2 x i32> ret <2 x i32> %shuffle } @@ -984,12 +1170,21 @@ define <1 x i64> @test_bitcastv2i32tov1f64(<2 x i32> %a) #0 { } define <1 x i64> @test_bitcastv1i64tov1f64(<1 x i64> %a) #0 { -; CHECK-LABEL: test_bitcastv1i64tov1f64: -; CHECK: // %bb.0: -; CHECK-NEXT: neg d0, d0 -; CHECK-NEXT: fcvtzs x8, d0 -; CHECK-NEXT: fmov d0, x8 -; CHECK-NEXT: ret +; CHECK-SD-LABEL: test_bitcastv1i64tov1f64: +; CHECK-SD: // %bb.0: +; CHECK-SD-NEXT: neg d0, d0 +; CHECK-SD-NEXT: fcvtzs x8, d0 +; CHECK-SD-NEXT: fmov d0, x8 +; CHECK-SD-NEXT: ret +; +; CHECK-GI-LABEL: test_bitcastv1i64tov1f64: +; CHECK-GI: // %bb.0: +; CHECK-GI-NEXT: fmov x8, d0 +; CHECK-GI-NEXT: neg x8, x8 +; CHECK-GI-NEXT: fmov d0, x8 +; CHECK-GI-NEXT: fcvtzs x8, d0 +; CHECK-GI-NEXT: fmov d0, x8 +; CHECK-GI-NEXT: ret %sub.i = sub <1 x i64> zeroinitializer, %a %1 = bitcast <1 x i64> %sub.i to <1 x double> %vcvt.i = fptosi <1 x double> %1 to <1 x i64> @@ -1010,13 +1205,19 @@ define <1 x i64> @test_bitcastv2f32tov1f64(<2 x float> %a) #0 { } define <8 x i8> @test_bitcastv1f64tov8i8(<1 x i64> %a) #0 { -; CHECK-LABEL: test_bitcastv1f64tov8i8: -; CHECK: // %bb.0: -; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0 -; CHECK-NEXT: fmov x8, d0 -; CHECK-NEXT: scvtf d0, x8 -; CHECK-NEXT: neg v0.8b, v0.8b -; CHECK-NEXT: ret +; CHECK-SD-LABEL: test_bitcastv1f64tov8i8: +; CHECK-SD: // %bb.0: +; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0 +; CHECK-SD-NEXT: fmov x8, d0 +; CHECK-SD-NEXT: scvtf d0, x8 +; CHECK-SD-NEXT: neg v0.8b, v0.8b +; CHECK-SD-NEXT: ret +; +; CHECK-GI-LABEL: test_bitcastv1f64tov8i8: +; CHECK-GI: // %bb.0: +; CHECK-GI-NEXT: scvtf d0, d0 +; CHECK-GI-NEXT: neg v0.8b, v0.8b +; CHECK-GI-NEXT: ret %vcvt.i = sitofp <1 x i64> %a to <1 x double> %1 = bitcast <1 x double> %vcvt.i to <8 x i8> %sub.i = sub <8 x i8> zeroinitializer, %1 @@ -1024,13 +1225,19 @@ define <8 x i8> @test_bitcastv1f64tov8i8(<1 x i64> %a) #0 { } define <4 x i16> @test_bitcastv1f64tov4i16(<1 x i64> %a) #0 { -; CHECK-LABEL: test_bitcastv1f64tov4i16: -; CHECK: // %bb.0: -; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0 -; CHECK-NEXT: fmov x8, d0 -; CHECK-NEXT: scvtf d0, x8 -; CHECK-NEXT: neg v0.4h, v0.4h -; CHECK-NEXT: ret +; CHECK-SD-LABEL: test_bitcastv1f64tov4i16: +; CHECK-SD: // %bb.0: +; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0 +; CHECK-SD-NEXT: fmov x8, d0 +; CHECK-SD-NEXT: scvtf d0, x8 +; CHECK-SD-NEXT: neg v0.4h, v0.4h +; CHECK-SD-NEXT: ret +; +; CHECK-GI-LABEL: test_bitcastv1f64tov4i16: +; CHECK-GI: // %bb.0: +; CHECK-GI-NEXT: scvtf d0, d0 +; CHECK-GI-NEXT: neg v0.4h, v0.4h +; CHECK-GI-NEXT: ret %vcvt.i = sitofp <1 x i64> %a to <1 x double> %1 = bitcast <1 x double> %vcvt.i to <4 x i16> %sub.i = sub <4 x i16> zeroinitializer, %1 @@ -1038,13 +1245,19 @@ define <4 x i16> @test_bitcastv1f64tov4i16(<1 x i64> %a) #0 { } define <2 x i32> @test_bitcastv1f64tov2i32(<1 x i64> %a) #0 { -; CHECK-LABEL: test_bitcastv1f64tov2i32: -; CHECK: // %bb.0: -; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0 -; CHECK-NEXT: fmov x8, d0 -; CHECK-NEXT: scvtf d0, x8 -; CHECK-NEXT: neg v0.2s, v0.2s -; CHECK-NEXT: ret +; CHECK-SD-LABEL: test_bitcastv1f64tov2i32: +; CHECK-SD: // %bb.0: +; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0 +; CHECK-SD-NEXT: fmov x8, d0 +; CHECK-SD-NEXT: scvtf d0, x8 +; CHECK-SD-NEXT: neg v0.2s, v0.2s +; CHECK-SD-NEXT: ret +; +; CHECK-GI-LABEL: test_bitcastv1f64tov2i32: +; CHECK-GI: // %bb.0: +; CHECK-GI-NEXT: scvtf d0, d0 +; CHECK-GI-NEXT: neg v0.2s, v0.2s +; CHECK-GI-NEXT: ret %vcvt.i = sitofp <1 x i64> %a to <1 x double> %1 = bitcast <1 x double> %vcvt.i to <2 x i32> %sub.i = sub <2 x i32> zeroinitializer, %1 @@ -1052,13 +1265,21 @@ define <2 x i32> @test_bitcastv1f64tov2i32(<1 x i64> %a) #0 { } define <1 x i64> @test_bitcastv1f64tov1i64(<1 x i64> %a) #0 { -; CHECK-LABEL: test_bitcastv1f64tov1i64: -; CHECK: // %bb.0: -; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0 -; CHECK-NEXT: fmov x8, d0 -; CHECK-NEXT: scvtf d0, x8 -; CHECK-NEXT: neg d0, d0 -; CHECK-NEXT: ret +; CHECK-SD-LABEL: test_bitcastv1f64tov1i64: +; CHECK-SD: // %bb.0: +; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0 +; CHECK-SD-NEXT: fmov x8, d0 +; CHECK-SD-NEXT: scvtf d0, x8 +; CHECK-SD-NEXT: neg d0, d0 +; CHECK-SD-NEXT: ret +; +; CHECK-GI-LABEL: test_bitcastv1f64tov1i64: +; CHECK-GI: // %bb.0: +; CHECK-GI-NEXT: scvtf d0, d0 +; CHECK-GI-NEXT: fmov x8, d0 +; CHECK-GI-NEXT: neg x8, x8 +; CHECK-GI-NEXT: fmov d0, x8 +; CHECK-GI-NEXT: ret %vcvt.i = sitofp <1 x i64> %a to <1 x double> %1 = bitcast <1 x double> %vcvt.i to <1 x i64> %sub.i = sub <1 x i64> zeroinitializer, %1 @@ -1117,38 +1338,65 @@ define <8 x i16> @scalar_to_vector.v8i16(i16 %a) { } define <2 x i32> @scalar_to_vector.v2i32(i32 %a) { -; CHECK-LABEL: scalar_to_vector.v2i32: -; CHECK: // %bb.0: -; CHECK-NEXT: fmov s0, w0 -; CHECK-NEXT: ret +; CHECK-SD-LABEL: scalar_to_vector.v2i32: +; CHECK-SD: // %bb.0: +; CHECK-SD-NEXT: fmov s0, w0 +; CHECK-SD-NEXT: ret +; +; CHECK-GI-LABEL: scalar_to_vector.v2i32: +; CHECK-GI: // %bb.0: +; CHECK-GI-NEXT: fmov s0, w0 +; CHECK-GI-NEXT: mov v0.s[1], w8 +; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0 +; CHECK-GI-NEXT: ret %b = insertelement <2 x i32> undef, i32 %a, i32 0 ret <2 x i32> %b } define <4 x i32> @scalar_to_vector.v4i32(i32 %a) { -; CHECK-LABEL: scalar_to_vector.v4i32: -; CHECK: // %bb.0: -; CHECK-NEXT: fmov s0, w0 -; CHECK-NEXT: ret +; CHECK-SD-LABEL: scalar_to_vector.v4i32: +; CHECK-SD: // %bb.0: +; CHECK-SD-NEXT: fmov s0, w0 +; CHECK-SD-NEXT: ret +; +; CHECK-GI-LABEL: scalar_to_vector.v4i32: +; CHECK-GI: // %bb.0: +; CHECK-GI-NEXT: fmov s0, w0 +; CHECK-GI-NEXT: mov v0.s[1], w8 +; CHECK-GI-NEXT: mov v0.s[2], w8 +; CHECK-GI-NEXT: mov v0.s[3], w8 +; CHECK-GI-NEXT: ret %b = insertelement <4 x i32> undef, i32 %a, i32 0 ret <4 x i32> %b } define <2 x i64> @scalar_to_vector.v2i64(i64 %a) { -; CHECK-LABEL: scalar_to_vector.v2i64: -; CHECK: // %bb.0: -; CHECK-NEXT: fmov d0, x0 -; CHECK-NEXT: ret +; CHECK-SD-LABEL: scalar_to_vector.v2i64: +; CHECK-SD: // %bb.0: +; CHECK-SD-NEXT: fmov d0, x0 +; CHECK-SD-NEXT: ret +; +; CHECK-GI-LABEL: scalar_to_vector.v2i64: +; CHECK-GI: // %bb.0: +; CHECK-GI-NEXT: fmov d0, x0 +; CHECK-GI-NEXT: mov v0.d[1], x8 +; CHECK-GI-NEXT: ret %b = insertelement <2 x i64> undef, i64 %a, i32 0 ret <2 x i64> %b } define <8 x i8> @testDUP.v1i8(<1 x i8> %a) { -; CHECK-LABEL: testDUP.v1i8: -; CHECK: // %bb.0: -; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0 -; CHECK-NEXT: dup v0.8b, v0.b[0] -; CHECK-NEXT: ret +; CHECK-SD-LABEL: testDUP.v1i8: +; CHECK-SD: // %bb.0: +; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0 +; CHECK-SD-NEXT: dup v0.8b, v0.b[0] +; CHECK-SD-NEXT: ret +; +; CHECK-GI-LABEL: testDUP.v1i8: +; CHECK-GI: // %bb.0: +; CHECK-GI-NEXT: fmov x8, d0 +; CHECK-GI-NEXT: dup v0.8b, w8 +; CHECK-GI-NEXT: ret %b = extractelement <1 x i8> %a, i32 0 %c = insertelement <8 x i8> undef, i8 %b, i32 0 %d = insertelement <8 x i8> %c, i8 %b, i32 1 @@ -1162,11 +1410,17 @@ define <8 x i8> @testDUP.v1i8(<1 x i8> %a) { } define <8 x i16> @testDUP.v1i16(<1 x i16> %a) { -; CHECK-LABEL: testDUP.v1i16: -; CHECK: // %bb.0: -; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0 -; CHECK-NEXT: dup v0.8h, v0.h[0] -; CHECK-NEXT: ret +; CHECK-SD-LABEL: testDUP.v1i16: +; CHECK-SD: // %bb.0: +; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0 +; CHECK-SD-NEXT: dup v0.8h, v0.h[0] +; CHECK-SD-NEXT: ret +; +; CHECK-GI-LABEL: testDUP.v1i16: +; CHECK-GI: // %bb.0: +; CHECK-GI-NEXT: fmov x8, d0 +; CHECK-GI-NEXT: dup v0.8h, w8 +; CHECK-GI-NEXT: ret %b = extractelement <1 x i16> %a, i32 0 %c = insertelement <8 x i16> undef, i16 %b, i32 0 %d = insertelement <8 x i16> %c, i16 %b, i32 1 @@ -1180,11 +1434,17 @@ define <8 x i16> @testDUP.v1i16(<1 x i16> %a) { } define <4 x i32> @testDUP.v1i32(<1 x i32> %a) { -; CHECK-LABEL: testDUP.v1i32: -; CHECK: // %bb.0: -; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0 -; CHECK-NEXT: dup v0.4s, v0.s[0] -; CHECK-NEXT: ret +; CHECK-SD-LABEL: testDUP.v1i32: +; CHECK-SD: // %bb.0: +; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0 +; CHECK-SD-NEXT: dup v0.4s, v0.s[0] +; CHECK-SD-NEXT: ret +; +; CHECK-GI-LABEL: testDUP.v1i32: +; CHECK-GI: // %bb.0: +; CHECK-GI-NEXT: fmov x8, d0 +; CHECK-GI-NEXT: dup v0.4s, w8 +; CHECK-GI-NEXT: ret %b = extractelement <1 x i32> %a, i32 0 %c = insertelement <4 x i32> undef, i32 %b, i32 0 %d = insertelement <4 x i32> %c, i32 %b, i32 1 @@ -1194,10 +1454,29 @@ define <4 x i32> @testDUP.v1i32(<1 x i32> %a) { } define <8 x i8> @getl(<16 x i8> %x) #0 { -; CHECK-LABEL: getl: -; CHECK: // %bb.0: -; CHECK-NEXT: // kill: def $d0 killed $d0 killed $q0 -; CHECK-NEXT: ret +; CHECK-SD-LABEL: getl: +; CHECK-SD: // %bb.0: +; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0 +; CHECK-SD-NEXT: ret +; +; CHECK-GI-LABEL: getl: +; CHECK-GI: // %bb.0: +; CHECK-GI-NEXT: mov b1, v0.b[1] +; CHECK-GI-NEXT: mov b2, v0.b[2] +; CHECK-GI-NEXT: mov b3, v0.b[3] +; CHECK-GI-NEXT: mov b4, v0.b[4] +; CHECK-GI-NEXT: mov b5, v0.b[5] +; CHECK-GI-NEXT: mov b6, v0.b[6] +; CHECK-GI-NEXT: mov b7, v0.b[7] +; CHECK-GI-NEXT: mov v0.b[1], v1.b[0] +; CHECK-GI-NEXT: mov v0.b[2], v2.b[0] +; CHECK-GI-NEXT: mov v0.b[3], v3.b[0] +; CHECK-GI-NEXT: mov v0.b[4], v4.b[0] +; CHECK-GI-NEXT: mov v0.b[5], v5.b[0] +; CHECK-GI-NEXT: mov v0.b[6], v6.b[0] +; CHECK-GI-NEXT: mov v0.b[7], v7.b[0] +; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0 +; CHECK-GI-NEXT: ret %vecext = extractelement <16 x i8> %x, i32 0 %vecinit = insertelement <8 x i8> undef, i8 %vecext, i32 0 %vecext1 = extractelement <16 x i8> %x, i32 1 @@ -1218,21 +1497,40 @@ define <8 x i8> @getl(<16 x i8> %x) #0 { } define <4 x i16> @test_extracts_inserts_varidx_extract(<8 x i16> %x, i32 %idx) { -; CHECK-LABEL: test_extracts_inserts_varidx_extract: -; CHECK: // %bb.0: -; CHECK-NEXT: sub sp, sp, #16 -; CHECK-NEXT: .cfi_def_cfa_offset 16 -; CHECK-NEXT: mov x8, sp -; CHECK-NEXT: // kill: def $w0 killed $w0 def $x0 -; CHECK-NEXT: str q0, [sp] -; CHECK-NEXT: bfi x8, x0, #1, #3 -; CHECK-NEXT: ldr h1, [x8] -; CHECK-NEXT: mov v1.h[1], v0.h[1] -; CHECK-NEXT: mov v1.h[2], v0.h[2] -; CHECK-NEXT: mov v1.h[3], v0.h[3] -; CHECK-NEXT: fmov d0, d1 -; CHECK-NEXT: add sp, sp, #16 -; CHECK-NEXT: ret +; CHECK-SD-LABEL: test_extracts_inserts_varidx_extract: +; CHECK-SD: // %bb.0: +; CHECK-SD-NEXT: sub sp, sp, #16 +; CHECK-SD-NEXT: .cfi_def_cfa_offset 16 +; CHECK-SD-NEXT: mov x8, sp +; CHECK-SD-NEXT: // kill: def $w0 killed $w0 def $x0 +; CHECK-SD-NEXT: str q0, [sp] +; CHECK-SD-NEXT: bfi x8, x0, #1, #3 +; CHECK-SD-NEXT: ldr h1, [x8] +; CHECK-SD-NEXT: mov v1.h[1], v0.h[1] +; CHECK-SD-NEXT: mov v1.h[2], v0.h[2] +; CHECK-SD-NEXT: mov v1.h[3], v0.h[3] +; CHECK-SD-NEXT: fmov d0, d1 +; CHECK-SD-NEXT: add sp, sp, #16 +; CHECK-SD-NEXT: ret +; +; CHECK-GI-LABEL: test_extracts_inserts_varidx_extract: +; CHECK-GI: // %bb.0: +; CHECK-GI-NEXT: sub sp, sp, #16 +; CHECK-GI-NEXT: .cfi_def_cfa_offset 16 +; CHECK-GI-NEXT: mov w9, w0 +; CHECK-GI-NEXT: mov h2, v0.h[1] +; CHECK-GI-NEXT: mov x8, sp +; CHECK-GI-NEXT: str q0, [sp] +; CHECK-GI-NEXT: and x9, x9, #0x7 +; CHECK-GI-NEXT: mov h3, v0.h[2] +; CHECK-GI-NEXT: ldr h1, [x8, x9, lsl #1] +; CHECK-GI-NEXT: mov h0, v0.h[3] +; CHECK-GI-NEXT: mov v1.h[1], v2.h[0] +; CHECK-GI-NEXT: mov v1.h[2], v3.h[0] +; CHECK-GI-NEXT: mov v1.h[3], v0.h[0] +; CHECK-GI-NEXT: fmov d0, d1 +; CHECK-GI-NEXT: add sp, sp, #16 +; CHECK-GI-NEXT: ret %tmp = extractelement <8 x i16> %x, i32 %idx %tmp2 = insertelement <4 x i16> undef, i16 %tmp, i32 0 %tmp3 = extractelement <8 x i16> %x, i32 1 @@ -1272,11 +1570,19 @@ define <4 x i16> @test_extracts_inserts_varidx_insert(<8 x i16> %x, i32 %idx) { } define <4 x i16> @test_dup_v2i32_v4i16(<2 x i32> %a) { -; CHECK-LABEL: test_dup_v2i32_v4i16: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0 -; CHECK-NEXT: dup v0.4h, v0.h[2] -; CHECK-NEXT: ret +; CHECK-SD-LABEL: test_dup_v2i32_v4i16: +; CHECK-SD: // %bb.0: // %entry +; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0 +; CHECK-SD-NEXT: dup v0.4h, v0.h[2] +; CHECK-SD-NEXT: ret +; +; CHECK-GI-LABEL: test_dup_v2i32_v4i16: +; CHECK-GI: // %bb.0: // %entry +; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q0 +; CHECK-GI-NEXT: mov s0, v0.s[1] +; CHECK-GI-NEXT: fmov w8, s0 +; CHECK-GI-NEXT: dup v0.4h, w8 +; CHECK-GI-NEXT: ret entry: %x = extractelement <2 x i32> %a, i32 1 %vget_lane = trunc i32 %x to i16 @@ -1288,10 +1594,17 @@ entry: } define <8 x i16> @test_dup_v4i32_v8i16(<4 x i32> %a) { -; CHECK-LABEL: test_dup_v4i32_v8i16: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: dup v0.8h, v0.h[6] -; CHECK-NEXT: ret +; CHECK-SD-LABEL: test_dup_v4i32_v8i16: +; CHECK-SD: // %bb.0: // %entry +; CHECK-SD-NEXT: dup v0.8h, v0.h[6] +; CHECK-SD-NEXT: ret +; +; CHECK-GI-LABEL: test_dup_v4i32_v8i16: +; CHECK-GI: // %bb.0: // %entry +; CHECK-GI-NEXT: mov s0, v0.s[3] +; CHECK-GI-NEXT: fmov w8, s0 +; CHECK-GI-NEXT: dup v0.8h, w8 +; CHECK-GI-NEXT: ret entry: %x = extractelement <4 x i32> %a, i32 3 %vget_lane = trunc i32 %x to i16 @@ -1307,11 +1620,17 @@ entry: } define <4 x i16> @test_dup_v1i64_v4i16(<1 x i64> %a) { -; CHECK-LABEL: test_dup_v1i64_v4i16: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0 -; CHECK-NEXT: dup v0.4h, v0.h[0] -; CHECK-NEXT: ret +; CHECK-SD-LABEL: test_dup_v1i64_v4i16: +; CHECK-SD: // %bb.0: // %entry +; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0 +; CHECK-SD-NEXT: dup v0.4h, v0.h[0] +; CHECK-SD-NEXT: ret +; +; CHECK-GI-LABEL: test_dup_v1i64_v4i16: +; CHECK-GI: // %bb.0: // %entry +; CHECK-GI-NEXT: fmov x8, d0 +; CHECK-GI-NEXT: dup v0.4h, w8 +; CHECK-GI-NEXT: ret entry: %x = extractelement <1 x i64> %a, i32 0 %vget_lane = trunc i64 %x to i16 @@ -1323,11 +1642,17 @@ entry: } define <2 x i32> @test_dup_v1i64_v2i32(<1 x i64> %a) { -; CHECK-LABEL: test_dup_v1i64_v2i32: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0 -; CHECK-NEXT: dup v0.2s, v0.s[0] -; CHECK-NEXT: ret +; CHECK-SD-LABEL: test_dup_v1i64_v2i32: +; CHECK-SD: // %bb.0: // %entry +; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0 +; CHECK-SD-NEXT: dup v0.2s, v0.s[0] +; CHECK-SD-NEXT: ret +; +; CHECK-GI-LABEL: test_dup_v1i64_v2i32: +; CHECK-GI: // %bb.0: // %entry +; CHECK-GI-NEXT: fmov x8, d0 +; CHECK-GI-NEXT: dup v0.2s, w8 +; CHECK-GI-NEXT: ret entry: %x = extractelement <1 x i64> %a, i32 0 %vget_lane = trunc i64 %x to i32 @@ -1337,10 +1662,17 @@ entry: } define <8 x i16> @test_dup_v2i64_v8i16(<2 x i64> %a) { -; CHECK-LABEL: test_dup_v2i64_v8i16: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: dup v0.8h, v0.h[4] -; CHECK-NEXT: ret +; CHECK-SD-LABEL: test_dup_v2i64_v8i16: +; CHECK-SD: // %bb.0: // %entry +; CHECK-SD-NEXT: dup v0.8h, v0.h[4] +; CHECK-SD-NEXT: ret +; +; CHECK-GI-LABEL: test_dup_v2i64_v8i16: +; CHECK-GI: // %bb.0: // %entry +; CHECK-GI-NEXT: mov d0, v0.d[1] +; CHECK-GI-NEXT: fmov x8, d0 +; CHECK-GI-NEXT: dup v0.8h, w8 +; CHECK-GI-NEXT: ret entry: %x = extractelement <2 x i64> %a, i32 1 %vget_lane = trunc i64 %x to i16 @@ -1356,10 +1688,17 @@ entry: } define <4 x i32> @test_dup_v2i64_v4i32(<2 x i64> %a) { -; CHECK-LABEL: test_dup_v2i64_v4i32: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: dup v0.4s, v0.s[2] -; CHECK-NEXT: ret +; CHECK-SD-LABEL: test_dup_v2i64_v4i32: +; CHECK-SD: // %bb.0: // %entry +; CHECK-SD-NEXT: dup v0.4s, v0.s[2] +; CHECK-SD-NEXT: ret +; +; CHECK-GI-LABEL: test_dup_v2i64_v4i32: +; CHECK-GI: // %bb.0: // %entry +; CHECK-GI-NEXT: mov d0, v0.d[1] +; CHECK-GI-NEXT: fmov x8, d0 +; CHECK-GI-NEXT: dup v0.4s, w8 +; CHECK-GI-NEXT: ret entry: %x = extractelement <2 x i64> %a, i32 1 %vget_lane = trunc i64 %x to i32 @@ -1371,10 +1710,17 @@ entry: } define <4 x i16> @test_dup_v4i32_v4i16(<4 x i32> %a) { -; CHECK-LABEL: test_dup_v4i32_v4i16: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: dup v0.4h, v0.h[2] -; CHECK-NEXT: ret +; CHECK-SD-LABEL: test_dup_v4i32_v4i16: +; CHECK-SD: // %bb.0: // %entry +; CHECK-SD-NEXT: dup v0.4h, v0.h[2] +; CHECK-SD-NEXT: ret +; +; CHECK-GI-LABEL: test_dup_v4i32_v4i16: +; CHECK-GI: // %bb.0: // %entry +; CHECK-GI-NEXT: mov s0, v0.s[1] +; CHECK-GI-NEXT: fmov w8, s0 +; CHECK-GI-NEXT: dup v0.4h, w8 +; CHECK-GI-NEXT: ret entry: %x = extractelement <4 x i32> %a, i32 1 %vget_lane = trunc i32 %x to i16 @@ -1386,10 +1732,16 @@ entry: } define <4 x i16> @test_dup_v2i64_v4i16(<2 x i64> %a) { -; CHECK-LABEL: test_dup_v2i64_v4i16: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: dup v0.4h, v0.h[0] -; CHECK-NEXT: ret +; CHECK-SD-LABEL: test_dup_v2i64_v4i16: +; CHECK-SD: // %bb.0: // %entry +; CHECK-SD-NEXT: dup v0.4h, v0.h[0] +; CHECK-SD-NEXT: ret +; +; CHECK-GI-LABEL: test_dup_v2i64_v4i16: +; CHECK-GI: // %bb.0: // %entry +; CHECK-GI-NEXT: fmov x8, d0 +; CHECK-GI-NEXT: dup v0.4h, w8 +; CHECK-GI-NEXT: ret entry: %x = extractelement <2 x i64> %a, i32 0 %vget_lane = trunc i64 %x to i16 @@ -1401,10 +1753,16 @@ entry: } define <2 x i32> @test_dup_v2i64_v2i32(<2 x i64> %a) { -; CHECK-LABEL: test_dup_v2i64_v2i32: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: dup v0.2s, v0.s[0] -; CHECK-NEXT: ret +; CHECK-SD-LABEL: test_dup_v2i64_v2i32: +; CHECK-SD: // %bb.0: // %entry +; CHECK-SD-NEXT: dup v0.2s, v0.s[0] +; CHECK-SD-NEXT: ret +; +; CHECK-GI-LABEL: test_dup_v2i64_v2i32: +; CHECK-GI: // %bb.0: // %entry +; CHECK-GI-NEXT: fmov x8, d0 +; CHECK-GI-NEXT: dup v0.2s, w8 +; CHECK-GI-NEXT: ret entry: %x = extractelement <2 x i64> %a, i32 0 %vget_lane = trunc i64 %x to i32 @@ -1443,11 +1801,18 @@ entry: declare float @llvm.aarch64.neon.fmaxv.f32.v2f32(<2 x float>) define <2 x i32> @test_concat_undef_v1i32(<2 x i32> %a) { -; CHECK-LABEL: test_concat_undef_v1i32: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0 -; CHECK-NEXT: dup v0.2s, v0.s[0] -; CHECK-NEXT: ret +; CHECK-SD-LABEL: test_concat_undef_v1i32: +; CHECK-SD: // %bb.0: // %entry +; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0 +; CHECK-SD-NEXT: dup v0.2s, v0.s[0] +; CHECK-SD-NEXT: ret +; +; CHECK-GI-LABEL: test_concat_undef_v1i32: +; CHECK-GI: // %bb.0: // %entry +; CHECK-GI-NEXT: fmov w8, s0 +; CHECK-GI-NEXT: mov v0.s[1], w8 +; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0 +; CHECK-GI-NEXT: ret entry: %0 = extractelement <2 x i32> %a, i32 0 %vecinit1.i = insertelement <2 x i32> undef, i32 %0, i32 1 @@ -1502,21 +1867,61 @@ entry: } define <16 x i8> @test_concat_v16i8_v16i8_v16i8(<16 x i8> %x, <16 x i8> %y) #0 { -; CHECK-LABEL: test_concat_v16i8_v16i8_v16i8: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: mov v0.d[1], v1.d[0] -; CHECK-NEXT: ret +; CHECK-SD-LABEL: test_concat_v16i8_v16i8_v16i8: +; CHECK-SD: // %bb.0: // %entry +; CHECK-SD-NEXT: mov v0.d[1], v1.d[0] +; CHECK-SD-NEXT: ret +; +; CHECK-GI-LABEL: test_concat_v16i8_v16i8_v16i8: +; CHECK-GI: // %bb.0: // %entry +; CHECK-GI-NEXT: adrp x8, .LCPI126_0 +; CHECK-GI-NEXT: // kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: ldr q2, [x8, :lo12:.LCPI126_0] +; CHECK-GI-NEXT: // kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: tbl v0.16b, { v0.16b, v1.16b }, v2.16b +; CHECK-GI-NEXT: ret entry: %vecinit30 = shufflevector <16 x i8> %x, <16 x i8> %y, <16 x i32> ret <16 x i8> %vecinit30 } define <16 x i8> @test_concat_v16i8_v8i8_v16i8(<8 x i8> %x, <16 x i8> %y) #0 { -; CHECK-LABEL: test_concat_v16i8_v8i8_v16i8: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0 -; CHECK-NEXT: mov v0.d[1], v1.d[0] -; CHECK-NEXT: ret +; CHECK-SD-LABEL: test_concat_v16i8_v8i8_v16i8: +; CHECK-SD: // %bb.0: // %entry +; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0 +; CHECK-SD-NEXT: mov v0.d[1], v1.d[0] +; CHECK-SD-NEXT: ret +; +; CHECK-GI-LABEL: test_concat_v16i8_v8i8_v16i8: +; CHECK-GI: // %bb.0: // %entry +; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: adrp x8, .LCPI127_0 +; CHECK-GI-NEXT: // kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: mov b2, v0.b[1] +; CHECK-GI-NEXT: mov b3, v0.b[2] +; CHECK-GI-NEXT: mov b4, v0.b[3] +; CHECK-GI-NEXT: mov b5, v0.b[4] +; CHECK-GI-NEXT: mov b6, v0.b[5] +; CHECK-GI-NEXT: mov b7, v0.b[6] +; CHECK-GI-NEXT: mov b16, v0.b[7] +; CHECK-GI-NEXT: mov v0.b[1], v2.b[0] +; CHECK-GI-NEXT: ldr q2, [x8, :lo12:.LCPI127_0] +; CHECK-GI-NEXT: mov v0.b[2], v3.b[0] +; CHECK-GI-NEXT: mov v0.b[3], v4.b[0] +; CHECK-GI-NEXT: mov v0.b[4], v5.b[0] +; CHECK-GI-NEXT: mov v0.b[5], v6.b[0] +; CHECK-GI-NEXT: mov v0.b[6], v7.b[0] +; CHECK-GI-NEXT: mov v0.b[7], v16.b[0] +; CHECK-GI-NEXT: mov v0.b[8], v0.b[0] +; CHECK-GI-NEXT: mov v0.b[9], v0.b[0] +; CHECK-GI-NEXT: mov v0.b[10], v0.b[0] +; CHECK-GI-NEXT: mov v0.b[11], v0.b[0] +; CHECK-GI-NEXT: mov v0.b[12], v0.b[0] +; CHECK-GI-NEXT: mov v0.b[13], v0.b[0] +; CHECK-GI-NEXT: mov v0.b[14], v0.b[0] +; CHECK-GI-NEXT: mov v0.b[15], v0.b[0] +; CHECK-GI-NEXT: tbl v0.16b, { v0.16b, v1.16b }, v2.16b +; CHECK-GI-NEXT: ret entry: %vecext = extractelement <8 x i8> %x, i32 0 %vecinit = insertelement <16 x i8> undef, i8 %vecext, i32 0 @@ -1539,11 +1944,45 @@ entry: } define <16 x i8> @test_concat_v16i8_v16i8_v8i8(<16 x i8> %x, <8 x i8> %y) #0 { -; CHECK-LABEL: test_concat_v16i8_v16i8_v8i8: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: // kill: def $d1 killed $d1 def $q1 -; CHECK-NEXT: mov v0.d[1], v1.d[0] -; CHECK-NEXT: ret +; CHECK-SD-LABEL: test_concat_v16i8_v16i8_v8i8: +; CHECK-SD: // %bb.0: // %entry +; CHECK-SD-NEXT: // kill: def $d1 killed $d1 def $q1 +; CHECK-SD-NEXT: mov v0.d[1], v1.d[0] +; CHECK-SD-NEXT: ret +; +; CHECK-GI-LABEL: test_concat_v16i8_v16i8_v8i8: +; CHECK-GI: // %bb.0: // %entry +; CHECK-GI-NEXT: mov b2, v0.b[1] +; CHECK-GI-NEXT: mov b3, v0.b[2] +; CHECK-GI-NEXT: // kill: def $d1 killed $d1 def $q1 +; CHECK-GI-NEXT: mov b4, v0.b[3] +; CHECK-GI-NEXT: mov b5, v0.b[4] +; CHECK-GI-NEXT: mov b6, v0.b[5] +; CHECK-GI-NEXT: mov b7, v0.b[6] +; CHECK-GI-NEXT: mov b16, v0.b[7] +; CHECK-GI-NEXT: mov v0.b[1], v2.b[0] +; CHECK-GI-NEXT: mov b2, v1.b[1] +; CHECK-GI-NEXT: mov v0.b[2], v3.b[0] +; CHECK-GI-NEXT: mov b3, v1.b[2] +; CHECK-GI-NEXT: mov v0.b[3], v4.b[0] +; CHECK-GI-NEXT: mov v0.b[4], v5.b[0] +; CHECK-GI-NEXT: mov v0.b[5], v6.b[0] +; CHECK-GI-NEXT: mov v0.b[6], v7.b[0] +; CHECK-GI-NEXT: mov v0.b[7], v16.b[0] +; CHECK-GI-NEXT: mov v0.b[8], v1.b[0] +; CHECK-GI-NEXT: mov v0.b[9], v2.b[0] +; CHECK-GI-NEXT: mov b2, v1.b[3] +; CHECK-GI-NEXT: mov v0.b[10], v3.b[0] +; CHECK-GI-NEXT: mov b3, v1.b[4] +; CHECK-GI-NEXT: mov v0.b[11], v2.b[0] +; CHECK-GI-NEXT: mov b2, v1.b[5] +; CHECK-GI-NEXT: mov v0.b[12], v3.b[0] +; CHECK-GI-NEXT: mov b3, v1.b[6] +; CHECK-GI-NEXT: mov b1, v1.b[7] +; CHECK-GI-NEXT: mov v0.b[13], v2.b[0] +; CHECK-GI-NEXT: mov v0.b[14], v3.b[0] +; CHECK-GI-NEXT: mov v0.b[15], v1.b[0] +; CHECK-GI-NEXT: ret entry: %vecext = extractelement <16 x i8> %x, i32 0 %vecinit = insertelement <16 x i8> undef, i8 %vecext, i32 0 @@ -1581,12 +2020,47 @@ entry: } define <16 x i8> @test_concat_v16i8_v8i8_v8i8(<8 x i8> %x, <8 x i8> %y) #0 { -; CHECK-LABEL: test_concat_v16i8_v8i8_v8i8: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0 -; CHECK-NEXT: // kill: def $d1 killed $d1 def $q1 -; CHECK-NEXT: mov v0.d[1], v1.d[0] -; CHECK-NEXT: ret +; CHECK-SD-LABEL: test_concat_v16i8_v8i8_v8i8: +; CHECK-SD: // %bb.0: // %entry +; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0 +; CHECK-SD-NEXT: // kill: def $d1 killed $d1 def $q1 +; CHECK-SD-NEXT: mov v0.d[1], v1.d[0] +; CHECK-SD-NEXT: ret +; +; CHECK-GI-LABEL: test_concat_v16i8_v8i8_v8i8: +; CHECK-GI: // %bb.0: // %entry +; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q0 +; CHECK-GI-NEXT: mov b2, v0.b[1] +; CHECK-GI-NEXT: mov b3, v0.b[2] +; CHECK-GI-NEXT: // kill: def $d1 killed $d1 def $q1 +; CHECK-GI-NEXT: mov b4, v0.b[3] +; CHECK-GI-NEXT: mov b5, v0.b[4] +; CHECK-GI-NEXT: mov b6, v0.b[5] +; CHECK-GI-NEXT: mov b7, v0.b[6] +; CHECK-GI-NEXT: mov b16, v0.b[7] +; CHECK-GI-NEXT: mov v0.b[1], v2.b[0] +; CHECK-GI-NEXT: mov b2, v1.b[1] +; CHECK-GI-NEXT: mov v0.b[2], v3.b[0] +; CHECK-GI-NEXT: mov b3, v1.b[2] +; CHECK-GI-NEXT: mov v0.b[3], v4.b[0] +; CHECK-GI-NEXT: mov v0.b[4], v5.b[0] +; CHECK-GI-NEXT: mov v0.b[5], v6.b[0] +; CHECK-GI-NEXT: mov v0.b[6], v7.b[0] +; CHECK-GI-NEXT: mov v0.b[7], v16.b[0] +; CHECK-GI-NEXT: mov v0.b[8], v1.b[0] +; CHECK-GI-NEXT: mov v0.b[9], v2.b[0] +; CHECK-GI-NEXT: mov b2, v1.b[3] +; CHECK-GI-NEXT: mov v0.b[10], v3.b[0] +; CHECK-GI-NEXT: mov b3, v1.b[4] +; CHECK-GI-NEXT: mov v0.b[11], v2.b[0] +; CHECK-GI-NEXT: mov b2, v1.b[5] +; CHECK-GI-NEXT: mov v0.b[12], v3.b[0] +; CHECK-GI-NEXT: mov b3, v1.b[6] +; CHECK-GI-NEXT: mov b1, v1.b[7] +; CHECK-GI-NEXT: mov v0.b[13], v2.b[0] +; CHECK-GI-NEXT: mov v0.b[14], v3.b[0] +; CHECK-GI-NEXT: mov v0.b[15], v1.b[0] +; CHECK-GI-NEXT: ret entry: %vecext = extractelement <8 x i8> %x, i32 0 %vecinit = insertelement <16 x i8> undef, i8 %vecext, i32 0 @@ -1624,21 +2098,49 @@ entry: } define <8 x i16> @test_concat_v8i16_v8i16_v8i16(<8 x i16> %x, <8 x i16> %y) #0 { -; CHECK-LABEL: test_concat_v8i16_v8i16_v8i16: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: mov v0.d[1], v1.d[0] -; CHECK-NEXT: ret +; CHECK-SD-LABEL: test_concat_v8i16_v8i16_v8i16: +; CHECK-SD: // %bb.0: // %entry +; CHECK-SD-NEXT: mov v0.d[1], v1.d[0] +; CHECK-SD-NEXT: ret +; +; CHECK-GI-LABEL: test_concat_v8i16_v8i16_v8i16: +; CHECK-GI: // %bb.0: // %entry +; CHECK-GI-NEXT: adrp x8, .LCPI130_0 +; CHECK-GI-NEXT: // kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: ldr q2, [x8, :lo12:.LCPI130_0] +; CHECK-GI-NEXT: // kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: tbl v0.16b, { v0.16b, v1.16b }, v2.16b +; CHECK-GI-NEXT: ret entry: %vecinit14 = shufflevector <8 x i16> %x, <8 x i16> %y, <8 x i32> ret <8 x i16> %vecinit14 } define <8 x i16> @test_concat_v8i16_v4i16_v8i16(<4 x i16> %x, <8 x i16> %y) #0 { -; CHECK-LABEL: test_concat_v8i16_v4i16_v8i16: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0 -; CHECK-NEXT: mov v0.d[1], v1.d[0] -; CHECK-NEXT: ret +; CHECK-SD-LABEL: test_concat_v8i16_v4i16_v8i16: +; CHECK-SD: // %bb.0: // %entry +; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0 +; CHECK-SD-NEXT: mov v0.d[1], v1.d[0] +; CHECK-SD-NEXT: ret +; +; CHECK-GI-LABEL: test_concat_v8i16_v4i16_v8i16: +; CHECK-GI: // %bb.0: // %entry +; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: adrp x8, .LCPI131_0 +; CHECK-GI-NEXT: // kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: mov h2, v0.h[1] +; CHECK-GI-NEXT: mov h3, v0.h[2] +; CHECK-GI-NEXT: mov h4, v0.h[3] +; CHECK-GI-NEXT: mov v0.h[1], v2.h[0] +; CHECK-GI-NEXT: ldr q2, [x8, :lo12:.LCPI131_0] +; CHECK-GI-NEXT: mov v0.h[2], v3.h[0] +; CHECK-GI-NEXT: mov v0.h[3], v4.h[0] +; CHECK-GI-NEXT: mov v0.h[4], v0.h[0] +; CHECK-GI-NEXT: mov v0.h[5], v0.h[0] +; CHECK-GI-NEXT: mov v0.h[6], v0.h[0] +; CHECK-GI-NEXT: mov v0.h[7], v0.h[0] +; CHECK-GI-NEXT: tbl v0.16b, { v0.16b, v1.16b }, v2.16b +; CHECK-GI-NEXT: ret entry: %vecext = extractelement <4 x i16> %x, i32 0 %vecinit = insertelement <8 x i16> undef, i16 %vecext, i32 0 @@ -1653,11 +2155,29 @@ entry: } define <8 x i16> @test_concat_v8i16_v8i16_v4i16(<8 x i16> %x, <4 x i16> %y) #0 { -; CHECK-LABEL: test_concat_v8i16_v8i16_v4i16: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: // kill: def $d1 killed $d1 def $q1 -; CHECK-NEXT: mov v0.d[1], v1.d[0] -; CHECK-NEXT: ret +; CHECK-SD-LABEL: test_concat_v8i16_v8i16_v4i16: +; CHECK-SD: // %bb.0: // %entry +; CHECK-SD-NEXT: // kill: def $d1 killed $d1 def $q1 +; CHECK-SD-NEXT: mov v0.d[1], v1.d[0] +; CHECK-SD-NEXT: ret +; +; CHECK-GI-LABEL: test_concat_v8i16_v8i16_v4i16: +; CHECK-GI: // %bb.0: // %entry +; CHECK-GI-NEXT: mov h2, v0.h[1] +; CHECK-GI-NEXT: mov h3, v0.h[2] +; CHECK-GI-NEXT: // kill: def $d1 killed $d1 def $q1 +; CHECK-GI-NEXT: mov h4, v0.h[3] +; CHECK-GI-NEXT: mov v0.h[1], v2.h[0] +; CHECK-GI-NEXT: mov h2, v1.h[1] +; CHECK-GI-NEXT: mov v0.h[2], v3.h[0] +; CHECK-GI-NEXT: mov h3, v1.h[2] +; CHECK-GI-NEXT: mov v0.h[3], v4.h[0] +; CHECK-GI-NEXT: mov v0.h[4], v1.h[0] +; CHECK-GI-NEXT: mov h1, v1.h[3] +; CHECK-GI-NEXT: mov v0.h[5], v2.h[0] +; CHECK-GI-NEXT: mov v0.h[6], v3.h[0] +; CHECK-GI-NEXT: mov v0.h[7], v1.h[0] +; CHECK-GI-NEXT: ret entry: %vecext = extractelement <8 x i16> %x, i32 0 %vecinit = insertelement <8 x i16> undef, i16 %vecext, i32 0 @@ -1679,12 +2199,31 @@ entry: } define <8 x i16> @test_concat_v8i16_v4i16_v4i16(<4 x i16> %x, <4 x i16> %y) #0 { -; CHECK-LABEL: test_concat_v8i16_v4i16_v4i16: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0 -; CHECK-NEXT: // kill: def $d1 killed $d1 def $q1 -; CHECK-NEXT: mov v0.d[1], v1.d[0] -; CHECK-NEXT: ret +; CHECK-SD-LABEL: test_concat_v8i16_v4i16_v4i16: +; CHECK-SD: // %bb.0: // %entry +; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0 +; CHECK-SD-NEXT: // kill: def $d1 killed $d1 def $q1 +; CHECK-SD-NEXT: mov v0.d[1], v1.d[0] +; CHECK-SD-NEXT: ret +; +; CHECK-GI-LABEL: test_concat_v8i16_v4i16_v4i16: +; CHECK-GI: // %bb.0: // %entry +; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q0 +; CHECK-GI-NEXT: mov h2, v0.h[1] +; CHECK-GI-NEXT: mov h3, v0.h[2] +; CHECK-GI-NEXT: // kill: def $d1 killed $d1 def $q1 +; CHECK-GI-NEXT: mov h4, v0.h[3] +; CHECK-GI-NEXT: mov v0.h[1], v2.h[0] +; CHECK-GI-NEXT: mov h2, v1.h[1] +; CHECK-GI-NEXT: mov v0.h[2], v3.h[0] +; CHECK-GI-NEXT: mov h3, v1.h[2] +; CHECK-GI-NEXT: mov v0.h[3], v4.h[0] +; CHECK-GI-NEXT: mov v0.h[4], v1.h[0] +; CHECK-GI-NEXT: mov h1, v1.h[3] +; CHECK-GI-NEXT: mov v0.h[5], v2.h[0] +; CHECK-GI-NEXT: mov v0.h[6], v3.h[0] +; CHECK-GI-NEXT: mov v0.h[7], v1.h[0] +; CHECK-GI-NEXT: ret entry: %vecext = extractelement <4 x i16> %x, i32 0 %vecinit = insertelement <8 x i16> undef, i16 %vecext, i32 0 @@ -1706,21 +2245,43 @@ entry: } define <4 x i32> @test_concat_v4i32_v4i32_v4i32(<4 x i32> %x, <4 x i32> %y) #0 { -; CHECK-LABEL: test_concat_v4i32_v4i32_v4i32: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: mov v0.d[1], v1.d[0] -; CHECK-NEXT: ret +; CHECK-SD-LABEL: test_concat_v4i32_v4i32_v4i32: +; CHECK-SD: // %bb.0: // %entry +; CHECK-SD-NEXT: mov v0.d[1], v1.d[0] +; CHECK-SD-NEXT: ret +; +; CHECK-GI-LABEL: test_concat_v4i32_v4i32_v4i32: +; CHECK-GI: // %bb.0: // %entry +; CHECK-GI-NEXT: adrp x8, .LCPI134_0 +; CHECK-GI-NEXT: // kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: ldr q2, [x8, :lo12:.LCPI134_0] +; CHECK-GI-NEXT: // kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: tbl v0.16b, { v0.16b, v1.16b }, v2.16b +; CHECK-GI-NEXT: ret entry: %vecinit6 = shufflevector <4 x i32> %x, <4 x i32> %y, <4 x i32> ret <4 x i32> %vecinit6 } define <4 x i32> @test_concat_v4i32_v2i32_v4i32(<2 x i32> %x, <4 x i32> %y) #0 { -; CHECK-LABEL: test_concat_v4i32_v2i32_v4i32: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0 -; CHECK-NEXT: mov v0.d[1], v1.d[0] -; CHECK-NEXT: ret +; CHECK-SD-LABEL: test_concat_v4i32_v2i32_v4i32: +; CHECK-SD: // %bb.0: // %entry +; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0 +; CHECK-SD-NEXT: mov v0.d[1], v1.d[0] +; CHECK-SD-NEXT: ret +; +; CHECK-GI-LABEL: test_concat_v4i32_v2i32_v4i32: +; CHECK-GI: // %bb.0: // %entry +; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: adrp x8, .LCPI135_0 +; CHECK-GI-NEXT: // kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1 +; CHECK-GI-NEXT: mov s2, v0.s[1] +; CHECK-GI-NEXT: mov v0.s[1], v2.s[0] +; CHECK-GI-NEXT: ldr q2, [x8, :lo12:.LCPI135_0] +; CHECK-GI-NEXT: mov v0.s[2], v0.s[0] +; CHECK-GI-NEXT: mov v0.s[3], v0.s[0] +; CHECK-GI-NEXT: tbl v0.16b, { v0.16b, v1.16b }, v2.16b +; CHECK-GI-NEXT: ret entry: %vecext = extractelement <2 x i32> %x, i32 0 %vecinit = insertelement <4 x i32> undef, i32 %vecext, i32 0 @@ -1731,11 +2292,21 @@ entry: } define <4 x i32> @test_concat_v4i32_v4i32_v2i32(<4 x i32> %x, <2 x i32> %y) #0 { -; CHECK-LABEL: test_concat_v4i32_v4i32_v2i32: -; CHECK: // %bb.0: // %entry -; CHECK-NEXT: // kill: def $d1 killed $d1 def $q1 -; CHECK-NEXT: mov v0.d[1], v1.d[0] -; CHECK-NEXT: ret +; CHECK-SD-LABEL: test_concat_v4i32_v4i32_v2i32: +; CHECK-SD: // %bb.0: // %entry +; CHECK-SD-NEXT: // kill: def $d1 killed $d1 def $q1 +; CHECK-SD-NEXT: mov v0.d[1], v1.d[0] +; CHECK-SD-NEXT: ret +; +; CHECK-GI-LABEL: test_concat_v4i32_v4i32_v2i32: +; CHECK-GI: // %bb.0: // %entry +; CHECK-GI-NEXT: mov s2, v0.s[1] +; CHECK-GI-NEXT: // kill: def $d1 killed $d1 def $q1 +; CHECK-GI-NEXT: mov v0.s[1], v2.s[0] +; CHECK-GI-NEXT: mov s2, v1.s[1] +; CHECK-GI-NEXT: mov v0.s[2], v1.s[0] +; CHECK-GI-NEXT: mov v0.s[3], v2.s[0] +; CHECK-GI-NEXT: ret entry: %vecext = extractelement <4 x i32> %x, i32 0 %vecinit = insertelement <4 x i32> undef, i32 %vecext, i32 0 @@ -1877,51 +2448,81 @@ define <16 x i8> @concat_vector_v16i8_const() { } define <4 x i16> @concat_vector_v4i16(<1 x i16> %a) { -; CHECK-LABEL: concat_vector_v4i16: -; CHECK: // %bb.0: -; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0 -; CHECK-NEXT: dup v0.4h, v0.h[0] -; CHECK-NEXT: ret +; CHECK-SD-LABEL: concat_vector_v4i16: +; CHECK-SD: // %bb.0: +; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0 +; CHECK-SD-NEXT: dup v0.4h, v0.h[0] +; CHECK-SD-NEXT: ret +; +; CHECK-GI-LABEL: concat_vector_v4i16: +; CHECK-GI: // %bb.0: +; CHECK-GI-NEXT: fmov x8, d0 +; CHECK-GI-NEXT: dup v0.4h, w8 +; CHECK-GI-NEXT: ret %r = shufflevector <1 x i16> %a, <1 x i16> undef, <4 x i32> zeroinitializer ret <4 x i16> %r } define <4 x i32> @concat_vector_v4i32(<1 x i32> %a) { -; CHECK-LABEL: concat_vector_v4i32: -; CHECK: // %bb.0: -; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0 -; CHECK-NEXT: dup v0.4s, v0.s[0] -; CHECK-NEXT: ret +; CHECK-SD-LABEL: concat_vector_v4i32: +; CHECK-SD: // %bb.0: +; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0 +; CHECK-SD-NEXT: dup v0.4s, v0.s[0] +; CHECK-SD-NEXT: ret +; +; CHECK-GI-LABEL: concat_vector_v4i32: +; CHECK-GI: // %bb.0: +; CHECK-GI-NEXT: fmov x8, d0 +; CHECK-GI-NEXT: dup v0.4s, w8 +; CHECK-GI-NEXT: ret %r = shufflevector <1 x i32> %a, <1 x i32> undef, <4 x i32> zeroinitializer ret <4 x i32> %r } define <8 x i8> @concat_vector_v8i8(<1 x i8> %a) { -; CHECK-LABEL: concat_vector_v8i8: -; CHECK: // %bb.0: -; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0 -; CHECK-NEXT: dup v0.8b, v0.b[0] -; CHECK-NEXT: ret +; CHECK-SD-LABEL: concat_vector_v8i8: +; CHECK-SD: // %bb.0: +; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0 +; CHECK-SD-NEXT: dup v0.8b, v0.b[0] +; CHECK-SD-NEXT: ret +; +; CHECK-GI-LABEL: concat_vector_v8i8: +; CHECK-GI: // %bb.0: +; CHECK-GI-NEXT: fmov x8, d0 +; CHECK-GI-NEXT: dup v0.8b, w8 +; CHECK-GI-NEXT: ret %r = shufflevector <1 x i8> %a, <1 x i8> undef, <8 x i32> zeroinitializer ret <8 x i8> %r } define <8 x i16> @concat_vector_v8i16(<1 x i16> %a) { -; CHECK-LABEL: concat_vector_v8i16: -; CHECK: // %bb.0: -; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0 -; CHECK-NEXT: dup v0.8h, v0.h[0] -; CHECK-NEXT: ret +; CHECK-SD-LABEL: concat_vector_v8i16: +; CHECK-SD: // %bb.0: +; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0 +; CHECK-SD-NEXT: dup v0.8h, v0.h[0] +; CHECK-SD-NEXT: ret +; +; CHECK-GI-LABEL: concat_vector_v8i16: +; CHECK-GI: // %bb.0: +; CHECK-GI-NEXT: fmov x8, d0 +; CHECK-GI-NEXT: dup v0.8h, w8 +; CHECK-GI-NEXT: ret %r = shufflevector <1 x i16> %a, <1 x i16> undef, <8 x i32> zeroinitializer ret <8 x i16> %r } define <16 x i8> @concat_vector_v16i8(<1 x i8> %a) { -; CHECK-LABEL: concat_vector_v16i8: -; CHECK: // %bb.0: -; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0 -; CHECK-NEXT: dup v0.16b, v0.b[0] -; CHECK-NEXT: ret +; CHECK-SD-LABEL: concat_vector_v16i8: +; CHECK-SD: // %bb.0: +; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0 +; CHECK-SD-NEXT: dup v0.16b, v0.b[0] +; CHECK-SD-NEXT: ret +; +; CHECK-GI-LABEL: concat_vector_v16i8: +; CHECK-GI: // %bb.0: +; CHECK-GI-NEXT: fmov x8, d0 +; CHECK-GI-NEXT: dup v0.16b, w8 +; CHECK-GI-NEXT: ret %r = shufflevector <1 x i8> %a, <1 x i8> undef, <16 x i32> zeroinitializer ret <16 x i8> %r } diff --git a/llvm/test/CodeGen/AArch64/arm64-vaddv.ll b/llvm/test/CodeGen/AArch64/arm64-vaddv.ll index 04e19dce9ad7..adfe28ea9589 100644 --- a/llvm/test/CodeGen/AArch64/arm64-vaddv.ll +++ b/llvm/test/CodeGen/AArch64/arm64-vaddv.ll @@ -1,11 +1,13 @@ -; RUN: llc < %s -mtriple=arm64-eabi -aarch64-neon-syntax=apple -asm-verbose=false -mcpu=cyclone | FileCheck %s -; RUN: llc < %s -global-isel -mtriple=arm64-eabi -aarch64-neon-syntax=apple -asm-verbose=false -mcpu=cyclone | FileCheck %s +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4 +; RUN: llc < %s -mtriple=arm64-eabi | FileCheck %s +; RUN: llc < %s -mtriple=arm64-eabi -global-isel | FileCheck %s define signext i8 @test_vaddv_s8(<8 x i8> %a1) { ; CHECK-LABEL: test_vaddv_s8: -; CHECK: addv.8b b[[REGNUM:[0-9]+]], v0 -; CHECK-NEXT: smov.b w0, v[[REGNUM]][0] -; CHECK-NEXT: ret +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: addv b0, v0.8b +; CHECK-NEXT: smov w0, v0.b[0] +; CHECK-NEXT: ret entry: %vaddv.i = tail call i32 @llvm.aarch64.neon.saddv.i32.v8i8(<8 x i8> %a1) %0 = trunc i32 %vaddv.i to i8 @@ -14,9 +16,12 @@ entry: define <8 x i8> @test_vaddv_s8_used_by_laneop(<8 x i8> %a1, <8 x i8> %a2) { ; CHECK-LABEL: test_vaddv_s8_used_by_laneop: -; CHECK: addv.8b b[[REGNUM:[0-9]+]], v1 -; CHECK-NEXT: mov.b v0[3], v[[REGNUM]][0] -; CHECK-NEXT: ret +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: addv b1, v1.8b +; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0 +; CHECK-NEXT: mov v0.b[3], v1.b[0] +; CHECK-NEXT: // kill: def $d0 killed $d0 killed $q0 +; CHECK-NEXT: ret entry: %0 = tail call i32 @llvm.aarch64.neon.saddv.i32.v8i8(<8 x i8> %a2) %1 = trunc i32 %0 to i8 @@ -26,9 +31,10 @@ entry: define signext i16 @test_vaddv_s16(<4 x i16> %a1) { ; CHECK-LABEL: test_vaddv_s16: -; CHECK: addv.4h h[[REGNUM:[0-9]+]], v0 -; CHECK-NEXT: smov.h w0, v[[REGNUM]][0] -; CHECK-NEXT: ret +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: addv h0, v0.4h +; CHECK-NEXT: smov w0, v0.h[0] +; CHECK-NEXT: ret entry: %vaddv.i = tail call i32 @llvm.aarch64.neon.saddv.i32.v4i16(<4 x i16> %a1) %0 = trunc i32 %vaddv.i to i16 @@ -37,9 +43,12 @@ entry: define <4 x i16> @test_vaddv_s16_used_by_laneop(<4 x i16> %a1, <4 x i16> %a2) { ; CHECK-LABEL: test_vaddv_s16_used_by_laneop: -; CHECK: addv.4h h[[REGNUM:[0-9]+]], v1 -; CHECK-NEXT: mov.h v0[3], v[[REGNUM]][0] -; CHECK-NEXT: ret +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: addv h1, v1.4h +; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0 +; CHECK-NEXT: mov v0.h[3], v1.h[0] +; CHECK-NEXT: // kill: def $d0 killed $d0 killed $q0 +; CHECK-NEXT: ret entry: %0 = tail call i32 @llvm.aarch64.neon.saddv.i32.v4i16(<4 x i16> %a2) %1 = trunc i32 %0 to i16 @@ -49,10 +58,11 @@ entry: define i32 @test_vaddv_s32(<2 x i32> %a1) { ; CHECK-LABEL: test_vaddv_s32: +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: addp v0.2s, v0.2s, v0.2s +; CHECK-NEXT: fmov w0, s0 +; CHECK-NEXT: ret ; 2 x i32 is not supported by the ISA, thus, this is a special case -; CHECK: addp.2s v[[REGNUM:[0-9]+]], v0, v0 -; CHECK-NEXT: fmov w0, s[[REGNUM]] -; CHECK-NEXT: ret entry: %vaddv.i = tail call i32 @llvm.aarch64.neon.saddv.i32.v2i32(<2 x i32> %a1) ret i32 %vaddv.i @@ -60,9 +70,12 @@ entry: define <2 x i32> @test_vaddv_s32_used_by_laneop(<2 x i32> %a1, <2 x i32> %a2) { ; CHECK-LABEL: test_vaddv_s32_used_by_laneop: -; CHECK: addp.2s v[[REGNUM:[0-9]+]], v1, v1 -; CHECK-NEXT: mov.s v0[1], v[[REGNUM]][0] -; CHECK-NEXT: ret +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: addp v1.2s, v1.2s, v1.2s +; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0 +; CHECK-NEXT: mov v0.s[1], v1.s[0] +; CHECK-NEXT: // kill: def $d0 killed $d0 killed $q0 +; CHECK-NEXT: ret entry: %0 = tail call i32 @llvm.aarch64.neon.saddv.i32.v2i32(<2 x i32> %a2) %1 = insertelement <2 x i32> %a1, i32 %0, i32 1 @@ -71,9 +84,10 @@ entry: define i64 @test_vaddv_s64(<2 x i64> %a1) { ; CHECK-LABEL: test_vaddv_s64: -; CHECK: addp.2d [[REGNUM:d[0-9]+]], v0 -; CHECK-NEXT: fmov x0, [[REGNUM]] -; CHECK-NEXT: ret +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: addp d0, v0.2d +; CHECK-NEXT: fmov x0, d0 +; CHECK-NEXT: ret entry: %vaddv.i = tail call i64 @llvm.aarch64.neon.saddv.i64.v2i64(<2 x i64> %a1) ret i64 %vaddv.i @@ -81,9 +95,10 @@ entry: define <2 x i64> @test_vaddv_s64_used_by_laneop(<2 x i64> %a1, <2 x i64> %a2) { ; CHECK-LABEL: test_vaddv_s64_used_by_laneop: -; CHECK: addp.2d d[[REGNUM:[0-9]+]], v1 -; CHECK-NEXT: mov.d v0[1], v[[REGNUM]][0] -; CHECK-NEXT: ret +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: addp d1, v1.2d +; CHECK-NEXT: mov v0.d[1], v1.d[0] +; CHECK-NEXT: ret entry: %0 = tail call i64 @llvm.aarch64.neon.saddv.i64.v2i64(<2 x i64> %a2) %1 = insertelement <2 x i64> %a1, i64 %0, i64 1 @@ -92,9 +107,10 @@ entry: define zeroext i8 @test_vaddv_u8(<8 x i8> %a1) { ; CHECK-LABEL: test_vaddv_u8: -; CHECK: addv.8b b[[REGNUM:[0-9]+]], v0 -; CHECK-NEXT: fmov w0, s[[REGNUM]] -; CHECK-NEXT: ret +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: addv b0, v0.8b +; CHECK-NEXT: fmov w0, s0 +; CHECK-NEXT: ret entry: %vaddv.i = tail call i32 @llvm.aarch64.neon.uaddv.i32.v8i8(<8 x i8> %a1) %0 = trunc i32 %vaddv.i to i8 @@ -103,9 +119,12 @@ entry: define <8 x i8> @test_vaddv_u8_used_by_laneop(<8 x i8> %a1, <8 x i8> %a2) { ; CHECK-LABEL: test_vaddv_u8_used_by_laneop: -; CHECK: addv.8b b[[REGNUM:[0-9]+]], v1 -; CHECK-NEXT: mov.b v0[3], v[[REGNUM]][0] -; CHECK-NEXT: ret +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: addv b1, v1.8b +; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0 +; CHECK-NEXT: mov v0.b[3], v1.b[0] +; CHECK-NEXT: // kill: def $d0 killed $d0 killed $q0 +; CHECK-NEXT: ret entry: %0 = tail call i32 @llvm.aarch64.neon.uaddv.i32.v8i8(<8 x i8> %a2) %1 = trunc i32 %0 to i8 @@ -115,9 +134,10 @@ entry: define i32 @test_vaddv_u8_masked(<8 x i8> %a1) { ; CHECK-LABEL: test_vaddv_u8_masked: -; CHECK: addv.8b b[[REGNUM:[0-9]+]], v0 -; CHECK-NEXT: fmov w0, s[[REGNUM]] -; CHECK-NEXT: ret +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: addv b0, v0.8b +; CHECK-NEXT: fmov w0, s0 +; CHECK-NEXT: ret entry: %vaddv.i = tail call i32 @llvm.aarch64.neon.uaddv.i32.v8i8(<8 x i8> %a1) %0 = and i32 %vaddv.i, 511 ; 0x1ff @@ -126,9 +146,10 @@ entry: define zeroext i16 @test_vaddv_u16(<4 x i16> %a1) { ; CHECK-LABEL: test_vaddv_u16: -; CHECK: addv.4h h[[REGNUM:[0-9]+]], v0 -; CHECK-NEXT: fmov w0, s[[REGNUM]] -; CHECK-NEXT: ret +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: addv h0, v0.4h +; CHECK-NEXT: fmov w0, s0 +; CHECK-NEXT: ret entry: %vaddv.i = tail call i32 @llvm.aarch64.neon.uaddv.i32.v4i16(<4 x i16> %a1) %0 = trunc i32 %vaddv.i to i16 @@ -137,9 +158,12 @@ entry: define <4 x i16> @test_vaddv_u16_used_by_laneop(<4 x i16> %a1, <4 x i16> %a2) { ; CHECK-LABEL: test_vaddv_u16_used_by_laneop: -; CHECK: addv.4h h[[REGNUM:[0-9]+]], v1 -; CHECK-NEXT: mov.h v0[3], v[[REGNUM]][0] -; CHECK-NEXT: ret +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: addv h1, v1.4h +; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0 +; CHECK-NEXT: mov v0.h[3], v1.h[0] +; CHECK-NEXT: // kill: def $d0 killed $d0 killed $q0 +; CHECK-NEXT: ret entry: %0 = tail call i32 @llvm.aarch64.neon.uaddv.i32.v4i16(<4 x i16> %a2) %1 = trunc i32 %0 to i16 @@ -149,9 +173,10 @@ entry: define i32 @test_vaddv_u16_masked(<4 x i16> %a1) { ; CHECK-LABEL: test_vaddv_u16_masked: -; CHECK: addv.4h h[[REGNUM:[0-9]+]], v0 -; CHECK-NEXT: fmov w0, s[[REGNUM]] -; CHECK-NEXT: ret +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: addv h0, v0.4h +; CHECK-NEXT: fmov w0, s0 +; CHECK-NEXT: ret entry: %vaddv.i = tail call i32 @llvm.aarch64.neon.uaddv.i32.v4i16(<4 x i16> %a1) %0 = and i32 %vaddv.i, 3276799 ; 0x31ffff @@ -160,10 +185,11 @@ entry: define i32 @test_vaddv_u32(<2 x i32> %a1) { ; CHECK-LABEL: test_vaddv_u32: +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: addp v0.2s, v0.2s, v0.2s +; CHECK-NEXT: fmov w0, s0 +; CHECK-NEXT: ret ; 2 x i32 is not supported by the ISA, thus, this is a special case -; CHECK: addp.2s v[[REGNUM:[0-9]+]], v0, v0 -; CHECK-NEXT: fmov w0, s[[REGNUM]] -; CHECK-NEXT: ret entry: %vaddv.i = tail call i32 @llvm.aarch64.neon.uaddv.i32.v2i32(<2 x i32> %a1) ret i32 %vaddv.i @@ -171,9 +197,12 @@ entry: define <2 x i32> @test_vaddv_u32_used_by_laneop(<2 x i32> %a1, <2 x i32> %a2) { ; CHECK-LABEL: test_vaddv_u32_used_by_laneop: -; CHECK: addp.2s v[[REGNUM:[0-9]+]], v1, v1 -; CHECK-NEXT: mov.s v0[1], v[[REGNUM]][0] -; CHECK-NEXT: ret +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: addp v1.2s, v1.2s, v1.2s +; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0 +; CHECK-NEXT: mov v0.s[1], v1.s[0] +; CHECK-NEXT: // kill: def $d0 killed $d0 killed $q0 +; CHECK-NEXT: ret entry: %0 = tail call i32 @llvm.aarch64.neon.uaddv.i32.v2i32(<2 x i32> %a2) %1 = insertelement <2 x i32> %a1, i32 %0, i32 1 @@ -182,8 +211,9 @@ entry: define float @test_vaddv_f32(<2 x float> %a1) { ; CHECK-LABEL: test_vaddv_f32: -; CHECK: faddp.2s s0, v0 -; CHECK-NEXT: ret +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: faddp s0, v0.2s +; CHECK-NEXT: ret entry: %vaddv.i = tail call float @llvm.aarch64.neon.faddv.f32.v2f32(<2 x float> %a1) ret float %vaddv.i @@ -191,9 +221,10 @@ entry: define float @test_vaddv_v4f32(<4 x float> %a1) { ; CHECK-LABEL: test_vaddv_v4f32: -; CHECK: faddp.4s [[REGNUM:v[0-9]+]], v0, v0 -; CHECK: faddp.2s s0, [[REGNUM]] -; CHECK-NEXT: ret +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: faddp v0.4s, v0.4s, v0.4s +; CHECK-NEXT: faddp s0, v0.2s +; CHECK-NEXT: ret entry: %vaddv.i = tail call float @llvm.aarch64.neon.faddv.f32.v4f32(<4 x float> %a1) ret float %vaddv.i @@ -201,8 +232,9 @@ entry: define double @test_vaddv_f64(<2 x double> %a1) { ; CHECK-LABEL: test_vaddv_f64: -; CHECK: faddp.2d d0, v0 -; CHECK-NEXT: ret +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: faddp d0, v0.2d +; CHECK-NEXT: ret entry: %vaddv.i = tail call double @llvm.aarch64.neon.faddv.f64.v2f64(<2 x double> %a1) ret double %vaddv.i @@ -210,9 +242,10 @@ entry: define i64 @test_vaddv_u64(<2 x i64> %a1) { ; CHECK-LABEL: test_vaddv_u64: -; CHECK: addp.2d [[REGNUM:d[0-9]+]], v0 -; CHECK-NEXT: fmov x0, [[REGNUM]] -; CHECK-NEXT: ret +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: addp d0, v0.2d +; CHECK-NEXT: fmov x0, d0 +; CHECK-NEXT: ret entry: %vaddv.i = tail call i64 @llvm.aarch64.neon.uaddv.i64.v2i64(<2 x i64> %a1) ret i64 %vaddv.i @@ -220,9 +253,10 @@ entry: define <2 x i64> @test_vaddv_u64_used_by_laneop(<2 x i64> %a1, <2 x i64> %a2) { ; CHECK-LABEL: test_vaddv_u64_used_by_laneop: -; CHECK: addp.2d d[[REGNUM:[0-9]+]], v1 -; CHECK-NEXT: mov.d v0[1], v[[REGNUM]][0] -; CHECK-NEXT: ret +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: addp d1, v1.2d +; CHECK-NEXT: mov v0.d[1], v1.d[0] +; CHECK-NEXT: ret entry: %0 = tail call i64 @llvm.aarch64.neon.uaddv.i64.v2i64(<2 x i64> %a2) %1 = insertelement <2 x i64> %a1, i64 %0, i64 1 @@ -231,10 +265,10 @@ entry: define <1 x i64> @test_vaddv_u64_to_vec(<2 x i64> %a1) { ; CHECK-LABEL: test_vaddv_u64_to_vec: -; CHECK: addp.2d d0, v0 -; CHECK-NOT: fmov -; CHECK-NOT: ins -; CHECK: ret +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: addp d0, v0.2d +; CHECK-NEXT: // kill: def $d0 killed $d0 killed $q0 +; CHECK-NEXT: ret entry: %vaddv.i = tail call i64 @llvm.aarch64.neon.uaddv.i64.v2i64(<2 x i64> %a1) %vec = insertelement <1 x i64> undef, i64 %vaddv.i, i32 0 @@ -243,9 +277,10 @@ entry: define signext i8 @test_vaddvq_s8(<16 x i8> %a1) { ; CHECK-LABEL: test_vaddvq_s8: -; CHECK: addv.16b b[[REGNUM:[0-9]+]], v0 -; CHECK-NEXT: smov.b w0, v[[REGNUM]][0] -; CHECK-NEXT: ret +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: addv b0, v0.16b +; CHECK-NEXT: smov w0, v0.b[0] +; CHECK-NEXT: ret entry: %vaddv.i = tail call i32 @llvm.aarch64.neon.saddv.i32.v16i8(<16 x i8> %a1) %0 = trunc i32 %vaddv.i to i8 @@ -254,9 +289,10 @@ entry: define <16 x i8> @test_vaddvq_s8_used_by_laneop(<16 x i8> %a1, <16 x i8> %a2) { ; CHECK-LABEL: test_vaddvq_s8_used_by_laneop: -; CHECK: addv.16b b[[REGNUM:[0-9]+]], v1 -; CHECK-NEXT: mov.b v0[3], v[[REGNUM]][0] -; CHECK-NEXT: ret +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: addv b1, v1.16b +; CHECK-NEXT: mov v0.b[3], v1.b[0] +; CHECK-NEXT: ret entry: %0 = tail call i32 @llvm.aarch64.neon.saddv.i32.v16i8(<16 x i8> %a2) %1 = trunc i32 %0 to i8 @@ -266,9 +302,10 @@ entry: define signext i16 @test_vaddvq_s16(<8 x i16> %a1) { ; CHECK-LABEL: test_vaddvq_s16: -; CHECK: addv.8h h[[REGNUM:[0-9]+]], v0 -; CHECK-NEXT: smov.h w0, v[[REGNUM]][0] -; CHECK-NEXT: ret +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: addv h0, v0.8h +; CHECK-NEXT: smov w0, v0.h[0] +; CHECK-NEXT: ret entry: %vaddv.i = tail call i32 @llvm.aarch64.neon.saddv.i32.v8i16(<8 x i16> %a1) %0 = trunc i32 %vaddv.i to i16 @@ -277,9 +314,10 @@ entry: define <8 x i16> @test_vaddvq_s16_used_by_laneop(<8 x i16> %a1, <8 x i16> %a2) { ; CHECK-LABEL: test_vaddvq_s16_used_by_laneop: -; CHECK: addv.8h h[[REGNUM:[0-9]+]], v1 -; CHECK-NEXT: mov.h v0[3], v[[REGNUM]][0] -; CHECK-NEXT: ret +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: addv h1, v1.8h +; CHECK-NEXT: mov v0.h[3], v1.h[0] +; CHECK-NEXT: ret entry: %0 = tail call i32 @llvm.aarch64.neon.saddv.i32.v8i16(<8 x i16> %a2) %1 = trunc i32 %0 to i16 @@ -289,9 +327,10 @@ entry: define i32 @test_vaddvq_s32(<4 x i32> %a1) { ; CHECK-LABEL: test_vaddvq_s32: -; CHECK: addv.4s [[REGNUM:s[0-9]+]], v0 -; CHECK-NEXT: fmov w0, [[REGNUM]] -; CHECK-NEXT: ret +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: addv s0, v0.4s +; CHECK-NEXT: fmov w0, s0 +; CHECK-NEXT: ret entry: %vaddv.i = tail call i32 @llvm.aarch64.neon.saddv.i32.v4i32(<4 x i32> %a1) ret i32 %vaddv.i @@ -299,9 +338,10 @@ entry: define <4 x i32> @test_vaddvq_s32_used_by_laneop(<4 x i32> %a1, <4 x i32> %a2) { ; CHECK-LABEL: test_vaddvq_s32_used_by_laneop: -; CHECK: addv.4s s[[REGNUM:[0-9]+]], v1 -; CHECK-NEXT: mov.s v0[3], v[[REGNUM]][0] -; CHECK-NEXT: ret +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: addv s1, v1.4s +; CHECK-NEXT: mov v0.s[3], v1.s[0] +; CHECK-NEXT: ret entry: %0 = tail call i32 @llvm.aarch64.neon.saddv.i32.v4i32(<4 x i32> %a2) %1 = insertelement <4 x i32> %a1, i32 %0, i32 3 @@ -310,9 +350,10 @@ entry: define zeroext i8 @test_vaddvq_u8(<16 x i8> %a1) { ; CHECK-LABEL: test_vaddvq_u8: -; CHECK: addv.16b b[[REGNUM:[0-9]+]], v0 -; CHECK-NEXT: fmov w0, s[[REGNUM]] -; CHECK-NEXT: ret +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: addv b0, v0.16b +; CHECK-NEXT: fmov w0, s0 +; CHECK-NEXT: ret entry: %vaddv.i = tail call i32 @llvm.aarch64.neon.uaddv.i32.v16i8(<16 x i8> %a1) %0 = trunc i32 %vaddv.i to i8 @@ -321,9 +362,10 @@ entry: define <16 x i8> @test_vaddvq_u8_used_by_laneop(<16 x i8> %a1, <16 x i8> %a2) { ; CHECK-LABEL: test_vaddvq_u8_used_by_laneop: -; CHECK: addv.16b b[[REGNUM:[0-9]+]], v1 -; CHECK-NEXT: mov.b v0[3], v[[REGNUM]][0] -; CHECK-NEXT: ret +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: addv b1, v1.16b +; CHECK-NEXT: mov v0.b[3], v1.b[0] +; CHECK-NEXT: ret entry: %0 = tail call i32 @llvm.aarch64.neon.uaddv.i32.v16i8(<16 x i8> %a2) %1 = trunc i32 %0 to i8 @@ -333,9 +375,10 @@ entry: define zeroext i16 @test_vaddvq_u16(<8 x i16> %a1) { ; CHECK-LABEL: test_vaddvq_u16: -; CHECK: addv.8h h[[REGNUM:[0-9]+]], v0 -; CHECK-NEXT: fmov w0, s[[REGNUM]] -; CHECK-NEXT: ret +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: addv h0, v0.8h +; CHECK-NEXT: fmov w0, s0 +; CHECK-NEXT: ret entry: %vaddv.i = tail call i32 @llvm.aarch64.neon.uaddv.i32.v8i16(<8 x i16> %a1) %0 = trunc i32 %vaddv.i to i16 @@ -344,9 +387,10 @@ entry: define <8 x i16> @test_vaddvq_u16_used_by_laneop(<8 x i16> %a1, <8 x i16> %a2) { ; CHECK-LABEL: test_vaddvq_u16_used_by_laneop: -; CHECK: addv.8h h[[REGNUM:[0-9]+]], v1 -; CHECK-NEXT: mov.h v0[3], v[[REGNUM]][0] -; CHECK-NEXT: ret +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: addv h1, v1.8h +; CHECK-NEXT: mov v0.h[3], v1.h[0] +; CHECK-NEXT: ret entry: %0 = tail call i32 @llvm.aarch64.neon.uaddv.i32.v8i16(<8 x i16> %a2) %1 = trunc i32 %0 to i16 @@ -356,9 +400,10 @@ entry: define i32 @test_vaddvq_u32(<4 x i32> %a1) { ; CHECK-LABEL: test_vaddvq_u32: -; CHECK: addv.4s [[REGNUM:s[0-9]+]], v0 -; CHECK-NEXT: fmov [[FMOVRES:w[0-9]+]], [[REGNUM]] -; CHECK-NEXT: ret +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: addv s0, v0.4s +; CHECK-NEXT: fmov w0, s0 +; CHECK-NEXT: ret entry: %vaddv.i = tail call i32 @llvm.aarch64.neon.uaddv.i32.v4i32(<4 x i32> %a1) ret i32 %vaddv.i @@ -366,9 +411,10 @@ entry: define <4 x i32> @test_vaddvq_u32_used_by_laneop(<4 x i32> %a1, <4 x i32> %a2) { ; CHECK-LABEL: test_vaddvq_u32_used_by_laneop: -; CHECK: addv.4s s[[REGNUM:[0-9]+]], v1 -; CHECK-NEXT: mov.s v0[3], v[[REGNUM]][0] -; CHECK-NEXT: ret +; CHECK: // %bb.0: // %entry +; CHECK-NEXT: addv s1, v1.4s +; CHECK-NEXT: mov v0.s[3], v1.s[0] +; CHECK-NEXT: ret entry: %0 = tail call i32 @llvm.aarch64.neon.uaddv.i32.v4i32(<4 x i32> %a2) %1 = insertelement <4 x i32> %a1, i32 %0, i32 3