From 834c410d9df313fde9160b23e6e1c6cf95bed8a3 Mon Sep 17 00:00:00 2001 From: Jie Fu Date: Mon, 30 Jun 2025 15:50:04 +0800 Subject: [PATCH] [Target] Prevent copying in loop variables (NFC) /data/llvm-project/llvm/lib/Target/Lanai/LanaiISelLowering.cpp:715:19: error: loop variable '[Reg, N]' creates a copy from type 'std::pair const' [-Werror,-Wrange-loop-construct] for (const auto [Reg, N] : RegsToPass) { ^ /data/llvm-project/llvm/lib/Target/Lanai/LanaiISelLowering.cpp:715:8: note: use reference type 'std::pair const &' to prevent copying for (const auto [Reg, N] : RegsToPass) { ^~~~~~~~~~~~~~~~~~~~~ & /data/llvm-project/llvm/lib/Target/Lanai/LanaiISelLowering.cpp:747:19: error: loop variable '[Reg, N]' creates a copy from type 'std::pair const' [-Werror,-Wrange-loop-construct] for (const auto [Reg, N] : RegsToPass) ^ /data/llvm-project/llvm/lib/Target/Lanai/LanaiISelLowering.cpp:747:8: note: use reference type 'std::pair const &' to prevent copying for (const auto [Reg, N] : RegsToPass) ^~~~~~~~~~~~~~~~~~~~~ & 2 errors generated. --- llvm/lib/Target/Lanai/LanaiISelLowering.cpp | 4 ++-- llvm/lib/Target/MSP430/MSP430ISelLowering.cpp | 4 ++-- llvm/lib/Target/VE/VEISelLowering.cpp | 4 ++-- llvm/lib/Target/XCore/XCoreISelLowering.cpp | 4 ++-- 4 files changed, 8 insertions(+), 8 deletions(-) diff --git a/llvm/lib/Target/Lanai/LanaiISelLowering.cpp b/llvm/lib/Target/Lanai/LanaiISelLowering.cpp index 1af6c7e3418e..9e5fa2263c1d 100644 --- a/llvm/lib/Target/Lanai/LanaiISelLowering.cpp +++ b/llvm/lib/Target/Lanai/LanaiISelLowering.cpp @@ -712,7 +712,7 @@ SDValue LanaiTargetLowering::LowerCCCCallTo( // Build a sequence of copy-to-reg nodes chained together with token chain and // flag operands which copy the outgoing args into registers. The InGlue in // necessary since all emitted instructions must be stuck together. - for (const auto [Reg, N] : RegsToPass) { + for (const auto &[Reg, N] : RegsToPass) { Chain = DAG.getCopyToReg(Chain, DL, Reg, N, InGlue); InGlue = Chain.getValue(1); } @@ -744,7 +744,7 @@ SDValue LanaiTargetLowering::LowerCCCCallTo( // Add argument registers to the end of the list so that they are // known live into the call. - for (const auto [Reg, N] : RegsToPass) + for (const auto &[Reg, N] : RegsToPass) Ops.push_back(DAG.getRegister(Reg, N.getValueType())); if (InGlue.getNode()) diff --git a/llvm/lib/Target/MSP430/MSP430ISelLowering.cpp b/llvm/lib/Target/MSP430/MSP430ISelLowering.cpp index 6b886ce76c97..fd31dbad41fd 100644 --- a/llvm/lib/Target/MSP430/MSP430ISelLowering.cpp +++ b/llvm/lib/Target/MSP430/MSP430ISelLowering.cpp @@ -768,7 +768,7 @@ SDValue MSP430TargetLowering::LowerCCCCallTo( // flag operands which copy the outgoing args into registers. The InGlue in // necessary since all emitted instructions must be stuck together. SDValue InGlue; - for (const auto [Reg, N] : RegsToPass) { + for (const auto &[Reg, N] : RegsToPass) { Chain = DAG.getCopyToReg(Chain, dl, Reg, N, InGlue); InGlue = Chain.getValue(1); } @@ -789,7 +789,7 @@ SDValue MSP430TargetLowering::LowerCCCCallTo( // Add argument registers to the end of the list so that they are // known live into the call. - for (const auto [Reg, N] : RegsToPass) + for (const auto &[Reg, N] : RegsToPass) Ops.push_back(DAG.getRegister(Reg, N.getValueType())); if (InGlue.getNode()) diff --git a/llvm/lib/Target/VE/VEISelLowering.cpp b/llvm/lib/Target/VE/VEISelLowering.cpp index b628494aac3b..14f0d7b2a417 100644 --- a/llvm/lib/Target/VE/VEISelLowering.cpp +++ b/llvm/lib/Target/VE/VEISelLowering.cpp @@ -738,7 +738,7 @@ SDValue VETargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI, // necessary since all emitted instructions must be stuck together in order // to pass the live physical registers. SDValue InGlue; - for (const auto [Reg, N] : RegsToPass) { + for (const auto &[Reg, N] : RegsToPass) { Chain = DAG.getCopyToReg(Chain, DL, Reg, N, InGlue); InGlue = Chain.getValue(1); } @@ -746,7 +746,7 @@ SDValue VETargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI, // Build the operands for the call instruction itself. SmallVector Ops; Ops.push_back(Chain); - for (const auto [Reg, N] : RegsToPass) + for (const auto &[Reg, N] : RegsToPass) Ops.push_back(DAG.getRegister(Reg, N.getValueType())); // Add a register mask operand representing the call-preserved registers. diff --git a/llvm/lib/Target/XCore/XCoreISelLowering.cpp b/llvm/lib/Target/XCore/XCoreISelLowering.cpp index dbce0a33555d..ef4cfcd69415 100644 --- a/llvm/lib/Target/XCore/XCoreISelLowering.cpp +++ b/llvm/lib/Target/XCore/XCoreISelLowering.cpp @@ -1064,7 +1064,7 @@ SDValue XCoreTargetLowering::LowerCCCCallTo( // The InGlue in necessary since all emitted instructions must be // stuck together. SDValue InGlue; - for (const auto [Reg, N] : RegsToPass) { + for (const auto &[Reg, N] : RegsToPass) { Chain = DAG.getCopyToReg(Chain, dl, Reg, N, InGlue); InGlue = Chain.getValue(1); } @@ -1088,7 +1088,7 @@ SDValue XCoreTargetLowering::LowerCCCCallTo( // Add argument registers to the end of the list so that they are // known live into the call. - for (const auto [Reg, N] : RegsToPass) + for (const auto &[Reg, N] : RegsToPass) Ops.push_back(DAG.getRegister(Reg, N.getValueType())); if (InGlue.getNode())