diff --git a/bolt/lib/Core/BinaryContext.cpp b/bolt/lib/Core/BinaryContext.cpp index f19460f8c1f5..acc441aca480 100644 --- a/bolt/lib/Core/BinaryContext.cpp +++ b/bolt/lib/Core/BinaryContext.cpp @@ -118,7 +118,7 @@ Expected> BinaryContext::createBinaryContext(const ObjectFile *File, bool IsPIC, std::unique_ptr DwCtx) { StringRef ArchName = ""; - StringRef FeaturesStr = ""; + std::string FeaturesStr = ""; switch (File->getArch()) { case llvm::Triple::x86_64: ArchName = "x86-64"; @@ -128,11 +128,20 @@ BinaryContext::createBinaryContext(const ObjectFile *File, bool IsPIC, ArchName = "aarch64"; FeaturesStr = "+all"; break; - case llvm::Triple::riscv64: + case llvm::Triple::riscv64: { ArchName = "riscv64"; - // RV64GC - FeaturesStr = "+m,+a,+f,+d,+zicsr,+zifencei,+c,+relax"; + Expected Features = File->getFeatures(); + + if (auto E = Features.takeError()) + return E; + + // We rely on relaxation for some transformations (e.g., promoting all calls + // to PseudoCALL and then making JITLink relax them). Since the relax + // feature is not stored in the object file, we manually enable it. + Features->AddFeature("relax"); + FeaturesStr = Features->getString(); break; + } default: return createStringError(std::errc::not_supported, "BOLT-ERROR: Unrecognized machine in ELF file"); diff --git a/bolt/test/RISCV/call-annotations.s b/bolt/test/RISCV/call-annotations.s index bc539bb0ec77..477c4693cd6d 100644 --- a/bolt/test/RISCV/call-annotations.s +++ b/bolt/test/RISCV/call-annotations.s @@ -1,12 +1,13 @@ /// Test that annotations are properly carried over to fixed calls. /// Note that --enable-bat is used to force offsets to be kept. -// RUN: llvm-mc -triple riscv64 -filetype obj -o %t.o %s +// RUN: llvm-mc -triple riscv64 -mattr=+c -filetype obj -o %t.o %s // RUN: ld.lld --emit-relocs -o %t %t.o // RUN: llvm-bolt --enable-bat --print-cfg --print-fix-riscv-calls \ // RUN: -o /dev/null %t | FileCheck %s .text + .option norvc .global f .p2align 1 f: diff --git a/bolt/test/RISCV/internal-func-reloc.s b/bolt/test/RISCV/internal-func-reloc.s index ea99b564fe42..c6c74bed92ef 100644 --- a/bolt/test/RISCV/internal-func-reloc.s +++ b/bolt/test/RISCV/internal-func-reloc.s @@ -2,18 +2,14 @@ /// get transformed by BOLT. The tests rely on the "remove-nops" optimization: /// if nops got removed from the function, it got transformed by BOLT. -// RUN: %clang %cflags -o %t %s +// RUN: llvm-mc -triple riscv64 -filetype=obj -o %t.o %s +// RUN: ld.lld --emit-relocs -o %t %t.o // RUN: llvm-bolt -o %t.bolt %t // RUN: llvm-objdump -d %t.bolt | FileCheck %s .text - - /// These options are only used to make the assembler output easier to predict - .option norelax - .option norvc - .globl _start - .p2align 1 + .p2align 2 // CHECK: <_start>: // CHECK-NEXT: j 0x{{.*}} <_start> _start: @@ -23,10 +19,10 @@ _start: .size _start, .-_start .globl f - .p2align 1 + .p2align 2 // CHECK: : -// CHECK-NEXT: auipc a0, 0 -// CHECK-NEXT: addi a0, a0, 64 +// CHECK-NEXT: auipc a0, [[#]] +// CHECK-NEXT: addi a0, a0, [[#]] f: nop 1: @@ -37,7 +33,7 @@ f: .size f, .-f .globl g - .p2align 1 + .p2align 2 g: ret .size g, .-g