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MIPS: Replace MipsMCExpr with MCSpecifierExpr

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This commit is contained in:
Fangrui Song
2025-06-17 09:36:52 -07:00
parent c66be28990
commit 9ec75a50bc
12 changed files with 58 additions and 125 deletions
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58
llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
View File

@@ -2965,9 +2965,9 @@ bool MipsAsmParser::loadAndAddSymbolAddress(const MCExpr *SymExpr,
Res.getConstant() == 0 && !IsLocalSym) {
if (UseXGOT) {
const MCExpr *CallHiExpr =
MipsMCExpr::create(Mips::S_CALL_HI16, SymExpr, getContext());
MCSpecifierExpr::create(SymExpr, Mips::S_CALL_HI16, getContext());
const MCExpr *CallLoExpr =
MipsMCExpr::create(Mips::S_CALL_LO16, SymExpr, getContext());
MCSpecifierExpr::create(SymExpr, Mips::S_CALL_LO16, getContext());
TOut.emitRX(Mips::LUi, DstReg, MCOperand::createExpr(CallHiExpr), IDLoc,
STI);
TOut.emitRRR(IsPtr64 ? Mips::DADDu : Mips::ADDu, DstReg, DstReg, GPReg,
@@ -2976,7 +2976,7 @@ bool MipsAsmParser::loadAndAddSymbolAddress(const MCExpr *SymExpr,
MCOperand::createExpr(CallLoExpr), IDLoc, STI);
} else {
const MCExpr *CallExpr =
MipsMCExpr::create(Mips::S_GOT_CALL, SymExpr, getContext());
MCSpecifierExpr::create(SymExpr, Mips::S_GOT_CALL, getContext());
TOut.emitRRX(IsPtr64 ? Mips::LD : Mips::LW, DstReg, GPReg,
MCOperand::createExpr(CallExpr), IDLoc, STI);
}
@@ -3009,9 +3009,9 @@ bool MipsAsmParser::loadAndAddSymbolAddress(const MCExpr *SymExpr,
// this happens then the last instruction must use $rd as the result
// register.
const MCExpr *CallHiExpr =
MipsMCExpr::create(Mips::S_GOT_HI16, SymExpr, getContext());
const MCExpr *CallLoExpr =
MipsMCExpr::create(Res.getAddSym(), Mips::S_GOT_LO16, getContext());
MCSpecifierExpr::create(SymExpr, Mips::S_GOT_HI16, getContext());
const MCExpr *CallLoExpr = MCSpecifierExpr::create(
Res.getAddSym(), Mips::S_GOT_LO16, getContext());
TOut.emitRX(Mips::LUi, TmpReg, MCOperand::createExpr(CallHiExpr), IDLoc,
STI);
@@ -3042,8 +3042,8 @@ bool MipsAsmParser::loadAndAddSymbolAddress(const MCExpr *SymExpr,
// The daddiu's marked with a '>' may be omitted if they are redundant. If
// this happens then the last instruction must use $rd as the result
// register.
GotExpr =
MipsMCExpr::create(Res.getAddSym(), Mips::S_GOT_DISP, getContext());
GotExpr = MCSpecifierExpr::create(Res.getAddSym(), Mips::S_GOT_DISP,
getContext());
if (Res.getConstant() != 0) {
// Symbols fully resolve with just the %got_disp(symbol) but we
// must still account for any offset to the symbol for
@@ -3070,14 +3070,14 @@ bool MipsAsmParser::loadAndAddSymbolAddress(const MCExpr *SymExpr,
// this happens then the last instruction must use $rd as the result
// register.
if (IsLocalSym) {
GotExpr = MipsMCExpr::create(Mips::S_GOT, SymExpr, getContext());
LoExpr = MipsMCExpr::create(Mips::S_LO, SymExpr, getContext());
GotExpr = MCSpecifierExpr::create(SymExpr, Mips::S_GOT, getContext());
LoExpr = MCSpecifierExpr::create(SymExpr, Mips::S_LO, getContext());
} else {
// External symbols fully resolve the symbol with just the %got(symbol)
// but we must still account for any offset to the symbol for
// expressions like symbol+8.
GotExpr =
MipsMCExpr::create(Res.getAddSym(), Mips::S_GOT, getContext());
MCSpecifierExpr::create(Res.getAddSym(), Mips::S_GOT, getContext());
if (Res.getConstant() != 0)
LoExpr = MCConstantExpr::create(Res.getConstant(), getContext());
}
@@ -3097,8 +3097,10 @@ bool MipsAsmParser::loadAndAddSymbolAddress(const MCExpr *SymExpr,
return false;
}
const auto *HiExpr = MipsMCExpr::create(Mips::S_HI, SymExpr, getContext());
const auto *LoExpr = MipsMCExpr::create(Mips::S_LO, SymExpr, getContext());
const auto *HiExpr =
MCSpecifierExpr::create(SymExpr, Mips::S_HI, getContext());
const auto *LoExpr =
MCSpecifierExpr::create(SymExpr, Mips::S_LO, getContext());
// This is the 64-bit symbol address expansion.
if (ABI.ArePtrs64bit() && isGP64bit()) {
@@ -3110,9 +3112,9 @@ bool MipsAsmParser::loadAndAddSymbolAddress(const MCExpr *SymExpr,
// source register.
const auto *HighestExpr =
MipsMCExpr::create(Mips::S_HIGHEST, SymExpr, getContext());
MCSpecifierExpr::create(SymExpr, Mips::S_HIGHEST, getContext());
const auto *HigherExpr =
MipsMCExpr::create(Mips::S_HIGHER, SymExpr, getContext());
MCSpecifierExpr::create(SymExpr, Mips::S_HIGHER, getContext());
bool RdRegIsRsReg =
UseSrcReg &&
@@ -3310,7 +3312,8 @@ bool MipsAsmParser::emitPartialAddress(MipsTargetStreamer &TOut, SMLoc IDLoc,
if(IsPicEnabled) {
const MCExpr *GotSym = MCSymbolRefExpr::create(Sym, getContext());
const auto *GotExpr = MipsMCExpr::create(Mips::S_GOT, GotSym, getContext());
const auto *GotExpr =
MCSpecifierExpr::create(GotSym, Mips::S_GOT, getContext());
if(isABI_O32() || isABI_N32()) {
TOut.emitRRX(Mips::LW, ATReg, GPReg, MCOperand::createExpr(GotExpr),
@@ -3321,7 +3324,8 @@ bool MipsAsmParser::emitPartialAddress(MipsTargetStreamer &TOut, SMLoc IDLoc,
}
} else { //!IsPicEnabled
const MCExpr *HiSym = MCSymbolRefExpr::create(Sym, getContext());
const auto *HiExpr = MipsMCExpr::create(Mips::S_HI, HiSym, getContext());
const auto *HiExpr =
MCSpecifierExpr::create(HiSym, Mips::S_HI, getContext());
// FIXME: This is technically correct but gives a different result to gas,
// but gas is incomplete there (it has a fixme noting it doesn't work with
@@ -3334,10 +3338,10 @@ bool MipsAsmParser::emitPartialAddress(MipsTargetStreamer &TOut, SMLoc IDLoc,
} else { //isABI_N64()
const MCExpr *HighestSym = MCSymbolRefExpr::create(Sym, getContext());
const auto *HighestExpr =
MipsMCExpr::create(Mips::S_HIGHEST, HighestSym, getContext());
MCSpecifierExpr::create(HighestSym, Mips::S_HIGHEST, getContext());
const MCExpr *HigherSym = MCSymbolRefExpr::create(Sym, getContext());
const auto *HigherExpr =
MipsMCExpr::create(Mips::S_HIGHER, HigherSym, getContext());
MCSpecifierExpr::create(HigherSym, Mips::S_HIGHER, getContext());
TOut.emitRX(Mips::LUi, ATReg, MCOperand::createExpr(HighestExpr), IDLoc,
STI);
@@ -3424,7 +3428,7 @@ bool MipsAsmParser::expandLoadSingleImmToFPR(MCInst &Inst, SMLoc IDLoc,
MCSymbol *Sym = getContext().createTempSymbol();
const MCExpr *LoSym = MCSymbolRefExpr::create(Sym, getContext());
const auto *LoExpr = MipsMCExpr::create(Mips::S_LO, LoSym, getContext());
const auto *LoExpr = MCSpecifierExpr::create(LoSym, Mips::S_LO, getContext());
getStreamer().switchSection(ReadOnlySection);
getStreamer().emitLabel(Sym, IDLoc);
@@ -3474,7 +3478,7 @@ bool MipsAsmParser::expandLoadDoubleImmToGPR(MCInst &Inst, SMLoc IDLoc,
MCSymbol *Sym = getContext().createTempSymbol();
const MCExpr *LoSym = MCSymbolRefExpr::create(Sym, getContext());
const auto *LoExpr = MipsMCExpr::create(Mips::S_LO, LoSym, getContext());
const auto *LoExpr = MCSpecifierExpr::create(LoSym, Mips::S_LO, getContext());
getStreamer().switchSection(ReadOnlySection);
getStreamer().emitLabel(Sym, IDLoc);
@@ -3554,7 +3558,7 @@ bool MipsAsmParser::expandLoadDoubleImmToFPR(MCInst &Inst, bool Is64FPU,
MCSymbol *Sym = getContext().createTempSymbol();
const MCExpr *LoSym = MCSymbolRefExpr::create(Sym, getContext());
const auto *LoExpr = MipsMCExpr::create(Mips::S_LO, LoSym, getContext());
const auto *LoExpr = MCSpecifierExpr::create(LoSym, Mips::S_LO, getContext());
getStreamer().switchSection(ReadOnlySection);
getStreamer().emitLabel(Sym, IDLoc);
@@ -3777,15 +3781,15 @@ void MipsAsmParser::expandMem16Inst(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out,
// sw $8, %lo(sym)($at)
const MCExpr *OffExpr = OffsetOp.getExpr();
MCOperand LoOperand = MCOperand::createExpr(
MipsMCExpr::create(Mips::S_LO, OffExpr, getContext()));
MCSpecifierExpr::create(OffExpr, Mips::S_LO, getContext()));
MCOperand HiOperand = MCOperand::createExpr(
MipsMCExpr::create(Mips::S_HI, OffExpr, getContext()));
MCSpecifierExpr::create(OffExpr, Mips::S_HI, getContext()));
if (ABI.IsN64()) {
MCOperand HighestOperand = MCOperand::createExpr(
MipsMCExpr::create(Mips::S_HIGHEST, OffExpr, getContext()));
MCSpecifierExpr::create(OffExpr, Mips::S_HIGHEST, getContext()));
MCOperand HigherOperand = MCOperand::createExpr(
MipsMCExpr::create(Mips::S_HIGHER, OffExpr, getContext()));
MCSpecifierExpr::create(OffExpr, Mips::S_HIGHER, getContext()));
TOut.emitRX(Mips::LUi, TmpReg, HighestOperand, IDLoc, STI);
TOut.emitRRX(Mips::DADDiu, TmpReg, TmpReg, HigherOperand, IDLoc, STI);
@@ -6394,7 +6398,7 @@ const MCExpr *MipsAsmParser::parseRelocExpr() {
while (Ops.size()) {
if (Parser.parseToken(AsmToken::RParen, "expected ')'"))
return nullptr;
Res = MipsMCExpr::create(Ops.pop_back_val(), Res, getContext());
Res = MCSpecifierExpr::create(Res, Ops.pop_back_val(), getContext());
}
return Res;
}

1
llvm/lib/Target/Mips/MCTargetDesc/CMakeLists.txt
View File

@@ -7,7 +7,6 @@ add_llvm_component_library(LLVMMipsDesc
MipsInstPrinter.cpp
MipsMCAsmInfo.cpp
MipsMCCodeEmitter.cpp
MipsMCExpr.cpp
MipsMCTargetDesc.cpp
MipsNaClELFStreamer.cpp
MipsOptionRecord.cpp

1
llvm/lib/Target/Mips/MCTargetDesc/MipsELFObjectWriter.cpp
View File

@@ -16,6 +16,7 @@
#include "llvm/MC/MCFixup.h"
#include "llvm/MC/MCObjectWriter.h"
#include "llvm/MC/MCSymbolELF.h"
#include "llvm/MC/MCValue.h"
#include "llvm/Support/Casting.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Support/Debug.h"

8
llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp
View File

@@ -12,6 +12,7 @@
#include "MipsMCAsmInfo.h"
#include "MipsABIInfo.h"
#include "llvm/MC/MCValue.h"
#include "llvm/Support/Casting.h"
#include "llvm/TargetParser/Triple.h"
@@ -59,6 +60,13 @@ MipsCOFFMCAsmInfo::MipsCOFFMCAsmInfo() {
AllowAtInName = true;
}
const MCSpecifierExpr *Mips::createGpOff(const MCExpr *Expr, Mips::Specifier S,
MCContext &Ctx) {
Expr = MCSpecifierExpr::create(Expr, Mips::S_GPREL, Ctx);
Expr = MCSpecifierExpr::create(Expr, Mips::S_NEG, Ctx);
return MCSpecifierExpr::create(Expr, S, Ctx);
}
static void printImpl(const MCAsmInfo &MAI, raw_ostream &OS,
const MCSpecifierExpr &Expr) {
int64_t AbsVal;

3
llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.h
View File

@@ -13,7 +13,6 @@
#ifndef LLVM_LIB_TARGET_MIPS_MCTARGETDESC_MIPSMCASMINFO_H
#define LLVM_LIB_TARGET_MIPS_MCTARGETDESC_MIPSMCASMINFO_H
#include "MCTargetDesc/MipsMCExpr.h"
#include "llvm/MC/MCAsmInfoCOFF.h"
#include "llvm/MC/MCAsmInfoELF.h"
#include "llvm/MC/MCFixup.h"
@@ -77,6 +76,8 @@ enum {
};
bool isGpOff(const MCSpecifierExpr &E);
const MCSpecifierExpr *createGpOff(const MCExpr *Expr, Specifier S,
MCContext &Ctx);
}
} // namespace llvm

2
llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
View File

@@ -581,7 +581,7 @@ getExprOpValue(const MCExpr *Expr, SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &STI) const {
MCExpr::ExprKind Kind = Expr->getKind();
if (Kind == MCExpr::Specifier) {
const MipsMCExpr *MipsExpr = cast<MipsMCExpr>(Expr);
const auto *MipsExpr = cast<MCSpecifierExpr>(Expr);
Mips::Fixups FixupKind = Mips::Fixups(0);
switch (MipsExpr->getSpecifier()) {

39
llvm/lib/Target/Mips/MCTargetDesc/MipsMCExpr.cpp
View File

@@ -1,39 +0,0 @@
//===-- MipsMCExpr.cpp - Mips specific MC expression classes --------------===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#include "MipsMCExpr.h"
#include "MCTargetDesc/MipsMCAsmInfo.h"
#include "llvm/MC/MCAsmInfo.h"
#include "llvm/MC/MCAssembler.h"
#include "llvm/MC/MCContext.h"
#include "llvm/MC/MCStreamer.h"
#include "llvm/MC/MCValue.h"
#include "llvm/Support/Casting.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/raw_ostream.h"
#include <cstdint>
using namespace llvm;
#define DEBUG_TYPE "mipsmcexpr"
const MipsMCExpr *MipsMCExpr::create(MipsMCExpr::Specifier S,
const MCExpr *Expr, MCContext &Ctx) {
return new (Ctx) MipsMCExpr(Expr, S);
}
const MipsMCExpr *MipsMCExpr::create(const MCSymbol *Sym, Specifier S,
MCContext &Ctx) {
return new (Ctx) MipsMCExpr(MCSymbolRefExpr::create(Sym, Ctx), S);
}
const MipsMCExpr *MipsMCExpr::createGpOff(MipsMCExpr::Specifier S,
const MCExpr *Expr, MCContext &Ctx) {
return create(S, create(Mips::S_NEG, create(Mips::S_GPREL, Expr, Ctx), Ctx),
Ctx);
}

36
llvm/lib/Target/Mips/MCTargetDesc/MipsMCExpr.h
View File

@@ -1,36 +0,0 @@
//===- MipsMCExpr.h - Mips specific MC expression classes -------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_LIB_TARGET_MIPS_MCTARGETDESC_MIPSMCEXPR_H
#define LLVM_LIB_TARGET_MIPS_MCTARGETDESC_MIPSMCEXPR_H
#include "llvm/MC/MCExpr.h"
#include "llvm/MC/MCValue.h"
namespace llvm {
class MipsMCExpr : public MCSpecifierExpr {
public:
using Specifier = Spec;
private:
explicit MipsMCExpr(const MCExpr *Expr, Specifier S)
: MCSpecifierExpr(Expr, S) {}
public:
static const MipsMCExpr *create(Specifier S, const MCExpr *Expr,
MCContext &Ctx);
static const MipsMCExpr *create(const MCSymbol *Sym, Specifier S,
MCContext &Ctx);
static const MipsMCExpr *createGpOff(Specifier S, const MCExpr *Expr,
MCContext &Ctx);
};
} // end namespace llvm
#endif // LLVM_LIB_TARGET_MIPS_MCTARGETDESC_MIPSMCEXPR_H

21
llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
View File

@@ -16,7 +16,6 @@
#include "MipsBaseInfo.h"
#include "MipsELFStreamer.h"
#include "MipsInstPrinter.h"
#include "MipsMCExpr.h"
#include "MipsMCTargetDesc.h"
#include "llvm/BinaryFormat/ELF.h"
#include "llvm/MC/MCAsmInfo.h"
@@ -1266,9 +1265,7 @@ void MipsTargetELFStreamer::emitDirectiveCpLoad(unsigned RegNo) {
MCInst TmpInst;
TmpInst.setOpcode(Mips::LUi);
TmpInst.addOperand(MCOperand::createReg(GPReg));
const MCExpr *HiSym = MipsMCExpr::create(
Mips::S_HI, MCSymbolRefExpr::create(GP_Disp, MCA.getContext()),
MCA.getContext());
auto *HiSym = MCSpecifierExpr::create(GP_Disp, Mips::S_HI, MCA.getContext());
TmpInst.addOperand(MCOperand::createExpr(HiSym));
getStreamer().emitInstruction(TmpInst, STI);
@@ -1277,9 +1274,7 @@ void MipsTargetELFStreamer::emitDirectiveCpLoad(unsigned RegNo) {
TmpInst.setOpcode(Mips::ADDiu);
TmpInst.addOperand(MCOperand::createReg(GPReg));
TmpInst.addOperand(MCOperand::createReg(GPReg));
const MCExpr *LoSym = MipsMCExpr::create(
Mips::S_LO, MCSymbolRefExpr::create(GP_Disp, MCA.getContext()),
MCA.getContext());
auto *LoSym = MCSpecifierExpr::create(GP_Disp, Mips::S_LO, MCA.getContext());
TmpInst.addOperand(MCOperand::createExpr(LoSym));
getStreamer().emitInstruction(TmpInst, STI);
@@ -1342,12 +1337,12 @@ void MipsTargetELFStreamer::emitDirectiveCpsetup(unsigned RegNo,
emitRRI(Mips::SD, GPReg, Mips::SP, RegOrOffset, SMLoc(), &STI);
}
const MipsMCExpr *HiExpr = MipsMCExpr::createGpOff(
Mips::S_HI, MCSymbolRefExpr::create(&Sym, MCA.getContext()),
MCA.getContext());
const MipsMCExpr *LoExpr = MipsMCExpr::createGpOff(
Mips::S_LO, MCSymbolRefExpr::create(&Sym, MCA.getContext()),
MCA.getContext());
auto *HiExpr =
Mips::createGpOff(MCSymbolRefExpr::create(&Sym, MCA.getContext()),
Mips::S_HI, MCA.getContext());
auto *LoExpr =
Mips::createGpOff(MCSymbolRefExpr::create(&Sym, MCA.getContext()),
Mips::S_LO, MCA.getContext());
// lui $gp, %hi(%neg(%gp_rel(funcSym)))
emitRX(Mips::LUi, GPReg, MCOperand::createExpr(HiExpr), SMLoc(), &STI);

2
llvm/lib/Target/Mips/MipsAsmPrinter.cpp
View File

@@ -1244,7 +1244,7 @@ void MipsAsmPrinter::PrintDebugValueComment(const MachineInstr *MI,
// Emit .dtprelword or .dtpreldword directive
// and value for debug thread local expression.
void MipsAsmPrinter::emitDebugValue(const MCExpr *Value, unsigned Size) const {
if (auto *MipsExpr = dyn_cast<MipsMCExpr>(Value)) {
if (auto *MipsExpr = dyn_cast<MCSpecifierExpr>(Value)) {
if (MipsExpr && MipsExpr->getSpecifier() == Mips::S_DTPREL) {
switch (Size) {
case 4:

10
llvm/lib/Target/Mips/MipsMCInstLower.cpp
View File

@@ -175,9 +175,9 @@ MCOperand MipsMCInstLower::LowerSymbolOperand(const MachineOperand &MO,
}
if (IsGpOff)
Expr = MipsMCExpr::createGpOff(TargetKind, Expr, *Ctx);
Expr = Mips::createGpOff(Expr, TargetKind, *Ctx);
else if (TargetKind != Mips::S_None)
Expr = MipsMCExpr::create(TargetKind, Expr, *Ctx);
Expr = MCSpecifierExpr::create(Expr, TargetKind, *Ctx);
return MCOperand::createExpr(Expr);
}
@@ -216,7 +216,7 @@ MCOperand MipsMCInstLower::createSub(MachineBasicBlock *BB1,
const MCSymbolRefExpr *Sym2 = MCSymbolRefExpr::create(BB2->getSymbol(), *Ctx);
const MCBinaryExpr *Sub = MCBinaryExpr::createSub(Sym1, Sym2, *Ctx);
return MCOperand::createExpr(MipsMCExpr::create(Kind, Sub, *Ctx));
return MCOperand::createExpr(MCSpecifierExpr::create(Sub, Kind, *Ctx));
}
void MipsMCInstLower::
@@ -248,7 +248,7 @@ lowerLongBranchLUi(const MachineInstr *MI, MCInst &OutMI) const {
if (MI->getNumOperands() == 2) {
const MCExpr *Expr =
MCSymbolRefExpr::create(MI->getOperand(1).getMBB()->getSymbol(), *Ctx);
const auto *MipsExpr = MipsMCExpr::create(Spec, Expr, *Ctx);
const auto *MipsExpr = MCSpecifierExpr::create(Expr, Spec, *Ctx);
OutMI.addOperand(MCOperand::createExpr(MipsExpr));
} else if (MI->getNumOperands() == 3) {
// Create %hi($tgt-$baltgt).
@@ -290,7 +290,7 @@ void MipsMCInstLower::lowerLongBranchADDiu(const MachineInstr *MI,
// Lower register operand.
const MCExpr *Expr =
MCSymbolRefExpr::create(MI->getOperand(2).getMBB()->getSymbol(), *Ctx);
const auto *MipsExpr = MipsMCExpr::create(Spec, Expr, *Ctx);
const auto *MipsExpr = MCSpecifierExpr::create(Expr, Spec, *Ctx);
OutMI.addOperand(MCOperand::createExpr(MipsExpr));
} else if (MI->getNumOperands() == 4) {
// Create %lo($tgt-$baltgt) or %hi($tgt-$baltgt).

2
llvm/lib/Target/Mips/MipsTargetObjectFile.cpp
View File

@@ -189,5 +189,5 @@ MipsTargetObjectFile::getDebugThreadLocalSymbol(const MCSymbol *Sym) const {
const MCExpr *Expr = MCSymbolRefExpr::create(Sym, getContext());
Expr = MCBinaryExpr::createAdd(
Expr, MCConstantExpr::create(0x8000, getContext()), getContext());
return MipsMCExpr::create(Mips::S_DTPREL, Expr, getContext());
return MCSpecifierExpr::create(Expr, Mips::S_DTPREL, getContext());
}