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[HWASAN] Support tagged stack pointer

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If stack was allocated using regular allocator, it may be tagged
and it will make memToShadow calculate invalid offset.

Also when UAR tag should be the tag of the stack frame pointer.

Reviewed By: eugenis

Differential Revision: https://reviews.llvm.org/D149228
This commit is contained in:
Vitaly Buka
2023-04-25 17:48:24 -07:00
parent 7ac72cea0e
commit b5595836bc
16 changed files with 810 additions and 591 deletions
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10
llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
View File

@@ -994,7 +994,8 @@ void HWAddressSanitizer::tagAlloca(IRBuilder<> &IRB, AllocaInst *AI, Value *Tag,
ConstantInt::get(IntptrTy, AlignedSize)});
} else {
size_t ShadowSize = Size >> Mapping.Scale;
Value *ShadowPtr = memToShadow(IRB.CreatePointerCast(AI, IntptrTy), IRB);
Value *AddrLong = untagPointer(IRB, IRB.CreatePointerCast(AI, IntptrTy));
Value *ShadowPtr = memToShadow(AddrLong, IRB);
// If this memset is not inlined, it will be intercepted in the hwasan
// runtime library. That's OK, because the interceptor skips the checks if
// the address is in the shadow region.
@@ -1070,7 +1071,12 @@ Value *HWAddressSanitizer::getAllocaTag(IRBuilder<> &IRB, Value *StackTag,
}
Value *HWAddressSanitizer::getUARTag(IRBuilder<> &IRB) {
return ConstantInt::get(IntptrTy, 0);
Value *StackPointerLong = getSP(IRB);
Value *UARTag =
applyTagMask(IRB, IRB.CreateLShr(StackPointerLong, PointerTagShift));
UARTag->setName("hwasan.uar.tag");
return UARTag;
}
// Add a tag to an address.

24
llvm/test/Instrumentation/HWAddressSanitizer/RISCV/alloca-with-calls.ll
View File

@@ -30,6 +30,7 @@ define void @test_alloca() sanitize_hwaddress {
; CHECK-NEXT: [[TMP13:%.*]] = or i64 [[TMP1]], 4294967295
; CHECK-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP13]], 1
; CHECK-NEXT: [[TMP14:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP4]], 56
; CHECK-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16
; CHECK-NEXT: [[TMP15:%.*]] = call i8 @__hwasan_generate_tag()
; CHECK-NEXT: [[TMP16:%.*]] = zext i8 [[TMP15]] to i64
@@ -39,17 +40,20 @@ define void @test_alloca() sanitize_hwaddress {
; CHECK-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP19]] to ptr
; CHECK-NEXT: [[TMP20:%.*]] = trunc i64 [[TMP16]] to i8
; CHECK-NEXT: [[TMP21:%.*]] = ptrtoint ptr [[X]] to i64
; CHECK-NEXT: [[TMP22:%.*]] = lshr i64 [[TMP21]], 4
; CHECK-NEXT: [[TMP23:%.*]] = getelementptr i8, ptr [[TMP14]], i64 [[TMP22]]
; CHECK-NEXT: [[TMP24:%.*]] = getelementptr i8, ptr [[TMP23]], i32 0
; CHECK-NEXT: store i8 4, ptr [[TMP24]], align 1
; CHECK-NEXT: [[TMP25:%.*]] = getelementptr i8, ptr [[X]], i32 15
; CHECK-NEXT: store i8 [[TMP20]], ptr [[TMP25]], align 1
; CHECK-NEXT: [[TMP22:%.*]] = and i64 [[TMP21]], 72057594037927935
; CHECK-NEXT: [[TMP23:%.*]] = lshr i64 [[TMP22]], 4
; CHECK-NEXT: [[TMP24:%.*]] = getelementptr i8, ptr [[TMP14]], i64 [[TMP23]]
; CHECK-NEXT: [[TMP25:%.*]] = getelementptr i8, ptr [[TMP24]], i32 0
; CHECK-NEXT: store i8 4, ptr [[TMP25]], align 1
; CHECK-NEXT: [[TMP26:%.*]] = getelementptr i8, ptr [[X]], i32 15
; CHECK-NEXT: store i8 [[TMP20]], ptr [[TMP26]], align 1
; CHECK-NEXT: call void @use32(ptr nonnull [[X_HWASAN]])
; CHECK-NEXT: [[TMP26:%.*]] = ptrtoint ptr [[X]] to i64
; CHECK-NEXT: [[TMP27:%.*]] = lshr i64 [[TMP26]], 4
; CHECK-NEXT: [[TMP28:%.*]] = getelementptr i8, ptr [[TMP14]], i64 [[TMP27]]
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP28]], i8 0, i64 1, i1 false)
; CHECK-NEXT: [[TMP27:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
; CHECK-NEXT: [[TMP28:%.*]] = ptrtoint ptr [[X]] to i64
; CHECK-NEXT: [[TMP29:%.*]] = and i64 [[TMP28]], 72057594037927935
; CHECK-NEXT: [[TMP30:%.*]] = lshr i64 [[TMP29]], 4
; CHECK-NEXT: [[TMP31:%.*]] = getelementptr i8, ptr [[TMP14]], i64 [[TMP30]]
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP31]], i8 [[TMP27]], i64 1, i1 false)
; CHECK-NEXT: ret void
;

48
llvm/test/Instrumentation/HWAddressSanitizer/RISCV/alloca.ll
View File

@@ -18,6 +18,7 @@ define void @test_alloca() sanitize_hwaddress !dbg !15 {
; DYNAMIC-SHADOW-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[TMP0]] to i64
; DYNAMIC-SHADOW-NEXT: [[TMP2:%.*]] = lshr i64 [[TMP1]], 20
; DYNAMIC-SHADOW-NEXT: [[HWASAN_STACK_BASE_TAG:%.*]] = xor i64 [[TMP1]], [[TMP2]]
; DYNAMIC-SHADOW-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP1]], 56
; DYNAMIC-SHADOW-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16
; DYNAMIC-SHADOW-NEXT: [[TMP3:%.*]] = xor i64 [[HWASAN_STACK_BASE_TAG]], 0, !dbg [[DBG10:![0-9]+]]
; DYNAMIC-SHADOW-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG10]]
@@ -26,18 +27,21 @@ define void @test_alloca() sanitize_hwaddress !dbg !15 {
; DYNAMIC-SHADOW-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP6]] to ptr, !dbg [[DBG10]]
; DYNAMIC-SHADOW-NEXT: [[TMP7:%.*]] = trunc i64 [[TMP3]] to i8, !dbg [[DBG10]]
; DYNAMIC-SHADOW-NEXT: [[TMP8:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG10]]
; DYNAMIC-SHADOW-NEXT: [[TMP9:%.*]] = lshr i64 [[TMP8]], 4, !dbg [[DBG10]]
; DYNAMIC-SHADOW-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP9]], !dbg [[DBG10]]
; DYNAMIC-SHADOW-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[TMP10]], i32 0, !dbg [[DBG10]]
; DYNAMIC-SHADOW-NEXT: store i8 4, ptr [[TMP11]], align 1, !dbg [[DBG10]]
; DYNAMIC-SHADOW-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[X]], i32 15, !dbg [[DBG10]]
; DYNAMIC-SHADOW-NEXT: store i8 [[TMP7]], ptr [[TMP12]], align 1, !dbg [[DBG10]]
; DYNAMIC-SHADOW-NEXT: [[TMP9:%.*]] = and i64 [[TMP8]], 72057594037927935, !dbg [[DBG10]]
; DYNAMIC-SHADOW-NEXT: [[TMP10:%.*]] = lshr i64 [[TMP9]], 4, !dbg [[DBG10]]
; DYNAMIC-SHADOW-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP10]], !dbg [[DBG10]]
; DYNAMIC-SHADOW-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP11]], i32 0, !dbg [[DBG10]]
; DYNAMIC-SHADOW-NEXT: store i8 4, ptr [[TMP12]], align 1, !dbg [[DBG10]]
; DYNAMIC-SHADOW-NEXT: [[TMP13:%.*]] = getelementptr i8, ptr [[X]], i32 15, !dbg [[DBG10]]
; DYNAMIC-SHADOW-NEXT: store i8 [[TMP7]], ptr [[TMP13]], align 1, !dbg [[DBG10]]
; DYNAMIC-SHADOW-NEXT: call void @llvm.dbg.value(metadata !DIArgList(ptr [[X]], ptr [[X]]), metadata [[META11:![0-9]+]], metadata !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_tag_offset, 0, DW_OP_LLVM_arg, 1, DW_OP_LLVM_tag_offset, 0, DW_OP_plus, DW_OP_deref)), !dbg [[DBG10]]
; DYNAMIC-SHADOW-NEXT: call void @use32(ptr nonnull [[X_HWASAN]]), !dbg [[DBG13:![0-9]+]]
; DYNAMIC-SHADOW-NEXT: [[TMP13:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG14:![0-9]+]]
; DYNAMIC-SHADOW-NEXT: [[TMP14:%.*]] = lshr i64 [[TMP13]], 4, !dbg [[DBG14]]
; DYNAMIC-SHADOW-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP14]], !dbg [[DBG14]]
; DYNAMIC-SHADOW-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP15]], i8 0, i64 1, i1 false), !dbg [[DBG14]]
; DYNAMIC-SHADOW-NEXT: [[TMP14:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8, !dbg [[DBG14:![0-9]+]]
; DYNAMIC-SHADOW-NEXT: [[TMP15:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG14]]
; DYNAMIC-SHADOW-NEXT: [[TMP16:%.*]] = and i64 [[TMP15]], 72057594037927935, !dbg [[DBG14]]
; DYNAMIC-SHADOW-NEXT: [[TMP17:%.*]] = lshr i64 [[TMP16]], 4, !dbg [[DBG14]]
; DYNAMIC-SHADOW-NEXT: [[TMP18:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP17]], !dbg [[DBG14]]
; DYNAMIC-SHADOW-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP18]], i8 [[TMP14]], i64 1, i1 false), !dbg [[DBG14]]
; DYNAMIC-SHADOW-NEXT: ret void, !dbg [[DBG14]]
;
; ZERO-BASED-SHADOW-LABEL: define void @test_alloca
@@ -48,6 +52,7 @@ define void @test_alloca() sanitize_hwaddress !dbg !15 {
; ZERO-BASED-SHADOW-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[TMP0]] to i64
; ZERO-BASED-SHADOW-NEXT: [[TMP2:%.*]] = lshr i64 [[TMP1]], 20
; ZERO-BASED-SHADOW-NEXT: [[HWASAN_STACK_BASE_TAG:%.*]] = xor i64 [[TMP1]], [[TMP2]]
; ZERO-BASED-SHADOW-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP1]], 56
; ZERO-BASED-SHADOW-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16
; ZERO-BASED-SHADOW-NEXT: [[TMP3:%.*]] = xor i64 [[HWASAN_STACK_BASE_TAG]], 0, !dbg [[DBG10:![0-9]+]]
; ZERO-BASED-SHADOW-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG10]]
@@ -56,18 +61,21 @@ define void @test_alloca() sanitize_hwaddress !dbg !15 {
; ZERO-BASED-SHADOW-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP6]] to ptr, !dbg [[DBG10]]
; ZERO-BASED-SHADOW-NEXT: [[TMP7:%.*]] = trunc i64 [[TMP3]] to i8, !dbg [[DBG10]]
; ZERO-BASED-SHADOW-NEXT: [[TMP8:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG10]]
; ZERO-BASED-SHADOW-NEXT: [[TMP9:%.*]] = lshr i64 [[TMP8]], 4, !dbg [[DBG10]]
; ZERO-BASED-SHADOW-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP9]] to ptr, !dbg [[DBG10]]
; ZERO-BASED-SHADOW-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[TMP10]], i32 0, !dbg [[DBG10]]
; ZERO-BASED-SHADOW-NEXT: store i8 4, ptr [[TMP11]], align 1, !dbg [[DBG10]]
; ZERO-BASED-SHADOW-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[X]], i32 15, !dbg [[DBG10]]
; ZERO-BASED-SHADOW-NEXT: store i8 [[TMP7]], ptr [[TMP12]], align 1, !dbg [[DBG10]]
; ZERO-BASED-SHADOW-NEXT: [[TMP9:%.*]] = and i64 [[TMP8]], 72057594037927935, !dbg [[DBG10]]
; ZERO-BASED-SHADOW-NEXT: [[TMP10:%.*]] = lshr i64 [[TMP9]], 4, !dbg [[DBG10]]
; ZERO-BASED-SHADOW-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP10]] to ptr, !dbg [[DBG10]]
; ZERO-BASED-SHADOW-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP11]], i32 0, !dbg [[DBG10]]
; ZERO-BASED-SHADOW-NEXT: store i8 4, ptr [[TMP12]], align 1, !dbg [[DBG10]]
; ZERO-BASED-SHADOW-NEXT: [[TMP13:%.*]] = getelementptr i8, ptr [[X]], i32 15, !dbg [[DBG10]]
; ZERO-BASED-SHADOW-NEXT: store i8 [[TMP7]], ptr [[TMP13]], align 1, !dbg [[DBG10]]
; ZERO-BASED-SHADOW-NEXT: call void @llvm.dbg.value(metadata !DIArgList(ptr [[X]], ptr [[X]]), metadata [[META11:![0-9]+]], metadata !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_tag_offset, 0, DW_OP_LLVM_arg, 1, DW_OP_LLVM_tag_offset, 0, DW_OP_plus, DW_OP_deref)), !dbg [[DBG10]]
; ZERO-BASED-SHADOW-NEXT: call void @use32(ptr nonnull [[X_HWASAN]]), !dbg [[DBG13:![0-9]+]]
; ZERO-BASED-SHADOW-NEXT: [[TMP13:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG14:![0-9]+]]
; ZERO-BASED-SHADOW-NEXT: [[TMP14:%.*]] = lshr i64 [[TMP13]], 4, !dbg [[DBG14]]
; ZERO-BASED-SHADOW-NEXT: [[TMP15:%.*]] = inttoptr i64 [[TMP14]] to ptr, !dbg [[DBG14]]
; ZERO-BASED-SHADOW-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP15]], i8 0, i64 1, i1 false), !dbg [[DBG14]]
; ZERO-BASED-SHADOW-NEXT: [[TMP14:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8, !dbg [[DBG14:![0-9]+]]
; ZERO-BASED-SHADOW-NEXT: [[TMP15:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG14]]
; ZERO-BASED-SHADOW-NEXT: [[TMP16:%.*]] = and i64 [[TMP15]], 72057594037927935, !dbg [[DBG14]]
; ZERO-BASED-SHADOW-NEXT: [[TMP17:%.*]] = lshr i64 [[TMP16]], 4, !dbg [[DBG14]]
; ZERO-BASED-SHADOW-NEXT: [[TMP18:%.*]] = inttoptr i64 [[TMP17]] to ptr, !dbg [[DBG14]]
; ZERO-BASED-SHADOW-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP18]], i8 [[TMP14]], i64 1, i1 false), !dbg [[DBG14]]
; ZERO-BASED-SHADOW-NEXT: ret void, !dbg [[DBG14]]
;
entry:

44
llvm/test/Instrumentation/HWAddressSanitizer/RISCV/exception-lifetime.ll
View File

@@ -36,6 +36,7 @@ define void @test() sanitize_hwaddress personality ptr @__gxx_personality_v0 {
; CHECK-NEXT: [[TMP13:%.*]] = or i64 [[TMP1]], 4294967295
; CHECK-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP13]], 1
; CHECK-NEXT: [[TMP14:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP4]], 56
; CHECK-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16
; CHECK-NEXT: [[TMP15:%.*]] = xor i64 [[TMP2]], 0
; CHECK-NEXT: [[TMP16:%.*]] = ptrtoint ptr [[X]] to i64
@@ -47,35 +48,40 @@ define void @test() sanitize_hwaddress personality ptr @__gxx_personality_v0 {
; CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr [[X]])
; CHECK-NEXT: [[TMP19:%.*]] = trunc i64 [[TMP15]] to i8
; CHECK-NEXT: [[TMP20:%.*]] = ptrtoint ptr [[X]] to i64
; CHECK-NEXT: [[TMP21:%.*]] = lshr i64 [[TMP20]], 4
; CHECK-NEXT: [[TMP22:%.*]] = getelementptr i8, ptr [[TMP14]], i64 [[TMP21]]
; CHECK-NEXT: [[TMP23:%.*]] = getelementptr i8, ptr [[TMP22]], i32 0
; CHECK-NEXT: store i8 4, ptr [[TMP23]], align 1
; CHECK-NEXT: [[TMP24:%.*]] = getelementptr i8, ptr [[X]], i32 15
; CHECK-NEXT: store i8 [[TMP19]], ptr [[TMP24]], align 1
; CHECK-NEXT: [[TMP21:%.*]] = and i64 [[TMP20]], 72057594037927935
; CHECK-NEXT: [[TMP22:%.*]] = lshr i64 [[TMP21]], 4
; CHECK-NEXT: [[TMP23:%.*]] = getelementptr i8, ptr [[TMP14]], i64 [[TMP22]]
; CHECK-NEXT: [[TMP24:%.*]] = getelementptr i8, ptr [[TMP23]], i32 0
; CHECK-NEXT: store i8 4, ptr [[TMP24]], align 1
; CHECK-NEXT: [[TMP25:%.*]] = getelementptr i8, ptr [[X]], i32 15
; CHECK-NEXT: store i8 [[TMP19]], ptr [[TMP25]], align 1
; CHECK-NEXT: invoke void @mayFail(ptr [[X_HWASAN]])
; CHECK-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]]
; CHECK: invoke.cont:
; CHECK-NEXT: [[TMP25:%.*]] = ptrtoint ptr [[X]] to i64
; CHECK-NEXT: [[TMP26:%.*]] = lshr i64 [[TMP25]], 4
; CHECK-NEXT: [[TMP27:%.*]] = getelementptr i8, ptr [[TMP14]], i64 [[TMP26]]
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP27]], i8 0, i64 1, i1 false)
; CHECK-NEXT: [[TMP26:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
; CHECK-NEXT: [[TMP27:%.*]] = ptrtoint ptr [[X]] to i64
; CHECK-NEXT: [[TMP28:%.*]] = and i64 [[TMP27]], 72057594037927935
; CHECK-NEXT: [[TMP29:%.*]] = lshr i64 [[TMP28]], 4
; CHECK-NEXT: [[TMP30:%.*]] = getelementptr i8, ptr [[TMP14]], i64 [[TMP29]]
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP30]], i8 [[TMP26]], i64 1, i1 false)
; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr [[X]])
; CHECK-NEXT: ret void
; CHECK: lpad:
; CHECK-NEXT: [[TMP28:%.*]] = landingpad { ptr, i32 }
; CHECK-NEXT: [[TMP31:%.*]] = landingpad { ptr, i32 }
; CHECK-NEXT: cleanup
; CHECK-NEXT: [[TMP29:%.*]] = extractvalue { ptr, i32 } [[TMP28]], 0
; CHECK-NEXT: [[TMP32:%.*]] = extractvalue { ptr, i32 } [[TMP31]], 0
; CHECK-NEXT: call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP14]], ptr [[EXN_SLOT]], i32 19)
; CHECK-NEXT: store ptr [[TMP29]], ptr [[EXN_SLOT]], align 8
; CHECK-NEXT: [[TMP30:%.*]] = extractvalue { ptr, i32 } [[TMP28]], 1
; CHECK-NEXT: store ptr [[TMP32]], ptr [[EXN_SLOT]], align 8
; CHECK-NEXT: [[TMP33:%.*]] = extractvalue { ptr, i32 } [[TMP31]], 1
; CHECK-NEXT: call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP14]], ptr [[EHSELECTOR_SLOT]], i32 18)
; CHECK-NEXT: store i32 [[TMP30]], ptr [[EHSELECTOR_SLOT]], align 4
; CHECK-NEXT: store i32 [[TMP33]], ptr [[EHSELECTOR_SLOT]], align 4
; CHECK-NEXT: call void @onExcept(ptr [[X_HWASAN]])
; CHECK-NEXT: [[TMP31:%.*]] = ptrtoint ptr [[X]] to i64
; CHECK-NEXT: [[TMP32:%.*]] = lshr i64 [[TMP31]], 4
; CHECK-NEXT: [[TMP33:%.*]] = getelementptr i8, ptr [[TMP14]], i64 [[TMP32]]
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP33]], i8 0, i64 1, i1 false)
; CHECK-NEXT: [[TMP34:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
; CHECK-NEXT: [[TMP35:%.*]] = ptrtoint ptr [[X]] to i64
; CHECK-NEXT: [[TMP36:%.*]] = and i64 [[TMP35]], 72057594037927935
; CHECK-NEXT: [[TMP37:%.*]] = lshr i64 [[TMP36]], 4
; CHECK-NEXT: [[TMP38:%.*]] = getelementptr i8, ptr [[TMP14]], i64 [[TMP37]]
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP38]], i8 [[TMP34]], i64 1, i1 false)
; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr [[X]])
; CHECK-NEXT: br label [[EH_RESUME:%.*]]
; CHECK: eh.resume:

18
llvm/test/Instrumentation/HWAddressSanitizer/RISCV/use-after-scope-setjmp.ll
View File

@@ -30,6 +30,7 @@ define dso_local noundef i1 @_Z6targetv() sanitize_hwaddress {
; CHECK-NEXT: [[TMP13:%.*]] = or i64 [[TMP1]], 4294967295
; CHECK-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP13]], 1
; CHECK-NEXT: [[TMP14:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP4]], 56
; CHECK-NEXT: [[BUF:%.*]] = alloca [4096 x i8], align 16
; CHECK-NEXT: [[TMP15:%.*]] = xor i64 [[TMP2]], 0
; CHECK-NEXT: [[TMP16:%.*]] = ptrtoint ptr [[BUF]] to i64
@@ -38,9 +39,10 @@ define dso_local noundef i1 @_Z6targetv() sanitize_hwaddress {
; CHECK-NEXT: [[BUF_HWASAN:%.*]] = inttoptr i64 [[TMP18]] to ptr
; CHECK-NEXT: [[TMP19:%.*]] = trunc i64 [[TMP15]] to i8
; CHECK-NEXT: [[TMP20:%.*]] = ptrtoint ptr [[BUF]] to i64
; CHECK-NEXT: [[TMP21:%.*]] = lshr i64 [[TMP20]], 4
; CHECK-NEXT: [[TMP22:%.*]] = getelementptr i8, ptr [[TMP14]], i64 [[TMP21]]
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP22]], i8 [[TMP19]], i64 256, i1 false)
; CHECK-NEXT: [[TMP21:%.*]] = and i64 [[TMP20]], 72057594037927935
; CHECK-NEXT: [[TMP22:%.*]] = lshr i64 [[TMP21]], 4
; CHECK-NEXT: [[TMP23:%.*]] = getelementptr i8, ptr [[TMP14]], i64 [[TMP22]]
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP23]], i8 [[TMP19]], i64 256, i1 false)
; CHECK-NEXT: [[CALL:%.*]] = call i32 @setjmp(ptr noundef @jbuf)
; CHECK-NEXT: switch i32 [[CALL]], label [[WHILE_BODY:%.*]] [
; CHECK-NEXT: i32 1, label [[RETURN:%.*]]
@@ -55,10 +57,12 @@ define dso_local noundef i1 @_Z6targetv() sanitize_hwaddress {
; CHECK-NEXT: br label [[RETURN]]
; CHECK: return:
; CHECK-NEXT: [[RETVAL_0:%.*]] = phi i1 [ true, [[WHILE_BODY]] ], [ true, [[SW_BB1]] ], [ false, [[ENTRY:%.*]] ]
; CHECK-NEXT: [[TMP23:%.*]] = ptrtoint ptr [[BUF]] to i64
; CHECK-NEXT: [[TMP24:%.*]] = lshr i64 [[TMP23]], 4
; CHECK-NEXT: [[TMP25:%.*]] = getelementptr i8, ptr [[TMP14]], i64 [[TMP24]]
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP25]], i8 0, i64 256, i1 false)
; CHECK-NEXT: [[TMP24:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
; CHECK-NEXT: [[TMP25:%.*]] = ptrtoint ptr [[BUF]] to i64
; CHECK-NEXT: [[TMP26:%.*]] = and i64 [[TMP25]], 72057594037927935
; CHECK-NEXT: [[TMP27:%.*]] = lshr i64 [[TMP26]], 4
; CHECK-NEXT: [[TMP28:%.*]] = getelementptr i8, ptr [[TMP14]], i64 [[TMP27]]
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP28]], i8 [[TMP24]], i64 256, i1 false)
; CHECK-NEXT: ret i1 [[RETVAL_0]]
;
entry:

36
llvm/test/Instrumentation/HWAddressSanitizer/X86/alloca-array.ll
View File

@@ -15,25 +15,29 @@ define void @test_alloca() sanitize_hwaddress {
; CHECK-NEXT: [[TMP3:%.*]] = lshr i64 [[TMP2]], 20
; CHECK-NEXT: [[TMP4:%.*]] = xor i64 [[TMP2]], [[TMP3]]
; CHECK-NEXT: [[HWASAN_STACK_BASE_TAG:%.*]] = and i64 [[TMP4]], 63
; CHECK-NEXT: [[TMP5:%.*]] = lshr i64 [[TMP2]], 57
; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i64 [[TMP5]], 63
; CHECK-NEXT: [[X:%.*]] = alloca { [4 x i8], [12 x i8] }, align 16
; CHECK-NEXT: [[TMP5:%.*]] = xor i64 [[HWASAN_STACK_BASE_TAG]], 0
; CHECK-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[X]] to i64
; CHECK-NEXT: [[TMP7:%.*]] = shl i64 [[TMP5]], 57
; CHECK-NEXT: [[TMP8:%.*]] = or i64 [[TMP6]], [[TMP7]]
; CHECK-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP8]] to ptr
; CHECK-NEXT: [[TMP9:%.*]] = trunc i64 [[TMP5]] to i8
; CHECK-NEXT: call void @__hwasan_tag_memory(ptr [[X]], i8 [[TMP9]], i64 16)
; CHECK-NEXT: [[TMP6:%.*]] = xor i64 [[HWASAN_STACK_BASE_TAG]], 0
; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[X]] to i64
; CHECK-NEXT: [[TMP8:%.*]] = shl i64 [[TMP6]], 57
; CHECK-NEXT: [[TMP9:%.*]] = or i64 [[TMP7]], [[TMP8]]
; CHECK-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP9]] to ptr
; CHECK-NEXT: [[TMP10:%.*]] = trunc i64 [[TMP6]] to i8
; CHECK-NEXT: call void @__hwasan_tag_memory(ptr [[X]], i8 [[TMP10]], i64 16)
; CHECK-NEXT: [[Y:%.*]] = alloca i8, i64 16, align 16
; CHECK-NEXT: [[TMP10:%.*]] = xor i64 [[HWASAN_STACK_BASE_TAG]], 1
; CHECK-NEXT: [[TMP11:%.*]] = ptrtoint ptr [[Y]] to i64
; CHECK-NEXT: [[TMP12:%.*]] = shl i64 [[TMP10]], 57
; CHECK-NEXT: [[TMP13:%.*]] = or i64 [[TMP11]], [[TMP12]]
; CHECK-NEXT: [[Y_HWASAN:%.*]] = inttoptr i64 [[TMP13]] to ptr
; CHECK-NEXT: [[TMP14:%.*]] = trunc i64 [[TMP10]] to i8
; CHECK-NEXT: call void @__hwasan_tag_memory(ptr [[Y]], i8 [[TMP14]], i64 16)
; CHECK-NEXT: [[TMP11:%.*]] = xor i64 [[HWASAN_STACK_BASE_TAG]], 1
; CHECK-NEXT: [[TMP12:%.*]] = ptrtoint ptr [[Y]] to i64
; CHECK-NEXT: [[TMP13:%.*]] = shl i64 [[TMP11]], 57
; CHECK-NEXT: [[TMP14:%.*]] = or i64 [[TMP12]], [[TMP13]]
; CHECK-NEXT: [[Y_HWASAN:%.*]] = inttoptr i64 [[TMP14]] to ptr
; CHECK-NEXT: [[TMP15:%.*]] = trunc i64 [[TMP11]] to i8
; CHECK-NEXT: call void @__hwasan_tag_memory(ptr [[Y]], i8 [[TMP15]], i64 16)
; CHECK-NEXT: call void @use(ptr [[X_HWASAN]], ptr [[Y_HWASAN]])
; CHECK-NEXT: call void @__hwasan_tag_memory(ptr [[X]], i8 0, i64 16)
; CHECK-NEXT: call void @__hwasan_tag_memory(ptr [[Y]], i8 0, i64 16)
; CHECK-NEXT: [[TMP16:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
; CHECK-NEXT: call void @__hwasan_tag_memory(ptr [[X]], i8 [[TMP16]], i64 16)
; CHECK-NEXT: [[TMP17:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
; CHECK-NEXT: call void @__hwasan_tag_memory(ptr [[Y]], i8 [[TMP17]], i64 16)
; CHECK-NEXT: ret void
;
%x = alloca i8, i64 4

23
llvm/test/Instrumentation/HWAddressSanitizer/X86/alloca-with-calls.ll
View File

@@ -13,17 +13,22 @@ define void @test_alloca() sanitize_hwaddress {
; CHECK-SAME: () #[[ATTR0:[0-9]+]] personality ptr @__hwasan_personality_thunk {
; CHECK-NEXT: entry:
; CHECK-NEXT: [[DOTHWASAN_SHADOW:%.*]] = call ptr asm "", "=r,0"(ptr null)
; CHECK-NEXT: [[TMP0:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[TMP0]] to i64
; CHECK-NEXT: [[TMP2:%.*]] = lshr i64 [[TMP1]], 57
; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i64 [[TMP2]], 63
; CHECK-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16
; CHECK-NEXT: [[TMP0:%.*]] = call i8 @__hwasan_generate_tag()
; CHECK-NEXT: [[TMP1:%.*]] = zext i8 [[TMP0]] to i64
; CHECK-NEXT: [[TMP2:%.*]] = ptrtoint ptr [[X]] to i64
; CHECK-NEXT: [[TMP3:%.*]] = shl i64 [[TMP1]], 57
; CHECK-NEXT: [[TMP4:%.*]] = or i64 [[TMP2]], [[TMP3]]
; CHECK-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP4]] to ptr
; CHECK-NEXT: [[TMP5:%.*]] = trunc i64 [[TMP1]] to i8
; CHECK-NEXT: call void @__hwasan_tag_memory(ptr [[X]], i8 [[TMP5]], i64 16)
; CHECK-NEXT: [[TMP3:%.*]] = call i8 @__hwasan_generate_tag()
; CHECK-NEXT: [[TMP4:%.*]] = zext i8 [[TMP3]] to i64
; CHECK-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[X]] to i64
; CHECK-NEXT: [[TMP6:%.*]] = shl i64 [[TMP4]], 57
; CHECK-NEXT: [[TMP7:%.*]] = or i64 [[TMP5]], [[TMP6]]
; CHECK-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP7]] to ptr
; CHECK-NEXT: [[TMP8:%.*]] = trunc i64 [[TMP4]] to i8
; CHECK-NEXT: call void @__hwasan_tag_memory(ptr [[X]], i8 [[TMP8]], i64 16)
; CHECK-NEXT: call void @use32(ptr nonnull [[X_HWASAN]])
; CHECK-NEXT: call void @__hwasan_tag_memory(ptr [[X]], i8 0, i64 16)
; CHECK-NEXT: [[TMP9:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
; CHECK-NEXT: call void @__hwasan_tag_memory(ptr [[X]], i8 [[TMP9]], i64 16)
; CHECK-NEXT: ret void
;

19
llvm/test/Instrumentation/HWAddressSanitizer/X86/alloca.ll
View File

@@ -18,16 +18,19 @@ define void @test_alloca() sanitize_hwaddress {
; CHECK-NEXT: [[TMP2:%.*]] = lshr i64 [[TMP1]], 20
; CHECK-NEXT: [[TMP3:%.*]] = xor i64 [[TMP1]], [[TMP2]]
; CHECK-NEXT: [[HWASAN_STACK_BASE_TAG:%.*]] = and i64 [[TMP3]], 63
; CHECK-NEXT: [[TMP4:%.*]] = lshr i64 [[TMP1]], 57
; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = and i64 [[TMP4]], 63
; CHECK-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16
; CHECK-NEXT: [[TMP4:%.*]] = xor i64 [[HWASAN_STACK_BASE_TAG]], 0
; CHECK-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[X]] to i64
; CHECK-NEXT: [[TMP6:%.*]] = shl i64 [[TMP4]], 57
; CHECK-NEXT: [[TMP7:%.*]] = or i64 [[TMP5]], [[TMP6]]
; CHECK-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP7]] to ptr
; CHECK-NEXT: [[TMP8:%.*]] = trunc i64 [[TMP4]] to i8
; CHECK-NEXT: call void @__hwasan_tag_memory(ptr [[X]], i8 [[TMP8]], i64 16)
; CHECK-NEXT: [[TMP5:%.*]] = xor i64 [[HWASAN_STACK_BASE_TAG]], 0
; CHECK-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[X]] to i64
; CHECK-NEXT: [[TMP7:%.*]] = shl i64 [[TMP5]], 57
; CHECK-NEXT: [[TMP8:%.*]] = or i64 [[TMP6]], [[TMP7]]
; CHECK-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP8]] to ptr
; CHECK-NEXT: [[TMP9:%.*]] = trunc i64 [[TMP5]] to i8
; CHECK-NEXT: call void @__hwasan_tag_memory(ptr [[X]], i8 [[TMP9]], i64 16)
; CHECK-NEXT: call void @use32(ptr nonnull [[X_HWASAN]])
; CHECK-NEXT: call void @__hwasan_tag_memory(ptr [[X]], i8 0, i64 16)
; CHECK-NEXT: [[TMP10:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
; CHECK-NEXT: call void @__hwasan_tag_memory(ptr [[X]], i8 [[TMP10]], i64 16)
; CHECK-NEXT: ret void
;
entry:

49
llvm/test/Instrumentation/HWAddressSanitizer/alloca-array.ll
View File

@@ -29,6 +29,7 @@ define void @test_alloca() sanitize_hwaddress {
; CHECK-NEXT: [[TMP16:%.*]] = or i64 [[TMP3]], 4294967295
; CHECK-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP16]], 1
; CHECK-NEXT: [[TMP17:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP7]], 56
; CHECK-NEXT: [[X:%.*]] = alloca { [4 x i8], [12 x i8] }, align 16
; CHECK-NEXT: [[TMP18:%.*]] = xor i64 [[TMP4]], 0
; CHECK-NEXT: [[TMP19:%.*]] = ptrtoint ptr [[X]] to i64
@@ -37,29 +38,35 @@ define void @test_alloca() sanitize_hwaddress {
; CHECK-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP21]] to ptr
; CHECK-NEXT: [[TMP22:%.*]] = trunc i64 [[TMP18]] to i8
; CHECK-NEXT: [[TMP23:%.*]] = ptrtoint ptr [[X]] to i64
; CHECK-NEXT: [[TMP24:%.*]] = lshr i64 [[TMP23]], 4
; CHECK-NEXT: [[TMP25:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP24]]
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP25]], i8 [[TMP22]], i64 1, i1 false)
; CHECK-NEXT: [[TMP24:%.*]] = and i64 [[TMP23]], 72057594037927935
; CHECK-NEXT: [[TMP25:%.*]] = lshr i64 [[TMP24]], 4
; CHECK-NEXT: [[TMP26:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP25]]
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP26]], i8 [[TMP22]], i64 1, i1 false)
; CHECK-NEXT: [[Y:%.*]] = alloca i8, i64 16, align 16
; CHECK-NEXT: [[TMP26:%.*]] = xor i64 [[TMP4]], 128
; CHECK-NEXT: [[TMP27:%.*]] = ptrtoint ptr [[Y]] to i64
; CHECK-NEXT: [[TMP28:%.*]] = shl i64 [[TMP26]], 56
; CHECK-NEXT: [[TMP29:%.*]] = or i64 [[TMP27]], [[TMP28]]
; CHECK-NEXT: [[Y_HWASAN:%.*]] = inttoptr i64 [[TMP29]] to ptr
; CHECK-NEXT: [[TMP30:%.*]] = trunc i64 [[TMP26]] to i8
; CHECK-NEXT: [[TMP31:%.*]] = ptrtoint ptr [[Y]] to i64
; CHECK-NEXT: [[TMP32:%.*]] = lshr i64 [[TMP31]], 4
; CHECK-NEXT: [[TMP33:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP32]]
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP33]], i8 [[TMP30]], i64 1, i1 false)
; CHECK-NEXT: [[TMP27:%.*]] = xor i64 [[TMP4]], 128
; CHECK-NEXT: [[TMP28:%.*]] = ptrtoint ptr [[Y]] to i64
; CHECK-NEXT: [[TMP29:%.*]] = shl i64 [[TMP27]], 56
; CHECK-NEXT: [[TMP30:%.*]] = or i64 [[TMP28]], [[TMP29]]
; CHECK-NEXT: [[Y_HWASAN:%.*]] = inttoptr i64 [[TMP30]] to ptr
; CHECK-NEXT: [[TMP31:%.*]] = trunc i64 [[TMP27]] to i8
; CHECK-NEXT: [[TMP32:%.*]] = ptrtoint ptr [[Y]] to i64
; CHECK-NEXT: [[TMP33:%.*]] = and i64 [[TMP32]], 72057594037927935
; CHECK-NEXT: [[TMP34:%.*]] = lshr i64 [[TMP33]], 4
; CHECK-NEXT: [[TMP35:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP34]]
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP35]], i8 [[TMP31]], i64 1, i1 false)
; CHECK-NEXT: call void @use(ptr [[X_HWASAN]], ptr [[Y_HWASAN]])
; CHECK-NEXT: [[TMP34:%.*]] = ptrtoint ptr [[X]] to i64
; CHECK-NEXT: [[TMP35:%.*]] = lshr i64 [[TMP34]], 4
; CHECK-NEXT: [[TMP36:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP35]]
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP36]], i8 0, i64 1, i1 false)
; CHECK-NEXT: [[TMP37:%.*]] = ptrtoint ptr [[Y]] to i64
; CHECK-NEXT: [[TMP38:%.*]] = lshr i64 [[TMP37]], 4
; CHECK-NEXT: [[TMP39:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP38]]
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP39]], i8 0, i64 1, i1 false)
; CHECK-NEXT: [[TMP36:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
; CHECK-NEXT: [[TMP37:%.*]] = ptrtoint ptr [[X]] to i64
; CHECK-NEXT: [[TMP38:%.*]] = and i64 [[TMP37]], 72057594037927935
; CHECK-NEXT: [[TMP39:%.*]] = lshr i64 [[TMP38]], 4
; CHECK-NEXT: [[TMP40:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP39]]
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP40]], i8 [[TMP36]], i64 1, i1 false)
; CHECK-NEXT: [[TMP41:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
; CHECK-NEXT: [[TMP42:%.*]] = ptrtoint ptr [[Y]] to i64
; CHECK-NEXT: [[TMP43:%.*]] = and i64 [[TMP42]], 72057594037927935
; CHECK-NEXT: [[TMP44:%.*]] = lshr i64 [[TMP43]], 4
; CHECK-NEXT: [[TMP45:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP44]]
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP45]], i8 [[TMP41]], i64 1, i1 false)
; CHECK-NEXT: ret void
;
%x = alloca i8, i64 4

18
llvm/test/Instrumentation/HWAddressSanitizer/alloca-with-calls.ll
View File

@@ -32,6 +32,7 @@ define void @test_alloca() sanitize_hwaddress {
; CHECK-NEXT: [[TMP15:%.*]] = or i64 [[TMP2]], 4294967295
; CHECK-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP15]], 1
; CHECK-NEXT: [[TMP16:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP6]], 56
; CHECK-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16
; CHECK-NEXT: [[TMP17:%.*]] = call i8 @__hwasan_generate_tag()
; CHECK-NEXT: [[TMP18:%.*]] = zext i8 [[TMP17]] to i64
@@ -41,14 +42,17 @@ define void @test_alloca() sanitize_hwaddress {
; CHECK-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP21]] to ptr
; CHECK-NEXT: [[TMP22:%.*]] = trunc i64 [[TMP18]] to i8
; CHECK-NEXT: [[TMP23:%.*]] = ptrtoint ptr [[X]] to i64
; CHECK-NEXT: [[TMP24:%.*]] = lshr i64 [[TMP23]], 4
; CHECK-NEXT: [[TMP25:%.*]] = getelementptr i8, ptr [[TMP16]], i64 [[TMP24]]
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP25]], i8 [[TMP22]], i64 1, i1 false)
; CHECK-NEXT: [[TMP24:%.*]] = and i64 [[TMP23]], 72057594037927935
; CHECK-NEXT: [[TMP25:%.*]] = lshr i64 [[TMP24]], 4
; CHECK-NEXT: [[TMP26:%.*]] = getelementptr i8, ptr [[TMP16]], i64 [[TMP25]]
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP26]], i8 [[TMP22]], i64 1, i1 false)
; CHECK-NEXT: call void @use32(ptr nonnull [[X_HWASAN]])
; CHECK-NEXT: [[TMP26:%.*]] = ptrtoint ptr [[X]] to i64
; CHECK-NEXT: [[TMP27:%.*]] = lshr i64 [[TMP26]], 4
; CHECK-NEXT: [[TMP28:%.*]] = getelementptr i8, ptr [[TMP16]], i64 [[TMP27]]
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP28]], i8 0, i64 1, i1 false)
; CHECK-NEXT: [[TMP27:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
; CHECK-NEXT: [[TMP28:%.*]] = ptrtoint ptr [[X]] to i64
; CHECK-NEXT: [[TMP29:%.*]] = and i64 [[TMP28]], 72057594037927935
; CHECK-NEXT: [[TMP30:%.*]] = lshr i64 [[TMP29]], 4
; CHECK-NEXT: [[TMP31:%.*]] = getelementptr i8, ptr [[TMP16]], i64 [[TMP30]]
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP31]], i8 [[TMP27]], i64 1, i1 false)
; CHECK-NEXT: ret void
;

48
llvm/test/Instrumentation/HWAddressSanitizer/alloca.ll
View File

@@ -18,6 +18,7 @@ define void @test_alloca() sanitize_hwaddress !dbg !15 {
; DYNAMIC-SHADOW-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[TMP0]] to i64
; DYNAMIC-SHADOW-NEXT: [[TMP2:%.*]] = lshr i64 [[TMP1]], 20
; DYNAMIC-SHADOW-NEXT: [[HWASAN_STACK_BASE_TAG:%.*]] = xor i64 [[TMP1]], [[TMP2]]
; DYNAMIC-SHADOW-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP1]], 56
; DYNAMIC-SHADOW-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16
; DYNAMIC-SHADOW-NEXT: [[TMP3:%.*]] = xor i64 [[HWASAN_STACK_BASE_TAG]], 0, !dbg [[DBG10:![0-9]+]]
; DYNAMIC-SHADOW-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG10]]
@@ -26,18 +27,21 @@ define void @test_alloca() sanitize_hwaddress !dbg !15 {
; DYNAMIC-SHADOW-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP6]] to ptr, !dbg [[DBG10]]
; DYNAMIC-SHADOW-NEXT: [[TMP7:%.*]] = trunc i64 [[TMP3]] to i8, !dbg [[DBG10]]
; DYNAMIC-SHADOW-NEXT: [[TMP8:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG10]]
; DYNAMIC-SHADOW-NEXT: [[TMP9:%.*]] = lshr i64 [[TMP8]], 4, !dbg [[DBG10]]
; DYNAMIC-SHADOW-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP9]], !dbg [[DBG10]]
; DYNAMIC-SHADOW-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[TMP10]], i32 0, !dbg [[DBG10]]
; DYNAMIC-SHADOW-NEXT: store i8 4, ptr [[TMP11]], align 1, !dbg [[DBG10]]
; DYNAMIC-SHADOW-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[X]], i32 15, !dbg [[DBG10]]
; DYNAMIC-SHADOW-NEXT: store i8 [[TMP7]], ptr [[TMP12]], align 1, !dbg [[DBG10]]
; DYNAMIC-SHADOW-NEXT: [[TMP9:%.*]] = and i64 [[TMP8]], 72057594037927935, !dbg [[DBG10]]
; DYNAMIC-SHADOW-NEXT: [[TMP10:%.*]] = lshr i64 [[TMP9]], 4, !dbg [[DBG10]]
; DYNAMIC-SHADOW-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP10]], !dbg [[DBG10]]
; DYNAMIC-SHADOW-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP11]], i32 0, !dbg [[DBG10]]
; DYNAMIC-SHADOW-NEXT: store i8 4, ptr [[TMP12]], align 1, !dbg [[DBG10]]
; DYNAMIC-SHADOW-NEXT: [[TMP13:%.*]] = getelementptr i8, ptr [[X]], i32 15, !dbg [[DBG10]]
; DYNAMIC-SHADOW-NEXT: store i8 [[TMP7]], ptr [[TMP13]], align 1, !dbg [[DBG10]]
; DYNAMIC-SHADOW-NEXT: call void @llvm.dbg.value(metadata !DIArgList(ptr [[X]], ptr [[X]]), metadata [[META11:![0-9]+]], metadata !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_tag_offset, 0, DW_OP_LLVM_arg, 1, DW_OP_LLVM_tag_offset, 0, DW_OP_plus, DW_OP_deref)), !dbg [[DBG10]]
; DYNAMIC-SHADOW-NEXT: call void @use32(ptr nonnull [[X_HWASAN]]), !dbg [[DBG13:![0-9]+]]
; DYNAMIC-SHADOW-NEXT: [[TMP13:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG14:![0-9]+]]
; DYNAMIC-SHADOW-NEXT: [[TMP14:%.*]] = lshr i64 [[TMP13]], 4, !dbg [[DBG14]]
; DYNAMIC-SHADOW-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP14]], !dbg [[DBG14]]
; DYNAMIC-SHADOW-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP15]], i8 0, i64 1, i1 false), !dbg [[DBG14]]
; DYNAMIC-SHADOW-NEXT: [[TMP14:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8, !dbg [[DBG14:![0-9]+]]
; DYNAMIC-SHADOW-NEXT: [[TMP15:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG14]]
; DYNAMIC-SHADOW-NEXT: [[TMP16:%.*]] = and i64 [[TMP15]], 72057594037927935, !dbg [[DBG14]]
; DYNAMIC-SHADOW-NEXT: [[TMP17:%.*]] = lshr i64 [[TMP16]], 4, !dbg [[DBG14]]
; DYNAMIC-SHADOW-NEXT: [[TMP18:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP17]], !dbg [[DBG14]]
; DYNAMIC-SHADOW-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP18]], i8 [[TMP14]], i64 1, i1 false), !dbg [[DBG14]]
; DYNAMIC-SHADOW-NEXT: ret void, !dbg [[DBG14]]
;
; ZERO-BASED-SHADOW-LABEL: define void @test_alloca
@@ -48,6 +52,7 @@ define void @test_alloca() sanitize_hwaddress !dbg !15 {
; ZERO-BASED-SHADOW-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[TMP0]] to i64
; ZERO-BASED-SHADOW-NEXT: [[TMP2:%.*]] = lshr i64 [[TMP1]], 20
; ZERO-BASED-SHADOW-NEXT: [[HWASAN_STACK_BASE_TAG:%.*]] = xor i64 [[TMP1]], [[TMP2]]
; ZERO-BASED-SHADOW-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP1]], 56
; ZERO-BASED-SHADOW-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16
; ZERO-BASED-SHADOW-NEXT: [[TMP3:%.*]] = xor i64 [[HWASAN_STACK_BASE_TAG]], 0, !dbg [[DBG10:![0-9]+]]
; ZERO-BASED-SHADOW-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG10]]
@@ -56,18 +61,21 @@ define void @test_alloca() sanitize_hwaddress !dbg !15 {
; ZERO-BASED-SHADOW-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP6]] to ptr, !dbg [[DBG10]]
; ZERO-BASED-SHADOW-NEXT: [[TMP7:%.*]] = trunc i64 [[TMP3]] to i8, !dbg [[DBG10]]
; ZERO-BASED-SHADOW-NEXT: [[TMP8:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG10]]
; ZERO-BASED-SHADOW-NEXT: [[TMP9:%.*]] = lshr i64 [[TMP8]], 4, !dbg [[DBG10]]
; ZERO-BASED-SHADOW-NEXT: [[TMP10:%.*]] = inttoptr i64 [[TMP9]] to ptr, !dbg [[DBG10]]
; ZERO-BASED-SHADOW-NEXT: [[TMP11:%.*]] = getelementptr i8, ptr [[TMP10]], i32 0, !dbg [[DBG10]]
; ZERO-BASED-SHADOW-NEXT: store i8 4, ptr [[TMP11]], align 1, !dbg [[DBG10]]
; ZERO-BASED-SHADOW-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[X]], i32 15, !dbg [[DBG10]]
; ZERO-BASED-SHADOW-NEXT: store i8 [[TMP7]], ptr [[TMP12]], align 1, !dbg [[DBG10]]
; ZERO-BASED-SHADOW-NEXT: [[TMP9:%.*]] = and i64 [[TMP8]], 72057594037927935, !dbg [[DBG10]]
; ZERO-BASED-SHADOW-NEXT: [[TMP10:%.*]] = lshr i64 [[TMP9]], 4, !dbg [[DBG10]]
; ZERO-BASED-SHADOW-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP10]] to ptr, !dbg [[DBG10]]
; ZERO-BASED-SHADOW-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[TMP11]], i32 0, !dbg [[DBG10]]
; ZERO-BASED-SHADOW-NEXT: store i8 4, ptr [[TMP12]], align 1, !dbg [[DBG10]]
; ZERO-BASED-SHADOW-NEXT: [[TMP13:%.*]] = getelementptr i8, ptr [[X]], i32 15, !dbg [[DBG10]]
; ZERO-BASED-SHADOW-NEXT: store i8 [[TMP7]], ptr [[TMP13]], align 1, !dbg [[DBG10]]
; ZERO-BASED-SHADOW-NEXT: call void @llvm.dbg.value(metadata !DIArgList(ptr [[X]], ptr [[X]]), metadata [[META11:![0-9]+]], metadata !DIExpression(DW_OP_LLVM_arg, 0, DW_OP_LLVM_tag_offset, 0, DW_OP_LLVM_arg, 1, DW_OP_LLVM_tag_offset, 0, DW_OP_plus, DW_OP_deref)), !dbg [[DBG10]]
; ZERO-BASED-SHADOW-NEXT: call void @use32(ptr nonnull [[X_HWASAN]]), !dbg [[DBG13:![0-9]+]]
; ZERO-BASED-SHADOW-NEXT: [[TMP13:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG14:![0-9]+]]
; ZERO-BASED-SHADOW-NEXT: [[TMP14:%.*]] = lshr i64 [[TMP13]], 4, !dbg [[DBG14]]
; ZERO-BASED-SHADOW-NEXT: [[TMP15:%.*]] = inttoptr i64 [[TMP14]] to ptr, !dbg [[DBG14]]
; ZERO-BASED-SHADOW-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP15]], i8 0, i64 1, i1 false), !dbg [[DBG14]]
; ZERO-BASED-SHADOW-NEXT: [[TMP14:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8, !dbg [[DBG14:![0-9]+]]
; ZERO-BASED-SHADOW-NEXT: [[TMP15:%.*]] = ptrtoint ptr [[X]] to i64, !dbg [[DBG14]]
; ZERO-BASED-SHADOW-NEXT: [[TMP16:%.*]] = and i64 [[TMP15]], 72057594037927935, !dbg [[DBG14]]
; ZERO-BASED-SHADOW-NEXT: [[TMP17:%.*]] = lshr i64 [[TMP16]], 4, !dbg [[DBG14]]
; ZERO-BASED-SHADOW-NEXT: [[TMP18:%.*]] = inttoptr i64 [[TMP17]] to ptr, !dbg [[DBG14]]
; ZERO-BASED-SHADOW-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP18]], i8 [[TMP14]], i64 1, i1 false), !dbg [[DBG14]]
; ZERO-BASED-SHADOW-NEXT: ret void, !dbg [[DBG14]]
;
entry:

42
llvm/test/Instrumentation/HWAddressSanitizer/exception-lifetime.ll
View File

@@ -38,6 +38,7 @@ define void @test() sanitize_hwaddress personality ptr @__gxx_personality_v0 {
; CHECK-NEXT: [[TMP15:%.*]] = or i64 [[TMP2]], 4294967295
; CHECK-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP15]], 1
; CHECK-NEXT: [[TMP16:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP6]], 56
; CHECK-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16
; CHECK-NEXT: [[TMP17:%.*]] = xor i64 [[TMP3]], 0
; CHECK-NEXT: [[TMP18:%.*]] = ptrtoint ptr [[X]] to i64
@@ -49,34 +50,39 @@ define void @test() sanitize_hwaddress personality ptr @__gxx_personality_v0 {
; CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 16, ptr [[X]])
; CHECK-NEXT: [[TMP21:%.*]] = trunc i64 [[TMP17]] to i8
; CHECK-NEXT: [[TMP22:%.*]] = ptrtoint ptr [[X]] to i64
; CHECK-NEXT: [[TMP23:%.*]] = lshr i64 [[TMP22]], 4
; CHECK-NEXT: [[TMP24:%.*]] = getelementptr i8, ptr [[TMP16]], i64 [[TMP23]]
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP24]], i8 [[TMP21]], i64 1, i1 false)
; CHECK-NEXT: [[TMP23:%.*]] = and i64 [[TMP22]], 72057594037927935
; CHECK-NEXT: [[TMP24:%.*]] = lshr i64 [[TMP23]], 4
; CHECK-NEXT: [[TMP25:%.*]] = getelementptr i8, ptr [[TMP16]], i64 [[TMP24]]
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP25]], i8 [[TMP21]], i64 1, i1 false)
; CHECK-NEXT: invoke void @mayFail(ptr [[X_HWASAN]])
; CHECK-NEXT: to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]]
; CHECK: invoke.cont:
; CHECK-NEXT: [[TMP25:%.*]] = ptrtoint ptr [[X]] to i64
; CHECK-NEXT: [[TMP26:%.*]] = lshr i64 [[TMP25]], 4
; CHECK-NEXT: [[TMP27:%.*]] = getelementptr i8, ptr [[TMP16]], i64 [[TMP26]]
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP27]], i8 0, i64 1, i1 false)
; CHECK-NEXT: [[TMP26:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
; CHECK-NEXT: [[TMP27:%.*]] = ptrtoint ptr [[X]] to i64
; CHECK-NEXT: [[TMP28:%.*]] = and i64 [[TMP27]], 72057594037927935
; CHECK-NEXT: [[TMP29:%.*]] = lshr i64 [[TMP28]], 4
; CHECK-NEXT: [[TMP30:%.*]] = getelementptr i8, ptr [[TMP16]], i64 [[TMP29]]
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP30]], i8 [[TMP26]], i64 1, i1 false)
; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr [[X]])
; CHECK-NEXT: ret void
; CHECK: lpad:
; CHECK-NEXT: [[TMP28:%.*]] = landingpad { ptr, i32 }
; CHECK-NEXT: [[TMP31:%.*]] = landingpad { ptr, i32 }
; CHECK-NEXT: cleanup
; CHECK-NEXT: [[TMP29:%.*]] = call i64 @llvm.read_register.i64(metadata [[META2:![0-9]+]])
; CHECK-NEXT: call void @__hwasan_handle_vfork(i64 [[TMP29]])
; CHECK-NEXT: [[TMP30:%.*]] = extractvalue { ptr, i32 } [[TMP28]], 0
; CHECK-NEXT: [[TMP32:%.*]] = call i64 @llvm.read_register.i64(metadata [[META2:![0-9]+]])
; CHECK-NEXT: call void @__hwasan_handle_vfork(i64 [[TMP32]])
; CHECK-NEXT: [[TMP33:%.*]] = extractvalue { ptr, i32 } [[TMP31]], 0
; CHECK-NEXT: call void @llvm.hwasan.check.memaccess(ptr [[TMP16]], ptr [[EXN_SLOT]], i32 19)
; CHECK-NEXT: store ptr [[TMP30]], ptr [[EXN_SLOT]], align 8
; CHECK-NEXT: [[TMP31:%.*]] = extractvalue { ptr, i32 } [[TMP28]], 1
; CHECK-NEXT: store ptr [[TMP33]], ptr [[EXN_SLOT]], align 8
; CHECK-NEXT: [[TMP34:%.*]] = extractvalue { ptr, i32 } [[TMP31]], 1
; CHECK-NEXT: call void @llvm.hwasan.check.memaccess(ptr [[TMP16]], ptr [[EHSELECTOR_SLOT]], i32 18)
; CHECK-NEXT: store i32 [[TMP31]], ptr [[EHSELECTOR_SLOT]], align 4
; CHECK-NEXT: store i32 [[TMP34]], ptr [[EHSELECTOR_SLOT]], align 4
; CHECK-NEXT: call void @onExcept(ptr [[X_HWASAN]])
; CHECK-NEXT: [[TMP32:%.*]] = ptrtoint ptr [[X]] to i64
; CHECK-NEXT: [[TMP33:%.*]] = lshr i64 [[TMP32]], 4
; CHECK-NEXT: [[TMP34:%.*]] = getelementptr i8, ptr [[TMP16]], i64 [[TMP33]]
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP34]], i8 0, i64 1, i1 false)
; CHECK-NEXT: [[TMP35:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
; CHECK-NEXT: [[TMP36:%.*]] = ptrtoint ptr [[X]] to i64
; CHECK-NEXT: [[TMP37:%.*]] = and i64 [[TMP36]], 72057594037927935
; CHECK-NEXT: [[TMP38:%.*]] = lshr i64 [[TMP37]], 4
; CHECK-NEXT: [[TMP39:%.*]] = getelementptr i8, ptr [[TMP16]], i64 [[TMP38]]
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP39]], i8 [[TMP35]], i64 1, i1 false)
; CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 16, ptr [[X]])
; CHECK-NEXT: br label [[EH_RESUME:%.*]]
; CHECK: eh.resume:

18
llvm/test/Instrumentation/HWAddressSanitizer/kernel-alloca.ll
View File

@@ -17,6 +17,7 @@ define void @test_alloca() sanitize_hwaddress {
; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[TMP0]] to i64
; CHECK-NEXT: [[TMP2:%.*]] = lshr i64 [[TMP1]], 20
; CHECK-NEXT: [[HWASAN_STACK_BASE_TAG:%.*]] = xor i64 [[TMP1]], [[TMP2]]
; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP1]], 56
; CHECK-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16
; CHECK-NEXT: [[TMP3:%.*]] = xor i64 [[HWASAN_STACK_BASE_TAG]], 0
; CHECK-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[X]] to i64
@@ -26,14 +27,17 @@ define void @test_alloca() sanitize_hwaddress {
; CHECK-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP7]] to ptr
; CHECK-NEXT: [[TMP8:%.*]] = trunc i64 [[TMP3]] to i8
; CHECK-NEXT: [[TMP9:%.*]] = ptrtoint ptr [[X]] to i64
; CHECK-NEXT: [[TMP10:%.*]] = lshr i64 [[TMP9]], 4
; CHECK-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP10]] to ptr
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP11]], i8 [[TMP8]], i64 1, i1 false)
; CHECK-NEXT: [[TMP10:%.*]] = or i64 [[TMP9]], -72057594037927936
; CHECK-NEXT: [[TMP11:%.*]] = lshr i64 [[TMP10]], 4
; CHECK-NEXT: [[TMP12:%.*]] = inttoptr i64 [[TMP11]] to ptr
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP12]], i8 [[TMP8]], i64 1, i1 false)
; CHECK-NEXT: call void @use32(ptr nonnull [[X_HWASAN]])
; CHECK-NEXT: [[TMP12:%.*]] = ptrtoint ptr [[X]] to i64
; CHECK-NEXT: [[TMP13:%.*]] = lshr i64 [[TMP12]], 4
; CHECK-NEXT: [[TMP14:%.*]] = inttoptr i64 [[TMP13]] to ptr
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP14]], i8 0, i64 1, i1 false)
; CHECK-NEXT: [[TMP13:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
; CHECK-NEXT: [[TMP14:%.*]] = ptrtoint ptr [[X]] to i64
; CHECK-NEXT: [[TMP15:%.*]] = or i64 [[TMP14]], -72057594037927936
; CHECK-NEXT: [[TMP16:%.*]] = lshr i64 [[TMP15]], 4
; CHECK-NEXT: [[TMP17:%.*]] = inttoptr i64 [[TMP16]] to ptr
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP17]], i8 [[TMP13]], i64 1, i1 false)
; CHECK-NEXT: ret void
;

3
llvm/test/Instrumentation/HWAddressSanitizer/stack-coloring.ll
View File

@@ -1,3 +1,4 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
; Test that storage for allocas with disjoint lifetimes is reused with
; use-after-scope.
@@ -14,7 +15,7 @@ target triple = "aarch64-unknown-linux-android29"
; REQUIRES: aarch64-registered-target
; COLOR: sub sp, sp, #240
; NOCOLOR: sub sp, sp, #368
; NOCOLOR: sub sp, sp, #384
define i32 @myCall_w2(i32 %in) sanitize_hwaddress {
entry:

18
llvm/test/Instrumentation/HWAddressSanitizer/use-after-scope-setjmp.ll
View File

@@ -32,6 +32,7 @@ define dso_local noundef i1 @_Z6targetv() sanitize_hwaddress {
; CHECK-NEXT: [[TMP15:%.*]] = or i64 [[TMP2]], 4294967295
; CHECK-NEXT: [[HWASAN_SHADOW:%.*]] = add i64 [[TMP15]], 1
; CHECK-NEXT: [[TMP16:%.*]] = inttoptr i64 [[HWASAN_SHADOW]] to ptr
; CHECK-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP6]], 56
; CHECK-NEXT: [[BUF:%.*]] = alloca [4096 x i8], align 16
; CHECK-NEXT: [[TMP17:%.*]] = xor i64 [[TMP3]], 0
; CHECK-NEXT: [[TMP18:%.*]] = ptrtoint ptr [[BUF]] to i64
@@ -40,9 +41,10 @@ define dso_local noundef i1 @_Z6targetv() sanitize_hwaddress {
; CHECK-NEXT: [[BUF_HWASAN:%.*]] = inttoptr i64 [[TMP20]] to ptr
; CHECK-NEXT: [[TMP21:%.*]] = trunc i64 [[TMP17]] to i8
; CHECK-NEXT: [[TMP22:%.*]] = ptrtoint ptr [[BUF]] to i64
; CHECK-NEXT: [[TMP23:%.*]] = lshr i64 [[TMP22]], 4
; CHECK-NEXT: [[TMP24:%.*]] = getelementptr i8, ptr [[TMP16]], i64 [[TMP23]]
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP24]], i8 [[TMP21]], i64 256, i1 false)
; CHECK-NEXT: [[TMP23:%.*]] = and i64 [[TMP22]], 72057594037927935
; CHECK-NEXT: [[TMP24:%.*]] = lshr i64 [[TMP23]], 4
; CHECK-NEXT: [[TMP25:%.*]] = getelementptr i8, ptr [[TMP16]], i64 [[TMP24]]
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP25]], i8 [[TMP21]], i64 256, i1 false)
; CHECK-NEXT: [[CALL:%.*]] = call i32 @setjmp(ptr noundef @jbuf)
; CHECK-NEXT: switch i32 [[CALL]], label [[WHILE_BODY:%.*]] [
; CHECK-NEXT: i32 1, label [[RETURN:%.*]]
@@ -57,10 +59,12 @@ define dso_local noundef i1 @_Z6targetv() sanitize_hwaddress {
; CHECK-NEXT: br label [[RETURN]]
; CHECK: return:
; CHECK-NEXT: [[RETVAL_0:%.*]] = phi i1 [ true, [[WHILE_BODY]] ], [ true, [[SW_BB1]] ], [ false, [[ENTRY:%.*]] ]
; CHECK-NEXT: [[TMP25:%.*]] = ptrtoint ptr [[BUF]] to i64
; CHECK-NEXT: [[TMP26:%.*]] = lshr i64 [[TMP25]], 4
; CHECK-NEXT: [[TMP27:%.*]] = getelementptr i8, ptr [[TMP16]], i64 [[TMP26]]
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP27]], i8 0, i64 256, i1 false)
; CHECK-NEXT: [[TMP26:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
; CHECK-NEXT: [[TMP27:%.*]] = ptrtoint ptr [[BUF]] to i64
; CHECK-NEXT: [[TMP28:%.*]] = and i64 [[TMP27]], 72057594037927935
; CHECK-NEXT: [[TMP29:%.*]] = lshr i64 [[TMP28]], 4
; CHECK-NEXT: [[TMP30:%.*]] = getelementptr i8, ptr [[TMP16]], i64 [[TMP29]]
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP30]], i8 [[TMP26]], i64 256, i1 false)
; CHECK-NEXT: ret i1 [[RETVAL_0]]
;
entry:

983
llvm/test/Instrumentation/HWAddressSanitizer/use-after-scope.ll
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