[PowerPC] Define SchedModel for Power8

PowerPC subtargets prior to Power9 use the 'legacy' itinerary way to
provide scheduling information. This patch re-writes the tablegen file
to define the scheduling information in the new SchedModel way, which
can bring improvements to some benchmarks.

Reviewed By: shchenz

Differential Revision: https://reviews.llvm.org/D154488
This commit is contained in:
Qiu Chaofan
2023-09-08 15:41:23 +08:00
parent f48bd86bb9
commit b922a36211
283 changed files with 13175 additions and 14740 deletions

View File

@@ -6,408 +6,332 @@
//
//===----------------------------------------------------------------------===//
//
// This file defines the itinerary class data for the POWER8 processor.
// This file defines the SchedModel for the POWER8 processor.
//
//===----------------------------------------------------------------------===//
// Scheduling for the P8 involves tracking two types of resources:
// 1. The dispatch bundle slots
// 2. The functional unit resources
// Dispatch units:
def P8_DU1 : FuncUnit;
def P8_DU2 : FuncUnit;
def P8_DU3 : FuncUnit;
def P8_DU4 : FuncUnit;
def P8_DU5 : FuncUnit;
def P8_DU6 : FuncUnit;
def P8_DU7 : FuncUnit; // Only branch instructions will use DU7,DU8
def P8_DU8 : FuncUnit;
// 10 insns per cycle (2-LU, 2-LSU, 2-FXU, 2-FPU, 1-CRU, 1-BRU).
def P8_LU1 : FuncUnit; // Loads or fixed-point operations 1
def P8_LU2 : FuncUnit; // Loads or fixed-point operations 2
// Load/Store pipelines can handle Stores, fixed-point loads, and simple
// fixed-point operations.
def P8_LSU1 : FuncUnit; // Load/Store pipeline 1
def P8_LSU2 : FuncUnit; // Load/Store pipeline 2
// Fixed Point unit
def P8_FXU1 : FuncUnit; // FX pipeline 1
def P8_FXU2 : FuncUnit; // FX pipeline 2
// The Floating-Point Unit (FPU) and Vector Media Extension (VMX) units
// are combined on P7 and newer into a Vector Scalar Unit (VSU).
// The P8 Instruction latency documents still refers to the unit as the
// FPU, so keep in mind that FPU==VSU.
// In contrast to the P7, the VMX units on P8 are symmetric, so no need to
// split vector integer ops or 128-bit load/store/perms to the specific units.
def P8_FPU1 : FuncUnit; // VS pipeline 1
def P8_FPU2 : FuncUnit; // VS pipeline 2
def P8_CRU : FuncUnit; // CR unit (CR logicals and move-from-SPRs)
def P8_BRU : FuncUnit; // BR unit
def P8Itineraries : ProcessorItineraries<
[P8_DU1, P8_DU2, P8_DU3, P8_DU4, P8_DU5, P8_DU6, P8_DU7, P8_DU8,
P8_LU1, P8_LU2, P8_LSU1, P8_LSU2, P8_FXU1, P8_FXU2,
P8_FPU1, P8_FPU2, P8_CRU, P8_BRU], [], [
InstrItinData<IIC_IntSimple , [InstrStage<1, [P8_DU1, P8_DU2, P8_DU3,
P8_DU4, P8_DU5, P8_DU6], 0>,
InstrStage<1, [P8_FXU1, P8_FXU2,
P8_LU1, P8_LU2,
P8_LSU1, P8_LSU2]>],
[1, 1, 1]>,
InstrItinData<IIC_IntGeneral , [InstrStage<1, [P8_DU1, P8_DU2, P8_DU3,
P8_DU4, P8_DU5, P8_DU6], 0>,
InstrStage<1, [P8_FXU1, P8_FXU2, P8_LU1,
P8_LU2, P8_LSU1, P8_LSU2]>],
[1, 1, 1]>,
InstrItinData<IIC_IntISEL, [InstrStage<1, [P8_DU1], 0>,
InstrStage<1, [P8_FXU1, P8_FXU2], 0>,
InstrStage<1, [P8_BRU]>],
[1, 1, 1, 1]>,
InstrItinData<IIC_IntCompare , [InstrStage<1, [P8_DU1, P8_DU2, P8_DU3,
P8_DU4, P8_DU5, P8_DU6], 0>,
InstrStage<1, [P8_FXU1, P8_FXU2]>],
[1, 1, 1]>,
InstrItinData<IIC_IntDivW , [InstrStage<1, [P8_DU1, P8_DU2, P8_DU3,
P8_DU4, P8_DU5, P8_DU6], 0>,
InstrStage<15, [P8_FXU1, P8_FXU2]>],
[15, 1, 1]>,
InstrItinData<IIC_IntDivD , [InstrStage<1, [P8_DU1, P8_DU2, P8_DU3,
P8_DU4, P8_DU5, P8_DU6], 0>,
InstrStage<23, [P8_FXU1, P8_FXU2]>],
[23, 1, 1]>,
InstrItinData<IIC_IntMulHW , [InstrStage<1, [P8_DU1, P8_DU2, P8_DU3,
P8_DU4, P8_DU5, P8_DU6], 0>,
InstrStage<1, [P8_FXU1, P8_FXU2]>],
[4, 1, 1]>,
InstrItinData<IIC_IntMulHWU , [InstrStage<1, [P8_DU1, P8_DU2, P8_DU3,
P8_DU4, P8_DU5, P8_DU6], 0>,
InstrStage<1, [P8_FXU1, P8_FXU2]>],
[4, 1, 1]>,
InstrItinData<IIC_IntMulHD , [InstrStage<1, [P8_DU1, P8_DU2, P8_DU3,
P8_DU4, P8_DU5, P8_DU6], 0>,
InstrStage<1, [P8_FXU1, P8_FXU2]>],
[4, 1, 1]>,
InstrItinData<IIC_IntMulLI , [InstrStage<1, [P8_DU1, P8_DU2, P8_DU3,
P8_DU4, P8_DU5, P8_DU6], 0>,
InstrStage<1, [P8_FXU1, P8_FXU2]>],
[4, 1, 1]>,
InstrItinData<IIC_IntRotate , [InstrStage<1, [P8_DU1, P8_DU2, P8_DU3,
P8_DU4, P8_DU5, P8_DU6], 0>,
InstrStage<1, [P8_FXU1, P8_FXU2]>],
[1, 1, 1]>,
InstrItinData<IIC_IntRotateD , [InstrStage<1, [P8_DU1, P8_DU2, P8_DU3,
P8_DU4, P8_DU5, P8_DU6], 0>,
InstrStage<1, [P8_FXU1, P8_FXU2]>],
[1, 1, 1]>,
InstrItinData<IIC_IntRotateDI , [InstrStage<1, [P8_DU1, P8_DU2, P8_DU3,
P8_DU4, P8_DU5, P8_DU6], 0>,
InstrStage<1, [P8_FXU1, P8_FXU2]>],
[1, 1, 1]>,
InstrItinData<IIC_IntShift , [InstrStage<1, [P8_DU1, P8_DU2, P8_DU3,
P8_DU4, P8_DU5, P8_DU6], 0>,
InstrStage<1, [P8_FXU1, P8_FXU2]>],
[1, 1, 1]>,
InstrItinData<IIC_IntTrapW , [InstrStage<1, [P8_DU1, P8_DU2, P8_DU3,
P8_DU4, P8_DU5, P8_DU6], 0>,
InstrStage<1, [P8_FXU1, P8_FXU2]>],
[1, 1]>,
InstrItinData<IIC_IntTrapD , [InstrStage<1, [P8_DU1, P8_DU2, P8_DU3,
P8_DU4, P8_DU5, P8_DU6], 0>,
InstrStage<1, [P8_FXU1, P8_FXU2]>],
[1, 1]>,
InstrItinData<IIC_BrB , [InstrStage<1, [P8_DU7, P8_DU8], 0>,
InstrStage<1, [P8_BRU]>],
[3, 1, 1]>,
// FIXME - the Br* groups below are not branch related, so should probably
// be renamed.
// IIC_BrCR consists of the cr* instructions. (crand,crnor,creqv, etc).
// and should be 'First' in dispatch.
InstrItinData<IIC_BrCR , [InstrStage<1, [P8_DU1], 0>,
InstrStage<1, [P8_CRU]>],
[3, 1, 1]>,
// IIC_BrMCR consists of the mcrf instruction.
InstrItinData<IIC_BrMCR , [InstrStage<1, [P8_DU1, P8_DU2, P8_DU3,
P8_DU4, P8_DU5, P8_DU6], 0>,
InstrStage<1, [P8_CRU]>],
[3, 1, 1]>,
// IIC_BrMCRX consists of mcrxr (obsolete instruction) and mtcrf, which
// should be first in the dispatch group.
InstrItinData<IIC_BrMCRX , [InstrStage<1, [P8_DU1], 0>,
InstrStage<1, [P8_FXU1, P8_FXU2]>],
[3, 1, 1]>,
InstrItinData<IIC_BrMCRX , [InstrStage<1, [P8_DU1], 0>,
InstrStage<1, [P8_FXU1, P8_FXU2]>],
[3, 1]>,
InstrItinData<IIC_LdStLoad , [InstrStage<1, [P8_DU1, P8_DU2, P8_DU3,
P8_DU4, P8_DU5, P8_DU6], 0>,
InstrStage<1, [P8_LSU1, P8_LSU2,
P8_LU1, P8_LU2]>],
[2, 1, 1]>,
InstrItinData<IIC_LdStLoadUpd , [InstrStage<1, [P8_DU1], 0>,
InstrStage<1, [P8_DU2], 0>,
InstrStage<1, [P8_LSU1, P8_LSU2,
P8_LU1, P8_LU2 ], 0>,
InstrStage<1, [P8_FXU1, P8_FXU2]>],
[2, 2, 1, 1]>,
// Update-Indexed form loads/stores are no longer first and last in the
// dispatch group. They are simply cracked, so require DU1,DU2.
InstrItinData<IIC_LdStLoadUpdX, [InstrStage<1, [P8_DU1], 0>,
InstrStage<1, [P8_DU2], 0>,
InstrStage<1, [P8_LSU1, P8_LSU2,
P8_LU1, P8_LU2], 0>,
InstrStage<1, [P8_FXU1, P8_FXU2]>],
[3, 3, 1, 1]>,
InstrItinData<IIC_LdStLD , [InstrStage<1, [P8_DU1, P8_DU2, P8_DU3,
P8_DU4, P8_DU5, P8_DU6], 0>,
InstrStage<1, [P8_LSU1, P8_LSU2,
P8_LU1, P8_LU2]>],
[2, 1, 1]>,
InstrItinData<IIC_LdStLDU , [InstrStage<1, [P8_DU1], 0>,
InstrStage<1, [P8_DU2], 0>,
InstrStage<1, [P8_LSU1, P8_LSU2,
P8_LU1, P8_LU2], 0>,
InstrStage<1, [P8_FXU1, P8_FXU2]>],
[2, 2, 1, 1]>,
InstrItinData<IIC_LdStLDUX , [InstrStage<1, [P8_DU1], 0>,
InstrStage<1, [P8_DU2], 0>,
InstrStage<1, [P8_LSU1, P8_LSU2,
P8_LU1, P8_LU2], 0>,
InstrStage<1, [P8_FXU1, P8_FXU2]>],
[3, 3, 1, 1]>,
InstrItinData<IIC_LdStLFD , [InstrStage<1, [P8_DU1, P8_DU2, P8_DU3,
P8_DU4, P8_DU5, P8_DU6], 0>,
InstrStage<1, [P8_LU1, P8_LU2]>],
[3, 1, 1]>,
InstrItinData<IIC_LdStLVecX , [InstrStage<1, [P8_DU1, P8_DU2, P8_DU3,
P8_DU4, P8_DU5, P8_DU6], 0>,
InstrStage<1, [P8_LU1, P8_LU2]>],
[3, 1, 1]>,
InstrItinData<IIC_LdStLFDU , [InstrStage<1, [P8_DU1], 0>,
InstrStage<1, [P8_DU2], 0>,
InstrStage<1, [P8_LU1, P8_LU2], 0>,
InstrStage<1, [P8_FXU1, P8_FXU2]>],
[3, 3, 1, 1]>,
InstrItinData<IIC_LdStLFDUX , [InstrStage<1, [P8_DU1], 0>,
InstrStage<1, [P8_DU2], 0>,
InstrStage<1, [P8_LU1, P8_LU2], 0>,
InstrStage<1, [P8_FXU1, P8_FXU2]>],
[3, 3, 1, 1]>,
InstrItinData<IIC_LdStLHA , [InstrStage<1, [P8_DU1], 0>,
InstrStage<1, [P8_DU2], 0>,
InstrStage<1, [P8_LSU1, P8_LSU2,
P8_LU1, P8_LU2], 0>,
InstrStage<1, [P8_FXU1, P8_FXU2,
P8_LU1, P8_LU2]>],
[3, 1, 1]>,
InstrItinData<IIC_LdStLHAU , [InstrStage<1, [P8_DU1], 0>,
InstrStage<1, [P8_DU2], 0>,
InstrStage<1, [P8_LSU1, P8_LSU2,
P8_LU1, P8_LU2], 0>,
InstrStage<1, [P8_FXU1, P8_FXU2]>,
InstrStage<1, [P8_FXU1, P8_FXU2]>],
[4, 4, 1, 1]>,
// first+last in dispatch group.
InstrItinData<IIC_LdStLHAUX , [InstrStage<1, [P8_DU1], 0>,
InstrStage<1, [P8_DU2], 0>,
InstrStage<1, [P8_DU3], 0>,
InstrStage<1, [P8_DU4], 0>,
InstrStage<1, [P8_DU5], 0>,
InstrStage<1, [P8_DU6], 0>,
InstrStage<1, [P8_LSU1, P8_LSU2,
P8_LU1, P8_LU2], 0>,
InstrStage<1, [P8_FXU1, P8_FXU2]>,
InstrStage<1, [P8_FXU1, P8_FXU2]>],
[4, 4, 1, 1]>,
InstrItinData<IIC_LdStLWA , [InstrStage<1, [P8_DU1], 0>,
InstrStage<1, [P8_DU2], 0>,
InstrStage<1, [P8_LSU1, P8_LSU2,
P8_LU1, P8_LU2]>,
InstrStage<1, [P8_FXU1, P8_FXU2]>],
[3, 1, 1]>,
InstrItinData<IIC_LdStLWARX, [InstrStage<1, [P8_DU1], 0>,
InstrStage<1, [P8_DU2], 0>,
InstrStage<1, [P8_DU3], 0>,
InstrStage<1, [P8_DU4], 0>,
InstrStage<1, [P8_LSU1, P8_LSU2,
P8_LU1, P8_LU2]>],
[3, 1, 1]>,
// first+last
InstrItinData<IIC_LdStLDARX, [InstrStage<1, [P8_DU1], 0>,
InstrStage<1, [P8_DU2], 0>,
InstrStage<1, [P8_DU3], 0>,
InstrStage<1, [P8_DU4], 0>,
InstrStage<1, [P8_DU5], 0>,
InstrStage<1, [P8_DU6], 0>,
InstrStage<1, [P8_LSU1, P8_LSU2,
P8_LU1, P8_LU2]>],
[3, 1, 1]>,
InstrItinData<IIC_LdStLMW , [InstrStage<1, [P8_DU1, P8_DU2, P8_DU3,
P8_DU4, P8_DU5, P8_DU6], 0>,
InstrStage<1, [P8_LSU1, P8_LSU2,
P8_LU1, P8_LU2]>],
[2, 1, 1]>,
// Stores are dual-issued from the issue queue, so may only take up one
// dispatch slot. The instruction will be broken into two IOPS. The agen
// op is issued to the LSU, and the data op (register fetch) is issued
// to either the LU (GPR store) or the VSU (FPR store).
InstrItinData<IIC_LdStStore , [InstrStage<1, [P8_DU1, P8_DU2, P8_DU3,
P8_DU4, P8_DU5, P8_DU6], 0>,
InstrStage<1, [P8_LSU1, P8_LSU2]>,
InstrStage<1, [P8_LU1, P8_LU2]>],
[1, 1, 1]>,
InstrItinData<IIC_LdStSTD , [InstrStage<1, [P8_DU1, P8_DU2, P8_DU3,
P8_DU4, P8_DU5, P8_DU6], 0>,
InstrStage<1, [P8_LU1, P8_LU2,
P8_LSU1, P8_LSU2]>]
[1, 1, 1]>,
InstrItinData<IIC_LdStSTU , [InstrStage<1, [P8_DU1], 0>,
InstrStage<1, [P8_DU2], 0>,
InstrStage<1, [P8_LU1, P8_LU2,
P8_LSU1, P8_LSU2], 0>,
InstrStage<1, [P8_FXU1, P8_FXU2]>],
[2, 1, 1, 1]>,
// First+last
InstrItinData<IIC_LdStSTUX , [InstrStage<1, [P8_DU1], 0>,
InstrStage<1, [P8_DU2], 0>,
InstrStage<1, [P8_DU3], 0>,
InstrStage<1, [P8_DU4], 0>,
InstrStage<1, [P8_DU5], 0>,
InstrStage<1, [P8_DU6], 0>,
InstrStage<1, [P8_LSU1, P8_LSU2], 0>,
InstrStage<1, [P8_FXU1, P8_FXU2]>,
InstrStage<1, [P8_FXU1, P8_FXU2]>],
[2, 1, 1, 1]>,
InstrItinData<IIC_LdStSTFD , [InstrStage<1, [P8_DU1, P8_DU2, P8_DU3,
P8_DU4, P8_DU5, P8_DU6], 0>,
InstrStage<1, [P8_LSU1, P8_LSU2], 0>,
InstrStage<1, [P8_FPU1, P8_FPU2]>],
[1, 1, 1]>,
InstrItinData<IIC_LdStSTFDU , [InstrStage<1, [P8_DU1], 0>,
InstrStage<1, [P8_DU2], 0>,
InstrStage<1, [P8_LSU1, P8_LSU2], 0>,
InstrStage<1, [P8_FXU1, P8_FXU2], 0>,
InstrStage<1, [P8_FPU1, P8_FPU2]>],
[2, 1, 1, 1]>,
InstrItinData<IIC_LdStSTVEBX , [InstrStage<1, [P8_DU1, P8_DU2, P8_DU3,
P8_DU4, P8_DU5, P8_DU6], 0>,
InstrStage<1, [P8_LSU1, P8_LSU2], 0>,
InstrStage<1, [P8_FPU1, P8_FPU2]>],
[1, 1, 1]>,
InstrItinData<IIC_LdStSTDCX , [InstrStage<1, [P8_DU1], 0>,
InstrStage<1, [P8_DU2], 0>,
InstrStage<1, [P8_DU3], 0>,
InstrStage<1, [P8_DU4], 0>,
InstrStage<1, [P8_DU5], 0>,
InstrStage<1, [P8_DU6], 0>,
InstrStage<1, [P8_LSU1, P8_LSU2], 0>,
InstrStage<1, [P8_LU1, P8_LU2]>],
[1, 1, 1]>,
InstrItinData<IIC_LdStSTWCX , [InstrStage<1, [P8_DU1], 0>,
InstrStage<1, [P8_DU2], 0>,
InstrStage<1, [P8_DU3], 0>,
InstrStage<1, [P8_DU4], 0>,
InstrStage<1, [P8_DU5], 0>,
InstrStage<1, [P8_DU6], 0>,
InstrStage<1, [P8_LSU1, P8_LSU2], 0>,
InstrStage<1, [P8_LU1, P8_LU2]>],
[1, 1, 1]>,
InstrItinData<IIC_SprMFCR , [InstrStage<1, [P8_DU1], 0>,
InstrStage<1, [P8_CRU]>],
[6, 1]>,
InstrItinData<IIC_SprMFCRF , [InstrStage<1, [P8_DU1], 0>,
InstrStage<1, [P8_CRU]>],
[3, 1]>,
InstrItinData<IIC_SprMTSPR , [InstrStage<1, [P8_DU1], 0>,
InstrStage<1, [P8_FXU1, P8_FXU2]>],
[4, 1]>, // mtctr
InstrItinData<IIC_FPGeneral , [InstrStage<1, [P8_DU1, P8_DU2, P8_DU3,
P8_DU4, P8_DU5, P8_DU6], 0>,
InstrStage<1, [P8_FPU1, P8_FPU2]>],
[5, 1, 1]>,
InstrItinData<IIC_FPAddSub , [InstrStage<1, [P8_DU1, P8_DU2, P8_DU3,
P8_DU4, P8_DU5, P8_DU6], 0>,
InstrStage<1, [P8_FPU1, P8_FPU2]>],
[5, 1, 1]>,
InstrItinData<IIC_FPCompare , [InstrStage<1, [P8_DU1, P8_DU2, P8_DU3,
P8_DU4, P8_DU5, P8_DU6], 0>,
InstrStage<1, [P8_FPU1, P8_FPU2]>],
[8, 1, 1]>,
InstrItinData<IIC_FPDivD , [InstrStage<1, [P8_DU1, P8_DU2, P8_DU3,
P8_DU4, P8_DU5, P8_DU6], 0>,
InstrStage<1, [P8_FPU1, P8_FPU2]>],
[33, 1, 1]>,
InstrItinData<IIC_FPDivS , [InstrStage<1, [P8_DU1, P8_DU2, P8_DU3,
P8_DU4, P8_DU5, P8_DU6], 0>,
InstrStage<1, [P8_FPU1, P8_FPU2]>],
[27, 1, 1]>,
InstrItinData<IIC_FPSqrtD , [InstrStage<1, [P8_DU1, P8_DU2, P8_DU3,
P8_DU4, P8_DU5, P8_DU6], 0>,
InstrStage<1, [P8_FPU1, P8_FPU2]>],
[44, 1, 1]>,
InstrItinData<IIC_FPSqrtS , [InstrStage<1, [P8_DU1, P8_DU2, P8_DU3,
P8_DU4, P8_DU5, P8_DU6], 0>,
InstrStage<1, [P8_FPU1, P8_FPU2]>],
[32, 1, 1]>,
InstrItinData<IIC_FPFused , [InstrStage<1, [P8_DU1, P8_DU2, P8_DU3,
P8_DU4, P8_DU5, P8_DU6], 0>,
InstrStage<1, [P8_FPU1, P8_FPU2]>],
[5, 1, 1, 1]>,
InstrItinData<IIC_FPRes , [InstrStage<1, [P8_DU1, P8_DU2, P8_DU3,
P8_DU4, P8_DU5, P8_DU6], 0>,
InstrStage<1, [P8_FPU1, P8_FPU2]>],
[5, 1, 1]>,
InstrItinData<IIC_VecGeneral , [InstrStage<1, [P8_DU1], 0>,
InstrStage<1, [P8_FPU1, P8_FPU2]>],
[2, 1, 1]>,
InstrItinData<IIC_VecVSL , [InstrStage<1, [P8_DU1], 0>,
InstrStage<1, [P8_FPU1, P8_FPU2]>],
[2, 1, 1]>,
InstrItinData<IIC_VecVSR , [InstrStage<1, [P8_DU1], 0>,
InstrStage<1, [P8_FPU1, P8_FPU2]>],
[2, 1, 1]>,
InstrItinData<IIC_VecFP , [InstrStage<1, [P8_DU1], 0>,
InstrStage<1, [P8_FPU1, P8_FPU2]>],
[6, 1, 1]>,
InstrItinData<IIC_VecFPCompare, [InstrStage<1, [P8_DU1], 0>,
InstrStage<1, [P8_FPU1, P8_FPU2]>],
[6, 1, 1]>,
InstrItinData<IIC_VecFPRound , [InstrStage<1, [P8_DU1], 0>,
InstrStage<1, [P8_FPU1, P8_FPU2]>],
[6, 1, 1]>,
InstrItinData<IIC_VecComplex , [InstrStage<1, [P8_DU1], 0>,
InstrStage<1, [P8_FPU1, P8_FPU2]>],
[7, 1, 1]>,
InstrItinData<IIC_VecPerm , [InstrStage<1, [P8_DU1, P8_DU2], 0>,
InstrStage<1, [P8_FPU1, P8_FPU2]>],
[3, 1, 1]>
]>;
// ===---------------------------------------------------------------------===//
// P8 machine model for scheduling and other instruction cost heuristics.
// P8 has an 8 insn dispatch group (6 non-branch, 2 branch) and can issue up
// to 10 insns per cycle (2-LU, 2-LSU, 2-FXU, 2-FPU, 1-CRU, 1-BRU).
def P8Model : SchedMachineModel {
let IssueWidth = 8; // up to 8 instructions dispatched per cycle.
// up to six non-branch instructions.
// up to two branches in a dispatch group.
let LoadLatency = 3; // Optimistic load latency assuming bypass.
// This is overriden by OperandCycles if the
// Itineraries are queried instead.
let IssueWidth = 8;
let LoadLatency = 3;
let MispredictPenalty = 16;
// Try to make sure we have at least 10 dispatch groups in a loop.
let LoopMicroOpBufferSize = 60;
let MicroOpBufferSize = 64;
// TODO: Due to limitation of instruction definitions, non-P8 instructions
// are required to be listed here. Change this after it got fixed.
let CompleteModel = 0;
let Itineraries = P8Itineraries;
let UnsupportedFeatures = [HasSPE, PrefixInstrs, MMA,
PairedVectorMemops, PCRelativeMemops,
IsISA3_0, IsISA3_1, IsISAFuture];
}
let SchedModel = P8Model in {
// Power8 Pipeline Units:
def P8_LU_LS_FX : ProcResource<6>;
def P8_LU_LS : ProcResource<4> { let Super = P8_LU_LS_FX; }
def P8_LS : ProcResource<2> { let Super = P8_LU_LS; }
def P8_LU : ProcResource<2> { let Super = P8_LU_LS; }
def P8_FX : ProcResource<2> { let Super = P8_LU_LS_FX; }
def P8_DFU : ProcResource<1>;
def P8_BR : ProcResource<1> { let BufferSize = 16; }
def P8_CY : ProcResource<1>;
def P8_CRL : ProcResource<1>;
def P8_VMX : ProcResource<2>;
def P8_PM : ProcResource<2> {
// This is workaround for scheduler to respect latency of long permute chain.
let BufferSize = 1;
let Super = P8_VMX;
}
def P8_XS : ProcResource<2> { let Super = P8_VMX; }
def P8_VX : ProcResource<2> { let Super = P8_VMX; }
def P8_FPU : ProcResource<4>;
// Units for scalar, 2xDouble and 4xSingle
def P8_FP_Scal : ProcResource<2> { let Super = P8_FPU; }
def P8_FP_2x64 : ProcResource<2> { let Super = P8_FPU; }
def P8_FP_4x32 : ProcResource<2> { let Super = P8_FPU; }
// Power8 Dispatch Ports:
// Two ports to do loads or fixed-point operations.
// Two ports to do stores, fixed-point loads, or fixed-point operations.
// Two ports for fixed-point operations.
// Two issue ports shared by 2 DFP/2 VSX/2 VMX/1 CY/1 DFP operations.
// One for branch operations.
// One for condition register operations.
// TODO: Model dispatch of cracked instructions.
// Six ports in total are available for fixed-point operations.
def P8_PORT_ALLFX : ProcResource<6>;
// Four ports in total are available for fixed-point load operations.
def P8_PORT_FXLD : ProcResource<4> { let Super = P8_PORT_ALLFX; }
// Two ports to do loads or fixed-point operations.
def P8_PORT_LD_FX : ProcResource<2> { let Super = P8_PORT_FXLD; }
// Two ports to do stores, fixed-point loads, or fixed-point operations.
def P8_PORT_ST_FXLD_FX : ProcResource<2> { let Super = P8_PORT_FXLD; }
// Two issue ports shared by two floating-point, two VSX, two VMX, one crypto,
// and one DFP operations.
def P8_PORT_VMX_FP : ProcResource<2>;
// One port for branch operation.
def P8_PORT_BR : ProcResource<1>;
// One port for condition register operation.
def P8_PORT_CR : ProcResource<1>;
def P8_ISSUE_FX : SchedWriteRes<[P8_PORT_ALLFX]>;
def P8_ISSUE_FXLD : SchedWriteRes<[P8_PORT_FXLD]>;
def P8_ISSUE_LD : SchedWriteRes<[P8_PORT_LD_FX]>;
def P8_ISSUE_ST : SchedWriteRes<[P8_PORT_ST_FXLD_FX]>;
def P8_ISSUE_VSX : SchedWriteRes<[P8_PORT_VMX_FP]>;
def P8_ISSUE_BR : SchedWriteRes<[P8_PORT_BR]>;
def P8_ISSUE_CR : SchedWriteRes<[P8_PORT_CR]>;
// Power8 Instruction Latency & Port Groups:
def P8_LS_LU_NONE : SchedWriteRes<[P8_LU, P8_LS]>;
def P8_LS_FP_NONE : SchedWriteRes<[P8_LS, P8_FPU]>;
def P8_LU_or_LS_3C : SchedWriteRes<[P8_LU_LS]> { let Latency = 3; }
def P8_LS_FX_3C : SchedWriteRes<[P8_LS, P8_FX]> { let Latency = 3; }
def P8_LU_or_LS_or_FX_2C : SchedWriteRes<[P8_LU_LS_FX]> { let Latency = 2; }
def P8_LU_or_LS_FX_3C : SchedWriteRes<[P8_LU_LS, P8_FX]> { let Latency = 3; }
def P8_FX_NONE : SchedWriteRes<[P8_FX]>;
def P8_FX_1C : SchedWriteRes<[P8_FX]> { let Latency = 1; }
def P8_FX_2C : SchedWriteRes<[P8_FX]> { let Latency = 2; }
def P8_FX_3C : SchedWriteRes<[P8_FX]> { let Latency = 3; }
def P8_FX_5C : SchedWriteRes<[P8_FX]> { let Latency = 5; }
def P8_FX_10C : SchedWriteRes<[P8_FX]> { let Latency = 10; }
def P8_FX_23C : SchedWriteRes<[P8_FX]> { let Latency = 23; }
def P8_FX_15C : SchedWriteRes<[P8_FX]> { let Latency = 15; }
def P8_FX_41C : SchedWriteRes<[P8_FX]> { let Latency = 41; }
def P8_BR_2C : SchedWriteRes<[P8_BR]> { let Latency = 2; }
def P8_CR_NONE : SchedWriteRes<[P8_CRL]>;
def P8_CR_3C : SchedWriteRes<[P8_CRL]> { let Latency = 3; }
def P8_CR_5C : SchedWriteRes<[P8_CRL]> { let Latency = 5; }
def P8_LU_5C : SchedWriteRes<[P8_LU]> { let Latency = 5; }
def P8_LU_FX_5C : SchedWriteRes<[P8_LU, P8_FX]> { let Latency = 5; }
def P8_LS_FP_FX_2C : SchedWriteRes<[P8_LS, P8_FPU, P8_FX]> { let Latency = 2; }
def P8_LS_FP_FX_3C : SchedWriteRes<[P8_LS, P8_FPU, P8_FX]> { let Latency = 3; }
def P8_LS_3C : SchedWriteRes<[P8_LS]> { let Latency = 3; }
def P8_FP_3C : SchedWriteRes<[P8_FPU]> { let Latency = 3; }
def P8_FP_Scal_6C : SchedWriteRes<[P8_FP_Scal]> { let Latency = 6; }
def P8_FP_4x32_6C : SchedWriteRes<[P8_FP_4x32]> { let Latency = 6; }
def P8_FP_2x64_6C : SchedWriteRes<[P8_FP_2x64]> { let Latency = 6; }
def P8_FP_26C : SchedWriteRes<[P8_FP_Scal]> { let Latency = 26; }
def P8_FP_28C : SchedWriteRes<[P8_FP_4x32]> { let Latency = 28; }
def P8_FP_31C : SchedWriteRes<[P8_FP_Scal]> { let Latency = 31; }
def P8_FP_Scal_32C : SchedWriteRes<[P8_FP_Scal]> { let Latency = 32; }
def P8_FP_2x64_32C : SchedWriteRes<[P8_FP_2x64]> { let Latency = 32; }
def P8_FP_4x32_32C : SchedWriteRes<[P8_FP_4x32]> { let Latency = 32; }
def P8_FP_Scal_43C : SchedWriteRes<[P8_FP_Scal]> { let Latency = 43; }
def P8_FP_2x64_43C : SchedWriteRes<[P8_FP_2x64]> { let Latency = 43; }
def P8_XS_2C : SchedWriteRes<[P8_XS]> { let Latency = 2; }
def P8_PM_2C : SchedWriteRes<[P8_PM]> { let Latency = 2; }
def P8_XS_4C : SchedWriteRes<[P8_XS]> { let Latency = 4; }
def P8_VX_7C : SchedWriteRes<[P8_VX]> { let Latency = 7; }
def P8_XS_9C : SchedWriteRes<[P8_XS]> { let Latency = 9; }
def P8_CY_6C : SchedWriteRes<[P8_CY]> { let Latency = 6; }
def P8_DFU_13C : SchedWriteRes<[P8_DFU]> { let Latency = 13; }
def P8_DFU_15C : SchedWriteRes<[P8_DFU]> { let Latency = 15; }
def P8_DFU_17C : SchedWriteRes<[P8_DFU]> { let Latency = 17; }
def P8_DFU_25C : SchedWriteRes<[P8_DFU]> { let Latency = 25; }
def P8_DFU_32C : SchedWriteRes<[P8_DFU]> { let Latency = 32; }
def P8_DFU_34C : SchedWriteRes<[P8_DFU]> { let Latency = 34; }
def P8_DFU_40C : SchedWriteRes<[P8_DFU]> { let Latency = 40; }
def P8_DFU_90C : SchedWriteRes<[P8_DFU]> { let Latency = 90; }
def P8_DFU_96C : SchedWriteRes<[P8_DFU]> { let Latency = 96; }
def P8_DFU_172C : SchedWriteRes<[P8_DFU]> { let Latency = 172; }
// Direct move instructions
def P8_DM_5C : SchedWriteRes<[]> { let Latency = 5; }
// Instructions of CR pipeline
def : InstRW<[P8_CR_NONE, P8_ISSUE_CR], (instrs MFCR, MFCR8)>;
def : InstRW<[P8_CR_3C, P8_ISSUE_CR], (instrs MFOCRF, MFOCRF8)>;
def : InstRW<[P8_CR_5C, P8_ISSUE_CR], (instrs MFLR, MFLR8, MFCTR, MFCTR8)>;
// Instructions of CY pipeline
def : InstRW<[P8_CY_6C, P8_ISSUE_VSX], (instrs
VCIPHER, VCIPHERLAST, VNCIPHER, VNCIPHERLAST, VPMSUMB, VPMSUMD, VPMSUMH, VPMSUMW, VSBOX)>;
// Instructions of FPU pipeline
def : InstRW<[P8_FP_26C, P8_ISSUE_VSX], (instrs (instregex "^FDIVS(_rec)?$"), XSDIVSP)>;
def : InstRW<[P8_FP_28C, P8_ISSUE_VSX], (instrs XVDIVSP)>;
def : InstRW<[P8_FP_31C, P8_ISSUE_VSX], (instregex "^FSQRTS(_rec)?$")>;
def : InstRW<[P8_FP_Scal_32C, P8_ISSUE_VSX], (instrs FDIV, FDIV_rec, XSDIVDP)>;
def : InstRW<[P8_FP_2x64_32C, P8_ISSUE_VSX], (instrs XVDIVDP)>;
def : InstRW<[P8_FP_4x32_32C, P8_ISSUE_VSX], (instrs XVSQRTSP)>;
def : InstRW<[P8_FP_Scal_43C, P8_ISSUE_VSX], (instrs FSQRT, FSQRT_rec, XSSQRTDP)>;
def : InstRW<[P8_FP_2x64_43C, P8_ISSUE_VSX], (instrs XVSQRTDP)>;
def : InstRW<[P8_FP_3C, P8_ISSUE_VSX], (instrs
MTFSFI_rec, MTFSF_rec, MTFSFI, MTFSFIb, MTFSF, MTFSFb, MTFSB0, MTFSB1)>;
def : InstRW<[P8_FP_Scal_6C, P8_ISSUE_VSX], (instrs
(instregex "^F(N)?M(ADD|SUB)(S)?(_rec)?$"),
(instregex "^XS(N)?M(ADD|SUB)(A|M)(D|S)P$"),
(instregex "^FC(F|T)I(D|W)(U)?(S|Z)?(_rec)?$"),
(instregex "^(F|XS)(ABS|CPSGN|ADD|MUL|NABS|RE|NEG|SUB|SEL|RSQRTE)(D|S)?(P)?(s)?(_rec)?$"),
(instregex "^FRI(M|N|P|Z)(D|S)(_rec)?$"),
(instregex "^XSCVDP(S|U)X(W|D)S(s)?$"),
(instregex "^XSCV(S|U)XD(D|S)P$"),
(instregex "^XSCV(D|S)P(S|D)P(N)?$"),
(instregex "^XSRDPI(C|M|P|Z)?$"),
FMR, FRSP, FMR_rec, FRSP_rec, XSRSP)>;
def : InstRW<[P8_FP_4x32_6C, P8_ISSUE_VSX], (instrs
(instregex "^XV(N)?M(ADD|SUB)(A|M)SP$"),
(instregex "^VRFI(M|N|P|Z)$"),
XVRSQRTESP, XVSUBSP, VADDFP, VEXPTEFP, VLOGEFP, VMADDFP, VNMSUBFP, VREFP,
VRSQRTEFP, VSUBFP, XVCVSXWSP, XVCVUXWSP, XVMULSP, XVNABSSP, XVNEGSP, XVRESP,
XVCVDPSP, XVCVSXDSP, XVCVUXDSP, XVABSSP, XVADDSP, XVCPSGNSP)>;
def : InstRW<[P8_FP_2x64_6C, P8_ISSUE_VSX], (instrs
(instregex "^XVR(D|S)PI(C|M|P|Z)?$"),
(instregex "^XVCV(S|U)X(D|W)DP$"),
(instregex "^XVCV(D|W|S)P(S|U)X(D|W)S$"),
(instregex "^XV(N)?(M)?(RSQRTE|CPSGN|SUB|ADD|ABS|UL|NEG|RE)(A|M)?DP$"),
XVCVSPDP)>;
// Instructions of FX, LU or LS pipeline
def : InstRW<[P8_FX_NONE, P8_ISSUE_FX], (instrs TDI, TWI, TD, TW, MTCRF, MTCRF8, MTOCRF, MTOCRF8)>;
def : InstRW<[P8_FX_1C, P8_ISSUE_FX], (instregex "^RLWIMI(8)?$")>;
// TODO: Pipeline of logical instructions might be LS or FX
def : InstRW<[P8_FX_2C, P8_ISSUE_FX], (instrs
(instregex "^(N|X)?(EQV|AND|OR)(I)?(S|C)?(8)?(_rec)?$"),
(instregex "^EXTS(B|H|W)(8)?(_32)?(_64)?(_rec)?$"),
(instregex "^RL(D|W)(I)?(NM|C)(L|R)?(8)?(_32)?(_64)?(_rec)?$"),
(instregex "^S(L|R)(A)?(W|D)(I)?(8)?(_rec|_32)?$"),
(instregex "^(ADD|SUBF)(M|Z)?(C|E)?(4|8)?O(_rec)?$"),
(instregex "^(ADD|SUBF)(M|Z)?E(8)?_rec$"),
(instregex "^(ADD|SUBF|NEG)(4|8)?_rec$"),
NOP, ADDG6S, ADDG6S8, ADDZE, ADDZE8, ADDIC_rec, NEGO_rec, ADDC, ADDC8, SUBFC, SUBFC8,
ADDC_rec, ADDC8_rec, SUBFC_rec, SUBFC8_rec, COPY, NEG8O_rec,
RLDIMI, RLDIMI_rec, RLWIMI8_rec, RLWIMI_rec)>;
def : InstRW<[P8_FX_3C], (instregex "^(POP)?CNT(LZ)?(B|W|D)(8)?(_rec)?$")>;
def : InstRW<[P8_FX_5C, P8_ISSUE_FX], (instrs
(instregex "^MUL(H|L)(I|W|D)(8)?(U|O)?(_rec)?$"),
CMPDI,CMPWI,CMPD,CMPW,CMPLDI,CMPLWI,CMPLD,CMPLW,
ISEL, ISEL8, MTLR, MTLR8, MTCTR, MTCTR8, MTCTR8loop, MTCTRloop)>;
def : InstRW<[P8_FX_10C, P8_ISSUE_VSX], (instregex "^MFTB(8)?$")>;
def : InstRW<[P8_FX_15C, P8_ISSUE_FX], (instregex "^DIVW(U)?$")>;
def : InstRW<[P8_FX_23C, P8_ISSUE_FX], (instregex "^DIV(D|WE)(U)?$")>;
def : InstRW<[P8_FX_41C], (instrs
(instregex "^DIV(D|W)(E)?(U)?O(_rec)?$"),
(instregex "^DIV(D|W)(E)?(U)?_rec$"),
DIVDE, DIVDEU)>;
def : InstRW<[P8_LS_3C, P8_ISSUE_FX], (instrs MFSR, MFSRIN)>;
def : InstRW<[P8_LU_5C, P8_ISSUE_LD], (instrs
LFS, LFSX, LFD, LFDX, LFDXTLS, LFDXTLS_, LXVD2X, LXVW4X, LXVDSX, LVEBX, LVEHX, LVEWX,
LVX, LVXL, LXSDX, LFIWAX, LFIWZX, LFSXTLS, LFSXTLS_, LXVB16X, LXVD2X, LXSIWZX,
DFLOADf64, XFLOADf64, LIWZX)>;
def : InstRW<[P8_LS_FX_3C, P8_ISSUE_FXLD], (instrs LQ)>;
def : InstRW<[P8_LU_FX_5C, P8_ISSUE_LD], (instregex "^LF(D|S)U(X)?$")>;
def : InstRW<[P8_LS_FP_NONE, P8_ISSUE_ST], (instrs
STXSDX, STXVD2X, STXVW4X, STFIWX, STFS, STFSX, STFD, STFDX,
STFDEPX, STFDXTLS, STFDXTLS_, STFSXTLS, STFSXTLS_, STXSIWX, STXSSP, STXSSPX)>;
def : InstRW<[P8_LS_FP_FX_2C, P8_ISSUE_ST], (instrs STVEBX, STVEHX, STVEWX, STVX, STVXL)>;
def : InstRW<[P8_LS_FP_FX_3C, P8_ISSUE_ST], (instregex "^STF(D|S)U(X)?$")>;
def : InstRW<[P8_LS_LU_NONE, P8_ISSUE_ST], (instrs
(instregex "^ST(B|H|W|D)(U)?(X)?(8|TLS)?(_)?(32)?$"),
STBCIX, STBCX, STBEPX, STDBRX, STDCIX, STDCX, STHBRX, STHCIX, STHCX, STHEPX,
STMW, STSWI, STWBRX, STWCIX, STWCX, STWEPX)>;
def : InstRW<[P8_LU_or_LS_FX_3C, P8_ISSUE_FXLD],
(instregex "^L(B|H|W|D)(A|Z)?(U)?(X)?(8|TLS)?(_)?(32)?$")>;
def : InstRW<[P8_LU_or_LS_3C, P8_ISSUE_FXLD], (instrs
LBARX, LBARXL, LBEPX, LBZCIX, LDARX, LDARXL, LDBRX, LDCIX, LFDEPX, LHARX, LHARXL, LHBRX, LXSIWAX,
LHBRX8, LHEPX, LHZCIX, LMW, LSWI, LVSL, LVSR, LWARX, LWARXL, LWBRX, LWBRX8, LWEPX, LWZCIX)>;
def : InstRW<[P8_LU_or_LS_or_FX_2C, P8_ISSUE_FX], (instrs
(instregex "^ADDI(C)?(dtprel|tlsgd|toc)?(L)?(ADDR)?(32|8)?$"),
(instregex "^ADDIS(dtprel|tlsgd|toc|gotTprel)?(HA)?(32|8)?$"),
(instregex "^LI(S)?(8)?$"),
(instregex "^ADD(M)?(E)?(4|8)?(TLS)?(_)?$"),
(instregex "^SUBF(M|Z)?(E)?(IC)?(4|8)?$"),
(instregex "^NEG(8)?(O)?$"))>;
// Instructions of PM pipeline
def : InstRW<[P8_PM_2C, P8_ISSUE_VSX], (instrs
(instregex "^VPK(S|U)(H|W|D)(S|U)(M|S)$"),
(instregex "^VUPK(H|L)(P|S)(H|B|W|X)$"),
(instregex "^VSPLT(IS)?(B|H|W)(s)?$"),
(instregex "^(XX|V)MRG(E|O|H|L)(B|H|W)$"),
XXPERMDI, XXPERMDIs, XXSEL, XXSLDWI, XXSLDWIs, XXSPLTW, XXSPLTWs, VPERMXOR,
VPKPX, VPERM, VBPERMQ, VGBBD, VSEL, VSL, VSLDOI, VSLO, VSR, VSRO)>;
def : InstRW<[P8_XS_2C, P8_ISSUE_VSX], (instrs
(instregex "^V(ADD|SUB)(S|U)(B|H|W|D)(M|S)$"),
(instregex "^X(S|V)(MAX|MIN)(D|S)P$"),
(instregex "^V(S)?(R)?(L)?(A)?(B|D|H|W)$"),
(instregex "^VAVG(S|U)(B|H|W)$"),
(instregex "^VM(AX|IN)(S|U)(B|H|W|D)$"),
(instregex "^(XX|V)(L)?(N)?(X)?(AND|OR|EQV)(C)?$"),
(instregex "^(X)?VCMP(EQ|GT|GE|B)(F|S|U)?(B|H|W|D|P|S)(P)?(_rec)?$"),
(instregex "^VCLZ(B|H|W|D)$"),
(instregex "^VPOPCNT(B|H|W)$"),
XXLORf, XXLXORdpz, XXLXORspz, XXLXORz, VEQV, VMAXFP, VMINFP,
VSHASIGMAD, VSHASIGMAW, VSUBCUW, VADDCUW, MFVSCR, MTVSCR)>;
def : InstRW<[P8_XS_4C, P8_ISSUE_VSX], (instrs
(instregex "^V(ADD|SUB)(E)?(C)?UQ(M)?$"),
VPOPCNTD)>;
def : InstRW<[P8_XS_9C, P8_ISSUE_CR], (instrs
(instregex "^(F|XS)CMP(O|U)(D|S)(P)?$"),
(instregex "^(F|XS|XV)T(DIV|SQRT)((D|S)P)?$"))>;
// Instructions of VX pipeline
def : InstRW<[P8_VX_7C, P8_ISSUE_VSX], (instrs
(instregex "^V(M)?SUM(2|4)?(M|S|U)(B|H|W)(M|S)$"),
(instregex "^VMUL(E|O)?(S|U)(B|H|W)(M)?$"),
VMHADDSHS, VMHRADDSHS, VMLADDUHM)>;
// Instructions of BR pipeline
def : InstRW<[P8_BR_2C, P8_ISSUE_BR], (instrs
(instregex "^(g)?B(C)?(C)?(CTR)?(L)?(A)?(R)?(L)?(8)?(_LD|_LWZ)?(always|into_toc|at)?(_RM)?(n)?$"),
(instregex "^BD(N)?Z(L)?(R|A)?(L)?(m|p|8)?$"),
(instregex "^BL(R|A)?(8)?(_NOP)?(_TLS)?(_)?(RM)?$"))>;
// Instructions of DFP pipeline
// DFP operations also use float/vector/crypto issue ports.
def : InstRW<[P8_DFU_13C, P8_ISSUE_VSX], (instrs
(instregex "^DTST(D|S)(C|F|G)(Q)?$"),
(instregex "^D(Q|X)EX(Q)?(_rec)?$"),
(instregex "^D(ADD|SUB|IEX|QUA|RRND|RINTX|RINTN|CTDP|DEDPD|ENBCD)(_rec)?$"),
(instregex "^DSC(L|R)I(_rec)?$"),
BCDADD_rec, BCDSUB_rec, DCMPO, DCMPU, DTSTEX, DQUAI)>;
def : InstRW<[P8_DFU_15C, P8_ISSUE_VSX], (instrs
(instregex "^DRINT(N|X)Q(_rec)?$"),
DCMPOQ, DCMPUQ, DRRNDQ, DRRNDQ_rec, DIEXQ, DIEXQ_rec, DQUAIQ, DQUAIQ_rec,
DTSTEXQ, DDEDPDQ, DDEDPDQ_rec, DENBCDQ, DENBCDQ_rec, DSCLIQ, DSCLIQ_rec,
DSCRIQ, DSCRIQ_rec, DCTQPQ, DCTQPQ_rec)>;
def : InstRW<[P8_DFU_17C, P8_ISSUE_VSX], (instregex "^D(ADD|SUB|QUA)Q(_rec)?$")>;
def : InstRW<[P8_DFU_25C, P8_ISSUE_VSX], (instrs DRSP, DRSP_rec, DCTFIX, DCTFIX_rec)>;
def : InstRW<[P8_DFU_32C, P8_ISSUE_VSX], (instrs DCFFIX, DCFFIX_rec)>;
def : InstRW<[P8_DFU_34C, P8_ISSUE_VSX], (instrs DCFFIXQ, DCFFIXQ_rec)>;
def : InstRW<[P8_DFU_40C, P8_ISSUE_VSX], (instrs DMUL, DMUL_rec)>;
def : InstRW<[P8_DFU_90C, P8_ISSUE_VSX], (instrs DMULQ, DMULQ_rec)>;
def : InstRW<[P8_DFU_96C, P8_ISSUE_VSX], (instrs DDIV, DDIV_rec)>;
def : InstRW<[P8_DFU_172C, P8_ISSUE_VSX], (instrs DDIVQ, DDIVQ_rec)>;
// Direct move instructions
def : InstRW<[P8_DM_5C, P8_ISSUE_VSX], (instrs
MFVRD, MFVSRD, MFVRWZ, MFVSRWZ, MTVRD, MTVSRD, MTVRWA, MTVSRWA, MTVRWZ, MTVSRWZ)>;
}

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@@ -9,14 +9,14 @@ define i32 @test(i32 %i) {
; CHECK: # %bb.0:
; CHECK-NEXT: addis 4, 2, .LC0@toc@ha
; CHECK-NEXT: extsw 3, 3
; CHECK-NEXT: addis 5, 2, .LC1@toc@ha
; CHECK-NEXT: ld 4, .LC0@toc@l(4)
; CHECK-NEXT: ld 4, 0(4)
; CHECK-NEXT: lbzx 3, 4, 3
; CHECK-NEXT: ld 4, .LC1@toc@l(5)
; CHECK-NEXT: addis 4, 2, .LC1@toc@ha
; CHECK-NEXT: ld 4, .LC1@toc@l(4)
; CHECK-NEXT: subfic 3, 3, 1
; CHECK-NEXT: ld 4, 0(4)
; CHECK-NEXT: extsw 3, 3
; CHECK-NEXT: ld 4, 0(4)
; CHECK-NEXT: sldi 3, 3, 2
; CHECK-NEXT: lwzx 3, 4, 3
; CHECK-NEXT: blr

View File

@@ -202,58 +202,52 @@ define void @_ZN5clang6format22BreakableStringLiteral11insertBreakEjjSt4pairImjE
; CHECK-LABEL: _ZN5clang6format22BreakableStringLiteral11insertBreakEjjSt4pairImjERNS0_17WhitespaceManagerE:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: ld 10, 56(3)
; CHECK-NEXT: lwz 0, 40(3)
; CHECK-NEXT: lwz 4, 40(3)
; CHECK-NEXT: mr 12, 8
; CHECK-NEXT: cmpldi 10, 0
; CHECK-NEXT: beq 0, .LBB0_2
; CHECK-NEXT: # %bb.1: # %if.end.i.i
; CHECK-NEXT: ld 9, 48(3)
; CHECK-NEXT: lbz 4, 0(9)
; CHECK-NEXT: cmpwi 4, 64
; CHECK-NEXT: lbz 8, 0(9)
; CHECK-NEXT: cmpwi 8, 64
; CHECK-NEXT: b .LBB0_3
; CHECK-NEXT: .LBB0_2: # %entry._ZNK4llvm9StringRef10startswithES0_.exit_crit_edge
; CHECK-NEXT: ld 9, 48(3)
; CHECK-NEXT: crxor 2, 2, 2
; CHECK-NEXT: .LBB0_3: # %_ZNK4llvm9StringRef10startswithES0_.exit
; CHECK-NEXT: mflr 4
; CHECK-NEXT: .cfi_def_cfa_offset 160
; CHECK-NEXT: mflr 0
; CHECK-NEXT: .cfi_def_cfa_offset 144
; CHECK-NEXT: .cfi_offset lr, 16
; CHECK-NEXT: .cfi_offset r28, -32
; CHECK-NEXT: .cfi_offset r29, -24
; CHECK-NEXT: .cfi_offset r30, -16
; CHECK-NEXT: std 28, -32(1) # 8-byte Folded Spill
; CHECK-NEXT: std 29, -24(1) # 8-byte Folded Spill
; CHECK-NEXT: std 30, -16(1) # 8-byte Folded Spill
; CHECK-NEXT: stdu 1, -160(1)
; CHECK-NEXT: std 4, 176(1)
; CHECK-NEXT: stdu 1, -144(1)
; CHECK-NEXT: li 8, 0
; CHECK-NEXT: li 11, 1
; CHECK-NEXT: std 0, 160(1)
; CHECK-NEXT: add 5, 6, 5
; CHECK-NEXT: iseleq 30, 11, 8
; CHECK-NEXT: lbz 30, 20(3)
; CHECK-NEXT: clrldi 6, 7, 32
; CHECK-NEXT: iseleq 8, 11, 8
; CHECK-NEXT: ld 11, 64(3)
; CHECK-NEXT: lbz 29, 20(3)
; CHECK-NEXT: lwz 28, 16(3)
; CHECK-NEXT: add 5, 5, 10
; CHECK-NEXT: clrldi 5, 5, 32
; CHECK-NEXT: mr 7, 11
; CHECK-NEXT: sub 0, 4, 8
; CHECK-NEXT: ld 4, 8(3)
; CHECK-NEXT: ld 8, 72(3)
; CHECK-NEXT: sub 3, 0, 30
; CHECK-NEXT: clrldi 5, 5, 32
; CHECK-NEXT: li 0, 1
; CHECK-NEXT: clrldi 6, 7, 32
; CHECK-NEXT: extsw 30, 3
; CHECK-NEXT: lwz 3, 16(3)
; CHECK-NEXT: std 30, 96(1)
; CHECK-NEXT: extsw 0, 0
; CHECK-NEXT: std 3, 112(1)
; CHECK-NEXT: li 3, 1
; CHECK-NEXT: std 0, 120(1)
; CHECK-NEXT: std 3, 104(1)
; CHECK-NEXT: mr 3, 12
; CHECK-NEXT: mr 7, 11
; CHECK-NEXT: std 0, 104(1)
; CHECK-NEXT: std 28, 112(1)
; CHECK-NEXT: std 29, 96(1)
; CHECK-NEXT: std 30, 120(1)
; CHECK-NEXT: bl _ZN5clang6format17WhitespaceManager24replaceWhitespaceInTokenERKNS0_11FormatTokenEjjN4llvm9StringRefES6_bjji
; CHECK-NEXT: nop
; CHECK-NEXT: addi 1, 1, 160
; CHECK-NEXT: addi 1, 1, 144
; CHECK-NEXT: ld 0, 16(1)
; CHECK-NEXT: ld 30, -16(1) # 8-byte Folded Reload
; CHECK-NEXT: ld 29, -24(1) # 8-byte Folded Reload
; CHECK-NEXT: ld 28, -32(1) # 8-byte Folded Reload
; CHECK-NEXT: mtlr 0
; CHECK-NEXT: blr
entry:

View File

@@ -21,8 +21,8 @@ define dso_local signext i32 @caller1(i32 signext %a, i32 signext %b) local_unna
; CHECK-PWR8-NEXT: #APP
; CHECK-PWR8-NEXT: add r3, r3, r4
; CHECK-PWR8-NEXT: #NO_APP
; CHECK-PWR8-NEXT: std r0, 192(r1)
; CHECK-PWR8-NEXT: extsw r3, r3
; CHECK-PWR8-NEXT: std r0, 192(r1)
; CHECK-PWR8-NEXT: bl callee
; CHECK-PWR8-NEXT: nop
; CHECK-PWR8-NEXT: addi r1, r1, 176
@@ -75,8 +75,8 @@ define dso_local signext i32 @caller2(i32 signext %a, i32 signext %b) local_unna
; CHECK-PWR8-NEXT: #APP
; CHECK-PWR8-NEXT: add r3, r3, r4
; CHECK-PWR8-NEXT: #NO_APP
; CHECK-PWR8-NEXT: std r0, 192(r1)
; CHECK-PWR8-NEXT: extsw r3, r3
; CHECK-PWR8-NEXT: std r0, 192(r1)
; CHECK-PWR8-NEXT: bl callee
; CHECK-PWR8-NEXT: nop
; CHECK-PWR8-NEXT: addi r1, r1, 176

View File

@@ -42,10 +42,10 @@ entry:
; CHECK: extsw r3,
; CHECK: bl call
; CHECK: sub r3,
; CHECK: rldicl r3, r3, 1, 63
; CHECK: std r3, [[OFF:[0-9]+]](r1)
; CHECK: #APP
; CHECK: ld r3, [[OFF]](r1)
; CHECK: rldicl r3, r3, 1, 63
; CHECK: xori r3, r3, 1
; CHECK: blr

View File

@@ -22,15 +22,15 @@ define dso_local signext i32 @test_32byte_vector() nounwind {
; CHECK-LE-NEXT: subfic r0, r0, -96
; CHECK-LE-NEXT: stdux r1, r1, r0
; CHECK-LE-NEXT: addis r3, r2, .LCPI0_0@toc@ha
; CHECK-LE-NEXT: addis r4, r2, .LCPI0_1@toc@ha
; CHECK-LE-NEXT: addi r3, r3, .LCPI0_0@toc@l
; CHECK-LE-NEXT: addi r4, r4, .LCPI0_1@toc@l
; CHECK-LE-NEXT: lxvd2x vs0, 0, r3
; CHECK-LE-NEXT: lxvd2x vs1, 0, r4
; CHECK-LE-NEXT: addi r4, r1, 48
; CHECK-LE-NEXT: addi r3, r1, 48
; CHECK-LE-NEXT: stxvd2x vs0, 0, r3
; CHECK-LE-NEXT: addis r3, r2, .LCPI0_1@toc@ha
; CHECK-LE-NEXT: addi r3, r3, .LCPI0_1@toc@l
; CHECK-LE-NEXT: lxvd2x vs0, 0, r3
; CHECK-LE-NEXT: addi r3, r1, 32
; CHECK-LE-NEXT: stxvd2x vs0, 0, r4
; CHECK-LE-NEXT: stxvd2x vs1, 0, r3
; CHECK-LE-NEXT: stxvd2x vs0, 0, r3
; CHECK-LE-NEXT: bl test
; CHECK-LE-NEXT: nop
; CHECK-LE-NEXT: lwa r3, 32(r1)
@@ -158,25 +158,24 @@ define dso_local void @test_Array() nounwind {
; CHECK-LE: # %bb.0: # %entry
; CHECK-LE-NEXT: mflr r0
; CHECK-LE-NEXT: stdu r1, -176(r1)
; CHECK-LE-NEXT: addis r4, r2, Arr1@toc@ha
; CHECK-LE-NEXT: li r3, 0
; CHECK-LE-NEXT: std r0, 192(r1)
; CHECK-LE-NEXT: addis r4, r2, Arr1@toc@ha
; CHECK-LE-NEXT: li r6, 65
; CHECK-LE-NEXT: std r0, 192(r1)
; CHECK-LE-NEXT: addi r5, r1, 46
; CHECK-LE-NEXT: addi r4, r4, Arr1@toc@l
; CHECK-LE-NEXT: stw r3, 44(r1)
; CHECK-LE-NEXT: addi r4, r4, -1
; CHECK-LE-NEXT: addi r4, r4, Arr1@toc@l
; CHECK-LE-NEXT: mtctr r6
; CHECK-LE-NEXT: addi r4, r4, -1
; CHECK-LE-NEXT: bdz .LBB2_2
; CHECK-LE-NEXT: .p2align 5
; CHECK-LE-NEXT: .LBB2_1: # %for.body
; CHECK-LE-NEXT: #
; CHECK-LE-NEXT: lbz r6, 1(r4)
; CHECK-LE-NEXT: addi r7, r5, 2
; CHECK-LE-NEXT: addi r4, r4, 1
; CHECK-LE-NEXT: addi r3, r3, 1
; CHECK-LE-NEXT: sth r6, 2(r5)
; CHECK-LE-NEXT: mr r5, r7
; CHECK-LE-NEXT: addi r5, r5, 2
; CHECK-LE-NEXT: bdnz .LBB2_1
; CHECK-LE-NEXT: .LBB2_2: # %for.cond.cleanup
; CHECK-LE-NEXT: addi r3, r1, 48

View File

@@ -19,8 +19,8 @@ define signext i32 @main() nounwind {
; CHECK-NEXT: addi 6, 1, 46
; CHECK-NEXT: sth 3, 46(1)
; CHECK-NEXT: lis 3, 0
; CHECK-NEXT: ori 3, 3, 33059
; CHECK-NEXT: sync
; CHECK-NEXT: ori 3, 3, 33059
; CHECK-NEXT: .LBB0_1: # %L.entry
; CHECK-NEXT: #
; CHECK-NEXT: lharx 5, 0, 6

View File

@@ -15,7 +15,6 @@ define void @testExpandPostRAPseudo(ptr nocapture readonly %ptr) {
; CHECK-P8: ld r4, .LC0@toc@l(r4)
; CHECK-P8: xxspltw vs0, vs0, 1
; CHECK-P8; stxvd2x vs0, 0, r4
; CHECK-P8: lis r4, 1024
; CHECK-P8: lfiwax f0, 0, r3
; CHECK-P8: addis r3, r2, .LC1@toc@ha
; CHECK-P8: ld r3, .LC1@toc@l(r3)

View File

@@ -86,12 +86,12 @@ entry:
; EXTABI: bb.0.entry:
; EXTABI: liveins: $f1, $x4
; EXTABI-DAG: renamable $f0 = LFD 0, renamable $x4 :: (volatile load (s64) from %ir.b, align 4)
; EXTABI-DAG: renamable $f0 = nofpexcept XSADDDP killed renamable $f0, renamable $f1, implicit $rm
; EXTABI-DAG: renamable $vf31 = nofpexcept XSMULDP killed renamable $f1, renamable $f1, implicit $rm
; EXTABI-DAG: renamable $f0 = nofpexcept XSADDDP killed renamable $f0, $f1, implicit $rm
; EXTABI: STFD killed renamable $f0, 0, renamable $x4 :: (volatile store (s64) into %ir.b, align 4)
; EXTABI-LABEL: INLINEASM
; EXTABI-DAG: renamable $f0 = LFD 0, renamable $x4 :: (volatile load (s64) from %ir.b, align 4)
; EXTABI-DAG: renamable $f0 = nofpexcept XSADDDP killed renamable $vf31, killed renamable $f0, implicit $rm
; EXTABI-DAG: renamable $f0 = nofpexcept XSMULDP killed renamable $vf31, renamable $vf31, implicit $rm
; EXTABI-DAG: renamable $f1 = LFD 0, renamable $x4 :: (volatile load (s64) from %ir.b, align 4)
; EXTABI-DAG: renamable $f0 = nofpexcept XSADDDP killed renamable $f0, killed renamable $f1, implicit $rm
; EXTABI-DAG: STFD killed renamable $f0, 0, renamable $x4 :: (volatile store (s64) into %ir.b, align 4)
; EXTABI: renamable $f1 = LFD 0, killed renamable $x4 :: (volatile load (s64) from %ir.b, align 4)
@@ -144,12 +144,12 @@ entry:
; EXTABI: body: |
; EXTABI-DAG: bb.0.entry:
; EXTABI-DAG: liveins: $v2, $x3
; EXTABI-DAG: renamable $v3 = LXVW4X $zero8, renamable $x3 :: (volatile load (s128) from %ir.b, align 4)
; EXTABI-DAG: renamable $v31 = COPY $v2
; EXTABI-DAG: renamable $v2 = VADDUWM killed renamable $v3, $v2
; EXTABI-LABEL: INLINEASM
; EXTABI-DAG: renamable $v2 = LXVW4X $zero8, renamable $x3 :: (volatile load (s128) from %ir.b, align 4)
; EXTABI-DAG: renamable $v3 = VMULUWM killed renamable $v31, renamable $v31
; EXTABI-DAG: renamable $v2 = VADDUWM killed renamable $v3, killed renamable $v2
; EXTABI-DAG: renamable $v2 = VADDUWM killed renamable $v2, renamable $v31
; EXTABI-LABEL: INLINEASM
; EXTABI-DAG: renamable $v2 = VMULUWM killed renamable $v31, renamable $v31
; EXTABI-DAG: renamable $v3 = LXVW4X $zero8, renamable $x3 :: (volatile load (s128) from %ir.b, align 4)
; EXTABI-DAG: renamable $v2 = VADDUWM killed renamable $v2, killed renamable $v3
; EXTABI-DAG: STXVW4X killed renamable $v2, $zero8, renamable $x3 :: (volatile store (s128) into %ir.b, align 4)
; EXTABI: renamable $v2 = LXVW4X $zero8, killed renamable $x3 :: (volatile load (s128) from %ir.b, align 4)

View File

@@ -36,20 +36,20 @@ define void @test_aix_splatimm(i32 %arg, i32 %arg1, i32 %arg2) {
; CHECK: # %bb.0: # %bb
; CHECK-NEXT: bclr 12, 20, 0
; CHECK-NEXT: # %bb.1: # %bb3
; CHECK-NEXT: slwi 3, 3, 8
; CHECK-NEXT: srwi 4, 4, 16
; CHECK-NEXT: neg 3, 3
; CHECK-NEXT: srwi 5, 5, 16
; CHECK-NEXT: mullw 4, 5, 4
; CHECK-NEXT: lwz 5, 0(3)
; CHECK-NEXT: slwi 3, 3, 8
; CHECK-NEXT: neg 3, 3
; CHECK-NEXT: srwi 5, 5, 1
; CHECK-NEXT: mtvsrd 34, 3
; CHECK-NEXT: li 3, 0
; CHECK-NEXT: srwi 5, 5, 1
; CHECK-NEXT: mullw 4, 4, 5
; CHECK-NEXT: vsplth 2, 2, 3
; CHECK-NEXT: stxvd2x 34, 0, 3
; CHECK-NEXT: neg 4, 4
; CHECK-NEXT: mtvsrd 35, 4
; CHECK-NEXT: vsplth 2, 2, 3
; CHECK-NEXT: stxvd2x 34, 0, 3
; CHECK-NEXT: vsplth 3, 3, 3
; CHECK-NEXT: stxvd2x 35, 0, 3
bb:

View File

@@ -25,9 +25,9 @@ entry:
define <8 x i16> @builds(i16 zeroext %a) {
; CHECK-LABEL: builds:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addi 4, 1, -16
; CHECK-NEXT: sth 3, -16(1)
; CHECK-NEXT: lxvw4x 34, 0, 4
; CHECK-NEXT: addi 3, 1, -16
; CHECK-NEXT: lxvw4x 34, 0, 3
; CHECK-NEXT: vsplth 2, 2, 0
; CHECK-NEXT: blr
entry:
@@ -40,9 +40,9 @@ entry:
define <4 x i32> @buildi(i32 zeroext %a) {
; CHECK-LABEL: buildi:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addi 4, 1, -16
; CHECK-NEXT: stw 3, -16(1)
; CHECK-NEXT: lxvw4x 0, 0, 4
; CHECK-NEXT: addi 3, 1, -16
; CHECK-NEXT: lxvw4x 0, 0, 3
; CHECK-NEXT: xxspltw 34, 0, 0
; CHECK-NEXT: blr
entry:
@@ -55,14 +55,14 @@ entry:
define <2 x i64> @buildl(i64 %a) {
; CHECK-LABEL: buildl:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lwz 5, L..C0(2) # %const.0
; CHECK-NEXT: stw 4, -16(1)
; CHECK-NEXT: stw 3, -32(1)
; CHECK-NEXT: lwz 3, L..C0(2) # %const.0
; CHECK-NEXT: stw 4, -16(1)
; CHECK-NEXT: lxvw4x 34, 0, 3
; CHECK-NEXT: addi 3, 1, -16
; CHECK-NEXT: addi 4, 1, -32
; CHECK-NEXT: lxvw4x 35, 0, 3
; CHECK-NEXT: lxvw4x 36, 0, 4
; CHECK-NEXT: lxvw4x 34, 0, 5
; CHECK-NEXT: addi 3, 1, -32
; CHECK-NEXT: lxvw4x 36, 0, 3
; CHECK-NEXT: vperm 2, 4, 3, 2
; CHECK-NEXT: blr
entry:
@@ -990,11 +990,11 @@ entry:
define i64 @getvelsl(<2 x i64> %vsl, i32 signext %i) {
; CHECK-LABEL: getvelsl:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: add 3, 3, 3
; CHECK-NEXT: add 5, 3, 3
; CHECK-NEXT: addi 4, 1, -16
; CHECK-NEXT: addi 5, 3, 1
; CHECK-NEXT: rlwinm 3, 5, 2, 28, 29
; CHECK-NEXT: addi 5, 5, 1
; CHECK-NEXT: stxvw4x 34, 0, 4
; CHECK-NEXT: rlwinm 3, 3, 2, 28, 29
; CHECK-NEXT: rlwinm 5, 5, 2, 28, 29
; CHECK-NEXT: lwzx 3, 4, 3
; CHECK-NEXT: lwzx 4, 4, 5
@@ -1008,11 +1008,11 @@ entry:
define i64 @getvelul(<2 x i64> %vul, i32 signext %i) {
; CHECK-LABEL: getvelul:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: add 3, 3, 3
; CHECK-NEXT: add 5, 3, 3
; CHECK-NEXT: addi 4, 1, -16
; CHECK-NEXT: addi 5, 3, 1
; CHECK-NEXT: rlwinm 3, 5, 2, 28, 29
; CHECK-NEXT: addi 5, 5, 1
; CHECK-NEXT: stxvw4x 34, 0, 4
; CHECK-NEXT: rlwinm 3, 3, 2, 28, 29
; CHECK-NEXT: rlwinm 5, 5, 2, 28, 29
; CHECK-NEXT: lwzx 3, 4, 3
; CHECK-NEXT: lwzx 4, 4, 5

View File

@@ -32,17 +32,17 @@ define void @test_f2(ptr %P, ptr %Q, ptr %S) {
; AIX-P8-32: # %bb.0:
; AIX-P8-32-NEXT: li r6, 4
; AIX-P8-32-NEXT: lxsiwzx v3, 0, r3
; AIX-P8-32-NEXT: lxsiwzx v5, 0, r4
; AIX-P8-32-NEXT: lxsiwzx v4, 0, r4
; AIX-P8-32-NEXT: lxsiwzx v2, r3, r6
; AIX-P8-32-NEXT: lxsiwzx v4, r4, r6
; AIX-P8-32-NEXT: vmrgow v2, v3, v2
; AIX-P8-32-NEXT: vmrgow v3, v5, v4
; AIX-P8-32-NEXT: lxsiwzx v3, r4, r6
; AIX-P8-32-NEXT: vmrgow v3, v4, v3
; AIX-P8-32-NEXT: xvaddsp vs0, v2, v3
; AIX-P8-32-NEXT: xxsldwi vs1, vs0, vs0, 1
; AIX-P8-32-NEXT: xscvspdpn f0, vs0
; AIX-P8-32-NEXT: xscvspdpn f1, vs1
; AIX-P8-32-NEXT: stfs f0, 0(r5)
; AIX-P8-32-NEXT: stfs f1, 4(r5)
; AIX-P8-32-NEXT: xscvspdpn f0, vs1
; AIX-P8-32-NEXT: stfs f0, 4(r5)
; AIX-P8-32-NEXT: blr
;
; AIX-P9-64-LABEL: test_f2:

View File

@@ -22,12 +22,12 @@ define dso_local void @test_op_ignore() local_unnamed_addr #0 {
; CHECK-NEXT: addis 3, 2, sc@toc@ha
; CHECK-NEXT: std 26, -48(1) # 8-byte Folded Spill
; CHECK-NEXT: std 27, -40(1) # 8-byte Folded Spill
; CHECK-NEXT: addi 4, 3, sc@toc@l
; CHECK-NEXT: std 28, -32(1) # 8-byte Folded Spill
; CHECK-NEXT: std 29, -24(1) # 8-byte Folded Spill
; CHECK-NEXT: addi 4, 3, sc@toc@l
; CHECK-NEXT: li 3, 1
; CHECK-NEXT: std 30, -16(1) # 8-byte Folded Spill
; CHECK-NEXT: sync
; CHECK-NEXT: li 3, 1
; CHECK-NEXT: .LBB0_1: # %entry
; CHECK-NEXT: #
; CHECK-NEXT: lbarx 5, 0, 4
@@ -37,8 +37,8 @@ define dso_local void @test_op_ignore() local_unnamed_addr #0 {
; CHECK-NEXT: # %bb.2: # %entry
; CHECK-NEXT: addis 5, 2, uc@toc@ha
; CHECK-NEXT: lwsync
; CHECK-NEXT: addi 5, 5, uc@toc@l
; CHECK-NEXT: sync
; CHECK-NEXT: addi 5, 5, uc@toc@l
; CHECK-NEXT: .LBB0_3: # %entry
; CHECK-NEXT: #
; CHECK-NEXT: lbarx 6, 0, 5
@@ -48,8 +48,8 @@ define dso_local void @test_op_ignore() local_unnamed_addr #0 {
; CHECK-NEXT: # %bb.4: # %entry
; CHECK-NEXT: addis 6, 2, ss@toc@ha
; CHECK-NEXT: lwsync
; CHECK-NEXT: addi 6, 6, ss@toc@l
; CHECK-NEXT: sync
; CHECK-NEXT: addi 6, 6, ss@toc@l
; CHECK-NEXT: .LBB0_5: # %entry
; CHECK-NEXT: #
; CHECK-NEXT: lharx 7, 0, 6
@@ -59,8 +59,8 @@ define dso_local void @test_op_ignore() local_unnamed_addr #0 {
; CHECK-NEXT: # %bb.6: # %entry
; CHECK-NEXT: addis 7, 2, us@toc@ha
; CHECK-NEXT: lwsync
; CHECK-NEXT: addi 8, 7, us@toc@l
; CHECK-NEXT: sync
; CHECK-NEXT: addi 8, 7, us@toc@l
; CHECK-NEXT: .LBB0_7: # %entry
; CHECK-NEXT: #
; CHECK-NEXT: lharx 7, 0, 8
@@ -70,8 +70,8 @@ define dso_local void @test_op_ignore() local_unnamed_addr #0 {
; CHECK-NEXT: # %bb.8: # %entry
; CHECK-NEXT: addis 7, 2, si@toc@ha
; CHECK-NEXT: lwsync
; CHECK-NEXT: addi 9, 7, si@toc@l
; CHECK-NEXT: sync
; CHECK-NEXT: addi 9, 7, si@toc@l
; CHECK-NEXT: .LBB0_9: # %entry
; CHECK-NEXT: #
; CHECK-NEXT: lwarx 7, 0, 9
@@ -81,8 +81,8 @@ define dso_local void @test_op_ignore() local_unnamed_addr #0 {
; CHECK-NEXT: # %bb.10: # %entry
; CHECK-NEXT: addis 7, 2, ui@toc@ha
; CHECK-NEXT: lwsync
; CHECK-NEXT: addi 10, 7, ui@toc@l
; CHECK-NEXT: sync
; CHECK-NEXT: addi 10, 7, ui@toc@l
; CHECK-NEXT: .LBB0_11: # %entry
; CHECK-NEXT: #
; CHECK-NEXT: lwarx 7, 0, 10
@@ -92,9 +92,9 @@ define dso_local void @test_op_ignore() local_unnamed_addr #0 {
; CHECK-NEXT: # %bb.12: # %entry
; CHECK-NEXT: addis 7, 2, sll@toc@ha
; CHECK-NEXT: lwsync
; CHECK-NEXT: sync
; CHECK-NEXT: addi 11, 7, sll@toc@l
; CHECK-NEXT: li 7, 1
; CHECK-NEXT: sync
; CHECK-NEXT: .LBB0_13: # %entry
; CHECK-NEXT: #
; CHECK-NEXT: ldarx 12, 0, 11
@@ -104,8 +104,8 @@ define dso_local void @test_op_ignore() local_unnamed_addr #0 {
; CHECK-NEXT: # %bb.14: # %entry
; CHECK-NEXT: addis 12, 2, ull@toc@ha
; CHECK-NEXT: lwsync
; CHECK-NEXT: addi 12, 12, ull@toc@l
; CHECK-NEXT: sync
; CHECK-NEXT: addi 12, 12, ull@toc@l
; CHECK-NEXT: .LBB0_15: # %entry
; CHECK-NEXT: #
; CHECK-NEXT: ldarx 30, 0, 12
@@ -329,8 +329,8 @@ define dso_local void @test_op_ignore() local_unnamed_addr #0 {
; CHECK-NEXT: stdcx. 0, 0, 12
; CHECK-NEXT: bne 0, .LBB0_63
; CHECK-NEXT: # %bb.64: # %entry
; CHECK-NEXT: lwsync
; CHECK-NEXT: addis 30, 2, u128@toc@ha
; CHECK-NEXT: lwsync
; CHECK-NEXT: sync
; CHECK-NEXT: addi 0, 30, u128@toc@l
; CHECK-NEXT: li 30, 0
@@ -342,10 +342,10 @@ define dso_local void @test_op_ignore() local_unnamed_addr #0 {
; CHECK-NEXT: stqcx. 26, 0, 0
; CHECK-NEXT: bne 0, .LBB0_65
; CHECK-NEXT: # %bb.66: # %entry
; CHECK-NEXT: lwsync
; CHECK-NEXT: addis 29, 2, s128@toc@ha
; CHECK-NEXT: sync
; CHECK-NEXT: lwsync
; CHECK-NEXT: addi 0, 29, s128@toc@l
; CHECK-NEXT: sync
; CHECK-NEXT: .LBB0_67: # %entry
; CHECK-NEXT: #
; CHECK-NEXT: lqarx 28, 0, 0
@@ -1237,9 +1237,9 @@ define dso_local void @test_fetch_and_op() local_unnamed_addr #0 {
; CHECK-NEXT: addis 4, 2, sc@toc@ha
; CHECK-NEXT: std 22, -80(1) # 8-byte Folded Spill
; CHECK-NEXT: std 23, -72(1) # 8-byte Folded Spill
; CHECK-NEXT: li 3, 11
; CHECK-NEXT: std 24, -64(1) # 8-byte Folded Spill
; CHECK-NEXT: std 25, -56(1) # 8-byte Folded Spill
; CHECK-NEXT: li 3, 11
; CHECK-NEXT: addi 6, 4, sc@toc@l
; CHECK-NEXT: std 26, -48(1) # 8-byte Folded Spill
; CHECK-NEXT: std 27, -40(1) # 8-byte Folded Spill
@@ -1257,8 +1257,8 @@ define dso_local void @test_fetch_and_op() local_unnamed_addr #0 {
; CHECK-NEXT: lwsync
; CHECK-NEXT: stb 5, sc@toc@l(4)
; CHECK-NEXT: addis 5, 2, uc@toc@ha
; CHECK-NEXT: addi 8, 5, uc@toc@l
; CHECK-NEXT: sync
; CHECK-NEXT: addi 8, 5, uc@toc@l
; CHECK-NEXT: .LBB1_3: # %entry
; CHECK-NEXT: #
; CHECK-NEXT: lbarx 7, 0, 8
@@ -1269,8 +1269,8 @@ define dso_local void @test_fetch_and_op() local_unnamed_addr #0 {
; CHECK-NEXT: lwsync
; CHECK-NEXT: stb 7, uc@toc@l(5)
; CHECK-NEXT: addis 7, 2, ss@toc@ha
; CHECK-NEXT: addi 10, 7, ss@toc@l
; CHECK-NEXT: sync
; CHECK-NEXT: addi 10, 7, ss@toc@l
; CHECK-NEXT: .LBB1_5: # %entry
; CHECK-NEXT: #
; CHECK-NEXT: lharx 9, 0, 10
@@ -1281,8 +1281,8 @@ define dso_local void @test_fetch_and_op() local_unnamed_addr #0 {
; CHECK-NEXT: lwsync
; CHECK-NEXT: sth 9, ss@toc@l(7)
; CHECK-NEXT: addis 9, 2, us@toc@ha
; CHECK-NEXT: addi 0, 9, us@toc@l
; CHECK-NEXT: sync
; CHECK-NEXT: addi 0, 9, us@toc@l
; CHECK-NEXT: .LBB1_7: # %entry
; CHECK-NEXT: #
; CHECK-NEXT: lharx 11, 0, 0
@@ -1293,8 +1293,8 @@ define dso_local void @test_fetch_and_op() local_unnamed_addr #0 {
; CHECK-NEXT: addis 12, 2, si@toc@ha
; CHECK-NEXT: lwsync
; CHECK-NEXT: sth 11, us@toc@l(9)
; CHECK-NEXT: addi 29, 12, si@toc@l
; CHECK-NEXT: sync
; CHECK-NEXT: addi 29, 12, si@toc@l
; CHECK-NEXT: .LBB1_9: # %entry
; CHECK-NEXT: #
; CHECK-NEXT: lwarx 11, 0, 29
@@ -1305,8 +1305,8 @@ define dso_local void @test_fetch_and_op() local_unnamed_addr #0 {
; CHECK-NEXT: addis 30, 2, ui@toc@ha
; CHECK-NEXT: lwsync
; CHECK-NEXT: stw 11, si@toc@l(12)
; CHECK-NEXT: addi 27, 30, ui@toc@l
; CHECK-NEXT: sync
; CHECK-NEXT: addi 27, 30, ui@toc@l
; CHECK-NEXT: .LBB1_11: # %entry
; CHECK-NEXT: #
; CHECK-NEXT: lwarx 11, 0, 27
@@ -1318,8 +1318,8 @@ define dso_local void @test_fetch_and_op() local_unnamed_addr #0 {
; CHECK-NEXT: lwsync
; CHECK-NEXT: stw 11, ui@toc@l(30)
; CHECK-NEXT: li 11, 11
; CHECK-NEXT: addi 25, 28, sll@toc@l
; CHECK-NEXT: sync
; CHECK-NEXT: addi 25, 28, sll@toc@l
; CHECK-NEXT: .LBB1_13: # %entry
; CHECK-NEXT: #
; CHECK-NEXT: ldarx 26, 0, 25
@@ -1330,8 +1330,8 @@ define dso_local void @test_fetch_and_op() local_unnamed_addr #0 {
; CHECK-NEXT: lwsync
; CHECK-NEXT: std 26, sll@toc@l(28)
; CHECK-NEXT: addis 26, 2, ull@toc@ha
; CHECK-NEXT: addi 24, 26, ull@toc@l
; CHECK-NEXT: sync
; CHECK-NEXT: addi 24, 26, ull@toc@l
; CHECK-NEXT: .LBB1_15: # %entry
; CHECK-NEXT: #
; CHECK-NEXT: ldarx 23, 0, 24
@@ -2591,11 +2591,11 @@ define dso_local void @test_op_and_fetch() local_unnamed_addr #0 {
; CHECK-NEXT: std 17, -120(1) # 8-byte Folded Spill
; CHECK-NEXT: std 18, -112(1) # 8-byte Folded Spill
; CHECK-NEXT: std 19, -104(1) # 8-byte Folded Spill
; CHECK-NEXT: addi 4, 3, uc@toc@l
; CHECK-NEXT: addi 7, 5, sc@toc@l
; CHECK-NEXT: lbz 6, uc@toc@l(3)
; CHECK-NEXT: std 20, -96(1) # 8-byte Folded Spill
; CHECK-NEXT: std 21, -88(1) # 8-byte Folded Spill
; CHECK-NEXT: addi 4, 3, uc@toc@l
; CHECK-NEXT: addi 7, 5, sc@toc@l
; CHECK-NEXT: std 22, -80(1) # 8-byte Folded Spill
; CHECK-NEXT: std 23, -72(1) # 8-byte Folded Spill
; CHECK-NEXT: std 24, -64(1) # 8-byte Folded Spill
@@ -2628,8 +2628,8 @@ define dso_local void @test_op_and_fetch() local_unnamed_addr #0 {
; CHECK-NEXT: lwsync
; CHECK-NEXT: stb 8, uc@toc@l(3)
; CHECK-NEXT: clrlwi 8, 8, 24
; CHECK-NEXT: addi 9, 6, ss@toc@l
; CHECK-NEXT: sync
; CHECK-NEXT: addi 9, 6, ss@toc@l
; CHECK-NEXT: .LBB2_5: # %entry
; CHECK-NEXT: #
; CHECK-NEXT: lharx 10, 0, 9
@@ -2638,11 +2638,11 @@ define dso_local void @test_op_and_fetch() local_unnamed_addr #0 {
; CHECK-NEXT: bne 0, .LBB2_5
; CHECK-NEXT: # %bb.6: # %entry
; CHECK-NEXT: lwsync
; CHECK-NEXT: sth 10, ss@toc@l(6)
; CHECK-NEXT: addis 8, 2, us@toc@ha
; CHECK-NEXT: sth 10, ss@toc@l(6)
; CHECK-NEXT: lbz 10, uc@toc@l(3)
; CHECK-NEXT: addi 11, 8, us@toc@l
; CHECK-NEXT: sync
; CHECK-NEXT: addi 11, 8, us@toc@l
; CHECK-NEXT: .LBB2_7: # %entry
; CHECK-NEXT: #
; CHECK-NEXT: lharx 12, 0, 11
@@ -2651,11 +2651,11 @@ define dso_local void @test_op_and_fetch() local_unnamed_addr #0 {
; CHECK-NEXT: bne 0, .LBB2_7
; CHECK-NEXT: # %bb.8: # %entry
; CHECK-NEXT: lwsync
; CHECK-NEXT: sth 12, us@toc@l(8)
; CHECK-NEXT: addis 10, 2, si@toc@ha
; CHECK-NEXT: sth 12, us@toc@l(8)
; CHECK-NEXT: lbz 12, uc@toc@l(3)
; CHECK-NEXT: addi 0, 10, si@toc@l
; CHECK-NEXT: sync
; CHECK-NEXT: addi 0, 10, si@toc@l
; CHECK-NEXT: .LBB2_9: # %entry
; CHECK-NEXT: #
; CHECK-NEXT: lwarx 30, 0, 0
@@ -2664,11 +2664,11 @@ define dso_local void @test_op_and_fetch() local_unnamed_addr #0 {
; CHECK-NEXT: bne 0, .LBB2_9
; CHECK-NEXT: # %bb.10: # %entry
; CHECK-NEXT: lwsync
; CHECK-NEXT: stw 30, si@toc@l(10)
; CHECK-NEXT: addis 12, 2, ui@toc@ha
; CHECK-NEXT: stw 30, si@toc@l(10)
; CHECK-NEXT: lbz 30, uc@toc@l(3)
; CHECK-NEXT: addi 29, 12, ui@toc@l
; CHECK-NEXT: sync
; CHECK-NEXT: addi 29, 12, ui@toc@l
; CHECK-NEXT: .LBB2_11: # %entry
; CHECK-NEXT: #
; CHECK-NEXT: lwarx 28, 0, 29
@@ -2677,11 +2677,11 @@ define dso_local void @test_op_and_fetch() local_unnamed_addr #0 {
; CHECK-NEXT: bne 0, .LBB2_11
; CHECK-NEXT: # %bb.12: # %entry
; CHECK-NEXT: lwsync
; CHECK-NEXT: stw 28, ui@toc@l(12)
; CHECK-NEXT: addis 30, 2, sll@toc@ha
; CHECK-NEXT: stw 28, ui@toc@l(12)
; CHECK-NEXT: lbz 28, uc@toc@l(3)
; CHECK-NEXT: addi 27, 30, sll@toc@l
; CHECK-NEXT: sync
; CHECK-NEXT: addi 27, 30, sll@toc@l
; CHECK-NEXT: .LBB2_13: # %entry
; CHECK-NEXT: #
; CHECK-NEXT: ldarx 26, 0, 27
@@ -2693,8 +2693,8 @@ define dso_local void @test_op_and_fetch() local_unnamed_addr #0 {
; CHECK-NEXT: addis 28, 2, ull@toc@ha
; CHECK-NEXT: std 26, sll@toc@l(30)
; CHECK-NEXT: lbz 25, uc@toc@l(3)
; CHECK-NEXT: addi 26, 28, ull@toc@l
; CHECK-NEXT: sync
; CHECK-NEXT: addi 26, 28, ull@toc@l
; CHECK-NEXT: .LBB2_15: # %entry
; CHECK-NEXT: #
; CHECK-NEXT: ldarx 24, 0, 26
@@ -3070,26 +3070,26 @@ define dso_local void @test_op_and_fetch() local_unnamed_addr #0 {
; CHECK-NEXT: bne 0, .LBB2_81
; CHECK-NEXT: # %bb.82: # %entry
; CHECK-NEXT: lwsync
; CHECK-NEXT: lbz 20, uc@toc@l(3)
; CHECK-NEXT: nand 25, 21, 25
; CHECK-NEXT: li 21, -1
; CHECK-NEXT: std 21, 8(23)
; CHECK-NEXT: std 25, u128@toc@l(24)
; CHECK-NEXT: addis 25, 2, s128@toc@ha
; CHECK-NEXT: addis 24, 2, s128@toc@ha
; CHECK-NEXT: lbz 25, uc@toc@l(3)
; CHECK-NEXT: std 21, 8(23)
; CHECK-NEXT: sync
; CHECK-NEXT: addi 24, 25, s128@toc@l
; CHECK-NEXT: addi 23, 24, s128@toc@l
; CHECK-NEXT: .LBB2_83: # %entry
; CHECK-NEXT: #
; CHECK-NEXT: lqarx 18, 0, 24
; CHECK-NEXT: nand 17, 20, 19
; CHECK-NEXT: lqarx 18, 0, 23
; CHECK-NEXT: nand 17, 25, 19
; CHECK-NEXT: nand 16, 22, 18
; CHECK-NEXT: stqcx. 16, 0, 24
; CHECK-NEXT: stqcx. 16, 0, 23
; CHECK-NEXT: bne 0, .LBB2_83
; CHECK-NEXT: # %bb.84: # %entry
; CHECK-NEXT: lwsync
; CHECK-NEXT: std 21, 8(24)
; CHECK-NEXT: nand 23, 19, 20
; CHECK-NEXT: std 23, s128@toc@l(25)
; CHECK-NEXT: std 21, 8(23)
; CHECK-NEXT: nand 25, 19, 25
; CHECK-NEXT: std 25, s128@toc@l(24)
; CHECK-NEXT: lbz 25, uc@toc@l(3)
; CHECK-NEXT: sync
; CHECK-NEXT: .LBB2_85: # %entry
@@ -4358,10 +4358,10 @@ define dso_local void @test_compare_and_swap() local_unnamed_addr #0 {
; CHECK-NEXT: std 28, -32(1) # 8-byte Folded Spill
; CHECK-NEXT: std 29, -24(1) # 8-byte Folded Spill
; CHECK-NEXT: std 30, -16(1) # 8-byte Folded Spill
; CHECK-NEXT: addi 6, 3, uc@toc@l
; CHECK-NEXT: addi 0, 4, sc@toc@l
; CHECK-NEXT: lbz 5, uc@toc@l(3)
; CHECK-NEXT: lbz 8, sc@toc@l(4)
; CHECK-NEXT: addi 6, 3, uc@toc@l
; CHECK-NEXT: addi 0, 4, sc@toc@l
; CHECK-NEXT: sync
; CHECK-NEXT: .LBB3_1: # %entry
; CHECK-NEXT: #
@@ -4388,12 +4388,12 @@ define dso_local void @test_compare_and_swap() local_unnamed_addr #0 {
; CHECK-NEXT: bne 0, .LBB3_4
; CHECK-NEXT: .LBB3_6: # %entry
; CHECK-NEXT: lwsync
; CHECK-NEXT: addis 7, 2, ss@toc@ha
; CHECK-NEXT: stb 5, uc@toc@l(3)
; CHECK-NEXT: lbz 8, sc@toc@l(4)
; CHECK-NEXT: addi 12, 7, ss@toc@l
; CHECK-NEXT: lbz 7, sc@toc@l(4)
; CHECK-NEXT: sync
; CHECK-NEXT: extsb 8, 8
; CHECK-NEXT: extsb 8, 7
; CHECK-NEXT: addis 7, 2, ss@toc@ha
; CHECK-NEXT: addi 12, 7, ss@toc@l
; CHECK-NEXT: .LBB3_7: # %entry
; CHECK-NEXT: #
; CHECK-NEXT: lharx 9, 0, 12
@@ -4406,12 +4406,12 @@ define dso_local void @test_compare_and_swap() local_unnamed_addr #0 {
; CHECK-NEXT: .LBB3_9: # %entry
; CHECK-NEXT: lwsync
; CHECK-NEXT: sth 9, ss@toc@l(7)
; CHECK-NEXT: addis 7, 2, us@toc@ha
; CHECK-NEXT: lbz 8, sc@toc@l(4)
; CHECK-NEXT: lbz 7, sc@toc@l(4)
; CHECK-NEXT: lbz 5, uc@toc@l(3)
; CHECK-NEXT: addi 11, 7, us@toc@l
; CHECK-NEXT: sync
; CHECK-NEXT: extsb 8, 8
; CHECK-NEXT: extsb 8, 7
; CHECK-NEXT: addis 7, 2, us@toc@ha
; CHECK-NEXT: addi 11, 7, us@toc@l
; CHECK-NEXT: .LBB3_10: # %entry
; CHECK-NEXT: #
; CHECK-NEXT: lharx 9, 0, 11
@@ -4424,12 +4424,12 @@ define dso_local void @test_compare_and_swap() local_unnamed_addr #0 {
; CHECK-NEXT: .LBB3_12: # %entry
; CHECK-NEXT: lwsync
; CHECK-NEXT: sth 9, us@toc@l(7)
; CHECK-NEXT: addis 7, 2, si@toc@ha
; CHECK-NEXT: lbz 8, sc@toc@l(4)
; CHECK-NEXT: lbz 7, sc@toc@l(4)
; CHECK-NEXT: lbz 5, uc@toc@l(3)
; CHECK-NEXT: addi 10, 7, si@toc@l
; CHECK-NEXT: sync
; CHECK-NEXT: extsb 8, 8
; CHECK-NEXT: extsb 8, 7
; CHECK-NEXT: addis 7, 2, si@toc@ha
; CHECK-NEXT: addi 10, 7, si@toc@l
; CHECK-NEXT: .LBB3_13: # %entry
; CHECK-NEXT: #
; CHECK-NEXT: lwarx 9, 0, 10
@@ -4442,12 +4442,12 @@ define dso_local void @test_compare_and_swap() local_unnamed_addr #0 {
; CHECK-NEXT: .LBB3_15: # %entry
; CHECK-NEXT: lwsync
; CHECK-NEXT: stw 9, si@toc@l(7)
; CHECK-NEXT: addis 5, 2, ui@toc@ha
; CHECK-NEXT: lbz 8, sc@toc@l(4)
; CHECK-NEXT: lbz 5, sc@toc@l(4)
; CHECK-NEXT: lbz 7, uc@toc@l(3)
; CHECK-NEXT: addi 9, 5, ui@toc@l
; CHECK-NEXT: sync
; CHECK-NEXT: extsb 8, 8
; CHECK-NEXT: extsb 8, 5
; CHECK-NEXT: addis 5, 2, ui@toc@ha
; CHECK-NEXT: addi 9, 5, ui@toc@l
; CHECK-NEXT: .LBB3_16: # %entry
; CHECK-NEXT: #
; CHECK-NEXT: lwarx 30, 0, 9
@@ -4477,8 +4477,8 @@ define dso_local void @test_compare_and_swap() local_unnamed_addr #0 {
; CHECK-NEXT: bne 0, .LBB3_19
; CHECK-NEXT: .LBB3_21: # %entry
; CHECK-NEXT: lwsync
; CHECK-NEXT: std 28, sll@toc@l(30)
; CHECK-NEXT: addis 29, 2, ull@toc@ha
; CHECK-NEXT: std 28, sll@toc@l(30)
; CHECK-NEXT: lbz 7, sc@toc@l(4)
; CHECK-NEXT: lbz 30, uc@toc@l(3)
; CHECK-NEXT: sync
@@ -4511,8 +4511,8 @@ define dso_local void @test_compare_and_swap() local_unnamed_addr #0 {
; CHECK-NEXT: .LBB3_27: # %entry
; CHECK-NEXT: xor 0, 28, 30
; CHECK-NEXT: lwsync
; CHECK-NEXT: cntlzw 0, 0
; CHECK-NEXT: lbz 30, sc@toc@l(4)
; CHECK-NEXT: cntlzw 0, 0
; CHECK-NEXT: srwi 0, 0, 5
; CHECK-NEXT: stw 0, ui@toc@l(5)
; CHECK-NEXT: lbz 0, uc@toc@l(3)
@@ -4529,12 +4529,12 @@ define dso_local void @test_compare_and_swap() local_unnamed_addr #0 {
; CHECK-NEXT: .LBB3_30: # %entry
; CHECK-NEXT: xor 6, 29, 0
; CHECK-NEXT: lwsync
; CHECK-NEXT: cntlzw 6, 6
; CHECK-NEXT: lbz 0, sc@toc@l(4)
; CHECK-NEXT: cntlzw 6, 6
; CHECK-NEXT: extsb 0, 0
; CHECK-NEXT: srwi 6, 6, 5
; CHECK-NEXT: stw 6, ui@toc@l(5)
; CHECK-NEXT: lbz 6, uc@toc@l(3)
; CHECK-NEXT: extsb 0, 0
; CHECK-NEXT: sync
; CHECK-NEXT: .LBB3_31: # %entry
; CHECK-NEXT: #
@@ -4548,12 +4548,12 @@ define dso_local void @test_compare_and_swap() local_unnamed_addr #0 {
; CHECK-NEXT: .LBB3_33: # %entry
; CHECK-NEXT: xor 6, 30, 6
; CHECK-NEXT: lwsync
; CHECK-NEXT: cntlzw 6, 6
; CHECK-NEXT: lbz 12, sc@toc@l(4)
; CHECK-NEXT: cntlzw 6, 6
; CHECK-NEXT: extsb 12, 12
; CHECK-NEXT: srwi 6, 6, 5
; CHECK-NEXT: stw 6, ui@toc@l(5)
; CHECK-NEXT: lbz 6, uc@toc@l(3)
; CHECK-NEXT: extsb 12, 12
; CHECK-NEXT: sync
; CHECK-NEXT: .LBB3_34: # %entry
; CHECK-NEXT: #
@@ -4567,12 +4567,12 @@ define dso_local void @test_compare_and_swap() local_unnamed_addr #0 {
; CHECK-NEXT: .LBB3_36: # %entry
; CHECK-NEXT: xor 6, 0, 6
; CHECK-NEXT: lwsync
; CHECK-NEXT: cntlzw 6, 6
; CHECK-NEXT: lbz 11, sc@toc@l(4)
; CHECK-NEXT: cntlzw 6, 6
; CHECK-NEXT: extsb 11, 11
; CHECK-NEXT: srwi 6, 6, 5
; CHECK-NEXT: stw 6, ui@toc@l(5)
; CHECK-NEXT: lbz 6, uc@toc@l(3)
; CHECK-NEXT: extsb 11, 11
; CHECK-NEXT: sync
; CHECK-NEXT: .LBB3_37: # %entry
; CHECK-NEXT: #
@@ -4586,12 +4586,12 @@ define dso_local void @test_compare_and_swap() local_unnamed_addr #0 {
; CHECK-NEXT: .LBB3_39: # %entry
; CHECK-NEXT: xor 6, 12, 6
; CHECK-NEXT: lwsync
; CHECK-NEXT: cntlzw 6, 6
; CHECK-NEXT: lbz 10, sc@toc@l(4)
; CHECK-NEXT: cntlzw 6, 6
; CHECK-NEXT: extsb 10, 10
; CHECK-NEXT: srwi 6, 6, 5
; CHECK-NEXT: stw 6, ui@toc@l(5)
; CHECK-NEXT: lbz 6, uc@toc@l(3)
; CHECK-NEXT: extsb 10, 10
; CHECK-NEXT: sync
; CHECK-NEXT: .LBB3_40: # %entry
; CHECK-NEXT: #
@@ -4605,12 +4605,12 @@ define dso_local void @test_compare_and_swap() local_unnamed_addr #0 {
; CHECK-NEXT: .LBB3_42: # %entry
; CHECK-NEXT: xor 6, 11, 6
; CHECK-NEXT: lwsync
; CHECK-NEXT: cntlzw 6, 6
; CHECK-NEXT: lbz 9, sc@toc@l(4)
; CHECK-NEXT: cntlzw 6, 6
; CHECK-NEXT: extsb 9, 9
; CHECK-NEXT: srwi 6, 6, 5
; CHECK-NEXT: stw 6, ui@toc@l(5)
; CHECK-NEXT: lbz 6, uc@toc@l(3)
; CHECK-NEXT: extsb 9, 9
; CHECK-NEXT: sync
; CHECK-NEXT: .LBB3_43: # %entry
; CHECK-NEXT: #
@@ -4624,12 +4624,12 @@ define dso_local void @test_compare_and_swap() local_unnamed_addr #0 {
; CHECK-NEXT: .LBB3_45: # %entry
; CHECK-NEXT: xor 6, 10, 6
; CHECK-NEXT: lwsync
; CHECK-NEXT: cntlzd 6, 6
; CHECK-NEXT: lbz 4, sc@toc@l(4)
; CHECK-NEXT: lbz 3, uc@toc@l(3)
; CHECK-NEXT: cntlzd 6, 6
; CHECK-NEXT: extsb 4, 4
; CHECK-NEXT: rldicl 6, 6, 58, 63
; CHECK-NEXT: stw 6, ui@toc@l(5)
; CHECK-NEXT: extsb 4, 4
; CHECK-NEXT: sync
; CHECK-NEXT: .LBB3_46: # %entry
; CHECK-NEXT: #
@@ -4643,9 +4643,9 @@ define dso_local void @test_compare_and_swap() local_unnamed_addr #0 {
; CHECK-NEXT: .LBB3_48: # %entry
; CHECK-NEXT: xor 3, 6, 3
; CHECK-NEXT: lwsync
; CHECK-NEXT: cntlzd 3, 3
; CHECK-NEXT: ld 30, -16(1) # 8-byte Folded Reload
; CHECK-NEXT: ld 29, -24(1) # 8-byte Folded Reload
; CHECK-NEXT: cntlzd 3, 3
; CHECK-NEXT: ld 28, -32(1) # 8-byte Folded Reload
; CHECK-NEXT: ld 27, -40(1) # 8-byte Folded Reload
; CHECK-NEXT: rldicl 3, 3, 58, 63
@@ -5169,8 +5169,8 @@ define dso_local void @test_lock() local_unnamed_addr #0 {
; CHECK-LABEL: test_lock:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addis 3, 2, sc@toc@ha
; CHECK-NEXT: li 7, 1
; CHECK-NEXT: sync
; CHECK-NEXT: li 7, 1
; CHECK-NEXT: addi 4, 3, sc@toc@l
; CHECK-NEXT: .LBB4_1: # %entry
; CHECK-NEXT: #
@@ -5181,8 +5181,8 @@ define dso_local void @test_lock() local_unnamed_addr #0 {
; CHECK-NEXT: addis 4, 2, uc@toc@ha
; CHECK-NEXT: lwsync
; CHECK-NEXT: stb 5, sc@toc@l(3)
; CHECK-NEXT: addi 6, 4, uc@toc@l
; CHECK-NEXT: sync
; CHECK-NEXT: addi 6, 4, uc@toc@l
; CHECK-NEXT: .LBB4_3: # %entry
; CHECK-NEXT: #
; CHECK-NEXT: lbarx 5, 0, 6
@@ -5192,8 +5192,8 @@ define dso_local void @test_lock() local_unnamed_addr #0 {
; CHECK-NEXT: lwsync
; CHECK-NEXT: stb 5, uc@toc@l(4)
; CHECK-NEXT: addis 5, 2, ss@toc@ha
; CHECK-NEXT: addi 8, 5, ss@toc@l
; CHECK-NEXT: sync
; CHECK-NEXT: addi 8, 5, ss@toc@l
; CHECK-NEXT: .LBB4_5: # %entry
; CHECK-NEXT: #
; CHECK-NEXT: lharx 6, 0, 8
@@ -5203,8 +5203,8 @@ define dso_local void @test_lock() local_unnamed_addr #0 {
; CHECK-NEXT: lwsync
; CHECK-NEXT: sth 6, ss@toc@l(5)
; CHECK-NEXT: addis 6, 2, us@toc@ha
; CHECK-NEXT: addi 9, 6, us@toc@l
; CHECK-NEXT: sync
; CHECK-NEXT: addi 9, 6, us@toc@l
; CHECK-NEXT: .LBB4_7: # %entry
; CHECK-NEXT: #
; CHECK-NEXT: lharx 8, 0, 9
@@ -5214,8 +5214,8 @@ define dso_local void @test_lock() local_unnamed_addr #0 {
; CHECK-NEXT: lwsync
; CHECK-NEXT: sth 8, us@toc@l(6)
; CHECK-NEXT: addis 8, 2, si@toc@ha
; CHECK-NEXT: addi 10, 8, si@toc@l
; CHECK-NEXT: sync
; CHECK-NEXT: addi 10, 8, si@toc@l
; CHECK-NEXT: .LBB4_9: # %entry
; CHECK-NEXT: #
; CHECK-NEXT: lwarx 9, 0, 10
@@ -5225,8 +5225,8 @@ define dso_local void @test_lock() local_unnamed_addr #0 {
; CHECK-NEXT: lwsync
; CHECK-NEXT: stw 9, si@toc@l(8)
; CHECK-NEXT: addis 9, 2, ui@toc@ha
; CHECK-NEXT: addi 11, 9, ui@toc@l
; CHECK-NEXT: sync
; CHECK-NEXT: addi 11, 9, ui@toc@l
; CHECK-NEXT: .LBB4_11: # %entry
; CHECK-NEXT: #
; CHECK-NEXT: lwarx 10, 0, 11
@@ -5237,8 +5237,8 @@ define dso_local void @test_lock() local_unnamed_addr #0 {
; CHECK-NEXT: lwsync
; CHECK-NEXT: stw 10, ui@toc@l(9)
; CHECK-NEXT: li 11, 1
; CHECK-NEXT: addi 10, 7, sll@toc@l
; CHECK-NEXT: sync
; CHECK-NEXT: addi 10, 7, sll@toc@l
; CHECK-NEXT: .LBB4_13: # %entry
; CHECK-NEXT: #
; CHECK-NEXT: ldarx 12, 0, 10
@@ -5248,8 +5248,8 @@ define dso_local void @test_lock() local_unnamed_addr #0 {
; CHECK-NEXT: addis 10, 2, ull@toc@ha
; CHECK-NEXT: lwsync
; CHECK-NEXT: std 12, sll@toc@l(7)
; CHECK-NEXT: addi 0, 10, ull@toc@l
; CHECK-NEXT: sync
; CHECK-NEXT: addi 0, 10, ull@toc@l
; CHECK-NEXT: .LBB4_15: # %entry
; CHECK-NEXT: #
; CHECK-NEXT: ldarx 12, 0, 0
@@ -5506,8 +5506,8 @@ define dso_local void @test_atomic() local_unnamed_addr #0 {
; CHECK-NEXT: .LBB5_3: # %entry
; CHECK-NEXT: stw 5, ui@toc@l(4)
; CHECK-NEXT: addis 5, 2, si@toc@ha
; CHECK-NEXT: addi 7, 5, si@toc@l
; CHECK-NEXT: sync
; CHECK-NEXT: addi 7, 5, si@toc@l
; CHECK-NEXT: .LBB5_4: # %entry
; CHECK-NEXT: #
; CHECK-NEXT: lwarx 8, 0, 7

View File

@@ -5,10 +5,10 @@ define dso_local ptr @foo(i32 noundef zeroext %arg, ptr nocapture noundef readon
; CHECK-LABEL: foo:
; CHECK: # %bb.0: # %bb
; CHECK-NEXT: rlwinm r3, r3, 31, 17, 28
; CHECK-NEXT: ldx r4, r4, r3
; CHECK-NEXT: clrldi r3, r4, 56
; CHECK-NEXT: add r3, r5, r3
; CHECK-NEXT: std r4, 0(r5)
; CHECK-NEXT: ldx r3, r4, r3
; CHECK-NEXT: clrldi r4, r3, 56
; CHECK-NEXT: std r3, 0(r5)
; CHECK-NEXT: add r3, r5, r4
; CHECK-NEXT: blr
bb:
%i = lshr i32 %arg, 1

View File

@@ -6,12 +6,12 @@ define dso_local signext i32 @main(i32 signext %argc, ptr %argv) {
; CHECK-LABEL: main:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: stw 3, -4(1)
; CHECK-NEXT: li 3, 0
; CHECK-NEXT: addi 4, 1, -4
; CHECK-NEXT: addi 3, 1, -4
; CHECK-NEXT: #APP
; CHECK-NEXT: .ascii "-1@0(4)"
; CHECK-NEXT: .ascii "-1@0(3)"
; CHECK-NEXT: .byte 0
; CHECK-NEXT: #NO_APP
; CHECK-NEXT: li 3, 0
; CHECK-NEXT: blr
entry:
call void asm sideeffect " .asciz \22${0:n}@${1:I}$1\22 ", "n,nZr"(i32 1, i32 %argc)

View File

@@ -361,9 +361,9 @@ define dso_local i128 @lq_seqcst(ptr %src) {
; P8-NEXT: lq r4, 0(r3)
; P8-NEXT: cmpd cr7, r5, r5
; P8-NEXT: mr r3, r4
; P8-NEXT: mr r4, r5
; P8-NEXT: bne- cr7, .+4
; P8-NEXT: isync
; P8-NEXT: mr r4, r5
; P8-NEXT: blr
;
; PWR7-LABEL: lq_seqcst:
@@ -397,9 +397,9 @@ define dso_local i128 @lq_seqcst(ptr %src) {
; AIX64-PWR8-NEXT: lq r4, 0(r3)
; AIX64-PWR8-NEXT: cmpd cr7, r5, r5
; AIX64-PWR8-NEXT: mr r3, r4
; AIX64-PWR8-NEXT: mr r4, r5
; AIX64-PWR8-NEXT: bne- cr7, $+4
; AIX64-PWR8-NEXT: isync
; AIX64-PWR8-NEXT: mr r4, r5
; AIX64-PWR8-NEXT: blr
;
; PPC-PWR8-LABEL: lq_seqcst:
@@ -552,10 +552,10 @@ define dso_local void @stqx_unordered(i128 %val, ptr %dst, i64 %idx) {
; PPC-PWR8-NEXT: stw r6, 28(r1)
; PPC-PWR8-NEXT: stw r5, 24(r1)
; PPC-PWR8-NEXT: addi r5, r1, 16
; PPC-PWR8-NEXT: add r6, r7, r8
; PPC-PWR8-NEXT: stw r4, 20(r1)
; PPC-PWR8-NEXT: stw r3, 16(r1)
; PPC-PWR8-NEXT: li r3, 16
; PPC-PWR8-NEXT: add r6, r7, r8
; PPC-PWR8-NEXT: mr r4, r6
; PPC-PWR8-NEXT: li r6, 0
; PPC-PWR8-NEXT: bl __atomic_store
@@ -572,11 +572,11 @@ entry:
define dso_local void @stq_big_offset_unordered(i128 %val, ptr %dst) {
; P8-LABEL: stq_big_offset_unordered:
; P8: # %bb.0: # %entry
; P8-NEXT: lis r6, 32
; P8-NEXT: mr r9, r4
; P8-NEXT: mr r8, r3
; P8-NEXT: add r3, r5, r6
; P8-NEXT: stq r8, 0(r3)
; P8-NEXT: mr r7, r4
; P8-NEXT: mr r6, r3
; P8-NEXT: lis r3, 32
; P8-NEXT: add r3, r5, r3
; P8-NEXT: stq r6, 0(r3)
; P8-NEXT: blr
;
; PWR7-LABEL: stq_big_offset_unordered:
@@ -600,20 +600,20 @@ define dso_local void @stq_big_offset_unordered(i128 %val, ptr %dst) {
;
; LE-PWR8-LABEL: stq_big_offset_unordered:
; LE-PWR8: # %bb.0: # %entry
; LE-PWR8-NEXT: lis r6, 32
; LE-PWR8-NEXT: mr r9, r3
; LE-PWR8-NEXT: mr r8, r4
; LE-PWR8-NEXT: add r3, r5, r6
; LE-PWR8-NEXT: stq r8, 0(r3)
; LE-PWR8-NEXT: mr r7, r3
; LE-PWR8-NEXT: mr r6, r4
; LE-PWR8-NEXT: lis r3, 32
; LE-PWR8-NEXT: add r3, r5, r3
; LE-PWR8-NEXT: stq r6, 0(r3)
; LE-PWR8-NEXT: blr
;
; AIX64-PWR8-LABEL: stq_big_offset_unordered:
; AIX64-PWR8: # %bb.0: # %entry
; AIX64-PWR8-NEXT: lis r6, 32
; AIX64-PWR8-NEXT: mr r9, r4
; AIX64-PWR8-NEXT: mr r8, r3
; AIX64-PWR8-NEXT: add r3, r5, r6
; AIX64-PWR8-NEXT: stq r8, 0(r3)
; AIX64-PWR8-NEXT: mr r7, r4
; AIX64-PWR8-NEXT: mr r6, r3
; AIX64-PWR8-NEXT: lis r3, 32
; AIX64-PWR8-NEXT: add r3, r5, r3
; AIX64-PWR8-NEXT: stq r6, 0(r3)
; AIX64-PWR8-NEXT: blr
;
; PPC-PWR8-LABEL: stq_big_offset_unordered:

View File

@@ -98,10 +98,10 @@ define i128 @swap(ptr %a, i128 %x) {
; PPC-PWR8-NEXT: stw r7, 40(r1)
; PPC-PWR8-NEXT: stw r6, 36(r1)
; PPC-PWR8-NEXT: addi r6, r1, 16
; PPC-PWR8-NEXT: li r3, 16
; PPC-PWR8-NEXT: li r7, 5
; PPC-PWR8-NEXT: stw r5, 32(r1)
; PPC-PWR8-NEXT: addi r5, r1, 32
; PPC-PWR8-NEXT: li r3, 16
; PPC-PWR8-NEXT: li r7, 5
; PPC-PWR8-NEXT: stw r8, 44(r1)
; PPC-PWR8-NEXT: bl __atomic_exchange
; PPC-PWR8-NEXT: lwz r6, 28(r1)
@@ -199,18 +199,18 @@ define i128 @add(ptr %a, i128 %x) {
; PPC-PWR8-NEXT: stw r27, 60(r1) # 4-byte Folded Spill
; PPC-PWR8-NEXT: mr r27, r5
; PPC-PWR8-NEXT: mr r26, r3
; PPC-PWR8-NEXT: lwz r5, 8(r3)
; PPC-PWR8-NEXT: lwz r4, 4(r3)
; PPC-PWR8-NEXT: stw r28, 64(r1) # 4-byte Folded Spill
; PPC-PWR8-NEXT: mr r28, r6
; PPC-PWR8-NEXT: lwz r6, 12(r3)
; PPC-PWR8-NEXT: lwz r3, 0(r3)
; PPC-PWR8-NEXT: stw r24, 48(r1) # 4-byte Folded Spill
; PPC-PWR8-NEXT: addi r24, r1, 16
; PPC-PWR8-NEXT: lwz r5, 8(r3)
; PPC-PWR8-NEXT: lwz r4, 4(r3)
; PPC-PWR8-NEXT: stw r25, 52(r1) # 4-byte Folded Spill
; PPC-PWR8-NEXT: addi r25, r1, 32
; PPC-PWR8-NEXT: lwz r3, 0(r3)
; PPC-PWR8-NEXT: stw r29, 68(r1) # 4-byte Folded Spill
; PPC-PWR8-NEXT: mr r29, r7
; PPC-PWR8-NEXT: addi r25, r1, 32
; PPC-PWR8-NEXT: addi r24, r1, 16
; PPC-PWR8-NEXT: stw r30, 72(r1) # 4-byte Folded Spill
; PPC-PWR8-NEXT: mr r30, r8
; PPC-PWR8-NEXT: .p2align 4
@@ -223,23 +223,24 @@ define i128 @add(ptr %a, i128 %x) {
; PPC-PWR8-NEXT: stw r5, 40(r1)
; PPC-PWR8-NEXT: stw r6, 44(r1)
; PPC-PWR8-NEXT: mr r5, r25
; PPC-PWR8-NEXT: mr r6, r24
; PPC-PWR8-NEXT: adde r4, r4, r28
; PPC-PWR8-NEXT: stw r7, 28(r1)
; PPC-PWR8-NEXT: stw r8, 24(r1)
; PPC-PWR8-NEXT: mr r6, r24
; PPC-PWR8-NEXT: li r7, 5
; PPC-PWR8-NEXT: adde r3, r3, r27
; PPC-PWR8-NEXT: stw r8, 24(r1)
; PPC-PWR8-NEXT: li r8, 5
; PPC-PWR8-NEXT: stw r4, 20(r1)
; PPC-PWR8-NEXT: mr r4, r26
; PPC-PWR8-NEXT: li r7, 5
; PPC-PWR8-NEXT: stw r3, 16(r1)
; PPC-PWR8-NEXT: li r3, 16
; PPC-PWR8-NEXT: li r8, 5
; PPC-PWR8-NEXT: bl __atomic_compare_exchange
; PPC-PWR8-NEXT: cmplwi r3, 0
; PPC-PWR8-NEXT: mr r7, r3
; PPC-PWR8-NEXT: lwz r6, 44(r1)
; PPC-PWR8-NEXT: lwz r5, 40(r1)
; PPC-PWR8-NEXT: lwz r4, 36(r1)
; PPC-PWR8-NEXT: lwz r3, 32(r1)
; PPC-PWR8-NEXT: cmplwi r7, 0
; PPC-PWR8-NEXT: beq cr0, .LBB1_1
; PPC-PWR8-NEXT: # %bb.2: # %atomicrmw.end
; PPC-PWR8-NEXT: lwz r30, 72(r1) # 4-byte Folded Reload
@@ -340,18 +341,18 @@ define i128 @sub(ptr %a, i128 %x) {
; PPC-PWR8-NEXT: stw r27, 60(r1) # 4-byte Folded Spill
; PPC-PWR8-NEXT: mr r27, r5
; PPC-PWR8-NEXT: mr r26, r3
; PPC-PWR8-NEXT: lwz r5, 8(r3)
; PPC-PWR8-NEXT: lwz r4, 4(r3)
; PPC-PWR8-NEXT: stw r28, 64(r1) # 4-byte Folded Spill
; PPC-PWR8-NEXT: mr r28, r6
; PPC-PWR8-NEXT: lwz r6, 12(r3)
; PPC-PWR8-NEXT: lwz r3, 0(r3)
; PPC-PWR8-NEXT: stw r24, 48(r1) # 4-byte Folded Spill
; PPC-PWR8-NEXT: addi r24, r1, 16
; PPC-PWR8-NEXT: lwz r5, 8(r3)
; PPC-PWR8-NEXT: lwz r4, 4(r3)
; PPC-PWR8-NEXT: stw r25, 52(r1) # 4-byte Folded Spill
; PPC-PWR8-NEXT: addi r25, r1, 32
; PPC-PWR8-NEXT: lwz r3, 0(r3)
; PPC-PWR8-NEXT: stw r29, 68(r1) # 4-byte Folded Spill
; PPC-PWR8-NEXT: mr r29, r7
; PPC-PWR8-NEXT: addi r25, r1, 32
; PPC-PWR8-NEXT: addi r24, r1, 16
; PPC-PWR8-NEXT: stw r30, 72(r1) # 4-byte Folded Spill
; PPC-PWR8-NEXT: mr r30, r8
; PPC-PWR8-NEXT: .p2align 4
@@ -364,23 +365,24 @@ define i128 @sub(ptr %a, i128 %x) {
; PPC-PWR8-NEXT: stw r5, 40(r1)
; PPC-PWR8-NEXT: stw r6, 44(r1)
; PPC-PWR8-NEXT: mr r5, r25
; PPC-PWR8-NEXT: mr r6, r24
; PPC-PWR8-NEXT: subfe r4, r28, r4
; PPC-PWR8-NEXT: stw r7, 28(r1)
; PPC-PWR8-NEXT: stw r8, 24(r1)
; PPC-PWR8-NEXT: mr r6, r24
; PPC-PWR8-NEXT: li r7, 5
; PPC-PWR8-NEXT: subfe r3, r27, r3
; PPC-PWR8-NEXT: stw r8, 24(r1)
; PPC-PWR8-NEXT: li r8, 5
; PPC-PWR8-NEXT: stw r4, 20(r1)
; PPC-PWR8-NEXT: mr r4, r26
; PPC-PWR8-NEXT: li r7, 5
; PPC-PWR8-NEXT: stw r3, 16(r1)
; PPC-PWR8-NEXT: li r3, 16
; PPC-PWR8-NEXT: li r8, 5
; PPC-PWR8-NEXT: bl __atomic_compare_exchange
; PPC-PWR8-NEXT: cmplwi r3, 0
; PPC-PWR8-NEXT: mr r7, r3
; PPC-PWR8-NEXT: lwz r6, 44(r1)
; PPC-PWR8-NEXT: lwz r5, 40(r1)
; PPC-PWR8-NEXT: lwz r4, 36(r1)
; PPC-PWR8-NEXT: lwz r3, 32(r1)
; PPC-PWR8-NEXT: cmplwi r7, 0
; PPC-PWR8-NEXT: beq cr0, .LBB2_1
; PPC-PWR8-NEXT: # %bb.2: # %atomicrmw.end
; PPC-PWR8-NEXT: lwz r30, 72(r1) # 4-byte Folded Reload
@@ -481,47 +483,48 @@ define i128 @and(ptr %a, i128 %x) {
; PPC-PWR8-NEXT: stw r27, 60(r1) # 4-byte Folded Spill
; PPC-PWR8-NEXT: mr r27, r5
; PPC-PWR8-NEXT: mr r26, r3
; PPC-PWR8-NEXT: lwz r5, 8(r3)
; PPC-PWR8-NEXT: lwz r4, 4(r3)
; PPC-PWR8-NEXT: stw r28, 64(r1) # 4-byte Folded Spill
; PPC-PWR8-NEXT: mr r28, r6
; PPC-PWR8-NEXT: lwz r6, 12(r3)
; PPC-PWR8-NEXT: lwz r3, 0(r3)
; PPC-PWR8-NEXT: stw r24, 48(r1) # 4-byte Folded Spill
; PPC-PWR8-NEXT: addi r24, r1, 16
; PPC-PWR8-NEXT: lwz r5, 8(r3)
; PPC-PWR8-NEXT: lwz r4, 4(r3)
; PPC-PWR8-NEXT: stw r25, 52(r1) # 4-byte Folded Spill
; PPC-PWR8-NEXT: addi r25, r1, 32
; PPC-PWR8-NEXT: lwz r3, 0(r3)
; PPC-PWR8-NEXT: stw r29, 68(r1) # 4-byte Folded Spill
; PPC-PWR8-NEXT: mr r29, r7
; PPC-PWR8-NEXT: addi r25, r1, 32
; PPC-PWR8-NEXT: addi r24, r1, 16
; PPC-PWR8-NEXT: stw r30, 72(r1) # 4-byte Folded Spill
; PPC-PWR8-NEXT: mr r30, r8
; PPC-PWR8-NEXT: .p2align 4
; PPC-PWR8-NEXT: .LBB3_1: # %atomicrmw.start
; PPC-PWR8-NEXT: #
; PPC-PWR8-NEXT: stw r3, 32(r1)
; PPC-PWR8-NEXT: stw r4, 36(r1)
; PPC-PWR8-NEXT: and r7, r5, r29
; PPC-PWR8-NEXT: and r8, r6, r30
; PPC-PWR8-NEXT: and r3, r3, r27
; PPC-PWR8-NEXT: stw r4, 36(r1)
; PPC-PWR8-NEXT: and r4, r4, r28
; PPC-PWR8-NEXT: and r7, r5, r29
; PPC-PWR8-NEXT: stw r5, 40(r1)
; PPC-PWR8-NEXT: and r5, r6, r30
; PPC-PWR8-NEXT: stw r6, 44(r1)
; PPC-PWR8-NEXT: mr r5, r25
; PPC-PWR8-NEXT: mr r6, r24
; PPC-PWR8-NEXT: stw r8, 28(r1)
; PPC-PWR8-NEXT: stw r5, 28(r1)
; PPC-PWR8-NEXT: stw r7, 24(r1)
; PPC-PWR8-NEXT: mr r5, r25
; PPC-PWR8-NEXT: li r7, 5
; PPC-PWR8-NEXT: li r8, 5
; PPC-PWR8-NEXT: stw r4, 20(r1)
; PPC-PWR8-NEXT: stw r3, 16(r1)
; PPC-PWR8-NEXT: li r3, 16
; PPC-PWR8-NEXT: mr r4, r26
; PPC-PWR8-NEXT: mr r6, r24
; PPC-PWR8-NEXT: li r8, 5
; PPC-PWR8-NEXT: bl __atomic_compare_exchange
; PPC-PWR8-NEXT: cmplwi r3, 0
; PPC-PWR8-NEXT: mr r7, r3
; PPC-PWR8-NEXT: lwz r6, 44(r1)
; PPC-PWR8-NEXT: lwz r5, 40(r1)
; PPC-PWR8-NEXT: lwz r4, 36(r1)
; PPC-PWR8-NEXT: lwz r3, 32(r1)
; PPC-PWR8-NEXT: cmplwi r7, 0
; PPC-PWR8-NEXT: beq cr0, .LBB3_1
; PPC-PWR8-NEXT: # %bb.2: # %atomicrmw.end
; PPC-PWR8-NEXT: lwz r30, 72(r1) # 4-byte Folded Reload
@@ -622,47 +625,48 @@ define i128 @or(ptr %a, i128 %x) {
; PPC-PWR8-NEXT: stw r27, 60(r1) # 4-byte Folded Spill
; PPC-PWR8-NEXT: mr r27, r5
; PPC-PWR8-NEXT: mr r26, r3
; PPC-PWR8-NEXT: lwz r5, 8(r3)
; PPC-PWR8-NEXT: lwz r4, 4(r3)
; PPC-PWR8-NEXT: stw r28, 64(r1) # 4-byte Folded Spill
; PPC-PWR8-NEXT: mr r28, r6
; PPC-PWR8-NEXT: lwz r6, 12(r3)
; PPC-PWR8-NEXT: lwz r3, 0(r3)
; PPC-PWR8-NEXT: stw r24, 48(r1) # 4-byte Folded Spill
; PPC-PWR8-NEXT: addi r24, r1, 16
; PPC-PWR8-NEXT: lwz r5, 8(r3)
; PPC-PWR8-NEXT: lwz r4, 4(r3)
; PPC-PWR8-NEXT: stw r25, 52(r1) # 4-byte Folded Spill
; PPC-PWR8-NEXT: addi r25, r1, 32
; PPC-PWR8-NEXT: lwz r3, 0(r3)
; PPC-PWR8-NEXT: stw r29, 68(r1) # 4-byte Folded Spill
; PPC-PWR8-NEXT: mr r29, r7
; PPC-PWR8-NEXT: addi r25, r1, 32
; PPC-PWR8-NEXT: addi r24, r1, 16
; PPC-PWR8-NEXT: stw r30, 72(r1) # 4-byte Folded Spill
; PPC-PWR8-NEXT: mr r30, r8
; PPC-PWR8-NEXT: .p2align 4
; PPC-PWR8-NEXT: .LBB4_1: # %atomicrmw.start
; PPC-PWR8-NEXT: #
; PPC-PWR8-NEXT: stw r3, 32(r1)
; PPC-PWR8-NEXT: stw r4, 36(r1)
; PPC-PWR8-NEXT: or r7, r5, r29
; PPC-PWR8-NEXT: or r8, r6, r30
; PPC-PWR8-NEXT: or r3, r3, r27
; PPC-PWR8-NEXT: stw r4, 36(r1)
; PPC-PWR8-NEXT: or r4, r4, r28
; PPC-PWR8-NEXT: or r7, r5, r29
; PPC-PWR8-NEXT: stw r5, 40(r1)
; PPC-PWR8-NEXT: or r5, r6, r30
; PPC-PWR8-NEXT: stw r6, 44(r1)
; PPC-PWR8-NEXT: mr r5, r25
; PPC-PWR8-NEXT: mr r6, r24
; PPC-PWR8-NEXT: stw r8, 28(r1)
; PPC-PWR8-NEXT: stw r5, 28(r1)
; PPC-PWR8-NEXT: stw r7, 24(r1)
; PPC-PWR8-NEXT: mr r5, r25
; PPC-PWR8-NEXT: li r7, 5
; PPC-PWR8-NEXT: li r8, 5
; PPC-PWR8-NEXT: stw r4, 20(r1)
; PPC-PWR8-NEXT: stw r3, 16(r1)
; PPC-PWR8-NEXT: li r3, 16
; PPC-PWR8-NEXT: mr r4, r26
; PPC-PWR8-NEXT: mr r6, r24
; PPC-PWR8-NEXT: li r8, 5
; PPC-PWR8-NEXT: bl __atomic_compare_exchange
; PPC-PWR8-NEXT: cmplwi r3, 0
; PPC-PWR8-NEXT: mr r7, r3
; PPC-PWR8-NEXT: lwz r6, 44(r1)
; PPC-PWR8-NEXT: lwz r5, 40(r1)
; PPC-PWR8-NEXT: lwz r4, 36(r1)
; PPC-PWR8-NEXT: lwz r3, 32(r1)
; PPC-PWR8-NEXT: cmplwi r7, 0
; PPC-PWR8-NEXT: beq cr0, .LBB4_1
; PPC-PWR8-NEXT: # %bb.2: # %atomicrmw.end
; PPC-PWR8-NEXT: lwz r30, 72(r1) # 4-byte Folded Reload
@@ -763,47 +767,48 @@ define i128 @xor(ptr %a, i128 %x) {
; PPC-PWR8-NEXT: stw r27, 60(r1) # 4-byte Folded Spill
; PPC-PWR8-NEXT: mr r27, r5
; PPC-PWR8-NEXT: mr r26, r3
; PPC-PWR8-NEXT: lwz r5, 8(r3)
; PPC-PWR8-NEXT: lwz r4, 4(r3)
; PPC-PWR8-NEXT: stw r28, 64(r1) # 4-byte Folded Spill
; PPC-PWR8-NEXT: mr r28, r6
; PPC-PWR8-NEXT: lwz r6, 12(r3)
; PPC-PWR8-NEXT: lwz r3, 0(r3)
; PPC-PWR8-NEXT: stw r24, 48(r1) # 4-byte Folded Spill
; PPC-PWR8-NEXT: addi r24, r1, 16
; PPC-PWR8-NEXT: lwz r5, 8(r3)
; PPC-PWR8-NEXT: lwz r4, 4(r3)
; PPC-PWR8-NEXT: stw r25, 52(r1) # 4-byte Folded Spill
; PPC-PWR8-NEXT: addi r25, r1, 32
; PPC-PWR8-NEXT: lwz r3, 0(r3)
; PPC-PWR8-NEXT: stw r29, 68(r1) # 4-byte Folded Spill
; PPC-PWR8-NEXT: mr r29, r7
; PPC-PWR8-NEXT: addi r25, r1, 32
; PPC-PWR8-NEXT: addi r24, r1, 16
; PPC-PWR8-NEXT: stw r30, 72(r1) # 4-byte Folded Spill
; PPC-PWR8-NEXT: mr r30, r8
; PPC-PWR8-NEXT: .p2align 4
; PPC-PWR8-NEXT: .LBB5_1: # %atomicrmw.start
; PPC-PWR8-NEXT: #
; PPC-PWR8-NEXT: stw r3, 32(r1)
; PPC-PWR8-NEXT: stw r4, 36(r1)
; PPC-PWR8-NEXT: xor r7, r5, r29
; PPC-PWR8-NEXT: xor r8, r6, r30
; PPC-PWR8-NEXT: xor r3, r3, r27
; PPC-PWR8-NEXT: stw r4, 36(r1)
; PPC-PWR8-NEXT: xor r4, r4, r28
; PPC-PWR8-NEXT: xor r7, r5, r29
; PPC-PWR8-NEXT: stw r5, 40(r1)
; PPC-PWR8-NEXT: xor r5, r6, r30
; PPC-PWR8-NEXT: stw r6, 44(r1)
; PPC-PWR8-NEXT: mr r5, r25
; PPC-PWR8-NEXT: mr r6, r24
; PPC-PWR8-NEXT: stw r8, 28(r1)
; PPC-PWR8-NEXT: stw r5, 28(r1)
; PPC-PWR8-NEXT: stw r7, 24(r1)
; PPC-PWR8-NEXT: mr r5, r25
; PPC-PWR8-NEXT: li r7, 5
; PPC-PWR8-NEXT: li r8, 5
; PPC-PWR8-NEXT: stw r4, 20(r1)
; PPC-PWR8-NEXT: stw r3, 16(r1)
; PPC-PWR8-NEXT: li r3, 16
; PPC-PWR8-NEXT: mr r4, r26
; PPC-PWR8-NEXT: mr r6, r24
; PPC-PWR8-NEXT: li r8, 5
; PPC-PWR8-NEXT: bl __atomic_compare_exchange
; PPC-PWR8-NEXT: cmplwi r3, 0
; PPC-PWR8-NEXT: mr r7, r3
; PPC-PWR8-NEXT: lwz r6, 44(r1)
; PPC-PWR8-NEXT: lwz r5, 40(r1)
; PPC-PWR8-NEXT: lwz r4, 36(r1)
; PPC-PWR8-NEXT: lwz r3, 32(r1)
; PPC-PWR8-NEXT: cmplwi r7, 0
; PPC-PWR8-NEXT: beq cr0, .LBB5_1
; PPC-PWR8-NEXT: # %bb.2: # %atomicrmw.end
; PPC-PWR8-NEXT: lwz r30, 72(r1) # 4-byte Folded Reload
@@ -904,47 +909,48 @@ define i128 @nand(ptr %a, i128 %x) {
; PPC-PWR8-NEXT: stw r27, 60(r1) # 4-byte Folded Spill
; PPC-PWR8-NEXT: mr r27, r5
; PPC-PWR8-NEXT: mr r26, r3
; PPC-PWR8-NEXT: lwz r5, 8(r3)
; PPC-PWR8-NEXT: lwz r4, 4(r3)
; PPC-PWR8-NEXT: stw r28, 64(r1) # 4-byte Folded Spill
; PPC-PWR8-NEXT: mr r28, r6
; PPC-PWR8-NEXT: lwz r6, 12(r3)
; PPC-PWR8-NEXT: lwz r3, 0(r3)
; PPC-PWR8-NEXT: stw r24, 48(r1) # 4-byte Folded Spill
; PPC-PWR8-NEXT: addi r24, r1, 16
; PPC-PWR8-NEXT: lwz r5, 8(r3)
; PPC-PWR8-NEXT: lwz r4, 4(r3)
; PPC-PWR8-NEXT: stw r25, 52(r1) # 4-byte Folded Spill
; PPC-PWR8-NEXT: addi r25, r1, 32
; PPC-PWR8-NEXT: lwz r3, 0(r3)
; PPC-PWR8-NEXT: stw r29, 68(r1) # 4-byte Folded Spill
; PPC-PWR8-NEXT: mr r29, r7
; PPC-PWR8-NEXT: addi r25, r1, 32
; PPC-PWR8-NEXT: addi r24, r1, 16
; PPC-PWR8-NEXT: stw r30, 72(r1) # 4-byte Folded Spill
; PPC-PWR8-NEXT: mr r30, r8
; PPC-PWR8-NEXT: .p2align 4
; PPC-PWR8-NEXT: .LBB6_1: # %atomicrmw.start
; PPC-PWR8-NEXT: #
; PPC-PWR8-NEXT: stw r3, 32(r1)
; PPC-PWR8-NEXT: stw r4, 36(r1)
; PPC-PWR8-NEXT: nand r7, r5, r29
; PPC-PWR8-NEXT: nand r8, r6, r30
; PPC-PWR8-NEXT: nand r3, r3, r27
; PPC-PWR8-NEXT: stw r4, 36(r1)
; PPC-PWR8-NEXT: nand r4, r4, r28
; PPC-PWR8-NEXT: nand r7, r5, r29
; PPC-PWR8-NEXT: stw r5, 40(r1)
; PPC-PWR8-NEXT: nand r5, r6, r30
; PPC-PWR8-NEXT: stw r6, 44(r1)
; PPC-PWR8-NEXT: mr r5, r25
; PPC-PWR8-NEXT: mr r6, r24
; PPC-PWR8-NEXT: stw r8, 28(r1)
; PPC-PWR8-NEXT: stw r5, 28(r1)
; PPC-PWR8-NEXT: stw r7, 24(r1)
; PPC-PWR8-NEXT: mr r5, r25
; PPC-PWR8-NEXT: li r7, 5
; PPC-PWR8-NEXT: li r8, 5
; PPC-PWR8-NEXT: stw r4, 20(r1)
; PPC-PWR8-NEXT: stw r3, 16(r1)
; PPC-PWR8-NEXT: li r3, 16
; PPC-PWR8-NEXT: mr r4, r26
; PPC-PWR8-NEXT: mr r6, r24
; PPC-PWR8-NEXT: li r8, 5
; PPC-PWR8-NEXT: bl __atomic_compare_exchange
; PPC-PWR8-NEXT: cmplwi r3, 0
; PPC-PWR8-NEXT: mr r7, r3
; PPC-PWR8-NEXT: lwz r6, 44(r1)
; PPC-PWR8-NEXT: lwz r5, 40(r1)
; PPC-PWR8-NEXT: lwz r4, 36(r1)
; PPC-PWR8-NEXT: lwz r3, 32(r1)
; PPC-PWR8-NEXT: cmplwi r7, 0
; PPC-PWR8-NEXT: beq cr0, .LBB6_1
; PPC-PWR8-NEXT: # %bb.2: # %atomicrmw.end
; PPC-PWR8-NEXT: lwz r30, 72(r1) # 4-byte Folded Reload
@@ -1068,21 +1074,21 @@ define i128 @cas_weak_acquire_acquire(ptr %a, i128 %cmp, i128 %new) {
; PPC-PWR8-NEXT: .cfi_def_cfa_offset 48
; PPC-PWR8-NEXT: .cfi_offset lr, 4
; PPC-PWR8-NEXT: mr r4, r3
; PPC-PWR8-NEXT: lwz r3, 56(r1)
; PPC-PWR8-NEXT: lwz r11, 60(r1)
; PPC-PWR8-NEXT: lwz r3, 60(r1)
; PPC-PWR8-NEXT: stw r8, 44(r1)
; PPC-PWR8-NEXT: stw r7, 40(r1)
; PPC-PWR8-NEXT: li r7, 2
; PPC-PWR8-NEXT: li r8, 2
; PPC-PWR8-NEXT: stw r6, 36(r1)
; PPC-PWR8-NEXT: stw r5, 32(r1)
; PPC-PWR8-NEXT: addi r5, r1, 32
; PPC-PWR8-NEXT: addi r6, r1, 16
; PPC-PWR8-NEXT: stw r3, 24(r1)
; PPC-PWR8-NEXT: li r3, 16
; PPC-PWR8-NEXT: stw r11, 28(r1)
; PPC-PWR8-NEXT: li r7, 2
; PPC-PWR8-NEXT: li r8, 2
; PPC-PWR8-NEXT: stw r10, 20(r1)
; PPC-PWR8-NEXT: stw r9, 16(r1)
; PPC-PWR8-NEXT: stw r3, 28(r1)
; PPC-PWR8-NEXT: lwz r3, 56(r1)
; PPC-PWR8-NEXT: stw r3, 24(r1)
; PPC-PWR8-NEXT: li r3, 16
; PPC-PWR8-NEXT: bl __atomic_compare_exchange
; PPC-PWR8-NEXT: lwz r6, 44(r1)
; PPC-PWR8-NEXT: lwz r5, 40(r1)
@@ -1202,21 +1208,21 @@ define i128 @cas_weak_release_monotonic(ptr %a, i128 %cmp, i128 %new) {
; PPC-PWR8-NEXT: .cfi_def_cfa_offset 48
; PPC-PWR8-NEXT: .cfi_offset lr, 4
; PPC-PWR8-NEXT: mr r4, r3
; PPC-PWR8-NEXT: lwz r3, 56(r1)
; PPC-PWR8-NEXT: lwz r11, 60(r1)
; PPC-PWR8-NEXT: lwz r3, 60(r1)
; PPC-PWR8-NEXT: stw r8, 44(r1)
; PPC-PWR8-NEXT: stw r7, 40(r1)
; PPC-PWR8-NEXT: li r7, 3
; PPC-PWR8-NEXT: li r8, 0
; PPC-PWR8-NEXT: stw r6, 36(r1)
; PPC-PWR8-NEXT: stw r5, 32(r1)
; PPC-PWR8-NEXT: addi r5, r1, 32
; PPC-PWR8-NEXT: addi r6, r1, 16
; PPC-PWR8-NEXT: stw r3, 24(r1)
; PPC-PWR8-NEXT: li r3, 16
; PPC-PWR8-NEXT: stw r11, 28(r1)
; PPC-PWR8-NEXT: li r7, 3
; PPC-PWR8-NEXT: li r8, 0
; PPC-PWR8-NEXT: stw r10, 20(r1)
; PPC-PWR8-NEXT: stw r9, 16(r1)
; PPC-PWR8-NEXT: stw r3, 28(r1)
; PPC-PWR8-NEXT: lwz r3, 56(r1)
; PPC-PWR8-NEXT: stw r3, 24(r1)
; PPC-PWR8-NEXT: li r3, 16
; PPC-PWR8-NEXT: bl __atomic_compare_exchange
; PPC-PWR8-NEXT: lwz r6, 44(r1)
; PPC-PWR8-NEXT: lwz r5, 40(r1)
@@ -1339,21 +1345,21 @@ define i128 @cas_sc_sc(ptr %a, i128 %cmp, i128 %new) {
; PPC-PWR8-NEXT: .cfi_def_cfa_offset 48
; PPC-PWR8-NEXT: .cfi_offset lr, 4
; PPC-PWR8-NEXT: mr r4, r3
; PPC-PWR8-NEXT: lwz r3, 56(r1)
; PPC-PWR8-NEXT: lwz r11, 60(r1)
; PPC-PWR8-NEXT: lwz r3, 60(r1)
; PPC-PWR8-NEXT: stw r8, 44(r1)
; PPC-PWR8-NEXT: stw r7, 40(r1)
; PPC-PWR8-NEXT: li r7, 5
; PPC-PWR8-NEXT: li r8, 5
; PPC-PWR8-NEXT: stw r6, 36(r1)
; PPC-PWR8-NEXT: stw r5, 32(r1)
; PPC-PWR8-NEXT: addi r5, r1, 32
; PPC-PWR8-NEXT: addi r6, r1, 16
; PPC-PWR8-NEXT: stw r3, 24(r1)
; PPC-PWR8-NEXT: li r3, 16
; PPC-PWR8-NEXT: stw r11, 28(r1)
; PPC-PWR8-NEXT: li r7, 5
; PPC-PWR8-NEXT: li r8, 5
; PPC-PWR8-NEXT: stw r10, 20(r1)
; PPC-PWR8-NEXT: stw r9, 16(r1)
; PPC-PWR8-NEXT: stw r3, 28(r1)
; PPC-PWR8-NEXT: lwz r3, 56(r1)
; PPC-PWR8-NEXT: stw r3, 24(r1)
; PPC-PWR8-NEXT: li r3, 16
; PPC-PWR8-NEXT: bl __atomic_compare_exchange
; PPC-PWR8-NEXT: lwz r6, 44(r1)
; PPC-PWR8-NEXT: lwz r5, 40(r1)
@@ -1476,21 +1482,21 @@ define i128 @cas_acqrel_acquire(ptr %a, i128 %cmp, i128 %new) {
; PPC-PWR8-NEXT: .cfi_def_cfa_offset 48
; PPC-PWR8-NEXT: .cfi_offset lr, 4
; PPC-PWR8-NEXT: mr r4, r3
; PPC-PWR8-NEXT: lwz r3, 56(r1)
; PPC-PWR8-NEXT: lwz r11, 60(r1)
; PPC-PWR8-NEXT: lwz r3, 60(r1)
; PPC-PWR8-NEXT: stw r8, 44(r1)
; PPC-PWR8-NEXT: stw r7, 40(r1)
; PPC-PWR8-NEXT: li r7, 4
; PPC-PWR8-NEXT: li r8, 2
; PPC-PWR8-NEXT: stw r6, 36(r1)
; PPC-PWR8-NEXT: stw r5, 32(r1)
; PPC-PWR8-NEXT: addi r5, r1, 32
; PPC-PWR8-NEXT: addi r6, r1, 16
; PPC-PWR8-NEXT: stw r3, 24(r1)
; PPC-PWR8-NEXT: li r3, 16
; PPC-PWR8-NEXT: stw r11, 28(r1)
; PPC-PWR8-NEXT: li r7, 4
; PPC-PWR8-NEXT: li r8, 2
; PPC-PWR8-NEXT: stw r10, 20(r1)
; PPC-PWR8-NEXT: stw r9, 16(r1)
; PPC-PWR8-NEXT: stw r3, 28(r1)
; PPC-PWR8-NEXT: lwz r3, 56(r1)
; PPC-PWR8-NEXT: stw r3, 24(r1)
; PPC-PWR8-NEXT: li r3, 16
; PPC-PWR8-NEXT: bl __atomic_compare_exchange
; PPC-PWR8-NEXT: lwz r6, 44(r1)
; PPC-PWR8-NEXT: lwz r5, 40(r1)
@@ -1620,21 +1626,21 @@ define i1 @cas_acqrel_acquire_check_succ(ptr %a, i128 %cmp, i128 %new) {
; PPC-PWR8-NEXT: .cfi_def_cfa_offset 48
; PPC-PWR8-NEXT: .cfi_offset lr, 4
; PPC-PWR8-NEXT: mr r4, r3
; PPC-PWR8-NEXT: lwz r3, 56(r1)
; PPC-PWR8-NEXT: lwz r11, 60(r1)
; PPC-PWR8-NEXT: lwz r3, 60(r1)
; PPC-PWR8-NEXT: stw r8, 44(r1)
; PPC-PWR8-NEXT: stw r7, 40(r1)
; PPC-PWR8-NEXT: li r7, 4
; PPC-PWR8-NEXT: li r8, 2
; PPC-PWR8-NEXT: stw r6, 36(r1)
; PPC-PWR8-NEXT: stw r5, 32(r1)
; PPC-PWR8-NEXT: addi r5, r1, 32
; PPC-PWR8-NEXT: addi r6, r1, 16
; PPC-PWR8-NEXT: stw r3, 24(r1)
; PPC-PWR8-NEXT: li r3, 16
; PPC-PWR8-NEXT: stw r11, 28(r1)
; PPC-PWR8-NEXT: li r7, 4
; PPC-PWR8-NEXT: li r8, 2
; PPC-PWR8-NEXT: stw r10, 20(r1)
; PPC-PWR8-NEXT: stw r9, 16(r1)
; PPC-PWR8-NEXT: stw r3, 28(r1)
; PPC-PWR8-NEXT: lwz r3, 56(r1)
; PPC-PWR8-NEXT: stw r3, 24(r1)
; PPC-PWR8-NEXT: li r3, 16
; PPC-PWR8-NEXT: bl __atomic_compare_exchange
; PPC-PWR8-NEXT: lwz r0, 52(r1)
; PPC-PWR8-NEXT: addi r1, r1, 48

View File

@@ -7,16 +7,16 @@
; RUN: < %s | FileCheck %s --check-prefixes=CHECK,CHECK-P10
; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
; RUN: -mcpu=pwr9 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \
; RUN: < %s | FileCheck %s --check-prefixes=CHECK,CHECK-PREP10,CHECK-P9
; RUN: < %s | FileCheck %s --check-prefixes=CHECK,CHECK-PREP10
; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
; RUN: -mcpu=pwr9 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \
; RUN: < %s | FileCheck %s --check-prefixes=CHECK,CHECK-PREP10,CHECK-P9
; RUN: < %s | FileCheck %s --check-prefixes=CHECK,CHECK-PREP10
; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
; RUN: -mcpu=pwr8 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \
; RUN: < %s | FileCheck %s --check-prefixes=CHECK,CHECK-PREP10,CHECK-P8
; RUN: < %s | FileCheck %s --check-prefixes=CHECK,CHECK-PREP10
; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
; RUN: -mcpu=pwr8 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \
; RUN: < %s | FileCheck %s --check-prefixes=CHECK,CHECK-PREP10,CHECK-P8
; RUN: < %s | FileCheck %s --check-prefixes=CHECK,CHECK-PREP10
; Function Attrs: nofree norecurse nounwind uwtable willreturn
define dso_local signext i16 @ld_0_int16_t_uint8_t(i64 %ptr) {
@@ -174,23 +174,14 @@ define dso_local signext i16 @ld_disjoint_align32_int16_t_uint8_t(i64 %ptr) {
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_align32_int16_t_uint8_t:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: lis r4, -15264
; CHECK-P9-NEXT: and r3, r3, r4
; CHECK-P9-NEXT: lis r4, 15258
; CHECK-P9-NEXT: ori r4, r4, 41712
; CHECK-P9-NEXT: lbzx r3, r3, r4
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: ld_disjoint_align32_int16_t_uint8_t:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: lis r4, -15264
; CHECK-P8-NEXT: lis r5, 15258
; CHECK-P8-NEXT: and r3, r3, r4
; CHECK-P8-NEXT: ori r4, r5, 41712
; CHECK-P8-NEXT: lbzx r3, r3, r4
; CHECK-P8-NEXT: blr
; CHECK-PREP10-LABEL: ld_disjoint_align32_int16_t_uint8_t:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: lis r4, -15264
; CHECK-PREP10-NEXT: and r3, r3, r4
; CHECK-PREP10-NEXT: lis r4, 15258
; CHECK-PREP10-NEXT: ori r4, r4, 41712
; CHECK-PREP10-NEXT: lbzx r3, r3, r4
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1000341504
%or = or i64 %and, 999990000
@@ -468,25 +459,15 @@ define dso_local signext i16 @ld_disjoint_align32_int16_t_int8_t(i64 %ptr) {
; CHECK-P10-NEXT: extsb r3, r3
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_align32_int16_t_int8_t:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: lis r4, -15264
; CHECK-P9-NEXT: and r3, r3, r4
; CHECK-P9-NEXT: lis r4, 15258
; CHECK-P9-NEXT: ori r4, r4, 41712
; CHECK-P9-NEXT: lbzx r3, r3, r4
; CHECK-P9-NEXT: extsb r3, r3
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: ld_disjoint_align32_int16_t_int8_t:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: lis r4, -15264
; CHECK-P8-NEXT: lis r5, 15258
; CHECK-P8-NEXT: and r3, r3, r4
; CHECK-P8-NEXT: ori r4, r5, 41712
; CHECK-P8-NEXT: lbzx r3, r3, r4
; CHECK-P8-NEXT: extsb r3, r3
; CHECK-P8-NEXT: blr
; CHECK-PREP10-LABEL: ld_disjoint_align32_int16_t_int8_t:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: lis r4, -15264
; CHECK-PREP10-NEXT: and r3, r3, r4
; CHECK-PREP10-NEXT: lis r4, 15258
; CHECK-PREP10-NEXT: ori r4, r4, 41712
; CHECK-PREP10-NEXT: lbzx r3, r3, r4
; CHECK-PREP10-NEXT: extsb r3, r3
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1000341504
%or = or i64 %and, 999990000
@@ -763,25 +744,15 @@ define dso_local signext i16 @ld_disjoint_align32_int16_t_uint16_t(i64 %ptr) {
; CHECK-P10-NEXT: extsh r3, r3
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_align32_int16_t_uint16_t:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: lis r4, -15264
; CHECK-P9-NEXT: and r3, r3, r4
; CHECK-P9-NEXT: lis r4, 15258
; CHECK-P9-NEXT: ori r4, r4, 41712
; CHECK-P9-NEXT: lhzx r3, r3, r4
; CHECK-P9-NEXT: extsh r3, r3
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: ld_disjoint_align32_int16_t_uint16_t:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: lis r4, -15264
; CHECK-P8-NEXT: lis r5, 15258
; CHECK-P8-NEXT: and r3, r3, r4
; CHECK-P8-NEXT: ori r4, r5, 41712
; CHECK-P8-NEXT: lhzx r3, r3, r4
; CHECK-P8-NEXT: extsh r3, r3
; CHECK-P8-NEXT: blr
; CHECK-PREP10-LABEL: ld_disjoint_align32_int16_t_uint16_t:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: lis r4, -15264
; CHECK-PREP10-NEXT: and r3, r3, r4
; CHECK-PREP10-NEXT: lis r4, 15258
; CHECK-PREP10-NEXT: ori r4, r4, 41712
; CHECK-PREP10-NEXT: lhzx r3, r3, r4
; CHECK-PREP10-NEXT: extsh r3, r3
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1000341504
%or = or i64 %and, 999990000
@@ -1061,25 +1032,15 @@ define dso_local signext i16 @ld_disjoint_align32_int16_t_uint32_t(i64 %ptr) {
; CHECK-P10-NEXT: extsh r3, r3
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_align32_int16_t_uint32_t:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: lis r4, -15264
; CHECK-P9-NEXT: and r3, r3, r4
; CHECK-P9-NEXT: lis r4, 15258
; CHECK-P9-NEXT: ori r4, r4, 41712
; CHECK-P9-NEXT: lwzx r3, r3, r4
; CHECK-P9-NEXT: extsh r3, r3
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: ld_disjoint_align32_int16_t_uint32_t:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: lis r4, -15264
; CHECK-P8-NEXT: lis r5, 15258
; CHECK-P8-NEXT: and r3, r3, r4
; CHECK-P8-NEXT: ori r4, r5, 41712
; CHECK-P8-NEXT: lwzx r3, r3, r4
; CHECK-P8-NEXT: extsh r3, r3
; CHECK-P8-NEXT: blr
; CHECK-PREP10-LABEL: ld_disjoint_align32_int16_t_uint32_t:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: lis r4, -15264
; CHECK-PREP10-NEXT: and r3, r3, r4
; CHECK-PREP10-NEXT: lis r4, 15258
; CHECK-PREP10-NEXT: ori r4, r4, 41712
; CHECK-PREP10-NEXT: lwzx r3, r3, r4
; CHECK-PREP10-NEXT: extsh r3, r3
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1000341504
%or = or i64 %and, 999990000
@@ -1365,25 +1326,15 @@ define dso_local signext i16 @ld_disjoint_align32_int16_t_uint64_t(i64 %ptr) {
; CHECK-P10-NEXT: extsh r3, r3
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_align32_int16_t_uint64_t:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: lis r4, -15264
; CHECK-P9-NEXT: and r3, r3, r4
; CHECK-P9-NEXT: lis r4, 15258
; CHECK-P9-NEXT: ori r4, r4, 41712
; CHECK-P9-NEXT: ldx r3, r3, r4
; CHECK-P9-NEXT: extsh r3, r3
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: ld_disjoint_align32_int16_t_uint64_t:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: lis r4, -15264
; CHECK-P8-NEXT: lis r5, 15258
; CHECK-P8-NEXT: and r3, r3, r4
; CHECK-P8-NEXT: ori r4, r5, 41712
; CHECK-P8-NEXT: ldx r3, r3, r4
; CHECK-P8-NEXT: extsh r3, r3
; CHECK-P8-NEXT: blr
; CHECK-PREP10-LABEL: ld_disjoint_align32_int16_t_uint64_t:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: lis r4, -15264
; CHECK-PREP10-NEXT: and r3, r3, r4
; CHECK-PREP10-NEXT: lis r4, 15258
; CHECK-PREP10-NEXT: ori r4, r4, 41712
; CHECK-PREP10-NEXT: ldx r3, r3, r4
; CHECK-PREP10-NEXT: extsh r3, r3
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1000341504
%or = or i64 %and, 999990000
@@ -1659,23 +1610,14 @@ define dso_local zeroext i16 @ld_disjoint_align32_uint16_t_uint8_t(i64 %ptr) {
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_align32_uint16_t_uint8_t:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: lis r4, -15264
; CHECK-P9-NEXT: and r3, r3, r4
; CHECK-P9-NEXT: lis r4, 15258
; CHECK-P9-NEXT: ori r4, r4, 41712
; CHECK-P9-NEXT: lbzx r3, r3, r4
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: ld_disjoint_align32_uint16_t_uint8_t:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: lis r4, -15264
; CHECK-P8-NEXT: lis r5, 15258
; CHECK-P8-NEXT: and r3, r3, r4
; CHECK-P8-NEXT: ori r4, r5, 41712
; CHECK-P8-NEXT: lbzx r3, r3, r4
; CHECK-P8-NEXT: blr
; CHECK-PREP10-LABEL: ld_disjoint_align32_uint16_t_uint8_t:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: lis r4, -15264
; CHECK-PREP10-NEXT: and r3, r3, r4
; CHECK-PREP10-NEXT: lis r4, 15258
; CHECK-PREP10-NEXT: ori r4, r4, 41712
; CHECK-PREP10-NEXT: lbzx r3, r3, r4
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1000341504
%or = or i64 %and, 999990000
@@ -1965,27 +1907,16 @@ define dso_local zeroext i16 @ld_disjoint_align32_uint16_t_int8_t(i64 %ptr) {
; CHECK-P10-NEXT: clrldi r3, r3, 48
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_align32_uint16_t_int8_t:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: lis r4, -15264
; CHECK-P9-NEXT: and r3, r3, r4
; CHECK-P9-NEXT: lis r4, 15258
; CHECK-P9-NEXT: ori r4, r4, 41712
; CHECK-P9-NEXT: lbzx r3, r3, r4
; CHECK-P9-NEXT: extsb r3, r3
; CHECK-P9-NEXT: clrldi r3, r3, 48
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: ld_disjoint_align32_uint16_t_int8_t:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: lis r4, -15264
; CHECK-P8-NEXT: lis r5, 15258
; CHECK-P8-NEXT: and r3, r3, r4
; CHECK-P8-NEXT: ori r4, r5, 41712
; CHECK-P8-NEXT: lbzx r3, r3, r4
; CHECK-P8-NEXT: extsb r3, r3
; CHECK-P8-NEXT: clrldi r3, r3, 48
; CHECK-P8-NEXT: blr
; CHECK-PREP10-LABEL: ld_disjoint_align32_uint16_t_int8_t:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: lis r4, -15264
; CHECK-PREP10-NEXT: and r3, r3, r4
; CHECK-PREP10-NEXT: lis r4, 15258
; CHECK-PREP10-NEXT: ori r4, r4, 41712
; CHECK-PREP10-NEXT: lbzx r3, r3, r4
; CHECK-PREP10-NEXT: extsb r3, r3
; CHECK-PREP10-NEXT: clrldi r3, r3, 48
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1000341504
%or = or i64 %and, 999990000
@@ -2260,23 +2191,14 @@ define dso_local zeroext i16 @ld_disjoint_align32_uint16_t_uint16_t(i64 %ptr) {
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_align32_uint16_t_uint16_t:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: lis r4, -15264
; CHECK-P9-NEXT: and r3, r3, r4
; CHECK-P9-NEXT: lis r4, 15258
; CHECK-P9-NEXT: ori r4, r4, 41712
; CHECK-P9-NEXT: lhzx r3, r3, r4
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: ld_disjoint_align32_uint16_t_uint16_t:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: lis r4, -15264
; CHECK-P8-NEXT: lis r5, 15258
; CHECK-P8-NEXT: and r3, r3, r4
; CHECK-P8-NEXT: ori r4, r5, 41712
; CHECK-P8-NEXT: lhzx r3, r3, r4
; CHECK-P8-NEXT: blr
; CHECK-PREP10-LABEL: ld_disjoint_align32_uint16_t_uint16_t:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: lis r4, -15264
; CHECK-PREP10-NEXT: and r3, r3, r4
; CHECK-PREP10-NEXT: lis r4, 15258
; CHECK-PREP10-NEXT: ori r4, r4, 41712
; CHECK-PREP10-NEXT: lhzx r3, r3, r4
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1000341504
%or = or i64 %and, 999990000
@@ -2548,25 +2470,15 @@ define dso_local zeroext i16 @ld_disjoint_align32_uint16_t_uint32_t(i64 %ptr) {
; CHECK-P10-NEXT: clrldi r3, r3, 48
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_align32_uint16_t_uint32_t:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: lis r4, -15264
; CHECK-P9-NEXT: and r3, r3, r4
; CHECK-P9-NEXT: lis r4, 15258
; CHECK-P9-NEXT: ori r4, r4, 41712
; CHECK-P9-NEXT: lwzx r3, r3, r4
; CHECK-P9-NEXT: clrldi r3, r3, 48
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: ld_disjoint_align32_uint16_t_uint32_t:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: lis r4, -15264
; CHECK-P8-NEXT: lis r5, 15258
; CHECK-P8-NEXT: and r3, r3, r4
; CHECK-P8-NEXT: ori r4, r5, 41712
; CHECK-P8-NEXT: lwzx r3, r3, r4
; CHECK-P8-NEXT: clrldi r3, r3, 48
; CHECK-P8-NEXT: blr
; CHECK-PREP10-LABEL: ld_disjoint_align32_uint16_t_uint32_t:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: lis r4, -15264
; CHECK-PREP10-NEXT: and r3, r3, r4
; CHECK-PREP10-NEXT: lis r4, 15258
; CHECK-PREP10-NEXT: ori r4, r4, 41712
; CHECK-PREP10-NEXT: lwzx r3, r3, r4
; CHECK-PREP10-NEXT: clrldi r3, r3, 48
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1000341504
%or = or i64 %and, 999990000
@@ -2852,25 +2764,15 @@ define dso_local zeroext i16 @ld_disjoint_align32_uint16_t_uint64_t(i64 %ptr) {
; CHECK-P10-NEXT: clrldi r3, r3, 48
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_align32_uint16_t_uint64_t:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: lis r4, -15264
; CHECK-P9-NEXT: and r3, r3, r4
; CHECK-P9-NEXT: lis r4, 15258
; CHECK-P9-NEXT: ori r4, r4, 41712
; CHECK-P9-NEXT: ldx r3, r3, r4
; CHECK-P9-NEXT: clrldi r3, r3, 48
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: ld_disjoint_align32_uint16_t_uint64_t:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: lis r4, -15264
; CHECK-P8-NEXT: lis r5, 15258
; CHECK-P8-NEXT: and r3, r3, r4
; CHECK-P8-NEXT: ori r4, r5, 41712
; CHECK-P8-NEXT: ldx r3, r3, r4
; CHECK-P8-NEXT: clrldi r3, r3, 48
; CHECK-P8-NEXT: blr
; CHECK-PREP10-LABEL: ld_disjoint_align32_uint16_t_uint64_t:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: lis r4, -15264
; CHECK-PREP10-NEXT: and r3, r3, r4
; CHECK-PREP10-NEXT: lis r4, 15258
; CHECK-PREP10-NEXT: ori r4, r4, 41712
; CHECK-PREP10-NEXT: ldx r3, r3, r4
; CHECK-PREP10-NEXT: clrldi r3, r3, 48
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1000341504
%or = or i64 %and, 999990000
@@ -3144,23 +3046,14 @@ define dso_local void @st_disjoint_align32_uint16_t_uint8_t(i64 %ptr, i16 zeroex
; CHECK-P10-NEXT: pstb r4, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_uint16_t_uint8_t:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: lis r5, -15264
; CHECK-P9-NEXT: and r3, r3, r5
; CHECK-P9-NEXT: lis r5, 15258
; CHECK-P9-NEXT: ori r5, r5, 41712
; CHECK-P9-NEXT: stbx r4, r3, r5
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: st_disjoint_align32_uint16_t_uint8_t:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: lis r5, -15264
; CHECK-P8-NEXT: lis r6, 15258
; CHECK-P8-NEXT: and r3, r3, r5
; CHECK-P8-NEXT: ori r5, r6, 41712
; CHECK-P8-NEXT: stbx r4, r3, r5
; CHECK-P8-NEXT: blr
; CHECK-PREP10-LABEL: st_disjoint_align32_uint16_t_uint8_t:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: lis r5, -15264
; CHECK-PREP10-NEXT: and r3, r3, r5
; CHECK-PREP10-NEXT: lis r5, 15258
; CHECK-PREP10-NEXT: ori r5, r5, 41712
; CHECK-PREP10-NEXT: stbx r4, r3, r5
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1000341504
%or = or i64 %and, 999990000
@@ -3417,23 +3310,14 @@ define dso_local void @st_disjoint_align32_uint16_t_uint16_t(i64 %ptr, i16 zeroe
; CHECK-P10-NEXT: psth r4, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_uint16_t_uint16_t:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: lis r5, -15264
; CHECK-P9-NEXT: and r3, r3, r5
; CHECK-P9-NEXT: lis r5, 15258
; CHECK-P9-NEXT: ori r5, r5, 41712
; CHECK-P9-NEXT: sthx r4, r3, r5
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: st_disjoint_align32_uint16_t_uint16_t:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: lis r5, -15264
; CHECK-P8-NEXT: lis r6, 15258
; CHECK-P8-NEXT: and r3, r3, r5
; CHECK-P8-NEXT: ori r5, r6, 41712
; CHECK-P8-NEXT: sthx r4, r3, r5
; CHECK-P8-NEXT: blr
; CHECK-PREP10-LABEL: st_disjoint_align32_uint16_t_uint16_t:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: lis r5, -15264
; CHECK-PREP10-NEXT: and r3, r3, r5
; CHECK-PREP10-NEXT: lis r5, 15258
; CHECK-PREP10-NEXT: ori r5, r5, 41712
; CHECK-PREP10-NEXT: sthx r4, r3, r5
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1000341504
%or = or i64 %and, 999990000
@@ -3693,23 +3577,14 @@ define dso_local void @st_disjoint_align32_uint16_t_uint32_t(i64 %ptr, i16 zeroe
; CHECK-P10-NEXT: pstw r4, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_uint16_t_uint32_t:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: lis r5, -15264
; CHECK-P9-NEXT: and r3, r3, r5
; CHECK-P9-NEXT: lis r5, 15258
; CHECK-P9-NEXT: ori r5, r5, 41712
; CHECK-P9-NEXT: stwx r4, r3, r5
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: st_disjoint_align32_uint16_t_uint32_t:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: lis r5, -15264
; CHECK-P8-NEXT: lis r6, 15258
; CHECK-P8-NEXT: and r3, r3, r5
; CHECK-P8-NEXT: ori r5, r6, 41712
; CHECK-P8-NEXT: stwx r4, r3, r5
; CHECK-P8-NEXT: blr
; CHECK-PREP10-LABEL: st_disjoint_align32_uint16_t_uint32_t:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: lis r5, -15264
; CHECK-PREP10-NEXT: and r3, r3, r5
; CHECK-PREP10-NEXT: lis r5, 15258
; CHECK-PREP10-NEXT: ori r5, r5, 41712
; CHECK-PREP10-NEXT: stwx r4, r3, r5
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1000341504
%or = or i64 %and, 999990000
@@ -3975,23 +3850,14 @@ define dso_local void @st_disjoint_align32_uint16_t_uint64_t(i64 %ptr, i16 zeroe
; CHECK-P10-NEXT: pstd r4, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_uint16_t_uint64_t:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: lis r5, -15264
; CHECK-P9-NEXT: and r3, r3, r5
; CHECK-P9-NEXT: lis r5, 15258
; CHECK-P9-NEXT: ori r5, r5, 41712
; CHECK-P9-NEXT: stdx r4, r3, r5
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: st_disjoint_align32_uint16_t_uint64_t:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: lis r5, -15264
; CHECK-P8-NEXT: lis r6, 15258
; CHECK-P8-NEXT: and r3, r3, r5
; CHECK-P8-NEXT: ori r5, r6, 41712
; CHECK-P8-NEXT: stdx r4, r3, r5
; CHECK-P8-NEXT: blr
; CHECK-PREP10-LABEL: st_disjoint_align32_uint16_t_uint64_t:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: lis r5, -15264
; CHECK-PREP10-NEXT: and r3, r3, r5
; CHECK-PREP10-NEXT: lis r5, 15258
; CHECK-PREP10-NEXT: ori r5, r5, 41712
; CHECK-PREP10-NEXT: stdx r4, r3, r5
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1000341504
%or = or i64 %and, 999990000
@@ -4257,23 +4123,14 @@ define dso_local void @st_disjoint_align32_int16_t_uint32_t(i64 %ptr, i16 signex
; CHECK-P10-NEXT: pstw r4, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_int16_t_uint32_t:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: lis r5, -15264
; CHECK-P9-NEXT: and r3, r3, r5
; CHECK-P9-NEXT: lis r5, 15258
; CHECK-P9-NEXT: ori r5, r5, 41712
; CHECK-P9-NEXT: stwx r4, r3, r5
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: st_disjoint_align32_int16_t_uint32_t:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: lis r5, -15264
; CHECK-P8-NEXT: lis r6, 15258
; CHECK-P8-NEXT: and r3, r3, r5
; CHECK-P8-NEXT: ori r5, r6, 41712
; CHECK-P8-NEXT: stwx r4, r3, r5
; CHECK-P8-NEXT: blr
; CHECK-PREP10-LABEL: st_disjoint_align32_int16_t_uint32_t:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: lis r5, -15264
; CHECK-PREP10-NEXT: and r3, r3, r5
; CHECK-PREP10-NEXT: lis r5, 15258
; CHECK-PREP10-NEXT: ori r5, r5, 41712
; CHECK-PREP10-NEXT: stwx r4, r3, r5
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1000341504
%or = or i64 %and, 999990000
@@ -4539,23 +4396,14 @@ define dso_local void @st_disjoint_align32_int16_t_uint64_t(i64 %ptr, i16 signex
; CHECK-P10-NEXT: pstd r4, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_int16_t_uint64_t:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: lis r5, -15264
; CHECK-P9-NEXT: and r3, r3, r5
; CHECK-P9-NEXT: lis r5, 15258
; CHECK-P9-NEXT: ori r5, r5, 41712
; CHECK-P9-NEXT: stdx r4, r3, r5
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: st_disjoint_align32_int16_t_uint64_t:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: lis r5, -15264
; CHECK-P8-NEXT: lis r6, 15258
; CHECK-P8-NEXT: and r3, r3, r5
; CHECK-P8-NEXT: ori r5, r6, 41712
; CHECK-P8-NEXT: stdx r4, r3, r5
; CHECK-P8-NEXT: blr
; CHECK-PREP10-LABEL: st_disjoint_align32_int16_t_uint64_t:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: lis r5, -15264
; CHECK-PREP10-NEXT: and r3, r3, r5
; CHECK-PREP10-NEXT: lis r5, 15258
; CHECK-PREP10-NEXT: ori r5, r5, 41712
; CHECK-PREP10-NEXT: stdx r4, r3, r5
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1000341504
%or = or i64 %and, 999990000

View File

@@ -7,16 +7,16 @@
; RUN: < %s | FileCheck %s --check-prefixes=CHECK,CHECK-P10
; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
; RUN: -mcpu=pwr9 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \
; RUN: < %s | FileCheck %s --check-prefixes=CHECK,CHECK-PREP10,CHECK-P9
; RUN: < %s | FileCheck %s --check-prefixes=CHECK,CHECK-PREP10
; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
; RUN: -mcpu=pwr9 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \
; RUN: < %s | FileCheck %s --check-prefixes=CHECK,CHECK-PREP10,CHECK-P9
; RUN: < %s | FileCheck %s --check-prefixes=CHECK,CHECK-PREP10
; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
; RUN: -mcpu=pwr8 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \
; RUN: < %s | FileCheck %s --check-prefixes=CHECK,CHECK-PREP10,CHECK-P8
; RUN: < %s | FileCheck %s --check-prefixes=CHECK,CHECK-PREP10
; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
; RUN: -mcpu=pwr8 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \
; RUN: < %s | FileCheck %s --check-prefixes=CHECK,CHECK-PREP10,CHECK-P8
; RUN: < %s | FileCheck %s --check-prefixes=CHECK,CHECK-PREP10
; Function Attrs: nofree norecurse nounwind uwtable willreturn
define dso_local signext i32 @ld_0_int32_t_uint8_t(i64 %ptr) {
@@ -174,23 +174,14 @@ define dso_local signext i32 @ld_disjoint_align32_int32_t_uint8_t(i64 %ptr) {
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_align32_int32_t_uint8_t:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: lis r4, -15264
; CHECK-P9-NEXT: and r3, r3, r4
; CHECK-P9-NEXT: lis r4, 15258
; CHECK-P9-NEXT: ori r4, r4, 41712
; CHECK-P9-NEXT: lbzx r3, r3, r4
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: ld_disjoint_align32_int32_t_uint8_t:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: lis r4, -15264
; CHECK-P8-NEXT: lis r5, 15258
; CHECK-P8-NEXT: and r3, r3, r4
; CHECK-P8-NEXT: ori r4, r5, 41712
; CHECK-P8-NEXT: lbzx r3, r3, r4
; CHECK-P8-NEXT: blr
; CHECK-PREP10-LABEL: ld_disjoint_align32_int32_t_uint8_t:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: lis r4, -15264
; CHECK-PREP10-NEXT: and r3, r3, r4
; CHECK-PREP10-NEXT: lis r4, 15258
; CHECK-PREP10-NEXT: ori r4, r4, 41712
; CHECK-PREP10-NEXT: lbzx r3, r3, r4
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1000341504
%or = or i64 %and, 999990000
@@ -468,25 +459,15 @@ define dso_local signext i32 @ld_disjoint_align32_int32_t_int8_t(i64 %ptr) {
; CHECK-P10-NEXT: extsb r3, r3
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_align32_int32_t_int8_t:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: lis r4, -15264
; CHECK-P9-NEXT: and r3, r3, r4
; CHECK-P9-NEXT: lis r4, 15258
; CHECK-P9-NEXT: ori r4, r4, 41712
; CHECK-P9-NEXT: lbzx r3, r3, r4
; CHECK-P9-NEXT: extsb r3, r3
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: ld_disjoint_align32_int32_t_int8_t:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: lis r4, -15264
; CHECK-P8-NEXT: lis r5, 15258
; CHECK-P8-NEXT: and r3, r3, r4
; CHECK-P8-NEXT: ori r4, r5, 41712
; CHECK-P8-NEXT: lbzx r3, r3, r4
; CHECK-P8-NEXT: extsb r3, r3
; CHECK-P8-NEXT: blr
; CHECK-PREP10-LABEL: ld_disjoint_align32_int32_t_int8_t:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: lis r4, -15264
; CHECK-PREP10-NEXT: and r3, r3, r4
; CHECK-PREP10-NEXT: lis r4, 15258
; CHECK-PREP10-NEXT: ori r4, r4, 41712
; CHECK-PREP10-NEXT: lbzx r3, r3, r4
; CHECK-PREP10-NEXT: extsb r3, r3
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1000341504
%or = or i64 %and, 999990000
@@ -762,23 +743,14 @@ define dso_local signext i32 @ld_disjoint_align32_int32_t_uint16_t(i64 %ptr) {
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_align32_int32_t_uint16_t:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: lis r4, -15264
; CHECK-P9-NEXT: and r3, r3, r4
; CHECK-P9-NEXT: lis r4, 15258
; CHECK-P9-NEXT: ori r4, r4, 41712
; CHECK-P9-NEXT: lhzx r3, r3, r4
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: ld_disjoint_align32_int32_t_uint16_t:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: lis r4, -15264
; CHECK-P8-NEXT: lis r5, 15258
; CHECK-P8-NEXT: and r3, r3, r4
; CHECK-P8-NEXT: ori r4, r5, 41712
; CHECK-P8-NEXT: lhzx r3, r3, r4
; CHECK-P8-NEXT: blr
; CHECK-PREP10-LABEL: ld_disjoint_align32_int32_t_uint16_t:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: lis r4, -15264
; CHECK-PREP10-NEXT: and r3, r3, r4
; CHECK-PREP10-NEXT: lis r4, 15258
; CHECK-PREP10-NEXT: ori r4, r4, 41712
; CHECK-PREP10-NEXT: lhzx r3, r3, r4
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1000341504
%or = or i64 %and, 999990000
@@ -1056,25 +1028,15 @@ define dso_local signext i32 @ld_disjoint_align32_int32_t_int16_t(i64 %ptr) {
; CHECK-P10-NEXT: extsh r3, r3
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_align32_int32_t_int16_t:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: lis r4, -15264
; CHECK-P9-NEXT: and r3, r3, r4
; CHECK-P9-NEXT: lis r4, 15258
; CHECK-P9-NEXT: ori r4, r4, 41712
; CHECK-P9-NEXT: lhzx r3, r3, r4
; CHECK-P9-NEXT: extsh r3, r3
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: ld_disjoint_align32_int32_t_int16_t:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: lis r4, -15264
; CHECK-P8-NEXT: lis r5, 15258
; CHECK-P8-NEXT: and r3, r3, r4
; CHECK-P8-NEXT: ori r4, r5, 41712
; CHECK-P8-NEXT: lhzx r3, r3, r4
; CHECK-P8-NEXT: extsh r3, r3
; CHECK-P8-NEXT: blr
; CHECK-PREP10-LABEL: ld_disjoint_align32_int32_t_int16_t:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: lis r4, -15264
; CHECK-PREP10-NEXT: and r3, r3, r4
; CHECK-PREP10-NEXT: lis r4, 15258
; CHECK-PREP10-NEXT: ori r4, r4, 41712
; CHECK-PREP10-NEXT: lhzx r3, r3, r4
; CHECK-PREP10-NEXT: extsh r3, r3
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1000341504
%or = or i64 %and, 999990000
@@ -1341,23 +1303,14 @@ define dso_local signext i32 @ld_disjoint_align32_int32_t_uint32_t(i64 %ptr) {
; CHECK-P10-NEXT: extsw r3, r3
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_align32_int32_t_uint32_t:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: lis r4, -15264
; CHECK-P9-NEXT: and r3, r3, r4
; CHECK-P9-NEXT: lis r4, 15258
; CHECK-P9-NEXT: ori r4, r4, 41712
; CHECK-P9-NEXT: lwax r3, r3, r4
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: ld_disjoint_align32_int32_t_uint32_t:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: lis r4, -15264
; CHECK-P8-NEXT: lis r5, 15258
; CHECK-P8-NEXT: and r3, r3, r4
; CHECK-P8-NEXT: ori r4, r5, 41712
; CHECK-P8-NEXT: lwax r3, r3, r4
; CHECK-P8-NEXT: blr
; CHECK-PREP10-LABEL: ld_disjoint_align32_int32_t_uint32_t:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: lis r4, -15264
; CHECK-PREP10-NEXT: and r3, r3, r4
; CHECK-PREP10-NEXT: lis r4, 15258
; CHECK-PREP10-NEXT: ori r4, r4, 41712
; CHECK-PREP10-NEXT: lwax r3, r3, r4
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1000341504
%or = or i64 %and, 999990000
@@ -1629,25 +1582,15 @@ define dso_local signext i32 @ld_disjoint_align32_int32_t_uint64_t(i64 %ptr) {
; CHECK-P10-NEXT: extsw r3, r3
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_align32_int32_t_uint64_t:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: lis r4, -15264
; CHECK-P9-NEXT: and r3, r3, r4
; CHECK-P9-NEXT: lis r4, 15258
; CHECK-P9-NEXT: ori r4, r4, 41712
; CHECK-P9-NEXT: ldx r3, r3, r4
; CHECK-P9-NEXT: extsw r3, r3
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: ld_disjoint_align32_int32_t_uint64_t:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: lis r4, -15264
; CHECK-P8-NEXT: lis r5, 15258
; CHECK-P8-NEXT: and r3, r3, r4
; CHECK-P8-NEXT: ori r4, r5, 41712
; CHECK-P8-NEXT: ldx r3, r3, r4
; CHECK-P8-NEXT: extsw r3, r3
; CHECK-P8-NEXT: blr
; CHECK-PREP10-LABEL: ld_disjoint_align32_int32_t_uint64_t:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: lis r4, -15264
; CHECK-PREP10-NEXT: and r3, r3, r4
; CHECK-PREP10-NEXT: lis r4, 15258
; CHECK-PREP10-NEXT: ori r4, r4, 41712
; CHECK-PREP10-NEXT: ldx r3, r3, r4
; CHECK-PREP10-NEXT: extsw r3, r3
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1000341504
%or = or i64 %and, 999990000
@@ -1923,23 +1866,14 @@ define dso_local zeroext i32 @ld_disjoint_align32_uint32_t_uint8_t(i64 %ptr) {
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_align32_uint32_t_uint8_t:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: lis r4, -15264
; CHECK-P9-NEXT: and r3, r3, r4
; CHECK-P9-NEXT: lis r4, 15258
; CHECK-P9-NEXT: ori r4, r4, 41712
; CHECK-P9-NEXT: lbzx r3, r3, r4
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: ld_disjoint_align32_uint32_t_uint8_t:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: lis r4, -15264
; CHECK-P8-NEXT: lis r5, 15258
; CHECK-P8-NEXT: and r3, r3, r4
; CHECK-P8-NEXT: ori r4, r5, 41712
; CHECK-P8-NEXT: lbzx r3, r3, r4
; CHECK-P8-NEXT: blr
; CHECK-PREP10-LABEL: ld_disjoint_align32_uint32_t_uint8_t:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: lis r4, -15264
; CHECK-PREP10-NEXT: and r3, r3, r4
; CHECK-PREP10-NEXT: lis r4, 15258
; CHECK-PREP10-NEXT: ori r4, r4, 41712
; CHECK-PREP10-NEXT: lbzx r3, r3, r4
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1000341504
%or = or i64 %and, 999990000
@@ -2229,27 +2163,16 @@ define dso_local zeroext i32 @ld_disjoint_align32_uint32_t_int8_t(i64 %ptr) {
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_align32_uint32_t_int8_t:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: lis r4, -15264
; CHECK-P9-NEXT: and r3, r3, r4
; CHECK-P9-NEXT: lis r4, 15258
; CHECK-P9-NEXT: ori r4, r4, 41712
; CHECK-P9-NEXT: lbzx r3, r3, r4
; CHECK-P9-NEXT: extsb r3, r3
; CHECK-P9-NEXT: clrldi r3, r3, 32
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: ld_disjoint_align32_uint32_t_int8_t:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: lis r4, -15264
; CHECK-P8-NEXT: lis r5, 15258
; CHECK-P8-NEXT: and r3, r3, r4
; CHECK-P8-NEXT: ori r4, r5, 41712
; CHECK-P8-NEXT: lbzx r3, r3, r4
; CHECK-P8-NEXT: extsb r3, r3
; CHECK-P8-NEXT: clrldi r3, r3, 32
; CHECK-P8-NEXT: blr
; CHECK-PREP10-LABEL: ld_disjoint_align32_uint32_t_int8_t:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: lis r4, -15264
; CHECK-PREP10-NEXT: and r3, r3, r4
; CHECK-PREP10-NEXT: lis r4, 15258
; CHECK-PREP10-NEXT: ori r4, r4, 41712
; CHECK-PREP10-NEXT: lbzx r3, r3, r4
; CHECK-PREP10-NEXT: extsb r3, r3
; CHECK-PREP10-NEXT: clrldi r3, r3, 32
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1000341504
%or = or i64 %and, 999990000
@@ -2533,23 +2456,14 @@ define dso_local zeroext i32 @ld_disjoint_align32_uint32_t_uint16_t(i64 %ptr) {
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_align32_uint32_t_uint16_t:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: lis r4, -15264
; CHECK-P9-NEXT: and r3, r3, r4
; CHECK-P9-NEXT: lis r4, 15258
; CHECK-P9-NEXT: ori r4, r4, 41712
; CHECK-P9-NEXT: lhzx r3, r3, r4
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: ld_disjoint_align32_uint32_t_uint16_t:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: lis r4, -15264
; CHECK-P8-NEXT: lis r5, 15258
; CHECK-P8-NEXT: and r3, r3, r4
; CHECK-P8-NEXT: ori r4, r5, 41712
; CHECK-P8-NEXT: lhzx r3, r3, r4
; CHECK-P8-NEXT: blr
; CHECK-PREP10-LABEL: ld_disjoint_align32_uint32_t_uint16_t:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: lis r4, -15264
; CHECK-PREP10-NEXT: and r3, r3, r4
; CHECK-PREP10-NEXT: lis r4, 15258
; CHECK-PREP10-NEXT: ori r4, r4, 41712
; CHECK-PREP10-NEXT: lhzx r3, r3, r4
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1000341504
%or = or i64 %and, 999990000
@@ -2829,25 +2743,15 @@ define dso_local zeroext i32 @ld_disjoint_align32_uint32_t_int16_t(i64 %ptr) {
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_align32_uint32_t_int16_t:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: lis r4, -15264
; CHECK-P9-NEXT: and r3, r3, r4
; CHECK-P9-NEXT: lis r4, 15258
; CHECK-P9-NEXT: ori r4, r4, 41712
; CHECK-P9-NEXT: lhax r3, r3, r4
; CHECK-P9-NEXT: clrldi r3, r3, 32
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: ld_disjoint_align32_uint32_t_int16_t:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: lis r4, -15264
; CHECK-P8-NEXT: lis r5, 15258
; CHECK-P8-NEXT: and r3, r3, r4
; CHECK-P8-NEXT: ori r4, r5, 41712
; CHECK-P8-NEXT: lhax r3, r3, r4
; CHECK-P8-NEXT: clrldi r3, r3, 32
; CHECK-P8-NEXT: blr
; CHECK-PREP10-LABEL: ld_disjoint_align32_uint32_t_int16_t:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: lis r4, -15264
; CHECK-PREP10-NEXT: and r3, r3, r4
; CHECK-PREP10-NEXT: lis r4, 15258
; CHECK-PREP10-NEXT: ori r4, r4, 41712
; CHECK-PREP10-NEXT: lhax r3, r3, r4
; CHECK-PREP10-NEXT: clrldi r3, r3, 32
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1000341504
%or = or i64 %and, 999990000
@@ -3114,23 +3018,14 @@ define dso_local zeroext i32 @ld_disjoint_align32_uint32_t_uint32_t(i64 %ptr) {
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_align32_uint32_t_uint32_t:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: lis r4, -15264
; CHECK-P9-NEXT: and r3, r3, r4
; CHECK-P9-NEXT: lis r4, 15258
; CHECK-P9-NEXT: ori r4, r4, 41712
; CHECK-P9-NEXT: lwzx r3, r3, r4
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: ld_disjoint_align32_uint32_t_uint32_t:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: lis r4, -15264
; CHECK-P8-NEXT: lis r5, 15258
; CHECK-P8-NEXT: and r3, r3, r4
; CHECK-P8-NEXT: ori r4, r5, 41712
; CHECK-P8-NEXT: lwzx r3, r3, r4
; CHECK-P8-NEXT: blr
; CHECK-PREP10-LABEL: ld_disjoint_align32_uint32_t_uint32_t:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: lis r4, -15264
; CHECK-PREP10-NEXT: and r3, r3, r4
; CHECK-PREP10-NEXT: lis r4, 15258
; CHECK-PREP10-NEXT: ori r4, r4, 41712
; CHECK-PREP10-NEXT: lwzx r3, r3, r4
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1000341504
%or = or i64 %and, 999990000
@@ -3402,25 +3297,15 @@ define dso_local zeroext i32 @ld_disjoint_align32_uint32_t_uint64_t(i64 %ptr) {
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_align32_uint32_t_uint64_t:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: lis r4, -15264
; CHECK-P9-NEXT: and r3, r3, r4
; CHECK-P9-NEXT: lis r4, 15258
; CHECK-P9-NEXT: ori r4, r4, 41712
; CHECK-P9-NEXT: ldx r3, r3, r4
; CHECK-P9-NEXT: clrldi r3, r3, 32
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: ld_disjoint_align32_uint32_t_uint64_t:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: lis r4, -15264
; CHECK-P8-NEXT: lis r5, 15258
; CHECK-P8-NEXT: and r3, r3, r4
; CHECK-P8-NEXT: ori r4, r5, 41712
; CHECK-P8-NEXT: ldx r3, r3, r4
; CHECK-P8-NEXT: clrldi r3, r3, 32
; CHECK-P8-NEXT: blr
; CHECK-PREP10-LABEL: ld_disjoint_align32_uint32_t_uint64_t:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: lis r4, -15264
; CHECK-PREP10-NEXT: and r3, r3, r4
; CHECK-PREP10-NEXT: lis r4, 15258
; CHECK-PREP10-NEXT: ori r4, r4, 41712
; CHECK-PREP10-NEXT: ldx r3, r3, r4
; CHECK-PREP10-NEXT: clrldi r3, r3, 32
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1000341504
%or = or i64 %and, 999990000
@@ -3694,23 +3579,14 @@ define dso_local void @st_disjoint_align32_uint32_t_uint8_t(i64 %ptr, i32 zeroex
; CHECK-P10-NEXT: pstb r4, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_uint32_t_uint8_t:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: lis r5, -15264
; CHECK-P9-NEXT: and r3, r3, r5
; CHECK-P9-NEXT: lis r5, 15258
; CHECK-P9-NEXT: ori r5, r5, 41712
; CHECK-P9-NEXT: stbx r4, r3, r5
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: st_disjoint_align32_uint32_t_uint8_t:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: lis r5, -15264
; CHECK-P8-NEXT: lis r6, 15258
; CHECK-P8-NEXT: and r3, r3, r5
; CHECK-P8-NEXT: ori r5, r6, 41712
; CHECK-P8-NEXT: stbx r4, r3, r5
; CHECK-P8-NEXT: blr
; CHECK-PREP10-LABEL: st_disjoint_align32_uint32_t_uint8_t:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: lis r5, -15264
; CHECK-PREP10-NEXT: and r3, r3, r5
; CHECK-PREP10-NEXT: lis r5, 15258
; CHECK-PREP10-NEXT: ori r5, r5, 41712
; CHECK-PREP10-NEXT: stbx r4, r3, r5
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1000341504
%or = or i64 %and, 999990000
@@ -3976,23 +3852,14 @@ define dso_local void @st_disjoint_align32_uint32_t_uint16_t(i64 %ptr, i32 zeroe
; CHECK-P10-NEXT: psth r4, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_uint32_t_uint16_t:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: lis r5, -15264
; CHECK-P9-NEXT: and r3, r3, r5
; CHECK-P9-NEXT: lis r5, 15258
; CHECK-P9-NEXT: ori r5, r5, 41712
; CHECK-P9-NEXT: sthx r4, r3, r5
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: st_disjoint_align32_uint32_t_uint16_t:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: lis r5, -15264
; CHECK-P8-NEXT: lis r6, 15258
; CHECK-P8-NEXT: and r3, r3, r5
; CHECK-P8-NEXT: ori r5, r6, 41712
; CHECK-P8-NEXT: sthx r4, r3, r5
; CHECK-P8-NEXT: blr
; CHECK-PREP10-LABEL: st_disjoint_align32_uint32_t_uint16_t:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: lis r5, -15264
; CHECK-PREP10-NEXT: and r3, r3, r5
; CHECK-PREP10-NEXT: lis r5, 15258
; CHECK-PREP10-NEXT: ori r5, r5, 41712
; CHECK-PREP10-NEXT: sthx r4, r3, r5
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1000341504
%or = or i64 %and, 999990000
@@ -4249,23 +4116,14 @@ define dso_local void @st_disjoint_align32_uint32_t_uint32_t(i64 %ptr, i32 zeroe
; CHECK-P10-NEXT: pstw r4, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_uint32_t_uint32_t:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: lis r5, -15264
; CHECK-P9-NEXT: and r3, r3, r5
; CHECK-P9-NEXT: lis r5, 15258
; CHECK-P9-NEXT: ori r5, r5, 41712
; CHECK-P9-NEXT: stwx r4, r3, r5
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: st_disjoint_align32_uint32_t_uint32_t:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: lis r5, -15264
; CHECK-P8-NEXT: lis r6, 15258
; CHECK-P8-NEXT: and r3, r3, r5
; CHECK-P8-NEXT: ori r5, r6, 41712
; CHECK-P8-NEXT: stwx r4, r3, r5
; CHECK-P8-NEXT: blr
; CHECK-PREP10-LABEL: st_disjoint_align32_uint32_t_uint32_t:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: lis r5, -15264
; CHECK-PREP10-NEXT: and r3, r3, r5
; CHECK-PREP10-NEXT: lis r5, 15258
; CHECK-PREP10-NEXT: ori r5, r5, 41712
; CHECK-PREP10-NEXT: stwx r4, r3, r5
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1000341504
%or = or i64 %and, 999990000
@@ -4525,23 +4383,14 @@ define dso_local void @st_disjoint_align32_uint32_t_uint64_t(i64 %ptr, i32 zeroe
; CHECK-P10-NEXT: pstd r4, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_uint32_t_uint64_t:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: lis r5, -15264
; CHECK-P9-NEXT: and r3, r3, r5
; CHECK-P9-NEXT: lis r5, 15258
; CHECK-P9-NEXT: ori r5, r5, 41712
; CHECK-P9-NEXT: stdx r4, r3, r5
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: st_disjoint_align32_uint32_t_uint64_t:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: lis r5, -15264
; CHECK-P8-NEXT: lis r6, 15258
; CHECK-P8-NEXT: and r3, r3, r5
; CHECK-P8-NEXT: ori r5, r6, 41712
; CHECK-P8-NEXT: stdx r4, r3, r5
; CHECK-P8-NEXT: blr
; CHECK-PREP10-LABEL: st_disjoint_align32_uint32_t_uint64_t:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: lis r5, -15264
; CHECK-PREP10-NEXT: and r3, r3, r5
; CHECK-PREP10-NEXT: lis r5, 15258
; CHECK-PREP10-NEXT: ori r5, r5, 41712
; CHECK-PREP10-NEXT: stdx r4, r3, r5
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1000341504
%or = or i64 %and, 999990000
@@ -4807,23 +4656,14 @@ define dso_local void @st_disjoint_align32_int32_t_uint64_t(i64 %ptr, i32 signex
; CHECK-P10-NEXT: pstd r4, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_int32_t_uint64_t:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: lis r5, -15264
; CHECK-P9-NEXT: and r3, r3, r5
; CHECK-P9-NEXT: lis r5, 15258
; CHECK-P9-NEXT: ori r5, r5, 41712
; CHECK-P9-NEXT: stdx r4, r3, r5
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: st_disjoint_align32_int32_t_uint64_t:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: lis r5, -15264
; CHECK-P8-NEXT: lis r6, 15258
; CHECK-P8-NEXT: and r3, r3, r5
; CHECK-P8-NEXT: ori r5, r6, 41712
; CHECK-P8-NEXT: stdx r4, r3, r5
; CHECK-P8-NEXT: blr
; CHECK-PREP10-LABEL: st_disjoint_align32_int32_t_uint64_t:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: lis r5, -15264
; CHECK-PREP10-NEXT: and r3, r3, r5
; CHECK-PREP10-NEXT: lis r5, 15258
; CHECK-PREP10-NEXT: ori r5, r5, 41712
; CHECK-PREP10-NEXT: stdx r4, r3, r5
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1000341504
%or = or i64 %and, 999990000

View File

@@ -174,23 +174,14 @@ define dso_local i64 @ld_disjoint_align32_int64_t_uint8_t(i64 %ptr) {
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_align32_int64_t_uint8_t:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: lis r4, -15264
; CHECK-P9-NEXT: and r3, r3, r4
; CHECK-P9-NEXT: lis r4, 15258
; CHECK-P9-NEXT: ori r4, r4, 41712
; CHECK-P9-NEXT: lbzx r3, r3, r4
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: ld_disjoint_align32_int64_t_uint8_t:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: lis r4, -15264
; CHECK-P8-NEXT: lis r5, 15258
; CHECK-P8-NEXT: and r3, r3, r4
; CHECK-P8-NEXT: ori r4, r5, 41712
; CHECK-P8-NEXT: lbzx r3, r3, r4
; CHECK-P8-NEXT: blr
; CHECK-PREP10-LABEL: ld_disjoint_align32_int64_t_uint8_t:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: lis r4, -15264
; CHECK-PREP10-NEXT: and r3, r3, r4
; CHECK-PREP10-NEXT: lis r4, 15258
; CHECK-PREP10-NEXT: ori r4, r4, 41712
; CHECK-PREP10-NEXT: lbzx r3, r3, r4
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1000341504
%or = or i64 %and, 999990000
@@ -468,25 +459,15 @@ define dso_local i64 @ld_disjoint_align32_int64_t_int8_t(i64 %ptr) {
; CHECK-P10-NEXT: extsb r3, r3
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_align32_int64_t_int8_t:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: lis r4, -15264
; CHECK-P9-NEXT: and r3, r3, r4
; CHECK-P9-NEXT: lis r4, 15258
; CHECK-P9-NEXT: ori r4, r4, 41712
; CHECK-P9-NEXT: lbzx r3, r3, r4
; CHECK-P9-NEXT: extsb r3, r3
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: ld_disjoint_align32_int64_t_int8_t:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: lis r4, -15264
; CHECK-P8-NEXT: lis r5, 15258
; CHECK-P8-NEXT: and r3, r3, r4
; CHECK-P8-NEXT: ori r4, r5, 41712
; CHECK-P8-NEXT: lbzx r3, r3, r4
; CHECK-P8-NEXT: extsb r3, r3
; CHECK-P8-NEXT: blr
; CHECK-PREP10-LABEL: ld_disjoint_align32_int64_t_int8_t:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: lis r4, -15264
; CHECK-PREP10-NEXT: and r3, r3, r4
; CHECK-PREP10-NEXT: lis r4, 15258
; CHECK-PREP10-NEXT: ori r4, r4, 41712
; CHECK-PREP10-NEXT: lbzx r3, r3, r4
; CHECK-PREP10-NEXT: extsb r3, r3
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1000341504
%or = or i64 %and, 999990000
@@ -762,23 +743,14 @@ define dso_local i64 @ld_disjoint_align32_int64_t_uint16_t(i64 %ptr) {
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_align32_int64_t_uint16_t:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: lis r4, -15264
; CHECK-P9-NEXT: and r3, r3, r4
; CHECK-P9-NEXT: lis r4, 15258
; CHECK-P9-NEXT: ori r4, r4, 41712
; CHECK-P9-NEXT: lhzx r3, r3, r4
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: ld_disjoint_align32_int64_t_uint16_t:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: lis r4, -15264
; CHECK-P8-NEXT: lis r5, 15258
; CHECK-P8-NEXT: and r3, r3, r4
; CHECK-P8-NEXT: ori r4, r5, 41712
; CHECK-P8-NEXT: lhzx r3, r3, r4
; CHECK-P8-NEXT: blr
; CHECK-PREP10-LABEL: ld_disjoint_align32_int64_t_uint16_t:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: lis r4, -15264
; CHECK-PREP10-NEXT: and r3, r3, r4
; CHECK-PREP10-NEXT: lis r4, 15258
; CHECK-PREP10-NEXT: ori r4, r4, 41712
; CHECK-PREP10-NEXT: lhzx r3, r3, r4
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1000341504
%or = or i64 %and, 999990000
@@ -1056,25 +1028,15 @@ define dso_local i64 @ld_disjoint_align32_int64_t_int16_t(i64 %ptr) {
; CHECK-P10-NEXT: extsh r3, r3
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_align32_int64_t_int16_t:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: lis r4, -15264
; CHECK-P9-NEXT: and r3, r3, r4
; CHECK-P9-NEXT: lis r4, 15258
; CHECK-P9-NEXT: ori r4, r4, 41712
; CHECK-P9-NEXT: lhzx r3, r3, r4
; CHECK-P9-NEXT: extsh r3, r3
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: ld_disjoint_align32_int64_t_int16_t:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: lis r4, -15264
; CHECK-P8-NEXT: lis r5, 15258
; CHECK-P8-NEXT: and r3, r3, r4
; CHECK-P8-NEXT: ori r4, r5, 41712
; CHECK-P8-NEXT: lhzx r3, r3, r4
; CHECK-P8-NEXT: extsh r3, r3
; CHECK-P8-NEXT: blr
; CHECK-PREP10-LABEL: ld_disjoint_align32_int64_t_int16_t:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: lis r4, -15264
; CHECK-PREP10-NEXT: and r3, r3, r4
; CHECK-PREP10-NEXT: lis r4, 15258
; CHECK-PREP10-NEXT: ori r4, r4, 41712
; CHECK-PREP10-NEXT: lhzx r3, r3, r4
; CHECK-PREP10-NEXT: extsh r3, r3
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1000341504
%or = or i64 %and, 999990000
@@ -1350,23 +1312,14 @@ define dso_local i64 @ld_disjoint_align32_int64_t_uint32_t(i64 %ptr) {
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_align32_int64_t_uint32_t:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: lis r4, -15264
; CHECK-P9-NEXT: and r3, r3, r4
; CHECK-P9-NEXT: lis r4, 15258
; CHECK-P9-NEXT: ori r4, r4, 41712
; CHECK-P9-NEXT: lwzx r3, r3, r4
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: ld_disjoint_align32_int64_t_uint32_t:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: lis r4, -15264
; CHECK-P8-NEXT: lis r5, 15258
; CHECK-P8-NEXT: and r3, r3, r4
; CHECK-P8-NEXT: ori r4, r5, 41712
; CHECK-P8-NEXT: lwzx r3, r3, r4
; CHECK-P8-NEXT: blr
; CHECK-PREP10-LABEL: ld_disjoint_align32_int64_t_uint32_t:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: lis r4, -15264
; CHECK-PREP10-NEXT: and r3, r3, r4
; CHECK-PREP10-NEXT: lis r4, 15258
; CHECK-PREP10-NEXT: ori r4, r4, 41712
; CHECK-PREP10-NEXT: lwzx r3, r3, r4
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1000341504
%or = or i64 %and, 999990000
@@ -1634,23 +1587,14 @@ define dso_local i64 @ld_disjoint_align32_int64_t_int32_t(i64 %ptr) {
; CHECK-P10-NEXT: extsw r3, r3
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_align32_int64_t_int32_t:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: lis r4, -15264
; CHECK-P9-NEXT: and r3, r3, r4
; CHECK-P9-NEXT: lis r4, 15258
; CHECK-P9-NEXT: ori r4, r4, 41712
; CHECK-P9-NEXT: lwax r3, r3, r4
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: ld_disjoint_align32_int64_t_int32_t:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: lis r4, -15264
; CHECK-P8-NEXT: lis r5, 15258
; CHECK-P8-NEXT: and r3, r3, r4
; CHECK-P8-NEXT: ori r4, r5, 41712
; CHECK-P8-NEXT: lwax r3, r3, r4
; CHECK-P8-NEXT: blr
; CHECK-PREP10-LABEL: ld_disjoint_align32_int64_t_int32_t:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: lis r4, -15264
; CHECK-PREP10-NEXT: and r3, r3, r4
; CHECK-PREP10-NEXT: lis r4, 15258
; CHECK-PREP10-NEXT: ori r4, r4, 41712
; CHECK-PREP10-NEXT: lwax r3, r3, r4
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1000341504
%or = or i64 %and, 999990000
@@ -1907,23 +1851,14 @@ define dso_local i64 @ld_disjoint_align32_int64_t_uint64_t(i64 %ptr) {
; CHECK-P10-NEXT: pld r3, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_align32_int64_t_uint64_t:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: lis r4, -15264
; CHECK-P9-NEXT: and r3, r3, r4
; CHECK-P9-NEXT: lis r4, 15258
; CHECK-P9-NEXT: ori r4, r4, 41712
; CHECK-P9-NEXT: ldx r3, r3, r4
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: ld_disjoint_align32_int64_t_uint64_t:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: lis r4, -15264
; CHECK-P8-NEXT: lis r5, 15258
; CHECK-P8-NEXT: and r3, r3, r4
; CHECK-P8-NEXT: ori r4, r5, 41712
; CHECK-P8-NEXT: ldx r3, r3, r4
; CHECK-P8-NEXT: blr
; CHECK-PREP10-LABEL: ld_disjoint_align32_int64_t_uint64_t:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: lis r4, -15264
; CHECK-PREP10-NEXT: and r3, r3, r4
; CHECK-PREP10-NEXT: lis r4, 15258
; CHECK-PREP10-NEXT: ori r4, r4, 41712
; CHECK-PREP10-NEXT: ldx r3, r3, r4
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1000341504
%or = or i64 %and, 999990000
@@ -2185,23 +2120,14 @@ define dso_local i64 @ld_disjoint_align32_uint64_t_uint8_t(i64 %ptr) {
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_align32_uint64_t_uint8_t:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: lis r4, -15264
; CHECK-P9-NEXT: and r3, r3, r4
; CHECK-P9-NEXT: lis r4, 15258
; CHECK-P9-NEXT: ori r4, r4, 41712
; CHECK-P9-NEXT: lbzx r3, r3, r4
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: ld_disjoint_align32_uint64_t_uint8_t:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: lis r4, -15264
; CHECK-P8-NEXT: lis r5, 15258
; CHECK-P8-NEXT: and r3, r3, r4
; CHECK-P8-NEXT: ori r4, r5, 41712
; CHECK-P8-NEXT: lbzx r3, r3, r4
; CHECK-P8-NEXT: blr
; CHECK-PREP10-LABEL: ld_disjoint_align32_uint64_t_uint8_t:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: lis r4, -15264
; CHECK-PREP10-NEXT: and r3, r3, r4
; CHECK-PREP10-NEXT: lis r4, 15258
; CHECK-PREP10-NEXT: ori r4, r4, 41712
; CHECK-PREP10-NEXT: lbzx r3, r3, r4
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1000341504
%or = or i64 %and, 999990000
@@ -2479,25 +2405,15 @@ define dso_local i64 @ld_disjoint_align32_uint64_t_int8_t(i64 %ptr) {
; CHECK-P10-NEXT: extsb r3, r3
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_align32_uint64_t_int8_t:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: lis r4, -15264
; CHECK-P9-NEXT: and r3, r3, r4
; CHECK-P9-NEXT: lis r4, 15258
; CHECK-P9-NEXT: ori r4, r4, 41712
; CHECK-P9-NEXT: lbzx r3, r3, r4
; CHECK-P9-NEXT: extsb r3, r3
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: ld_disjoint_align32_uint64_t_int8_t:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: lis r4, -15264
; CHECK-P8-NEXT: lis r5, 15258
; CHECK-P8-NEXT: and r3, r3, r4
; CHECK-P8-NEXT: ori r4, r5, 41712
; CHECK-P8-NEXT: lbzx r3, r3, r4
; CHECK-P8-NEXT: extsb r3, r3
; CHECK-P8-NEXT: blr
; CHECK-PREP10-LABEL: ld_disjoint_align32_uint64_t_int8_t:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: lis r4, -15264
; CHECK-PREP10-NEXT: and r3, r3, r4
; CHECK-PREP10-NEXT: lis r4, 15258
; CHECK-PREP10-NEXT: ori r4, r4, 41712
; CHECK-PREP10-NEXT: lbzx r3, r3, r4
; CHECK-PREP10-NEXT: extsb r3, r3
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1000341504
%or = or i64 %and, 999990000
@@ -2773,23 +2689,14 @@ define dso_local i64 @ld_disjoint_align32_uint64_t_uint16_t(i64 %ptr) {
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_align32_uint64_t_uint16_t:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: lis r4, -15264
; CHECK-P9-NEXT: and r3, r3, r4
; CHECK-P9-NEXT: lis r4, 15258
; CHECK-P9-NEXT: ori r4, r4, 41712
; CHECK-P9-NEXT: lhzx r3, r3, r4
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: ld_disjoint_align32_uint64_t_uint16_t:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: lis r4, -15264
; CHECK-P8-NEXT: lis r5, 15258
; CHECK-P8-NEXT: and r3, r3, r4
; CHECK-P8-NEXT: ori r4, r5, 41712
; CHECK-P8-NEXT: lhzx r3, r3, r4
; CHECK-P8-NEXT: blr
; CHECK-PREP10-LABEL: ld_disjoint_align32_uint64_t_uint16_t:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: lis r4, -15264
; CHECK-PREP10-NEXT: and r3, r3, r4
; CHECK-PREP10-NEXT: lis r4, 15258
; CHECK-PREP10-NEXT: ori r4, r4, 41712
; CHECK-PREP10-NEXT: lhzx r3, r3, r4
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1000341504
%or = or i64 %and, 999990000
@@ -3067,25 +2974,15 @@ define dso_local i64 @ld_disjoint_align32_uint64_t_int16_t(i64 %ptr) {
; CHECK-P10-NEXT: extsh r3, r3
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_align32_uint64_t_int16_t:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: lis r4, -15264
; CHECK-P9-NEXT: and r3, r3, r4
; CHECK-P9-NEXT: lis r4, 15258
; CHECK-P9-NEXT: ori r4, r4, 41712
; CHECK-P9-NEXT: lhzx r3, r3, r4
; CHECK-P9-NEXT: extsh r3, r3
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: ld_disjoint_align32_uint64_t_int16_t:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: lis r4, -15264
; CHECK-P8-NEXT: lis r5, 15258
; CHECK-P8-NEXT: and r3, r3, r4
; CHECK-P8-NEXT: ori r4, r5, 41712
; CHECK-P8-NEXT: lhzx r3, r3, r4
; CHECK-P8-NEXT: extsh r3, r3
; CHECK-P8-NEXT: blr
; CHECK-PREP10-LABEL: ld_disjoint_align32_uint64_t_int16_t:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: lis r4, -15264
; CHECK-PREP10-NEXT: and r3, r3, r4
; CHECK-PREP10-NEXT: lis r4, 15258
; CHECK-PREP10-NEXT: ori r4, r4, 41712
; CHECK-PREP10-NEXT: lhzx r3, r3, r4
; CHECK-PREP10-NEXT: extsh r3, r3
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1000341504
%or = or i64 %and, 999990000
@@ -3361,23 +3258,14 @@ define dso_local i64 @ld_disjoint_align32_uint64_t_uint32_t(i64 %ptr) {
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_align32_uint64_t_uint32_t:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: lis r4, -15264
; CHECK-P9-NEXT: and r3, r3, r4
; CHECK-P9-NEXT: lis r4, 15258
; CHECK-P9-NEXT: ori r4, r4, 41712
; CHECK-P9-NEXT: lwzx r3, r3, r4
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: ld_disjoint_align32_uint64_t_uint32_t:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: lis r4, -15264
; CHECK-P8-NEXT: lis r5, 15258
; CHECK-P8-NEXT: and r3, r3, r4
; CHECK-P8-NEXT: ori r4, r5, 41712
; CHECK-P8-NEXT: lwzx r3, r3, r4
; CHECK-P8-NEXT: blr
; CHECK-PREP10-LABEL: ld_disjoint_align32_uint64_t_uint32_t:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: lis r4, -15264
; CHECK-PREP10-NEXT: and r3, r3, r4
; CHECK-PREP10-NEXT: lis r4, 15258
; CHECK-PREP10-NEXT: ori r4, r4, 41712
; CHECK-PREP10-NEXT: lwzx r3, r3, r4
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1000341504
%or = or i64 %and, 999990000
@@ -3645,23 +3533,14 @@ define dso_local i64 @ld_disjoint_align32_uint64_t_int32_t(i64 %ptr) {
; CHECK-P10-NEXT: extsw r3, r3
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_align32_uint64_t_int32_t:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: lis r4, -15264
; CHECK-P9-NEXT: and r3, r3, r4
; CHECK-P9-NEXT: lis r4, 15258
; CHECK-P9-NEXT: ori r4, r4, 41712
; CHECK-P9-NEXT: lwax r3, r3, r4
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: ld_disjoint_align32_uint64_t_int32_t:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: lis r4, -15264
; CHECK-P8-NEXT: lis r5, 15258
; CHECK-P8-NEXT: and r3, r3, r4
; CHECK-P8-NEXT: ori r4, r5, 41712
; CHECK-P8-NEXT: lwax r3, r3, r4
; CHECK-P8-NEXT: blr
; CHECK-PREP10-LABEL: ld_disjoint_align32_uint64_t_int32_t:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: lis r4, -15264
; CHECK-PREP10-NEXT: and r3, r3, r4
; CHECK-PREP10-NEXT: lis r4, 15258
; CHECK-PREP10-NEXT: ori r4, r4, 41712
; CHECK-PREP10-NEXT: lwax r3, r3, r4
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1000341504
%or = or i64 %and, 999990000
@@ -3918,23 +3797,14 @@ define dso_local i64 @ld_disjoint_align32_uint64_t_uint64_t(i64 %ptr) {
; CHECK-P10-NEXT: pld r3, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_align32_uint64_t_uint64_t:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: lis r4, -15264
; CHECK-P9-NEXT: and r3, r3, r4
; CHECK-P9-NEXT: lis r4, 15258
; CHECK-P9-NEXT: ori r4, r4, 41712
; CHECK-P9-NEXT: ldx r3, r3, r4
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: ld_disjoint_align32_uint64_t_uint64_t:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: lis r4, -15264
; CHECK-P8-NEXT: lis r5, 15258
; CHECK-P8-NEXT: and r3, r3, r4
; CHECK-P8-NEXT: ori r4, r5, 41712
; CHECK-P8-NEXT: ldx r3, r3, r4
; CHECK-P8-NEXT: blr
; CHECK-PREP10-LABEL: ld_disjoint_align32_uint64_t_uint64_t:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: lis r4, -15264
; CHECK-PREP10-NEXT: and r3, r3, r4
; CHECK-PREP10-NEXT: lis r4, 15258
; CHECK-PREP10-NEXT: ori r4, r4, 41712
; CHECK-PREP10-NEXT: ldx r3, r3, r4
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1000341504
%or = or i64 %and, 999990000
@@ -4194,23 +4064,14 @@ define dso_local void @st_disjoint_align32_uint64_t_uint8_t(i64 %ptr, i64 %str)
; CHECK-P10-NEXT: pstb r4, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_uint64_t_uint8_t:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: lis r5, -15264
; CHECK-P9-NEXT: and r3, r3, r5
; CHECK-P9-NEXT: lis r5, 15258
; CHECK-P9-NEXT: ori r5, r5, 41712
; CHECK-P9-NEXT: stbx r4, r3, r5
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: st_disjoint_align32_uint64_t_uint8_t:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: lis r5, -15264
; CHECK-P8-NEXT: lis r6, 15258
; CHECK-P8-NEXT: and r3, r3, r5
; CHECK-P8-NEXT: ori r5, r6, 41712
; CHECK-P8-NEXT: stbx r4, r3, r5
; CHECK-P8-NEXT: blr
; CHECK-PREP10-LABEL: st_disjoint_align32_uint64_t_uint8_t:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: lis r5, -15264
; CHECK-PREP10-NEXT: and r3, r3, r5
; CHECK-PREP10-NEXT: lis r5, 15258
; CHECK-PREP10-NEXT: ori r5, r5, 41712
; CHECK-PREP10-NEXT: stbx r4, r3, r5
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1000341504
%or = or i64 %and, 999990000
@@ -4476,23 +4337,14 @@ define dso_local void @st_disjoint_align32_uint64_t_uint16_t(i64 %ptr, i64 %str)
; CHECK-P10-NEXT: psth r4, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_uint64_t_uint16_t:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: lis r5, -15264
; CHECK-P9-NEXT: and r3, r3, r5
; CHECK-P9-NEXT: lis r5, 15258
; CHECK-P9-NEXT: ori r5, r5, 41712
; CHECK-P9-NEXT: sthx r4, r3, r5
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: st_disjoint_align32_uint64_t_uint16_t:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: lis r5, -15264
; CHECK-P8-NEXT: lis r6, 15258
; CHECK-P8-NEXT: and r3, r3, r5
; CHECK-P8-NEXT: ori r5, r6, 41712
; CHECK-P8-NEXT: sthx r4, r3, r5
; CHECK-P8-NEXT: blr
; CHECK-PREP10-LABEL: st_disjoint_align32_uint64_t_uint16_t:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: lis r5, -15264
; CHECK-PREP10-NEXT: and r3, r3, r5
; CHECK-PREP10-NEXT: lis r5, 15258
; CHECK-PREP10-NEXT: ori r5, r5, 41712
; CHECK-PREP10-NEXT: sthx r4, r3, r5
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1000341504
%or = or i64 %and, 999990000
@@ -4758,23 +4610,14 @@ define dso_local void @st_disjoint_align32_uint64_t_uint32_t(i64 %ptr, i64 %str)
; CHECK-P10-NEXT: pstw r4, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_uint64_t_uint32_t:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: lis r5, -15264
; CHECK-P9-NEXT: and r3, r3, r5
; CHECK-P9-NEXT: lis r5, 15258
; CHECK-P9-NEXT: ori r5, r5, 41712
; CHECK-P9-NEXT: stwx r4, r3, r5
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: st_disjoint_align32_uint64_t_uint32_t:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: lis r5, -15264
; CHECK-P8-NEXT: lis r6, 15258
; CHECK-P8-NEXT: and r3, r3, r5
; CHECK-P8-NEXT: ori r5, r6, 41712
; CHECK-P8-NEXT: stwx r4, r3, r5
; CHECK-P8-NEXT: blr
; CHECK-PREP10-LABEL: st_disjoint_align32_uint64_t_uint32_t:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: lis r5, -15264
; CHECK-PREP10-NEXT: and r3, r3, r5
; CHECK-PREP10-NEXT: lis r5, 15258
; CHECK-PREP10-NEXT: ori r5, r5, 41712
; CHECK-PREP10-NEXT: stwx r4, r3, r5
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1000341504
%or = or i64 %and, 999990000
@@ -5031,23 +4874,14 @@ define dso_local void @st_disjoint_align32_uint64_t_uint64_t(i64 %ptr, i64 %str)
; CHECK-P10-NEXT: pstd r4, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_uint64_t_uint64_t:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: lis r5, -15264
; CHECK-P9-NEXT: and r3, r3, r5
; CHECK-P9-NEXT: lis r5, 15258
; CHECK-P9-NEXT: ori r5, r5, 41712
; CHECK-P9-NEXT: stdx r4, r3, r5
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: st_disjoint_align32_uint64_t_uint64_t:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: lis r5, -15264
; CHECK-P8-NEXT: lis r6, 15258
; CHECK-P8-NEXT: and r3, r3, r5
; CHECK-P8-NEXT: ori r5, r6, 41712
; CHECK-P8-NEXT: stdx r4, r3, r5
; CHECK-P8-NEXT: blr
; CHECK-PREP10-LABEL: st_disjoint_align32_uint64_t_uint64_t:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: lis r5, -15264
; CHECK-PREP10-NEXT: and r3, r3, r5
; CHECK-PREP10-NEXT: lis r5, 15258
; CHECK-PREP10-NEXT: ori r5, r5, 41712
; CHECK-PREP10-NEXT: stdx r4, r3, r5
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1000341504
%or = or i64 %and, 999990000
@@ -5152,3 +4986,6 @@ entry:
store atomic i64 %str, ptr inttoptr (i64 1000000000000 to ptr) monotonic, align 4096
ret void
}
;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
; CHECK-P8: {{.*}}
; CHECK-P9: {{.*}}

View File

@@ -7,16 +7,16 @@
; RUN: < %s | FileCheck %s --check-prefixes=CHECK,CHECK-P10
; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
; RUN: -mcpu=pwr9 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \
; RUN: < %s | FileCheck %s --check-prefixes=CHECK,CHECK-PREP10,CHECK-P9
; RUN: < %s | FileCheck %s --check-prefixes=CHECK,CHECK-PREP10
; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
; RUN: -mcpu=pwr9 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \
; RUN: < %s | FileCheck %s --check-prefixes=CHECK,CHECK-PREP10,CHECK-P9
; RUN: < %s | FileCheck %s --check-prefixes=CHECK,CHECK-PREP10
; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
; RUN: -mcpu=pwr8 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \
; RUN: < %s | FileCheck %s --check-prefixes=CHECK,CHECK-PREP10,CHECK-P8
; RUN: < %s | FileCheck %s --check-prefixes=CHECK,CHECK-PREP10
; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
; RUN: -mcpu=pwr8 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \
; RUN: < %s | FileCheck %s --check-prefixes=CHECK,CHECK-PREP10,CHECK-P8
; RUN: < %s | FileCheck %s --check-prefixes=CHECK,CHECK-PREP10
; Function Attrs: nofree norecurse nounwind uwtable willreturn
define dso_local signext i8 @ld_0_int8_t_uint8_t(i64 %ptr) {
@@ -175,25 +175,15 @@ define dso_local signext i8 @ld_disjoint_align32_int8_t_uint8_t(i64 %ptr) {
; CHECK-P10-NEXT: extsb r3, r3
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_align32_int8_t_uint8_t:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: lis r4, -15264
; CHECK-P9-NEXT: and r3, r3, r4
; CHECK-P9-NEXT: lis r4, 15258
; CHECK-P9-NEXT: ori r4, r4, 41712
; CHECK-P9-NEXT: lbzx r3, r3, r4
; CHECK-P9-NEXT: extsb r3, r3
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: ld_disjoint_align32_int8_t_uint8_t:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: lis r4, -15264
; CHECK-P8-NEXT: lis r5, 15258
; CHECK-P8-NEXT: and r3, r3, r4
; CHECK-P8-NEXT: ori r4, r5, 41712
; CHECK-P8-NEXT: lbzx r3, r3, r4
; CHECK-P8-NEXT: extsb r3, r3
; CHECK-P8-NEXT: blr
; CHECK-PREP10-LABEL: ld_disjoint_align32_int8_t_uint8_t:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: lis r4, -15264
; CHECK-PREP10-NEXT: and r3, r3, r4
; CHECK-PREP10-NEXT: lis r4, 15258
; CHECK-PREP10-NEXT: ori r4, r4, 41712
; CHECK-PREP10-NEXT: lbzx r3, r3, r4
; CHECK-PREP10-NEXT: extsb r3, r3
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1000341504
%or = or i64 %and, 999990000
@@ -473,25 +463,15 @@ define dso_local signext i8 @ld_disjoint_align32_int8_t_uint16_t(i64 %ptr) {
; CHECK-P10-NEXT: extsb r3, r3
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_align32_int8_t_uint16_t:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: lis r4, -15264
; CHECK-P9-NEXT: and r3, r3, r4
; CHECK-P9-NEXT: lis r4, 15258
; CHECK-P9-NEXT: ori r4, r4, 41712
; CHECK-P9-NEXT: lhzx r3, r3, r4
; CHECK-P9-NEXT: extsb r3, r3
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: ld_disjoint_align32_int8_t_uint16_t:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: lis r4, -15264
; CHECK-P8-NEXT: lis r5, 15258
; CHECK-P8-NEXT: and r3, r3, r4
; CHECK-P8-NEXT: ori r4, r5, 41712
; CHECK-P8-NEXT: lhzx r3, r3, r4
; CHECK-P8-NEXT: extsb r3, r3
; CHECK-P8-NEXT: blr
; CHECK-PREP10-LABEL: ld_disjoint_align32_int8_t_uint16_t:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: lis r4, -15264
; CHECK-PREP10-NEXT: and r3, r3, r4
; CHECK-PREP10-NEXT: lis r4, 15258
; CHECK-PREP10-NEXT: ori r4, r4, 41712
; CHECK-PREP10-NEXT: lhzx r3, r3, r4
; CHECK-PREP10-NEXT: extsb r3, r3
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1000341504
%or = or i64 %and, 999990000
@@ -777,25 +757,15 @@ define dso_local signext i8 @ld_disjoint_align32_int8_t_uint32_t(i64 %ptr) {
; CHECK-P10-NEXT: extsb r3, r3
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_align32_int8_t_uint32_t:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: lis r4, -15264
; CHECK-P9-NEXT: and r3, r3, r4
; CHECK-P9-NEXT: lis r4, 15258
; CHECK-P9-NEXT: ori r4, r4, 41712
; CHECK-P9-NEXT: lwzx r3, r3, r4
; CHECK-P9-NEXT: extsb r3, r3
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: ld_disjoint_align32_int8_t_uint32_t:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: lis r4, -15264
; CHECK-P8-NEXT: lis r5, 15258
; CHECK-P8-NEXT: and r3, r3, r4
; CHECK-P8-NEXT: ori r4, r5, 41712
; CHECK-P8-NEXT: lwzx r3, r3, r4
; CHECK-P8-NEXT: extsb r3, r3
; CHECK-P8-NEXT: blr
; CHECK-PREP10-LABEL: ld_disjoint_align32_int8_t_uint32_t:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: lis r4, -15264
; CHECK-PREP10-NEXT: and r3, r3, r4
; CHECK-PREP10-NEXT: lis r4, 15258
; CHECK-PREP10-NEXT: ori r4, r4, 41712
; CHECK-PREP10-NEXT: lwzx r3, r3, r4
; CHECK-PREP10-NEXT: extsb r3, r3
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1000341504
%or = or i64 %and, 999990000
@@ -1081,25 +1051,15 @@ define dso_local signext i8 @ld_disjoint_align32_int8_t_uint64_t(i64 %ptr) {
; CHECK-P10-NEXT: extsb r3, r3
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_align32_int8_t_uint64_t:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: lis r4, -15264
; CHECK-P9-NEXT: and r3, r3, r4
; CHECK-P9-NEXT: lis r4, 15258
; CHECK-P9-NEXT: ori r4, r4, 41712
; CHECK-P9-NEXT: ldx r3, r3, r4
; CHECK-P9-NEXT: extsb r3, r3
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: ld_disjoint_align32_int8_t_uint64_t:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: lis r4, -15264
; CHECK-P8-NEXT: lis r5, 15258
; CHECK-P8-NEXT: and r3, r3, r4
; CHECK-P8-NEXT: ori r4, r5, 41712
; CHECK-P8-NEXT: ldx r3, r3, r4
; CHECK-P8-NEXT: extsb r3, r3
; CHECK-P8-NEXT: blr
; CHECK-PREP10-LABEL: ld_disjoint_align32_int8_t_uint64_t:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: lis r4, -15264
; CHECK-PREP10-NEXT: and r3, r3, r4
; CHECK-PREP10-NEXT: lis r4, 15258
; CHECK-PREP10-NEXT: ori r4, r4, 41712
; CHECK-PREP10-NEXT: ldx r3, r3, r4
; CHECK-PREP10-NEXT: extsb r3, r3
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1000341504
%or = or i64 %and, 999990000
@@ -1366,23 +1326,14 @@ define dso_local zeroext i8 @ld_disjoint_align32_uint8_t_uint8_t(i64 %ptr) {
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_align32_uint8_t_uint8_t:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: lis r4, -15264
; CHECK-P9-NEXT: and r3, r3, r4
; CHECK-P9-NEXT: lis r4, 15258
; CHECK-P9-NEXT: ori r4, r4, 41712
; CHECK-P9-NEXT: lbzx r3, r3, r4
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: ld_disjoint_align32_uint8_t_uint8_t:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: lis r4, -15264
; CHECK-P8-NEXT: lis r5, 15258
; CHECK-P8-NEXT: and r3, r3, r4
; CHECK-P8-NEXT: ori r4, r5, 41712
; CHECK-P8-NEXT: lbzx r3, r3, r4
; CHECK-P8-NEXT: blr
; CHECK-PREP10-LABEL: ld_disjoint_align32_uint8_t_uint8_t:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: lis r4, -15264
; CHECK-PREP10-NEXT: and r3, r3, r4
; CHECK-PREP10-NEXT: lis r4, 15258
; CHECK-PREP10-NEXT: ori r4, r4, 41712
; CHECK-PREP10-NEXT: lbzx r3, r3, r4
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1000341504
%or = or i64 %and, 999990000
@@ -1654,25 +1605,15 @@ define dso_local zeroext i8 @ld_disjoint_align32_uint8_t_uint16_t(i64 %ptr) {
; CHECK-P10-NEXT: clrldi r3, r3, 56
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_align32_uint8_t_uint16_t:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: lis r4, -15264
; CHECK-P9-NEXT: and r3, r3, r4
; CHECK-P9-NEXT: lis r4, 15258
; CHECK-P9-NEXT: ori r4, r4, 41712
; CHECK-P9-NEXT: lhzx r3, r3, r4
; CHECK-P9-NEXT: clrldi r3, r3, 56
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: ld_disjoint_align32_uint8_t_uint16_t:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: lis r4, -15264
; CHECK-P8-NEXT: lis r5, 15258
; CHECK-P8-NEXT: and r3, r3, r4
; CHECK-P8-NEXT: ori r4, r5, 41712
; CHECK-P8-NEXT: lhzx r3, r3, r4
; CHECK-P8-NEXT: clrldi r3, r3, 56
; CHECK-P8-NEXT: blr
; CHECK-PREP10-LABEL: ld_disjoint_align32_uint8_t_uint16_t:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: lis r4, -15264
; CHECK-PREP10-NEXT: and r3, r3, r4
; CHECK-PREP10-NEXT: lis r4, 15258
; CHECK-PREP10-NEXT: ori r4, r4, 41712
; CHECK-PREP10-NEXT: lhzx r3, r3, r4
; CHECK-PREP10-NEXT: clrldi r3, r3, 56
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1000341504
%or = or i64 %and, 999990000
@@ -1958,25 +1899,15 @@ define dso_local zeroext i8 @ld_disjoint_align32_uint8_t_uint32_t(i64 %ptr) {
; CHECK-P10-NEXT: clrldi r3, r3, 56
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_align32_uint8_t_uint32_t:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: lis r4, -15264
; CHECK-P9-NEXT: and r3, r3, r4
; CHECK-P9-NEXT: lis r4, 15258
; CHECK-P9-NEXT: ori r4, r4, 41712
; CHECK-P9-NEXT: lwzx r3, r3, r4
; CHECK-P9-NEXT: clrldi r3, r3, 56
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: ld_disjoint_align32_uint8_t_uint32_t:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: lis r4, -15264
; CHECK-P8-NEXT: lis r5, 15258
; CHECK-P8-NEXT: and r3, r3, r4
; CHECK-P8-NEXT: ori r4, r5, 41712
; CHECK-P8-NEXT: lwzx r3, r3, r4
; CHECK-P8-NEXT: clrldi r3, r3, 56
; CHECK-P8-NEXT: blr
; CHECK-PREP10-LABEL: ld_disjoint_align32_uint8_t_uint32_t:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: lis r4, -15264
; CHECK-PREP10-NEXT: and r3, r3, r4
; CHECK-PREP10-NEXT: lis r4, 15258
; CHECK-PREP10-NEXT: ori r4, r4, 41712
; CHECK-PREP10-NEXT: lwzx r3, r3, r4
; CHECK-PREP10-NEXT: clrldi r3, r3, 56
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1000341504
%or = or i64 %and, 999990000
@@ -2262,25 +2193,15 @@ define dso_local zeroext i8 @ld_disjoint_align32_uint8_t_uint64_t(i64 %ptr) {
; CHECK-P10-NEXT: clrldi r3, r3, 56
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_align32_uint8_t_uint64_t:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: lis r4, -15264
; CHECK-P9-NEXT: and r3, r3, r4
; CHECK-P9-NEXT: lis r4, 15258
; CHECK-P9-NEXT: ori r4, r4, 41712
; CHECK-P9-NEXT: ldx r3, r3, r4
; CHECK-P9-NEXT: clrldi r3, r3, 56
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: ld_disjoint_align32_uint8_t_uint64_t:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: lis r4, -15264
; CHECK-P8-NEXT: lis r5, 15258
; CHECK-P8-NEXT: and r3, r3, r4
; CHECK-P8-NEXT: ori r4, r5, 41712
; CHECK-P8-NEXT: ldx r3, r3, r4
; CHECK-P8-NEXT: clrldi r3, r3, 56
; CHECK-P8-NEXT: blr
; CHECK-PREP10-LABEL: ld_disjoint_align32_uint8_t_uint64_t:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: lis r4, -15264
; CHECK-PREP10-NEXT: and r3, r3, r4
; CHECK-PREP10-NEXT: lis r4, 15258
; CHECK-PREP10-NEXT: ori r4, r4, 41712
; CHECK-PREP10-NEXT: ldx r3, r3, r4
; CHECK-PREP10-NEXT: clrldi r3, r3, 56
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1000341504
%or = or i64 %and, 999990000
@@ -2545,23 +2466,14 @@ define dso_local void @st_disjoint_align32_uint8_t_uint8_t(i64 %ptr, i8 zeroext
; CHECK-P10-NEXT: pstb r4, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_uint8_t_uint8_t:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: lis r5, -15264
; CHECK-P9-NEXT: and r3, r3, r5
; CHECK-P9-NEXT: lis r5, 15258
; CHECK-P9-NEXT: ori r5, r5, 41712
; CHECK-P9-NEXT: stbx r4, r3, r5
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: st_disjoint_align32_uint8_t_uint8_t:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: lis r5, -15264
; CHECK-P8-NEXT: lis r6, 15258
; CHECK-P8-NEXT: and r3, r3, r5
; CHECK-P8-NEXT: ori r5, r6, 41712
; CHECK-P8-NEXT: stbx r4, r3, r5
; CHECK-P8-NEXT: blr
; CHECK-PREP10-LABEL: st_disjoint_align32_uint8_t_uint8_t:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: lis r5, -15264
; CHECK-PREP10-NEXT: and r3, r3, r5
; CHECK-PREP10-NEXT: lis r5, 15258
; CHECK-PREP10-NEXT: ori r5, r5, 41712
; CHECK-PREP10-NEXT: stbx r4, r3, r5
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1000341504
%or = or i64 %and, 999990000
@@ -2821,23 +2733,14 @@ define dso_local void @st_disjoint_align32_uint8_t_uint16_t(i64 %ptr, i8 zeroext
; CHECK-P10-NEXT: psth r4, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_uint8_t_uint16_t:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: lis r5, -15264
; CHECK-P9-NEXT: and r3, r3, r5
; CHECK-P9-NEXT: lis r5, 15258
; CHECK-P9-NEXT: ori r5, r5, 41712
; CHECK-P9-NEXT: sthx r4, r3, r5
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: st_disjoint_align32_uint8_t_uint16_t:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: lis r5, -15264
; CHECK-P8-NEXT: lis r6, 15258
; CHECK-P8-NEXT: and r3, r3, r5
; CHECK-P8-NEXT: ori r5, r6, 41712
; CHECK-P8-NEXT: sthx r4, r3, r5
; CHECK-P8-NEXT: blr
; CHECK-PREP10-LABEL: st_disjoint_align32_uint8_t_uint16_t:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: lis r5, -15264
; CHECK-PREP10-NEXT: and r3, r3, r5
; CHECK-PREP10-NEXT: lis r5, 15258
; CHECK-PREP10-NEXT: ori r5, r5, 41712
; CHECK-PREP10-NEXT: sthx r4, r3, r5
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1000341504
%or = or i64 %and, 999990000
@@ -3103,23 +3006,14 @@ define dso_local void @st_disjoint_align32_uint8_t_uint32_t(i64 %ptr, i8 zeroext
; CHECK-P10-NEXT: pstw r4, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_uint8_t_uint32_t:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: lis r5, -15264
; CHECK-P9-NEXT: and r3, r3, r5
; CHECK-P9-NEXT: lis r5, 15258
; CHECK-P9-NEXT: ori r5, r5, 41712
; CHECK-P9-NEXT: stwx r4, r3, r5
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: st_disjoint_align32_uint8_t_uint32_t:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: lis r5, -15264
; CHECK-P8-NEXT: lis r6, 15258
; CHECK-P8-NEXT: and r3, r3, r5
; CHECK-P8-NEXT: ori r5, r6, 41712
; CHECK-P8-NEXT: stwx r4, r3, r5
; CHECK-P8-NEXT: blr
; CHECK-PREP10-LABEL: st_disjoint_align32_uint8_t_uint32_t:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: lis r5, -15264
; CHECK-PREP10-NEXT: and r3, r3, r5
; CHECK-PREP10-NEXT: lis r5, 15258
; CHECK-PREP10-NEXT: ori r5, r5, 41712
; CHECK-PREP10-NEXT: stwx r4, r3, r5
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1000341504
%or = or i64 %and, 999990000
@@ -3385,23 +3279,14 @@ define dso_local void @st_disjoint_align32_uint8_t_uint64_t(i64 %ptr, i8 zeroext
; CHECK-P10-NEXT: pstd r4, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_uint8_t_uint64_t:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: lis r5, -15264
; CHECK-P9-NEXT: and r3, r3, r5
; CHECK-P9-NEXT: lis r5, 15258
; CHECK-P9-NEXT: ori r5, r5, 41712
; CHECK-P9-NEXT: stdx r4, r3, r5
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: st_disjoint_align32_uint8_t_uint64_t:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: lis r5, -15264
; CHECK-P8-NEXT: lis r6, 15258
; CHECK-P8-NEXT: and r3, r3, r5
; CHECK-P8-NEXT: ori r5, r6, 41712
; CHECK-P8-NEXT: stdx r4, r3, r5
; CHECK-P8-NEXT: blr
; CHECK-PREP10-LABEL: st_disjoint_align32_uint8_t_uint64_t:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: lis r5, -15264
; CHECK-PREP10-NEXT: and r3, r3, r5
; CHECK-PREP10-NEXT: lis r5, 15258
; CHECK-PREP10-NEXT: ori r5, r5, 41712
; CHECK-PREP10-NEXT: stdx r4, r3, r5
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1000341504
%or = or i64 %and, 999990000
@@ -3667,23 +3552,14 @@ define dso_local void @st_disjoint_align32_int8_t_uint16_t(i64 %ptr, i8 signext
; CHECK-P10-NEXT: psth r4, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_int8_t_uint16_t:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: lis r5, -15264
; CHECK-P9-NEXT: and r3, r3, r5
; CHECK-P9-NEXT: lis r5, 15258
; CHECK-P9-NEXT: ori r5, r5, 41712
; CHECK-P9-NEXT: sthx r4, r3, r5
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: st_disjoint_align32_int8_t_uint16_t:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: lis r5, -15264
; CHECK-P8-NEXT: lis r6, 15258
; CHECK-P8-NEXT: and r3, r3, r5
; CHECK-P8-NEXT: ori r5, r6, 41712
; CHECK-P8-NEXT: sthx r4, r3, r5
; CHECK-P8-NEXT: blr
; CHECK-PREP10-LABEL: st_disjoint_align32_int8_t_uint16_t:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: lis r5, -15264
; CHECK-PREP10-NEXT: and r3, r3, r5
; CHECK-PREP10-NEXT: lis r5, 15258
; CHECK-PREP10-NEXT: ori r5, r5, 41712
; CHECK-PREP10-NEXT: sthx r4, r3, r5
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1000341504
%or = or i64 %and, 999990000
@@ -3949,23 +3825,14 @@ define dso_local void @st_disjoint_align32_int8_t_uint32_t(i64 %ptr, i8 signext
; CHECK-P10-NEXT: pstw r4, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_int8_t_uint32_t:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: lis r5, -15264
; CHECK-P9-NEXT: and r3, r3, r5
; CHECK-P9-NEXT: lis r5, 15258
; CHECK-P9-NEXT: ori r5, r5, 41712
; CHECK-P9-NEXT: stwx r4, r3, r5
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: st_disjoint_align32_int8_t_uint32_t:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: lis r5, -15264
; CHECK-P8-NEXT: lis r6, 15258
; CHECK-P8-NEXT: and r3, r3, r5
; CHECK-P8-NEXT: ori r5, r6, 41712
; CHECK-P8-NEXT: stwx r4, r3, r5
; CHECK-P8-NEXT: blr
; CHECK-PREP10-LABEL: st_disjoint_align32_int8_t_uint32_t:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: lis r5, -15264
; CHECK-PREP10-NEXT: and r3, r3, r5
; CHECK-PREP10-NEXT: lis r5, 15258
; CHECK-PREP10-NEXT: ori r5, r5, 41712
; CHECK-PREP10-NEXT: stwx r4, r3, r5
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1000341504
%or = or i64 %and, 999990000
@@ -4231,23 +4098,14 @@ define dso_local void @st_disjoint_align32_int8_t_uint64_t(i64 %ptr, i8 signext
; CHECK-P10-NEXT: pstd r4, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_int8_t_uint64_t:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: lis r5, -15264
; CHECK-P9-NEXT: and r3, r3, r5
; CHECK-P9-NEXT: lis r5, 15258
; CHECK-P9-NEXT: ori r5, r5, 41712
; CHECK-P9-NEXT: stdx r4, r3, r5
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: st_disjoint_align32_int8_t_uint64_t:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: lis r5, -15264
; CHECK-P8-NEXT: lis r6, 15258
; CHECK-P8-NEXT: and r3, r3, r5
; CHECK-P8-NEXT: ori r5, r6, 41712
; CHECK-P8-NEXT: stdx r4, r3, r5
; CHECK-P8-NEXT: blr
; CHECK-PREP10-LABEL: st_disjoint_align32_int8_t_uint64_t:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: lis r5, -15264
; CHECK-PREP10-NEXT: and r3, r3, r5
; CHECK-PREP10-NEXT: lis r5, 15258
; CHECK-PREP10-NEXT: ori r5, r5, 41712
; CHECK-PREP10-NEXT: stdx r4, r3, r5
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1000341504
%or = or i64 %and, 999990000

File diff suppressed because it is too large Load Diff

View File

@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=powerpc64le-- -verify-machineinstrs | FileCheck %s
; RUN: llc < %s -mtriple=powerpc64-ibm-aix-xcoff -verify-machineinstrs | FileCheck %s
; RUN: llc < %s -mtriple=powerpc64le-- -mcpu=pwr8 -verify-machineinstrs | FileCheck %s
; RUN: llc < %s -mtriple=powerpc64-ibm-aix-xcoff -mcpu=pwr8 -verify-machineinstrs | FileCheck %s
define i32 @sub_zext_cmp_mask_same_size_result(i32 %x) {
; CHECK-LABEL: sub_zext_cmp_mask_same_size_result:
@@ -120,8 +120,8 @@ define i16 @low_bit_select_constants_bigger_false_narrower_result(i32 %x) {
define i8 @low_bit_select_constants_bigger_true_same_size_result(i8 %x) {
; CHECK-LABEL: low_bit_select_constants_bigger_true_same_size_result:
; CHECK: # %bb.0:
; CHECK-NEXT: li 4, -29
; CHECK-NEXT: clrldi 3, 3, 63
; CHECK-NEXT: li 4, -29
; CHECK-NEXT: xor 3, 3, 4
; CHECK-NEXT: blr
%a = and i8 %x, 1

View File

@@ -12,10 +12,10 @@ define double @testBranchCoal(double %a, double %b, double %c, i32 %x) {
; CHECK-NEXT: beq 0, .LBB0_2
; CHECK-NEXT: # %bb.1: # %entry
; CHECK-NEXT: addis 3, 2, .LCPI0_0@toc@ha
; CHECK-NEXT: addis 4, 2, .LCPI0_1@toc@ha
; CHECK-NEXT: xxlxor 2, 2, 2
; CHECK-NEXT: lfd 1, .LCPI0_0@toc@l(3)
; CHECK-NEXT: lfd 3, .LCPI0_1@toc@l(4)
; CHECK-NEXT: addis 3, 2, .LCPI0_1@toc@ha
; CHECK-NEXT: lfd 3, .LCPI0_1@toc@l(3)
; CHECK-NEXT: .LBB0_2: # %entry
; CHECK-NEXT: xsadddp 0, 1, 2
; CHECK-NEXT: xsadddp 1, 0, 3

View File

@@ -939,21 +939,21 @@ define <4 x i32> @fromDiffMemConsDi(ptr nocapture readonly %arr) {
;
; P8BE-LABEL: fromDiffMemConsDi:
; P8BE: # %bb.0: # %entry
; P8BE-NEXT: addis r4, r2, .LCPI7_0@toc@ha
; P8BE-NEXT: lxvw4x v2, 0, r3
; P8BE-NEXT: addi r4, r4, .LCPI7_0@toc@l
; P8BE-NEXT: lxvw4x v3, 0, r4
; P8BE-NEXT: addis r3, r2, .LCPI7_0@toc@ha
; P8BE-NEXT: addi r3, r3, .LCPI7_0@toc@l
; P8BE-NEXT: lxvw4x v3, 0, r3
; P8BE-NEXT: vperm v2, v2, v2, v3
; P8BE-NEXT: blr
;
; P8LE-LABEL: fromDiffMemConsDi:
; P8LE: # %bb.0: # %entry
; P8LE-NEXT: addis r4, r2, .LCPI7_0@toc@ha
; P8LE-NEXT: lxvd2x vs0, 0, r3
; P8LE-NEXT: addi r4, r4, .LCPI7_0@toc@l
; P8LE-NEXT: lxvd2x vs1, 0, r4
; P8LE-NEXT: addis r3, r2, .LCPI7_0@toc@ha
; P8LE-NEXT: addi r3, r3, .LCPI7_0@toc@l
; P8LE-NEXT: xxswapd v2, vs0
; P8LE-NEXT: xxswapd v3, vs1
; P8LE-NEXT: lxvd2x vs0, 0, r3
; P8LE-NEXT: xxswapd v3, vs0
; P8LE-NEXT: vperm v2, v2, v2, v3
; P8LE-NEXT: blr
entry:
@@ -1047,26 +1047,26 @@ define <4 x i32> @fromDiffMemVarDi(ptr nocapture readonly %arr, i32 signext %ele
; P8BE-LABEL: fromDiffMemVarDi:
; P8BE: # %bb.0: # %entry
; P8BE-NEXT: sldi r4, r4, 2
; P8BE-NEXT: addis r5, r2, .LCPI9_0@toc@ha
; P8BE-NEXT: add r3, r3, r4
; P8BE-NEXT: addi r4, r5, .LCPI9_0@toc@l
; P8BE-NEXT: addi r3, r3, -12
; P8BE-NEXT: lxvw4x v3, 0, r4
; P8BE-NEXT: lxvw4x v2, 0, r3
; P8BE-NEXT: addis r3, r2, .LCPI9_0@toc@ha
; P8BE-NEXT: addi r3, r3, .LCPI9_0@toc@l
; P8BE-NEXT: lxvw4x v3, 0, r3
; P8BE-NEXT: vperm v2, v2, v2, v3
; P8BE-NEXT: blr
;
; P8LE-LABEL: fromDiffMemVarDi:
; P8LE: # %bb.0: # %entry
; P8LE-NEXT: sldi r4, r4, 2
; P8LE-NEXT: addis r5, r2, .LCPI9_0@toc@ha
; P8LE-NEXT: add r3, r3, r4
; P8LE-NEXT: addi r4, r5, .LCPI9_0@toc@l
; P8LE-NEXT: addi r3, r3, -12
; P8LE-NEXT: lxvd2x vs1, 0, r4
; P8LE-NEXT: lxvd2x vs0, 0, r3
; P8LE-NEXT: xxswapd v3, vs1
; P8LE-NEXT: addis r3, r2, .LCPI9_0@toc@ha
; P8LE-NEXT: addi r3, r3, .LCPI9_0@toc@l
; P8LE-NEXT: xxswapd v2, vs0
; P8LE-NEXT: lxvd2x vs0, 0, r3
; P8LE-NEXT: xxswapd v3, vs0
; P8LE-NEXT: vperm v2, v2, v2, v3
; P8LE-NEXT: blr
entry:
@@ -1117,14 +1117,14 @@ define <4 x i32> @fromRandMemConsi(ptr nocapture readonly %arr) {
;
; P8BE-LABEL: fromRandMemConsi:
; P8BE: # %bb.0: # %entry
; P8BE-NEXT: lwz r4, 8(r3)
; P8BE-NEXT: lwz r5, 352(r3)
; P8BE-NEXT: lwz r6, 16(r3)
; P8BE-NEXT: lwz r3, 72(r3)
; P8BE-NEXT: rldimi r5, r4, 32, 0
; P8BE-NEXT: lwz r4, 16(r3)
; P8BE-NEXT: lwz r5, 72(r3)
; P8BE-NEXT: lwz r6, 8(r3)
; P8BE-NEXT: lwz r3, 352(r3)
; P8BE-NEXT: rldimi r3, r6, 32, 0
; P8BE-NEXT: mtfprd f0, r5
; P8BE-NEXT: mtfprd f1, r3
; P8BE-NEXT: rldimi r5, r4, 32, 0
; P8BE-NEXT: mtfprd f0, r3
; P8BE-NEXT: mtfprd f1, r5
; P8BE-NEXT: xxmrghd v2, vs1, vs0
; P8BE-NEXT: blr
;
@@ -1187,14 +1187,14 @@ define <4 x i32> @fromRandMemVari(ptr nocapture readonly %arr, i32 signext %elem
; P8BE: # %bb.0: # %entry
; P8BE-NEXT: sldi r4, r4, 2
; P8BE-NEXT: add r3, r3, r4
; P8BE-NEXT: lwz r4, 8(r3)
; P8BE-NEXT: lwz r5, 32(r3)
; P8BE-NEXT: lwz r6, 16(r3)
; P8BE-NEXT: lwz r3, 4(r3)
; P8BE-NEXT: rldimi r5, r4, 32, 0
; P8BE-NEXT: lwz r4, 16(r3)
; P8BE-NEXT: lwz r5, 4(r3)
; P8BE-NEXT: lwz r6, 8(r3)
; P8BE-NEXT: lwz r3, 32(r3)
; P8BE-NEXT: rldimi r3, r6, 32, 0
; P8BE-NEXT: mtfprd f0, r5
; P8BE-NEXT: mtfprd f1, r3
; P8BE-NEXT: rldimi r5, r4, 32, 0
; P8BE-NEXT: mtfprd f0, r3
; P8BE-NEXT: mtfprd f1, r5
; P8BE-NEXT: xxmrghd v2, vs1, vs0
; P8BE-NEXT: blr
;
@@ -1346,10 +1346,10 @@ define <4 x i32> @fromRegsConvftoi(float %a, float %b, float %c, float %d) {
;
; P8BE-LABEL: fromRegsConvftoi:
; P8BE: # %bb.0: # %entry
; P8BE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; P8BE-NEXT: # kill: def $f4 killed $f4 def $vsl4
; P8BE-NEXT: # kill: def $f3 killed $f3 def $vsl3
; P8BE-NEXT: # kill: def $f2 killed $f2 def $vsl2
; P8BE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; P8BE-NEXT: xxmrghd vs0, vs2, vs4
; P8BE-NEXT: xxmrghd vs1, vs1, vs3
; P8BE-NEXT: xvcvdpsxws v2, vs0
@@ -1359,10 +1359,10 @@ define <4 x i32> @fromRegsConvftoi(float %a, float %b, float %c, float %d) {
;
; P8LE-LABEL: fromRegsConvftoi:
; P8LE: # %bb.0: # %entry
; P8LE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; P8LE-NEXT: # kill: def $f4 killed $f4 def $vsl4
; P8LE-NEXT: # kill: def $f3 killed $f3 def $vsl3
; P8LE-NEXT: # kill: def $f2 killed $f2 def $vsl2
; P8LE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; P8LE-NEXT: xxmrghd vs0, vs3, vs1
; P8LE-NEXT: xxmrghd vs1, vs4, vs2
; P8LE-NEXT: xvcvdpsxws v2, vs0
@@ -1468,22 +1468,22 @@ define <4 x i32> @fromDiffMemConsDConvftoi(ptr nocapture readonly %ptr) {
;
; P8BE-LABEL: fromDiffMemConsDConvftoi:
; P8BE: # %bb.0: # %entry
; P8BE-NEXT: addis r4, r2, .LCPI18_0@toc@ha
; P8BE-NEXT: lxvw4x v2, 0, r3
; P8BE-NEXT: addi r4, r4, .LCPI18_0@toc@l
; P8BE-NEXT: lxvw4x v3, 0, r4
; P8BE-NEXT: addis r3, r2, .LCPI18_0@toc@ha
; P8BE-NEXT: addi r3, r3, .LCPI18_0@toc@l
; P8BE-NEXT: lxvw4x v3, 0, r3
; P8BE-NEXT: vperm v2, v2, v2, v3
; P8BE-NEXT: xvcvspsxws v2, v2
; P8BE-NEXT: blr
;
; P8LE-LABEL: fromDiffMemConsDConvftoi:
; P8LE: # %bb.0: # %entry
; P8LE-NEXT: addis r4, r2, .LCPI18_0@toc@ha
; P8LE-NEXT: lxvd2x vs0, 0, r3
; P8LE-NEXT: addi r4, r4, .LCPI18_0@toc@l
; P8LE-NEXT: lxvd2x vs1, 0, r4
; P8LE-NEXT: addis r3, r2, .LCPI18_0@toc@ha
; P8LE-NEXT: addi r3, r3, .LCPI18_0@toc@l
; P8LE-NEXT: xxswapd v2, vs0
; P8LE-NEXT: xxswapd v3, vs1
; P8LE-NEXT: lxvd2x vs0, 0, r3
; P8LE-NEXT: xxswapd v3, vs0
; P8LE-NEXT: vperm v2, v2, v2, v3
; P8LE-NEXT: xvcvspsxws v2, v2
; P8LE-NEXT: blr
@@ -1543,10 +1543,10 @@ define <4 x i32> @fromDiffMemVarAConvftoi(ptr nocapture readonly %arr, i32 signe
; P8BE-NEXT: lfsux f0, r3, r4
; P8BE-NEXT: lfs f1, 12(r3)
; P8BE-NEXT: lfs f2, 4(r3)
; P8BE-NEXT: lfs f3, 8(r3)
; P8BE-NEXT: xxmrghd vs1, vs2, vs1
; P8BE-NEXT: xxmrghd vs0, vs0, vs3
; P8BE-NEXT: lfs f2, 8(r3)
; P8BE-NEXT: xvcvdpsp v2, vs1
; P8BE-NEXT: xxmrghd vs0, vs0, vs2
; P8BE-NEXT: xvcvdpsp v3, vs0
; P8BE-NEXT: vmrgew v2, v3, v2
; P8BE-NEXT: xvcvspsxws v2, v2
@@ -1557,11 +1557,11 @@ define <4 x i32> @fromDiffMemVarAConvftoi(ptr nocapture readonly %arr, i32 signe
; P8LE-NEXT: sldi r4, r4, 2
; P8LE-NEXT: lfsux f0, r3, r4
; P8LE-NEXT: lfs f1, 8(r3)
; P8LE-NEXT: lfs f2, 4(r3)
; P8LE-NEXT: lfs f3, 12(r3)
; P8LE-NEXT: xxmrghd vs0, vs1, vs0
; P8LE-NEXT: xxmrghd vs1, vs3, vs2
; P8LE-NEXT: lfs f1, 4(r3)
; P8LE-NEXT: lfs f2, 12(r3)
; P8LE-NEXT: xvcvdpsp v2, vs0
; P8LE-NEXT: xxmrghd vs1, vs2, vs1
; P8LE-NEXT: xvcvdpsp v3, vs1
; P8LE-NEXT: vmrgew v2, v3, v2
; P8LE-NEXT: xvcvspsxws v2, v2
@@ -1630,10 +1630,10 @@ define <4 x i32> @fromDiffMemVarDConvftoi(ptr nocapture readonly %arr, i32 signe
; P8BE-NEXT: lfsux f0, r3, r4
; P8BE-NEXT: lfs f1, -12(r3)
; P8BE-NEXT: lfs f2, -4(r3)
; P8BE-NEXT: lfs f3, -8(r3)
; P8BE-NEXT: xxmrghd vs1, vs2, vs1
; P8BE-NEXT: xxmrghd vs0, vs0, vs3
; P8BE-NEXT: lfs f2, -8(r3)
; P8BE-NEXT: xvcvdpsp v2, vs1
; P8BE-NEXT: xxmrghd vs0, vs0, vs2
; P8BE-NEXT: xvcvdpsp v3, vs0
; P8BE-NEXT: vmrgew v2, v3, v2
; P8BE-NEXT: xvcvspsxws v2, v2
@@ -1644,11 +1644,11 @@ define <4 x i32> @fromDiffMemVarDConvftoi(ptr nocapture readonly %arr, i32 signe
; P8LE-NEXT: sldi r4, r4, 2
; P8LE-NEXT: lfsux f0, r3, r4
; P8LE-NEXT: lfs f1, -8(r3)
; P8LE-NEXT: lfs f2, -4(r3)
; P8LE-NEXT: lfs f3, -12(r3)
; P8LE-NEXT: xxmrghd vs0, vs1, vs0
; P8LE-NEXT: xxmrghd vs1, vs3, vs2
; P8LE-NEXT: lfs f1, -4(r3)
; P8LE-NEXT: lfs f2, -12(r3)
; P8LE-NEXT: xvcvdpsp v2, vs0
; P8LE-NEXT: xxmrghd vs1, vs2, vs1
; P8LE-NEXT: xvcvdpsp v3, vs1
; P8LE-NEXT: vmrgew v2, v3, v2
; P8LE-NEXT: xvcvspsxws v2, v2
@@ -1801,10 +1801,10 @@ define <4 x i32> @fromRegsConvdtoi(double %a, double %b, double %c, double %d) {
;
; P8BE-LABEL: fromRegsConvdtoi:
; P8BE: # %bb.0: # %entry
; P8BE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; P8BE-NEXT: # kill: def $f4 killed $f4 def $vsl4
; P8BE-NEXT: # kill: def $f3 killed $f3 def $vsl3
; P8BE-NEXT: # kill: def $f2 killed $f2 def $vsl2
; P8BE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; P8BE-NEXT: xxmrghd vs0, vs2, vs4
; P8BE-NEXT: xxmrghd vs1, vs1, vs3
; P8BE-NEXT: xvcvdpsxws v2, vs0
@@ -1814,10 +1814,10 @@ define <4 x i32> @fromRegsConvdtoi(double %a, double %b, double %c, double %d) {
;
; P8LE-LABEL: fromRegsConvdtoi:
; P8LE: # %bb.0: # %entry
; P8LE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; P8LE-NEXT: # kill: def $f4 killed $f4 def $vsl4
; P8LE-NEXT: # kill: def $f3 killed $f3 def $vsl3
; P8LE-NEXT: # kill: def $f2 killed $f2 def $vsl2
; P8LE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; P8LE-NEXT: xxmrghd vs0, vs3, vs1
; P8LE-NEXT: xxmrghd vs1, vs4, vs2
; P8LE-NEXT: xvcvdpsxws v2, vs0
@@ -1956,25 +1956,25 @@ define <4 x i32> @fromDiffMemConsDConvdtoi(ptr nocapture readonly %ptr) {
;
; P8BE-LABEL: fromDiffMemConsDConvdtoi:
; P8BE: # %bb.0: # %entry
; P8BE-NEXT: lfd f0, 16(r3)
; P8BE-NEXT: lfd f1, 0(r3)
; P8BE-NEXT: lfd f2, 24(r3)
; P8BE-NEXT: lfd f3, 8(r3)
; P8BE-NEXT: xxmrghd vs0, vs0, vs1
; P8BE-NEXT: xxmrghd vs1, vs2, vs3
; P8BE-NEXT: xvcvdpsxws v2, vs0
; P8BE-NEXT: xvcvdpsxws v3, vs1
; P8BE-NEXT: lfd f0, 24(r3)
; P8BE-NEXT: lfd f1, 16(r3)
; P8BE-NEXT: lfd f2, 8(r3)
; P8BE-NEXT: lfd f3, 0(r3)
; P8BE-NEXT: xxmrghd vs1, vs1, vs3
; P8BE-NEXT: xxmrghd vs0, vs0, vs2
; P8BE-NEXT: xvcvdpsxws v2, vs1
; P8BE-NEXT: xvcvdpsxws v3, vs0
; P8BE-NEXT: vmrgew v2, v3, v2
; P8BE-NEXT: blr
;
; P8LE-LABEL: fromDiffMemConsDConvdtoi:
; P8LE: # %bb.0: # %entry
; P8LE-NEXT: lfd f0, 24(r3)
; P8LE-NEXT: lfd f1, 8(r3)
; P8LE-NEXT: lfd f2, 16(r3)
; P8LE-NEXT: lfd f1, 16(r3)
; P8LE-NEXT: lfd f2, 8(r3)
; P8LE-NEXT: lfd f3, 0(r3)
; P8LE-NEXT: xxmrghd vs0, vs1, vs0
; P8LE-NEXT: xxmrghd vs1, vs3, vs2
; P8LE-NEXT: xxmrghd vs0, vs2, vs0
; P8LE-NEXT: xxmrghd vs1, vs3, vs1
; P8LE-NEXT: xvcvdpsxws v2, vs0
; P8LE-NEXT: xvcvdpsxws v3, vs1
; P8LE-NEXT: vmrgew v2, v3, v2
@@ -2032,10 +2032,10 @@ define <4 x i32> @fromDiffMemVarAConvdtoi(ptr nocapture readonly %arr, i32 signe
; P8BE-NEXT: sldi r4, r4, 3
; P8BE-NEXT: lfdux f0, r3, r4
; P8BE-NEXT: lfd f1, 8(r3)
; P8BE-NEXT: lfd f2, 24(r3)
; P8BE-NEXT: lfd f3, 16(r3)
; P8BE-NEXT: xxmrghd vs1, vs1, vs2
; P8BE-NEXT: xxmrghd vs0, vs0, vs3
; P8BE-NEXT: lfd f2, 16(r3)
; P8BE-NEXT: lfd f3, 24(r3)
; P8BE-NEXT: xxmrghd vs1, vs1, vs3
; P8BE-NEXT: xxmrghd vs0, vs0, vs2
; P8BE-NEXT: xvcvdpsxws v2, vs1
; P8BE-NEXT: xvcvdpsxws v3, vs0
; P8BE-NEXT: vmrgew v2, v3, v2
@@ -2045,11 +2045,11 @@ define <4 x i32> @fromDiffMemVarAConvdtoi(ptr nocapture readonly %arr, i32 signe
; P8LE: # %bb.0: # %entry
; P8LE-NEXT: sldi r4, r4, 3
; P8LE-NEXT: lfdux f0, r3, r4
; P8LE-NEXT: lfd f1, 16(r3)
; P8LE-NEXT: lfd f2, 8(r3)
; P8LE-NEXT: lfd f1, 8(r3)
; P8LE-NEXT: lfd f2, 16(r3)
; P8LE-NEXT: lfd f3, 24(r3)
; P8LE-NEXT: xxmrghd vs0, vs1, vs0
; P8LE-NEXT: xxmrghd vs1, vs3, vs2
; P8LE-NEXT: xxmrghd vs0, vs2, vs0
; P8LE-NEXT: xxmrghd vs1, vs3, vs1
; P8LE-NEXT: xvcvdpsxws v2, vs0
; P8LE-NEXT: xvcvdpsxws v3, vs1
; P8LE-NEXT: vmrgew v2, v3, v2
@@ -2115,10 +2115,10 @@ define <4 x i32> @fromDiffMemVarDConvdtoi(ptr nocapture readonly %arr, i32 signe
; P8BE-NEXT: sldi r4, r4, 3
; P8BE-NEXT: lfdux f0, r3, r4
; P8BE-NEXT: lfd f1, -8(r3)
; P8BE-NEXT: lfd f2, -24(r3)
; P8BE-NEXT: lfd f3, -16(r3)
; P8BE-NEXT: xxmrghd vs1, vs1, vs2
; P8BE-NEXT: xxmrghd vs0, vs0, vs3
; P8BE-NEXT: lfd f2, -16(r3)
; P8BE-NEXT: lfd f3, -24(r3)
; P8BE-NEXT: xxmrghd vs1, vs1, vs3
; P8BE-NEXT: xxmrghd vs0, vs0, vs2
; P8BE-NEXT: xvcvdpsxws v2, vs1
; P8BE-NEXT: xvcvdpsxws v3, vs0
; P8BE-NEXT: vmrgew v2, v3, v2
@@ -2128,11 +2128,11 @@ define <4 x i32> @fromDiffMemVarDConvdtoi(ptr nocapture readonly %arr, i32 signe
; P8LE: # %bb.0: # %entry
; P8LE-NEXT: sldi r4, r4, 3
; P8LE-NEXT: lfdux f0, r3, r4
; P8LE-NEXT: lfd f1, -16(r3)
; P8LE-NEXT: lfd f2, -8(r3)
; P8LE-NEXT: lfd f1, -8(r3)
; P8LE-NEXT: lfd f2, -16(r3)
; P8LE-NEXT: lfd f3, -24(r3)
; P8LE-NEXT: xxmrghd vs0, vs1, vs0
; P8LE-NEXT: xxmrghd vs1, vs3, vs2
; P8LE-NEXT: xxmrghd vs0, vs2, vs0
; P8LE-NEXT: xxmrghd vs1, vs3, vs1
; P8LE-NEXT: xvcvdpsxws v2, vs0
; P8LE-NEXT: xvcvdpsxws v3, vs1
; P8LE-NEXT: vmrgew v2, v3, v2
@@ -2461,21 +2461,21 @@ define <4 x i32> @fromDiffMemConsDui(ptr nocapture readonly %arr) {
;
; P8BE-LABEL: fromDiffMemConsDui:
; P8BE: # %bb.0: # %entry
; P8BE-NEXT: addis r4, r2, .LCPI39_0@toc@ha
; P8BE-NEXT: lxvw4x v2, 0, r3
; P8BE-NEXT: addi r4, r4, .LCPI39_0@toc@l
; P8BE-NEXT: lxvw4x v3, 0, r4
; P8BE-NEXT: addis r3, r2, .LCPI39_0@toc@ha
; P8BE-NEXT: addi r3, r3, .LCPI39_0@toc@l
; P8BE-NEXT: lxvw4x v3, 0, r3
; P8BE-NEXT: vperm v2, v2, v2, v3
; P8BE-NEXT: blr
;
; P8LE-LABEL: fromDiffMemConsDui:
; P8LE: # %bb.0: # %entry
; P8LE-NEXT: addis r4, r2, .LCPI39_0@toc@ha
; P8LE-NEXT: lxvd2x vs0, 0, r3
; P8LE-NEXT: addi r4, r4, .LCPI39_0@toc@l
; P8LE-NEXT: lxvd2x vs1, 0, r4
; P8LE-NEXT: addis r3, r2, .LCPI39_0@toc@ha
; P8LE-NEXT: addi r3, r3, .LCPI39_0@toc@l
; P8LE-NEXT: xxswapd v2, vs0
; P8LE-NEXT: xxswapd v3, vs1
; P8LE-NEXT: lxvd2x vs0, 0, r3
; P8LE-NEXT: xxswapd v3, vs0
; P8LE-NEXT: vperm v2, v2, v2, v3
; P8LE-NEXT: blr
entry:
@@ -2569,26 +2569,26 @@ define <4 x i32> @fromDiffMemVarDui(ptr nocapture readonly %arr, i32 signext %el
; P8BE-LABEL: fromDiffMemVarDui:
; P8BE: # %bb.0: # %entry
; P8BE-NEXT: sldi r4, r4, 2
; P8BE-NEXT: addis r5, r2, .LCPI41_0@toc@ha
; P8BE-NEXT: add r3, r3, r4
; P8BE-NEXT: addi r4, r5, .LCPI41_0@toc@l
; P8BE-NEXT: addi r3, r3, -12
; P8BE-NEXT: lxvw4x v3, 0, r4
; P8BE-NEXT: lxvw4x v2, 0, r3
; P8BE-NEXT: addis r3, r2, .LCPI41_0@toc@ha
; P8BE-NEXT: addi r3, r3, .LCPI41_0@toc@l
; P8BE-NEXT: lxvw4x v3, 0, r3
; P8BE-NEXT: vperm v2, v2, v2, v3
; P8BE-NEXT: blr
;
; P8LE-LABEL: fromDiffMemVarDui:
; P8LE: # %bb.0: # %entry
; P8LE-NEXT: sldi r4, r4, 2
; P8LE-NEXT: addis r5, r2, .LCPI41_0@toc@ha
; P8LE-NEXT: add r3, r3, r4
; P8LE-NEXT: addi r4, r5, .LCPI41_0@toc@l
; P8LE-NEXT: addi r3, r3, -12
; P8LE-NEXT: lxvd2x vs1, 0, r4
; P8LE-NEXT: lxvd2x vs0, 0, r3
; P8LE-NEXT: xxswapd v3, vs1
; P8LE-NEXT: addis r3, r2, .LCPI41_0@toc@ha
; P8LE-NEXT: addi r3, r3, .LCPI41_0@toc@l
; P8LE-NEXT: xxswapd v2, vs0
; P8LE-NEXT: lxvd2x vs0, 0, r3
; P8LE-NEXT: xxswapd v3, vs0
; P8LE-NEXT: vperm v2, v2, v2, v3
; P8LE-NEXT: blr
entry:
@@ -2639,14 +2639,14 @@ define <4 x i32> @fromRandMemConsui(ptr nocapture readonly %arr) {
;
; P8BE-LABEL: fromRandMemConsui:
; P8BE: # %bb.0: # %entry
; P8BE-NEXT: lwz r4, 8(r3)
; P8BE-NEXT: lwz r5, 352(r3)
; P8BE-NEXT: lwz r6, 16(r3)
; P8BE-NEXT: lwz r3, 72(r3)
; P8BE-NEXT: rldimi r5, r4, 32, 0
; P8BE-NEXT: lwz r4, 16(r3)
; P8BE-NEXT: lwz r5, 72(r3)
; P8BE-NEXT: lwz r6, 8(r3)
; P8BE-NEXT: lwz r3, 352(r3)
; P8BE-NEXT: rldimi r3, r6, 32, 0
; P8BE-NEXT: mtfprd f0, r5
; P8BE-NEXT: mtfprd f1, r3
; P8BE-NEXT: rldimi r5, r4, 32, 0
; P8BE-NEXT: mtfprd f0, r3
; P8BE-NEXT: mtfprd f1, r5
; P8BE-NEXT: xxmrghd v2, vs1, vs0
; P8BE-NEXT: blr
;
@@ -2709,14 +2709,14 @@ define <4 x i32> @fromRandMemVarui(ptr nocapture readonly %arr, i32 signext %ele
; P8BE: # %bb.0: # %entry
; P8BE-NEXT: sldi r4, r4, 2
; P8BE-NEXT: add r3, r3, r4
; P8BE-NEXT: lwz r4, 8(r3)
; P8BE-NEXT: lwz r5, 32(r3)
; P8BE-NEXT: lwz r6, 16(r3)
; P8BE-NEXT: lwz r3, 4(r3)
; P8BE-NEXT: rldimi r5, r4, 32, 0
; P8BE-NEXT: lwz r4, 16(r3)
; P8BE-NEXT: lwz r5, 4(r3)
; P8BE-NEXT: lwz r6, 8(r3)
; P8BE-NEXT: lwz r3, 32(r3)
; P8BE-NEXT: rldimi r3, r6, 32, 0
; P8BE-NEXT: mtfprd f0, r5
; P8BE-NEXT: mtfprd f1, r3
; P8BE-NEXT: rldimi r5, r4, 32, 0
; P8BE-NEXT: mtfprd f0, r3
; P8BE-NEXT: mtfprd f1, r5
; P8BE-NEXT: xxmrghd v2, vs1, vs0
; P8BE-NEXT: blr
;
@@ -2868,10 +2868,10 @@ define <4 x i32> @fromRegsConvftoui(float %a, float %b, float %c, float %d) {
;
; P8BE-LABEL: fromRegsConvftoui:
; P8BE: # %bb.0: # %entry
; P8BE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; P8BE-NEXT: # kill: def $f4 killed $f4 def $vsl4
; P8BE-NEXT: # kill: def $f3 killed $f3 def $vsl3
; P8BE-NEXT: # kill: def $f2 killed $f2 def $vsl2
; P8BE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; P8BE-NEXT: xxmrghd vs0, vs2, vs4
; P8BE-NEXT: xxmrghd vs1, vs1, vs3
; P8BE-NEXT: xvcvdpuxws v2, vs0
@@ -2881,10 +2881,10 @@ define <4 x i32> @fromRegsConvftoui(float %a, float %b, float %c, float %d) {
;
; P8LE-LABEL: fromRegsConvftoui:
; P8LE: # %bb.0: # %entry
; P8LE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; P8LE-NEXT: # kill: def $f4 killed $f4 def $vsl4
; P8LE-NEXT: # kill: def $f3 killed $f3 def $vsl3
; P8LE-NEXT: # kill: def $f2 killed $f2 def $vsl2
; P8LE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; P8LE-NEXT: xxmrghd vs0, vs3, vs1
; P8LE-NEXT: xxmrghd vs1, vs4, vs2
; P8LE-NEXT: xvcvdpuxws v2, vs0
@@ -2990,22 +2990,22 @@ define <4 x i32> @fromDiffMemConsDConvftoui(ptr nocapture readonly %ptr) {
;
; P8BE-LABEL: fromDiffMemConsDConvftoui:
; P8BE: # %bb.0: # %entry
; P8BE-NEXT: addis r4, r2, .LCPI50_0@toc@ha
; P8BE-NEXT: lxvw4x v2, 0, r3
; P8BE-NEXT: addi r4, r4, .LCPI50_0@toc@l
; P8BE-NEXT: lxvw4x v3, 0, r4
; P8BE-NEXT: addis r3, r2, .LCPI50_0@toc@ha
; P8BE-NEXT: addi r3, r3, .LCPI50_0@toc@l
; P8BE-NEXT: lxvw4x v3, 0, r3
; P8BE-NEXT: vperm v2, v2, v2, v3
; P8BE-NEXT: xvcvspuxws v2, v2
; P8BE-NEXT: blr
;
; P8LE-LABEL: fromDiffMemConsDConvftoui:
; P8LE: # %bb.0: # %entry
; P8LE-NEXT: addis r4, r2, .LCPI50_0@toc@ha
; P8LE-NEXT: lxvd2x vs0, 0, r3
; P8LE-NEXT: addi r4, r4, .LCPI50_0@toc@l
; P8LE-NEXT: lxvd2x vs1, 0, r4
; P8LE-NEXT: addis r3, r2, .LCPI50_0@toc@ha
; P8LE-NEXT: addi r3, r3, .LCPI50_0@toc@l
; P8LE-NEXT: xxswapd v2, vs0
; P8LE-NEXT: xxswapd v3, vs1
; P8LE-NEXT: lxvd2x vs0, 0, r3
; P8LE-NEXT: xxswapd v3, vs0
; P8LE-NEXT: vperm v2, v2, v2, v3
; P8LE-NEXT: xvcvspuxws v2, v2
; P8LE-NEXT: blr
@@ -3065,10 +3065,10 @@ define <4 x i32> @fromDiffMemVarAConvftoui(ptr nocapture readonly %arr, i32 sign
; P8BE-NEXT: lfsux f0, r3, r4
; P8BE-NEXT: lfs f1, 12(r3)
; P8BE-NEXT: lfs f2, 4(r3)
; P8BE-NEXT: lfs f3, 8(r3)
; P8BE-NEXT: xxmrghd vs1, vs2, vs1
; P8BE-NEXT: xxmrghd vs0, vs0, vs3
; P8BE-NEXT: lfs f2, 8(r3)
; P8BE-NEXT: xvcvdpsp v2, vs1
; P8BE-NEXT: xxmrghd vs0, vs0, vs2
; P8BE-NEXT: xvcvdpsp v3, vs0
; P8BE-NEXT: vmrgew v2, v3, v2
; P8BE-NEXT: xvcvspuxws v2, v2
@@ -3079,11 +3079,11 @@ define <4 x i32> @fromDiffMemVarAConvftoui(ptr nocapture readonly %arr, i32 sign
; P8LE-NEXT: sldi r4, r4, 2
; P8LE-NEXT: lfsux f0, r3, r4
; P8LE-NEXT: lfs f1, 8(r3)
; P8LE-NEXT: lfs f2, 4(r3)
; P8LE-NEXT: lfs f3, 12(r3)
; P8LE-NEXT: xxmrghd vs0, vs1, vs0
; P8LE-NEXT: xxmrghd vs1, vs3, vs2
; P8LE-NEXT: lfs f1, 4(r3)
; P8LE-NEXT: lfs f2, 12(r3)
; P8LE-NEXT: xvcvdpsp v2, vs0
; P8LE-NEXT: xxmrghd vs1, vs2, vs1
; P8LE-NEXT: xvcvdpsp v3, vs1
; P8LE-NEXT: vmrgew v2, v3, v2
; P8LE-NEXT: xvcvspuxws v2, v2
@@ -3153,10 +3153,10 @@ define <4 x i32> @fromDiffMemVarDConvftoui(ptr nocapture readonly %arr, i32 sign
; P8BE-NEXT: lfsux f0, r3, r4
; P8BE-NEXT: lfs f1, -12(r3)
; P8BE-NEXT: lfs f2, -4(r3)
; P8BE-NEXT: lfs f3, -8(r3)
; P8BE-NEXT: xxmrghd vs1, vs2, vs1
; P8BE-NEXT: xxmrghd vs0, vs0, vs3
; P8BE-NEXT: lfs f2, -8(r3)
; P8BE-NEXT: xvcvdpsp v2, vs1
; P8BE-NEXT: xxmrghd vs0, vs0, vs2
; P8BE-NEXT: xvcvdpsp v3, vs0
; P8BE-NEXT: vmrgew v2, v3, v2
; P8BE-NEXT: xvcvspuxws v2, v2
@@ -3167,11 +3167,11 @@ define <4 x i32> @fromDiffMemVarDConvftoui(ptr nocapture readonly %arr, i32 sign
; P8LE-NEXT: sldi r4, r4, 2
; P8LE-NEXT: lfsux f0, r3, r4
; P8LE-NEXT: lfs f1, -8(r3)
; P8LE-NEXT: lfs f2, -4(r3)
; P8LE-NEXT: lfs f3, -12(r3)
; P8LE-NEXT: xxmrghd vs0, vs1, vs0
; P8LE-NEXT: xxmrghd vs1, vs3, vs2
; P8LE-NEXT: lfs f1, -4(r3)
; P8LE-NEXT: lfs f2, -12(r3)
; P8LE-NEXT: xvcvdpsp v2, vs0
; P8LE-NEXT: xxmrghd vs1, vs2, vs1
; P8LE-NEXT: xvcvdpsp v3, vs1
; P8LE-NEXT: vmrgew v2, v3, v2
; P8LE-NEXT: xvcvspuxws v2, v2
@@ -3324,10 +3324,10 @@ define <4 x i32> @fromRegsConvdtoui(double %a, double %b, double %c, double %d)
;
; P8BE-LABEL: fromRegsConvdtoui:
; P8BE: # %bb.0: # %entry
; P8BE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; P8BE-NEXT: # kill: def $f4 killed $f4 def $vsl4
; P8BE-NEXT: # kill: def $f3 killed $f3 def $vsl3
; P8BE-NEXT: # kill: def $f2 killed $f2 def $vsl2
; P8BE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; P8BE-NEXT: xxmrghd vs0, vs2, vs4
; P8BE-NEXT: xxmrghd vs1, vs1, vs3
; P8BE-NEXT: xvcvdpuxws v2, vs0
@@ -3337,10 +3337,10 @@ define <4 x i32> @fromRegsConvdtoui(double %a, double %b, double %c, double %d)
;
; P8LE-LABEL: fromRegsConvdtoui:
; P8LE: # %bb.0: # %entry
; P8LE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; P8LE-NEXT: # kill: def $f4 killed $f4 def $vsl4
; P8LE-NEXT: # kill: def $f3 killed $f3 def $vsl3
; P8LE-NEXT: # kill: def $f2 killed $f2 def $vsl2
; P8LE-NEXT: # kill: def $f1 killed $f1 def $vsl1
; P8LE-NEXT: xxmrghd vs0, vs3, vs1
; P8LE-NEXT: xxmrghd vs1, vs4, vs2
; P8LE-NEXT: xvcvdpuxws v2, vs0
@@ -3479,25 +3479,25 @@ define <4 x i32> @fromDiffMemConsDConvdtoui(ptr nocapture readonly %ptr) {
;
; P8BE-LABEL: fromDiffMemConsDConvdtoui:
; P8BE: # %bb.0: # %entry
; P8BE-NEXT: lfd f0, 16(r3)
; P8BE-NEXT: lfd f1, 0(r3)
; P8BE-NEXT: lfd f2, 24(r3)
; P8BE-NEXT: lfd f3, 8(r3)
; P8BE-NEXT: xxmrghd vs0, vs0, vs1
; P8BE-NEXT: xxmrghd vs1, vs2, vs3
; P8BE-NEXT: xvcvdpuxws v2, vs0
; P8BE-NEXT: xvcvdpuxws v3, vs1
; P8BE-NEXT: lfd f0, 24(r3)
; P8BE-NEXT: lfd f1, 16(r3)
; P8BE-NEXT: lfd f2, 8(r3)
; P8BE-NEXT: lfd f3, 0(r3)
; P8BE-NEXT: xxmrghd vs1, vs1, vs3
; P8BE-NEXT: xxmrghd vs0, vs0, vs2
; P8BE-NEXT: xvcvdpuxws v2, vs1
; P8BE-NEXT: xvcvdpuxws v3, vs0
; P8BE-NEXT: vmrgew v2, v3, v2
; P8BE-NEXT: blr
;
; P8LE-LABEL: fromDiffMemConsDConvdtoui:
; P8LE: # %bb.0: # %entry
; P8LE-NEXT: lfd f0, 24(r3)
; P8LE-NEXT: lfd f1, 8(r3)
; P8LE-NEXT: lfd f2, 16(r3)
; P8LE-NEXT: lfd f1, 16(r3)
; P8LE-NEXT: lfd f2, 8(r3)
; P8LE-NEXT: lfd f3, 0(r3)
; P8LE-NEXT: xxmrghd vs0, vs1, vs0
; P8LE-NEXT: xxmrghd vs1, vs3, vs2
; P8LE-NEXT: xxmrghd vs0, vs2, vs0
; P8LE-NEXT: xxmrghd vs1, vs3, vs1
; P8LE-NEXT: xvcvdpuxws v2, vs0
; P8LE-NEXT: xvcvdpuxws v3, vs1
; P8LE-NEXT: vmrgew v2, v3, v2
@@ -3555,10 +3555,10 @@ define <4 x i32> @fromDiffMemVarAConvdtoui(ptr nocapture readonly %arr, i32 sign
; P8BE-NEXT: sldi r4, r4, 3
; P8BE-NEXT: lfdux f0, r3, r4
; P8BE-NEXT: lfd f1, 8(r3)
; P8BE-NEXT: lfd f2, 24(r3)
; P8BE-NEXT: lfd f3, 16(r3)
; P8BE-NEXT: xxmrghd vs1, vs1, vs2
; P8BE-NEXT: xxmrghd vs0, vs0, vs3
; P8BE-NEXT: lfd f2, 16(r3)
; P8BE-NEXT: lfd f3, 24(r3)
; P8BE-NEXT: xxmrghd vs1, vs1, vs3
; P8BE-NEXT: xxmrghd vs0, vs0, vs2
; P8BE-NEXT: xvcvdpuxws v2, vs1
; P8BE-NEXT: xvcvdpuxws v3, vs0
; P8BE-NEXT: vmrgew v2, v3, v2
@@ -3568,11 +3568,11 @@ define <4 x i32> @fromDiffMemVarAConvdtoui(ptr nocapture readonly %arr, i32 sign
; P8LE: # %bb.0: # %entry
; P8LE-NEXT: sldi r4, r4, 3
; P8LE-NEXT: lfdux f0, r3, r4
; P8LE-NEXT: lfd f1, 16(r3)
; P8LE-NEXT: lfd f2, 8(r3)
; P8LE-NEXT: lfd f1, 8(r3)
; P8LE-NEXT: lfd f2, 16(r3)
; P8LE-NEXT: lfd f3, 24(r3)
; P8LE-NEXT: xxmrghd vs0, vs1, vs0
; P8LE-NEXT: xxmrghd vs1, vs3, vs2
; P8LE-NEXT: xxmrghd vs0, vs2, vs0
; P8LE-NEXT: xxmrghd vs1, vs3, vs1
; P8LE-NEXT: xvcvdpuxws v2, vs0
; P8LE-NEXT: xvcvdpuxws v3, vs1
; P8LE-NEXT: vmrgew v2, v3, v2
@@ -3638,10 +3638,10 @@ define <4 x i32> @fromDiffMemVarDConvdtoui(ptr nocapture readonly %arr, i32 sign
; P8BE-NEXT: sldi r4, r4, 3
; P8BE-NEXT: lfdux f0, r3, r4
; P8BE-NEXT: lfd f1, -8(r3)
; P8BE-NEXT: lfd f2, -24(r3)
; P8BE-NEXT: lfd f3, -16(r3)
; P8BE-NEXT: xxmrghd vs1, vs1, vs2
; P8BE-NEXT: xxmrghd vs0, vs0, vs3
; P8BE-NEXT: lfd f2, -16(r3)
; P8BE-NEXT: lfd f3, -24(r3)
; P8BE-NEXT: xxmrghd vs1, vs1, vs3
; P8BE-NEXT: xxmrghd vs0, vs0, vs2
; P8BE-NEXT: xvcvdpuxws v2, vs1
; P8BE-NEXT: xvcvdpuxws v3, vs0
; P8BE-NEXT: vmrgew v2, v3, v2
@@ -3651,11 +3651,11 @@ define <4 x i32> @fromDiffMemVarDConvdtoui(ptr nocapture readonly %arr, i32 sign
; P8LE: # %bb.0: # %entry
; P8LE-NEXT: sldi r4, r4, 3
; P8LE-NEXT: lfdux f0, r3, r4
; P8LE-NEXT: lfd f1, -16(r3)
; P8LE-NEXT: lfd f2, -8(r3)
; P8LE-NEXT: lfd f1, -8(r3)
; P8LE-NEXT: lfd f2, -16(r3)
; P8LE-NEXT: lfd f3, -24(r3)
; P8LE-NEXT: xxmrghd vs0, vs1, vs0
; P8LE-NEXT: xxmrghd vs1, vs3, vs2
; P8LE-NEXT: xxmrghd vs0, vs2, vs0
; P8LE-NEXT: xxmrghd vs1, vs3, vs1
; P8LE-NEXT: xvcvdpuxws v2, vs0
; P8LE-NEXT: xvcvdpuxws v3, vs1
; P8LE-NEXT: vmrgew v2, v3, v2
@@ -4104,10 +4104,10 @@ define <2 x i64> @fromRandMemConsll(ptr nocapture readonly %arr) {
;
; P8BE-LABEL: fromRandMemConsll:
; P8BE: # %bb.0: # %entry
; P8BE-NEXT: ld r4, 144(r3)
; P8BE-NEXT: ld r3, 32(r3)
; P8BE-NEXT: mtfprd f0, r4
; P8BE-NEXT: mtfprd f1, r3
; P8BE-NEXT: ld r4, 32(r3)
; P8BE-NEXT: ld r3, 144(r3)
; P8BE-NEXT: mtfprd f0, r3
; P8BE-NEXT: mtfprd f1, r4
; P8BE-NEXT: xxmrghd v2, vs1, vs0
; P8BE-NEXT: blr
;
@@ -4152,10 +4152,10 @@ define <2 x i64> @fromRandMemVarll(ptr nocapture readonly %arr, i32 signext %ele
; P8BE: # %bb.0: # %entry
; P8BE-NEXT: sldi r4, r4, 3
; P8BE-NEXT: add r3, r3, r4
; P8BE-NEXT: ld r4, 8(r3)
; P8BE-NEXT: ld r3, 32(r3)
; P8BE-NEXT: mtfprd f0, r4
; P8BE-NEXT: mtfprd f1, r3
; P8BE-NEXT: ld r4, 32(r3)
; P8BE-NEXT: ld r3, 8(r3)
; P8BE-NEXT: mtfprd f0, r3
; P8BE-NEXT: mtfprd f1, r4
; P8BE-NEXT: xxmrghd v2, vs1, vs0
; P8BE-NEXT: blr
;
@@ -5286,10 +5286,10 @@ define <2 x i64> @fromRandMemConsull(ptr nocapture readonly %arr) {
;
; P8BE-LABEL: fromRandMemConsull:
; P8BE: # %bb.0: # %entry
; P8BE-NEXT: ld r4, 144(r3)
; P8BE-NEXT: ld r3, 32(r3)
; P8BE-NEXT: mtfprd f0, r4
; P8BE-NEXT: mtfprd f1, r3
; P8BE-NEXT: ld r4, 32(r3)
; P8BE-NEXT: ld r3, 144(r3)
; P8BE-NEXT: mtfprd f0, r3
; P8BE-NEXT: mtfprd f1, r4
; P8BE-NEXT: xxmrghd v2, vs1, vs0
; P8BE-NEXT: blr
;
@@ -5334,10 +5334,10 @@ define <2 x i64> @fromRandMemVarull(ptr nocapture readonly %arr, i32 signext %el
; P8BE: # %bb.0: # %entry
; P8BE-NEXT: sldi r4, r4, 3
; P8BE-NEXT: add r3, r3, r4
; P8BE-NEXT: ld r4, 8(r3)
; P8BE-NEXT: ld r3, 32(r3)
; P8BE-NEXT: mtfprd f0, r4
; P8BE-NEXT: mtfprd f1, r3
; P8BE-NEXT: ld r4, 32(r3)
; P8BE-NEXT: ld r3, 8(r3)
; P8BE-NEXT: mtfprd f0, r3
; P8BE-NEXT: mtfprd f1, r4
; P8BE-NEXT: xxmrghd v2, vs1, vs0
; P8BE-NEXT: blr
;

View File

@@ -1,6 +1,6 @@
; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr8 -mattr=-vsx < %s | FileCheck %s
; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr8 -mattr=-vsx < %s | FileCheck %s
; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -mattr=+power8-vector -mattr=-vsx < %s | FileCheck %s
; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -mattr=+power8-vector -mattr=-vsx < %s | FileCheck %s -check-prefix=P7
; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr8 < %s | FileCheck %s -check-prefix=CHECK-VSX
@vsc = global <16 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 9, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5>, align 16
@@ -22,9 +22,12 @@ entry:
ret void
; CHECK-LABEL: @test1
; CHECK: lvx [[REG1:[0-9]+]], 0, 3
; CHECK: lvx [[REG2:[0-9]+]], 0, 4
; CHECK: lvx [[REG2:[0-9]+]], 0, 3
; CHECK: vbpermq {{[0-9]+}}, [[REG1]], [[REG2]]
; CHECK-VSX: vbpermq {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}
; P7: lvx [[REG1:[0-9]+]], 0, 3
; P7: lvx [[REG2:[0-9]+]], 0, 4
; P7: vbpermq {{[0-9]+}}, [[REG1]], [[REG2]]
}
; Function Attrs: nounwind
@@ -37,9 +40,12 @@ entry:
ret void
; CHECK-LABEL: @test2
; CHECK: lvx [[REG1:[0-9]+]], 0, 3
; CHECK: lvx [[REG2:[0-9]+]], 0, 4
; CHECK: lvx [[REG2:[0-9]+]], 0, 3
; CHECK: vbpermq {{[0-9]+}}, [[REG1]], [[REG2]]
; CHECK-VSX: vbpermq {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}
; P7: lvx [[REG1:[0-9]+]], 0, 3
; P7: lvx [[REG2:[0-9]+]], 0, 4
; P7: vbpermq {{[0-9]+}}, [[REG1]], [[REG2]]
}
; Function Attrs: nounwind

View File

@@ -499,15 +499,15 @@ define dso_local <8 x i16> @testmrglb3(ptr nocapture readonly %a) local_unnamed_
;
; CHECK-NOVSX-LABEL: testmrglb3:
; CHECK-NOVSX: # %bb.0: # %entry
; CHECK-NOVSX-NEXT: vxor v2, v2, v2
; CHECK-NOVSX-NEXT: ld r3, 0(r3)
; CHECK-NOVSX-NEXT: addis r4, r2, .LCPI12_0@toc@ha
; CHECK-NOVSX-NEXT: addi r4, r4, .LCPI12_0@toc@l
; CHECK-NOVSX-NEXT: lvx v3, 0, r4
; CHECK-NOVSX-NEXT: vxor v4, v4, v4
; CHECK-NOVSX-NEXT: std r3, -16(r1)
; CHECK-NOVSX-NEXT: addi r3, r1, -16
; CHECK-NOVSX-NEXT: lvx v4, 0, r3
; CHECK-NOVSX-NEXT: vperm v2, v4, v2, v3
; CHECK-NOVSX-NEXT: lvx v2, 0, r3
; CHECK-NOVSX-NEXT: addis r3, r2, .LCPI12_0@toc@ha
; CHECK-NOVSX-NEXT: addi r3, r3, .LCPI12_0@toc@l
; CHECK-NOVSX-NEXT: lvx v3, 0, r3
; CHECK-NOVSX-NEXT: vperm v2, v2, v4, v3
; CHECK-NOVSX-NEXT: blr
;
; CHECK-P7-LABEL: testmrglb3:
@@ -527,10 +527,10 @@ define dso_local <8 x i16> @testmrglb3(ptr nocapture readonly %a) local_unnamed_
;
; P8-AIX-64-LABEL: testmrglb3:
; P8-AIX-64: # %bb.0: # %entry
; P8-AIX-64-NEXT: ld r4, L..C0(r2) # %const.0
; P8-AIX-64-NEXT: lxsdx v2, 0, r3
; P8-AIX-64-NEXT: ld r3, L..C0(r2) # %const.0
; P8-AIX-64-NEXT: xxlxor v4, v4, v4
; P8-AIX-64-NEXT: lxvw4x v3, 0, r4
; P8-AIX-64-NEXT: lxvw4x v3, 0, r3
; P8-AIX-64-NEXT: vperm v2, v4, v2, v3
; P8-AIX-64-NEXT: blr
;
@@ -539,12 +539,12 @@ define dso_local <8 x i16> @testmrglb3(ptr nocapture readonly %a) local_unnamed_
; P8-AIX-32-NEXT: lwz r4, 4(r3)
; P8-AIX-32-NEXT: xxlxor v3, v3, v3
; P8-AIX-32-NEXT: stw r4, -16(r1)
; P8-AIX-32-NEXT: addi r4, r1, -32
; P8-AIX-32-NEXT: lwz r3, 0(r3)
; P8-AIX-32-NEXT: stw r3, -32(r1)
; P8-AIX-32-NEXT: addi r3, r1, -16
; P8-AIX-32-NEXT: lxvw4x vs0, 0, r3
; P8-AIX-32-NEXT: lxvw4x vs1, 0, r4
; P8-AIX-32-NEXT: addi r3, r1, -32
; P8-AIX-32-NEXT: lxvw4x vs1, 0, r3
; P8-AIX-32-NEXT: xxmrghw v2, vs1, vs0
; P8-AIX-32-NEXT: vmrghb v2, v3, v2
; P8-AIX-32-NEXT: blr
@@ -683,12 +683,12 @@ define dso_local <16 x i8> @no_crash_bitcast(i32 %a) {
;
; CHECK-NOVSX-LABEL: no_crash_bitcast:
; CHECK-NOVSX: # %bb.0: # %entry
; CHECK-NOVSX-NEXT: addis r4, r2, .LCPI14_0@toc@ha
; CHECK-NOVSX-NEXT: stw r3, -16(r1)
; CHECK-NOVSX-NEXT: addis r3, r2, .LCPI14_0@toc@ha
; CHECK-NOVSX-NEXT: addi r3, r3, .LCPI14_0@toc@l
; CHECK-NOVSX-NEXT: lvx v2, 0, r3
; CHECK-NOVSX-NEXT: addi r3, r1, -16
; CHECK-NOVSX-NEXT: addi r4, r4, .LCPI14_0@toc@l
; CHECK-NOVSX-NEXT: lvx v3, 0, r3
; CHECK-NOVSX-NEXT: lvx v2, 0, r4
; CHECK-NOVSX-NEXT: vperm v2, v3, v3, v2
; CHECK-NOVSX-NEXT: blr
;
@@ -713,11 +713,11 @@ define dso_local <16 x i8> @no_crash_bitcast(i32 %a) {
;
; P8-AIX-32-LABEL: no_crash_bitcast:
; P8-AIX-32: # %bb.0: # %entry
; P8-AIX-32-NEXT: lwz r4, L..C0(r2) # %const.0
; P8-AIX-32-NEXT: stw r3, -16(r1)
; P8-AIX-32-NEXT: lwz r3, L..C0(r2) # %const.0
; P8-AIX-32-NEXT: lxvw4x v2, 0, r3
; P8-AIX-32-NEXT: addi r3, r1, -16
; P8-AIX-32-NEXT: lxvw4x v3, 0, r3
; P8-AIX-32-NEXT: lxvw4x v2, 0, r4
; P8-AIX-32-NEXT: vperm v2, v3, v3, v2
; P8-AIX-32-NEXT: blr
entry:
@@ -758,10 +758,10 @@ define dso_local <4 x i32> @replace_undefs_in_splat(<4 x i32> %a) local_unnamed_
; CHECK-NOVSX-LABEL: replace_undefs_in_splat:
; CHECK-NOVSX: # %bb.0: # %entry
; CHECK-NOVSX-NEXT: addis r3, r2, .LCPI15_0@toc@ha
; CHECK-NOVSX-NEXT: addis r4, r2, .LCPI15_1@toc@ha
; CHECK-NOVSX-NEXT: addi r3, r3, .LCPI15_0@toc@l
; CHECK-NOVSX-NEXT: lvx v3, 0, r3
; CHECK-NOVSX-NEXT: addi r3, r4, .LCPI15_1@toc@l
; CHECK-NOVSX-NEXT: addis r3, r2, .LCPI15_1@toc@ha
; CHECK-NOVSX-NEXT: addi r3, r3, .LCPI15_1@toc@l
; CHECK-NOVSX-NEXT: lvx v4, 0, r3
; CHECK-NOVSX-NEXT: vperm v2, v4, v2, v3
; CHECK-NOVSX-NEXT: blr
@@ -782,18 +782,18 @@ define dso_local <4 x i32> @replace_undefs_in_splat(<4 x i32> %a) local_unnamed_
; P8-AIX-64-LABEL: replace_undefs_in_splat:
; P8-AIX-64: # %bb.0: # %entry
; P8-AIX-64-NEXT: ld r3, L..C1(r2) # %const.0
; P8-AIX-64-NEXT: ld r4, L..C2(r2) # %const.1
; P8-AIX-64-NEXT: lxvw4x v3, 0, r3
; P8-AIX-64-NEXT: lxvw4x v4, 0, r4
; P8-AIX-64-NEXT: ld r3, L..C2(r2) # %const.1
; P8-AIX-64-NEXT: lxvw4x v4, 0, r3
; P8-AIX-64-NEXT: vperm v2, v2, v4, v3
; P8-AIX-64-NEXT: blr
;
; P8-AIX-32-LABEL: replace_undefs_in_splat:
; P8-AIX-32: # %bb.0: # %entry
; P8-AIX-32-NEXT: lwz r3, L..C1(r2) # %const.0
; P8-AIX-32-NEXT: lwz r4, L..C2(r2) # %const.1
; P8-AIX-32-NEXT: lxvw4x v3, 0, r3
; P8-AIX-32-NEXT: lxvw4x v4, 0, r4
; P8-AIX-32-NEXT: lwz r3, L..C2(r2) # %const.1
; P8-AIX-32-NEXT: lxvw4x v4, 0, r3
; P8-AIX-32-NEXT: vperm v2, v2, v4, v3
; P8-AIX-32-NEXT: blr
entry:
@@ -831,12 +831,12 @@ define dso_local <16 x i8> @no_RAUW_in_combine_during_legalize(ptr nocapture rea
; CHECK-NOVSX-LABEL: no_RAUW_in_combine_during_legalize:
; CHECK-NOVSX: # %bb.0: # %entry
; CHECK-NOVSX-NEXT: sldi r4, r4, 2
; CHECK-NOVSX-NEXT: vxor v2, v2, v2
; CHECK-NOVSX-NEXT: vxor v3, v3, v3
; CHECK-NOVSX-NEXT: lwzx r3, r3, r4
; CHECK-NOVSX-NEXT: std r3, -16(r1)
; CHECK-NOVSX-NEXT: addi r3, r1, -16
; CHECK-NOVSX-NEXT: lvx v3, 0, r3
; CHECK-NOVSX-NEXT: vmrglb v2, v2, v3
; CHECK-NOVSX-NEXT: lvx v2, 0, r3
; CHECK-NOVSX-NEXT: vmrglb v2, v3, v2
; CHECK-NOVSX-NEXT: blr
;
; CHECK-P7-LABEL: no_RAUW_in_combine_during_legalize:
@@ -863,11 +863,11 @@ define dso_local <16 x i8> @no_RAUW_in_combine_during_legalize(ptr nocapture rea
; P8-AIX-32-NEXT: lwzx r3, r3, r4
; P8-AIX-32-NEXT: li r4, 0
; P8-AIX-32-NEXT: stw r4, -32(r1)
; P8-AIX-32-NEXT: addi r4, r1, -16
; P8-AIX-32-NEXT: stw r3, -16(r1)
; P8-AIX-32-NEXT: addi r3, r1, -32
; P8-AIX-32-NEXT: lxvw4x vs0, 0, r3
; P8-AIX-32-NEXT: lxvw4x vs1, 0, r4
; P8-AIX-32-NEXT: addi r3, r1, -16
; P8-AIX-32-NEXT: lxvw4x vs1, 0, r3
; P8-AIX-32-NEXT: xxmrghw v2, vs0, vs1
; P8-AIX-32-NEXT: vmrghb v2, v2, v3
; P8-AIX-32-NEXT: blr
@@ -904,9 +904,9 @@ define dso_local <4 x i32> @testSplat4Low(ptr nocapture readonly %ptr) local_unn
; CHECK-NOVSX-LABEL: testSplat4Low:
; CHECK-NOVSX: # %bb.0: # %entry
; CHECK-NOVSX-NEXT: ld r3, 0(r3)
; CHECK-NOVSX-NEXT: addi r4, r1, -16
; CHECK-NOVSX-NEXT: std r3, -16(r1)
; CHECK-NOVSX-NEXT: lvx v2, 0, r4
; CHECK-NOVSX-NEXT: addi r3, r1, -16
; CHECK-NOVSX-NEXT: lvx v2, 0, r3
; CHECK-NOVSX-NEXT: vspltw v2, v2, 2
; CHECK-NOVSX-NEXT: blr
;
@@ -960,9 +960,9 @@ define dso_local <4 x i32> @testSplat4hi(ptr nocapture readonly %ptr) local_unna
; CHECK-NOVSX-LABEL: testSplat4hi:
; CHECK-NOVSX: # %bb.0: # %entry
; CHECK-NOVSX-NEXT: ld r3, 0(r3)
; CHECK-NOVSX-NEXT: addi r4, r1, -16
; CHECK-NOVSX-NEXT: std r3, -16(r1)
; CHECK-NOVSX-NEXT: lvx v2, 0, r4
; CHECK-NOVSX-NEXT: addi r3, r1, -16
; CHECK-NOVSX-NEXT: lvx v2, 0, r3
; CHECK-NOVSX-NEXT: vspltw v2, v2, 3
; CHECK-NOVSX-NEXT: blr
;
@@ -1014,10 +1014,10 @@ define dso_local <2 x i64> @testSplat8(ptr nocapture readonly %ptr) local_unname
; CHECK-NOVSX-LABEL: testSplat8:
; CHECK-NOVSX: # %bb.0: # %entry
; CHECK-NOVSX-NEXT: ld r3, 0(r3)
; CHECK-NOVSX-NEXT: addi r4, r1, -16
; CHECK-NOVSX-NEXT: std r3, -8(r1)
; CHECK-NOVSX-NEXT: std r3, -16(r1)
; CHECK-NOVSX-NEXT: lvx v2, 0, r4
; CHECK-NOVSX-NEXT: addi r3, r1, -16
; CHECK-NOVSX-NEXT: lvx v2, 0, r3
; CHECK-NOVSX-NEXT: blr
;
; CHECK-P7-LABEL: testSplat8:
@@ -1034,12 +1034,12 @@ define dso_local <2 x i64> @testSplat8(ptr nocapture readonly %ptr) local_unname
; P8-AIX-32: # %bb.0: # %entry
; P8-AIX-32-NEXT: lwz r4, 4(r3)
; P8-AIX-32-NEXT: stw r4, -16(r1)
; P8-AIX-32-NEXT: addi r4, r1, -32
; P8-AIX-32-NEXT: lwz r3, 0(r3)
; P8-AIX-32-NEXT: stw r3, -32(r1)
; P8-AIX-32-NEXT: addi r3, r1, -16
; P8-AIX-32-NEXT: lxvw4x vs0, 0, r3
; P8-AIX-32-NEXT: lxvw4x vs1, 0, r4
; P8-AIX-32-NEXT: addi r3, r1, -32
; P8-AIX-32-NEXT: lxvw4x vs1, 0, r3
; P8-AIX-32-NEXT: xxmrghw vs0, vs1, vs0
; P8-AIX-32-NEXT: xxmrghd v2, vs0, vs0
; P8-AIX-32-NEXT: blr
@@ -1069,10 +1069,10 @@ define <2 x i64> @testSplati64_0(ptr nocapture readonly %ptr) #0 {
; CHECK-NOVSX-LABEL: testSplati64_0:
; CHECK-NOVSX: # %bb.0: # %entry
; CHECK-NOVSX-NEXT: ld r3, 0(r3)
; CHECK-NOVSX-NEXT: addi r4, r1, -16
; CHECK-NOVSX-NEXT: std r3, -8(r1)
; CHECK-NOVSX-NEXT: std r3, -16(r1)
; CHECK-NOVSX-NEXT: lvx v2, 0, r4
; CHECK-NOVSX-NEXT: addi r3, r1, -16
; CHECK-NOVSX-NEXT: lvx v2, 0, r3
; CHECK-NOVSX-NEXT: blr
;
; CHECK-P7-LABEL: testSplati64_0:
@@ -1087,16 +1087,16 @@ define <2 x i64> @testSplati64_0(ptr nocapture readonly %ptr) #0 {
;
; P8-AIX-32-LABEL: testSplati64_0:
; P8-AIX-32: # %bb.0: # %entry
; P8-AIX-32-NEXT: lwz r4, L..C3(r2) # %const.0
; P8-AIX-32-NEXT: lwz r5, 4(r3)
; P8-AIX-32-NEXT: lwz r3, 0(r3)
; P8-AIX-32-NEXT: stw r5, -16(r1)
; P8-AIX-32-NEXT: stw r3, -32(r1)
; P8-AIX-32-NEXT: lwz r4, 0(r3)
; P8-AIX-32-NEXT: lwz r3, 4(r3)
; P8-AIX-32-NEXT: stw r3, -16(r1)
; P8-AIX-32-NEXT: lwz r3, L..C3(r2) # %const.0
; P8-AIX-32-NEXT: stw r4, -32(r1)
; P8-AIX-32-NEXT: lxvw4x v2, 0, r3
; P8-AIX-32-NEXT: addi r3, r1, -16
; P8-AIX-32-NEXT: lxvw4x v2, 0, r4
; P8-AIX-32-NEXT: addi r4, r1, -32
; P8-AIX-32-NEXT: lxvw4x v3, 0, r3
; P8-AIX-32-NEXT: lxvw4x v4, 0, r4
; P8-AIX-32-NEXT: addi r3, r1, -32
; P8-AIX-32-NEXT: lxvw4x v4, 0, r3
; P8-AIX-32-NEXT: vperm v2, v4, v3, v2
; P8-AIX-32-NEXT: blr
entry:
@@ -1128,14 +1128,14 @@ define <2 x i64> @testSplati64_1(ptr nocapture readonly %ptr) #0 {
; CHECK-NOVSX: # %bb.0: # %entry
; CHECK-NOVSX-NEXT: ld r4, 8(r3)
; CHECK-NOVSX-NEXT: std r4, -8(r1)
; CHECK-NOVSX-NEXT: addis r4, r2, .LCPI21_0@toc@ha
; CHECK-NOVSX-NEXT: ld r3, 0(r3)
; CHECK-NOVSX-NEXT: addi r4, r4, .LCPI21_0@toc@l
; CHECK-NOVSX-NEXT: lvx v2, 0, r4
; CHECK-NOVSX-NEXT: std r3, -16(r1)
; CHECK-NOVSX-NEXT: addi r3, r1, -16
; CHECK-NOVSX-NEXT: lvx v2, 0, r3
; CHECK-NOVSX-NEXT: addis r3, r2, .LCPI21_0@toc@ha
; CHECK-NOVSX-NEXT: addi r3, r3, .LCPI21_0@toc@l
; CHECK-NOVSX-NEXT: lvx v3, 0, r3
; CHECK-NOVSX-NEXT: vperm v2, v3, v3, v2
; CHECK-NOVSX-NEXT: vperm v2, v2, v2, v3
; CHECK-NOVSX-NEXT: blr
;
; CHECK-P7-LABEL: testSplati64_1:

View File

@@ -10,9 +10,9 @@ define float @bar(ptr %fp) {
; CHECK-LE-NEXT: lwz 3, 0(3)
; CHECK-LE-NEXT: mtfprd 0, 3
; CHECK-LE-NEXT: cmpd 7, 3, 3
; CHECK-LE-NEXT: xxsldwi 0, 0, 0, 1
; CHECK-LE-NEXT: bne- 7, .+4
; CHECK-LE-NEXT: isync
; CHECK-LE-NEXT: xxsldwi 0, 0, 0, 1
; CHECK-LE-NEXT: xscvspdpn 1, 0
; CHECK-LE-NEXT: blr
;

View File

@@ -7,8 +7,8 @@
define signext i32 @caller(i32 signext %a, i32 signext %b, i32 signext %cold) {
entry:
; COLDCC: bl callee
; COLDCC: ld 4, 40(1)
; COLDCC: ld 5, 32(1)
; COLDCC: ld 4, 32(1)
; COLDCC: ld 3, 40(1)
%call = tail call coldcc { i64, i64 } @callee(i32 signext %a, i32 signext %b)
%0 = extractvalue { i64, i64 } %call, 0
%1 = extractvalue { i64, i64 } %call, 1

View File

@@ -5,12 +5,12 @@
define <4 x double> @fneg_fdiv_splat(double %a0, <4 x double> %a1) {
; CHECK-LABEL: fneg_fdiv_splat:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addis 3, 2, .LCPI0_0@toc@ha
; CHECK-NEXT: # kill: def $f1 killed $f1 def $vsl1
; CHECK-NEXT: xxspltd 0, 1, 0
; CHECK-NEXT: addis 3, 2, .LCPI0_0@toc@ha
; CHECK-NEXT: addi 3, 3, .LCPI0_0@toc@l
; CHECK-NEXT: lxvd2x 2, 0, 3
; CHECK-NEXT: xvredp 1, 0
; CHECK-NEXT: lxvd2x 2, 0, 3
; CHECK-NEXT: xxlor 3, 2, 2
; CHECK-NEXT: xvmaddadp 3, 0, 1
; CHECK-NEXT: xvnmsubadp 1, 1, 3

View File

@@ -139,8 +139,8 @@ false:
define dso_local i64 @no_extswsli(ptr %base, i32 %index, i1 %flag) {
; CHECK-LABEL: no_extswsli:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: andi. r5, r5, 1
; CHECK-NEXT: extsw r4, r4
; CHECK-NEXT: andi. r5, r5, 1
; CHECK-NEXT: bc 4, gt, .LBB2_2
; CHECK-NEXT: # %bb.1: # %true
; CHECK-NEXT: sldi r4, r4, 3
@@ -152,8 +152,8 @@ define dso_local i64 @no_extswsli(ptr %base, i32 %index, i1 %flag) {
;
; CHECK-BE-LABEL: no_extswsli:
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: andi. r5, r5, 1
; CHECK-BE-NEXT: extsw r4, r4
; CHECK-BE-NEXT: andi. r5, r5, 1
; CHECK-BE-NEXT: bc 4, gt, .LBB2_2
; CHECK-BE-NEXT: # %bb.1: # %true
; CHECK-BE-NEXT: sldi r4, r4, 3

View File

@@ -38,9 +38,9 @@ define i32 @pattern2(i32 %x, i32 %y){
define i32 @pattern3(i1 %cond, i32 %x) {
; CHECK-LABEL: pattern3:
; CHECK: # %bb.0:
; CHECK-NEXT: li 5, -1
; CHECK-NEXT: andi. 3, 3, 1
; CHECK-NEXT: rldic 3, 5, 0, 32
; CHECK-NEXT: li 3, -1
; CHECK-NEXT: rldic 3, 3, 0, 32
; CHECK-NEXT: iselgt 3, 0, 3
; CHECK-NEXT: and 3, 3, 4
; CHECK-NEXT: blr
@@ -53,10 +53,10 @@ define i32 @pattern3(i1 %cond, i32 %x) {
define i32 @pattern4(i1 %cond, i32 %x) {
; CHECK-LABEL: pattern4:
; CHECK: # %bb.0:
; CHECK-NEXT: li 5, -1
; CHECK-NEXT: andi. 3, 3, 1
; CHECK-NEXT: rldic 3, 5, 0, 32
; CHECK-NEXT: li 3, -1
; CHECK-NEXT: li 5, 0
; CHECK-NEXT: rldic 3, 3, 0, 32
; CHECK-NEXT: iselgt 3, 3, 5
; CHECK-NEXT: or 3, 4, 3
; CHECK-NEXT: blr

View File

@@ -51,14 +51,14 @@ define dso_local void @foo1_int_be_reuse4B(ptr nocapture noundef writeonly %a) l
; P8-LE-LABEL: foo1_int_be_reuse4B:
; P8-LE: # %bb.0: # %entry
; P8-LE-NEXT: addis 4, 2, .LCPI0_0@toc@ha
; P8-LE-NEXT: li 5, 2312
; P8-LE-NEXT: addi 4, 4, .LCPI0_0@toc@l
; P8-LE-NEXT: lxvd2x 0, 0, 4
; P8-LE-NEXT: lis 4, 1798
; P8-LE-NEXT: ori 4, 4, 1284
; P8-LE-NEXT: stxvd2x 0, 0, 3
; P8-LE-NEXT: stw 4, 16(3)
; P8-LE-NEXT: sth 5, 20(3)
; P8-LE-NEXT: li 4, 2312
; P8-LE-NEXT: sth 4, 20(3)
; P8-LE-NEXT: blr
;
; P9-LE-LABEL: foo1_int_be_reuse4B:
@@ -139,14 +139,14 @@ define dso_local void @foo2_int_le_reuse4B(ptr nocapture noundef writeonly %a) l
; P8-LE-LABEL: foo2_int_le_reuse4B:
; P8-LE: # %bb.0: # %entry
; P8-LE-NEXT: addis 4, 2, .LCPI1_0@toc@ha
; P8-LE-NEXT: li 5, 3340
; P8-LE-NEXT: addi 4, 4, .LCPI1_0@toc@l
; P8-LE-NEXT: lxvd2x 0, 0, 4
; P8-LE-NEXT: lis 4, 2826
; P8-LE-NEXT: ori 4, 4, 2312
; P8-LE-NEXT: stxvd2x 0, 0, 3
; P8-LE-NEXT: stw 4, 16(3)
; P8-LE-NEXT: sth 5, 20(3)
; P8-LE-NEXT: li 4, 3340
; P8-LE-NEXT: sth 4, 20(3)
; P8-LE-NEXT: blr
;
; P9-LE-LABEL: foo2_int_le_reuse4B:
@@ -227,14 +227,14 @@ define dso_local void @foo3_int_be_reuse4B(ptr nocapture noundef writeonly %a) l
; P8-LE-LABEL: foo3_int_be_reuse4B:
; P8-LE: # %bb.0: # %entry
; P8-LE-NEXT: addis 4, 2, .LCPI2_0@toc@ha
; P8-LE-NEXT: li 5, 2057
; P8-LE-NEXT: addi 4, 4, .LCPI2_0@toc@l
; P8-LE-NEXT: lxvd2x 0, 0, 4
; P8-LE-NEXT: lis 4, 1543
; P8-LE-NEXT: ori 4, 4, 1029
; P8-LE-NEXT: stxvd2x 0, 0, 3
; P8-LE-NEXT: stw 4, 16(3)
; P8-LE-NEXT: sth 5, 20(3)
; P8-LE-NEXT: li 4, 2057
; P8-LE-NEXT: sth 4, 20(3)
; P8-LE-NEXT: blr
;
; P9-LE-LABEL: foo3_int_be_reuse4B:
@@ -309,14 +309,14 @@ define dso_local void @foo4_int_le_reuse4B(ptr nocapture noundef writeonly %a) l
; P8-LE-LABEL: foo4_int_le_reuse4B:
; P8-LE: # %bb.0: # %entry
; P8-LE-NEXT: addis 4, 2, .LCPI3_0@toc@ha
; P8-LE-NEXT: li 5, 3085
; P8-LE-NEXT: addi 4, 4, .LCPI3_0@toc@l
; P8-LE-NEXT: lxvd2x 0, 0, 4
; P8-LE-NEXT: lis 4, 2571
; P8-LE-NEXT: ori 4, 4, 2057
; P8-LE-NEXT: stxvd2x 0, 0, 3
; P8-LE-NEXT: stw 4, 16(3)
; P8-LE-NEXT: sth 5, 20(3)
; P8-LE-NEXT: li 4, 3085
; P8-LE-NEXT: sth 4, 20(3)
; P8-LE-NEXT: blr
;
; P9-LE-LABEL: foo4_int_le_reuse4B:
@@ -488,13 +488,13 @@ define dso_local void @foo7_int_be_reuse8B(ptr nocapture noundef writeonly %a) l
; P8-BE-LABEL: foo7_int_be_reuse8B:
; P8-BE: # %bb.0: # %entry
; P8-BE-NEXT: ld 4, L..C6(2) # %const.0
; P8-BE-NEXT: lis 5, 1
; P8-BE-NEXT: ori 5, 5, 515
; P8-BE-NEXT: lxvw4x 0, 0, 4
; P8-BE-NEXT: rldic 4, 5, 32, 15
; P8-BE-NEXT: lis 4, 1
; P8-BE-NEXT: ori 4, 4, 515
; P8-BE-NEXT: rldic 4, 4, 32, 15
; P8-BE-NEXT: stxvw4x 0, 0, 3
; P8-BE-NEXT: oris 4, 4, 1029
; P8-BE-NEXT: ori 4, 4, 1543
; P8-BE-NEXT: stxvw4x 0, 0, 3
; P8-BE-NEXT: std 4, 16(3)
; P8-BE-NEXT: blr
;
@@ -525,14 +525,14 @@ define dso_local void @foo7_int_be_reuse8B(ptr nocapture noundef writeonly %a) l
; P8-LE-LABEL: foo7_int_be_reuse8B:
; P8-LE: # %bb.0: # %entry
; P8-LE-NEXT: addis 4, 2, .LCPI6_0@toc@ha
; P8-LE-NEXT: lis 5, 449
; P8-LE-NEXT: addi 4, 4, .LCPI6_0@toc@l
; P8-LE-NEXT: ori 5, 5, 33089
; P8-LE-NEXT: lxvd2x 0, 0, 4
; P8-LE-NEXT: rldic 4, 5, 34, 5
; P8-LE-NEXT: lis 4, 449
; P8-LE-NEXT: ori 4, 4, 33089
; P8-LE-NEXT: rldic 4, 4, 34, 5
; P8-LE-NEXT: stxvd2x 0, 0, 3
; P8-LE-NEXT: oris 4, 4, 770
; P8-LE-NEXT: ori 4, 4, 256
; P8-LE-NEXT: stxvd2x 0, 0, 3
; P8-LE-NEXT: std 4, 16(3)
; P8-LE-NEXT: blr
;
@@ -584,13 +584,13 @@ define dso_local void @foo8_int_le_reuse8B(ptr nocapture noundef writeonly %a) l
; P8-BE-LABEL: foo8_int_le_reuse8B:
; P8-BE: # %bb.0: # %entry
; P8-BE-NEXT: ld 4, L..C7(2) # %const.0
; P8-BE-NEXT: lis 5, 2057
; P8-BE-NEXT: ori 5, 5, 2571
; P8-BE-NEXT: lxvw4x 0, 0, 4
; P8-BE-NEXT: rldic 4, 5, 32, 4
; P8-BE-NEXT: lis 4, 2057
; P8-BE-NEXT: ori 4, 4, 2571
; P8-BE-NEXT: rldic 4, 4, 32, 4
; P8-BE-NEXT: stxvw4x 0, 0, 3
; P8-BE-NEXT: oris 4, 4, 3085
; P8-BE-NEXT: ori 4, 4, 3599
; P8-BE-NEXT: stxvw4x 0, 0, 3
; P8-BE-NEXT: std 4, 16(3)
; P8-BE-NEXT: blr
;
@@ -621,14 +621,14 @@ define dso_local void @foo8_int_le_reuse8B(ptr nocapture noundef writeonly %a) l
; P8-LE-LABEL: foo8_int_le_reuse8B:
; P8-LE: # %bb.0: # %entry
; P8-LE-NEXT: addis 4, 2, .LCPI7_0@toc@ha
; P8-LE-NEXT: lis 5, 963
; P8-LE-NEXT: addi 4, 4, .LCPI7_0@toc@l
; P8-LE-NEXT: ori 5, 5, 33603
; P8-LE-NEXT: lxvd2x 0, 0, 4
; P8-LE-NEXT: rldic 4, 5, 34, 4
; P8-LE-NEXT: lis 4, 963
; P8-LE-NEXT: ori 4, 4, 33603
; P8-LE-NEXT: rldic 4, 4, 34, 4
; P8-LE-NEXT: stxvd2x 0, 0, 3
; P8-LE-NEXT: oris 4, 4, 2826
; P8-LE-NEXT: ori 4, 4, 2312
; P8-LE-NEXT: stxvd2x 0, 0, 3
; P8-LE-NEXT: std 4, 16(3)
; P8-LE-NEXT: blr
;
@@ -680,13 +680,13 @@ define dso_local void @foo9_int_be_reuse8B(ptr nocapture noundef writeonly %a) l
; P8-BE-LABEL: foo9_int_be_reuse8B:
; P8-BE: # %bb.0: # %entry
; P8-BE-NEXT: ld 4, L..C8(2) # %const.0
; P8-BE-NEXT: lis 5, 1
; P8-BE-NEXT: ori 5, 5, 515
; P8-BE-NEXT: lxvw4x 0, 0, 4
; P8-BE-NEXT: rldic 4, 5, 32, 15
; P8-BE-NEXT: lis 4, 1
; P8-BE-NEXT: ori 4, 4, 515
; P8-BE-NEXT: rldic 4, 4, 32, 15
; P8-BE-NEXT: stxvw4x 0, 0, 3
; P8-BE-NEXT: oris 4, 4, 1029
; P8-BE-NEXT: ori 4, 4, 1543
; P8-BE-NEXT: stxvw4x 0, 0, 3
; P8-BE-NEXT: std 4, 16(3)
; P8-BE-NEXT: blr
;
@@ -717,14 +717,14 @@ define dso_local void @foo9_int_be_reuse8B(ptr nocapture noundef writeonly %a) l
; P8-LE-LABEL: foo9_int_be_reuse8B:
; P8-LE: # %bb.0: # %entry
; P8-LE-NEXT: addis 4, 2, .LCPI8_0@toc@ha
; P8-LE-NEXT: lis 5, 1543
; P8-LE-NEXT: addi 4, 4, .LCPI8_0@toc@l
; P8-LE-NEXT: ori 5, 5, 1029
; P8-LE-NEXT: lxvd2x 0, 0, 4
; P8-LE-NEXT: rldic 4, 5, 32, 5
; P8-LE-NEXT: lis 4, 1543
; P8-LE-NEXT: ori 4, 4, 1029
; P8-LE-NEXT: rldic 4, 4, 32, 5
; P8-LE-NEXT: stxvd2x 0, 0, 3
; P8-LE-NEXT: oris 4, 4, 515
; P8-LE-NEXT: ori 4, 4, 1
; P8-LE-NEXT: stxvd2x 0, 0, 3
; P8-LE-NEXT: std 4, 16(3)
; P8-LE-NEXT: blr
;
@@ -768,13 +768,13 @@ define dso_local void @foo10_int_le_reuse8B(ptr nocapture noundef writeonly %a)
; P8-BE-LABEL: foo10_int_le_reuse8B:
; P8-BE: # %bb.0: # %entry
; P8-BE-NEXT: ld 4, L..C9(2) # %const.0
; P8-BE-NEXT: lis 5, 2057
; P8-BE-NEXT: ori 5, 5, 2571
; P8-BE-NEXT: lxvw4x 0, 0, 4
; P8-BE-NEXT: rldic 4, 5, 32, 4
; P8-BE-NEXT: lis 4, 2057
; P8-BE-NEXT: ori 4, 4, 2571
; P8-BE-NEXT: rldic 4, 4, 32, 4
; P8-BE-NEXT: stxvw4x 0, 0, 3
; P8-BE-NEXT: oris 4, 4, 3085
; P8-BE-NEXT: ori 4, 4, 3599
; P8-BE-NEXT: stxvw4x 0, 0, 3
; P8-BE-NEXT: std 4, 16(3)
; P8-BE-NEXT: blr
;
@@ -805,14 +805,14 @@ define dso_local void @foo10_int_le_reuse8B(ptr nocapture noundef writeonly %a)
; P8-LE-LABEL: foo10_int_le_reuse8B:
; P8-LE: # %bb.0: # %entry
; P8-LE-NEXT: addis 4, 2, .LCPI9_0@toc@ha
; P8-LE-NEXT: lis 5, 3599
; P8-LE-NEXT: addi 4, 4, .LCPI9_0@toc@l
; P8-LE-NEXT: ori 5, 5, 3085
; P8-LE-NEXT: lxvd2x 0, 0, 4
; P8-LE-NEXT: rldic 4, 5, 32, 4
; P8-LE-NEXT: lis 4, 3599
; P8-LE-NEXT: ori 4, 4, 3085
; P8-LE-NEXT: rldic 4, 4, 32, 4
; P8-LE-NEXT: stxvd2x 0, 0, 3
; P8-LE-NEXT: oris 4, 4, 2571
; P8-LE-NEXT: ori 4, 4, 2057
; P8-LE-NEXT: stxvd2x 0, 0, 3
; P8-LE-NEXT: std 4, 16(3)
; P8-LE-NEXT: blr
;
@@ -856,13 +856,13 @@ define dso_local void @foo11_int_be_reuse8B(ptr nocapture noundef writeonly %a)
; P8-BE-LABEL: foo11_int_be_reuse8B:
; P8-BE: # %bb.0: # %entry
; P8-BE-NEXT: ld 4, L..C10(2) # %const.0
; P8-BE-NEXT: lis 5, 1
; P8-BE-NEXT: ori 5, 5, 515
; P8-BE-NEXT: lxvw4x 0, 0, 4
; P8-BE-NEXT: rldic 4, 5, 32, 15
; P8-BE-NEXT: lis 4, 1
; P8-BE-NEXT: ori 4, 4, 515
; P8-BE-NEXT: rldic 4, 4, 32, 15
; P8-BE-NEXT: stxvw4x 0, 0, 3
; P8-BE-NEXT: oris 4, 4, 1029
; P8-BE-NEXT: ori 4, 4, 1543
; P8-BE-NEXT: stxvw4x 0, 0, 3
; P8-BE-NEXT: std 4, 16(3)
; P8-BE-NEXT: blr
;
@@ -893,14 +893,14 @@ define dso_local void @foo11_int_be_reuse8B(ptr nocapture noundef writeonly %a)
; P8-LE-LABEL: foo11_int_be_reuse8B:
; P8-LE: # %bb.0: # %entry
; P8-LE-NEXT: addis 4, 2, .LCPI10_0@toc@ha
; P8-LE-NEXT: lis 5, 1029
; P8-LE-NEXT: addi 4, 4, .LCPI10_0@toc@l
; P8-LE-NEXT: ori 5, 5, 1543
; P8-LE-NEXT: lxvd2x 0, 0, 4
; P8-LE-NEXT: rldic 4, 5, 32, 5
; P8-LE-NEXT: lis 4, 1029
; P8-LE-NEXT: ori 4, 4, 1543
; P8-LE-NEXT: rldic 4, 4, 32, 5
; P8-LE-NEXT: stxvd2x 0, 0, 3
; P8-LE-NEXT: oris 4, 4, 1
; P8-LE-NEXT: ori 4, 4, 515
; P8-LE-NEXT: stxvd2x 0, 0, 3
; P8-LE-NEXT: std 4, 16(3)
; P8-LE-NEXT: blr
;
@@ -940,13 +940,13 @@ define dso_local void @foo12_int_le_reuse8B(ptr nocapture noundef writeonly %a)
; P8-BE-LABEL: foo12_int_le_reuse8B:
; P8-BE: # %bb.0: # %entry
; P8-BE-NEXT: ld 4, L..C11(2) # %const.0
; P8-BE-NEXT: lis 5, 2057
; P8-BE-NEXT: ori 5, 5, 2571
; P8-BE-NEXT: lxvw4x 0, 0, 4
; P8-BE-NEXT: rldic 4, 5, 32, 4
; P8-BE-NEXT: lis 4, 2057
; P8-BE-NEXT: ori 4, 4, 2571
; P8-BE-NEXT: rldic 4, 4, 32, 4
; P8-BE-NEXT: stxvw4x 0, 0, 3
; P8-BE-NEXT: oris 4, 4, 3085
; P8-BE-NEXT: ori 4, 4, 3599
; P8-BE-NEXT: stxvw4x 0, 0, 3
; P8-BE-NEXT: std 4, 16(3)
; P8-BE-NEXT: blr
;
@@ -977,14 +977,14 @@ define dso_local void @foo12_int_le_reuse8B(ptr nocapture noundef writeonly %a)
; P8-LE-LABEL: foo12_int_le_reuse8B:
; P8-LE: # %bb.0: # %entry
; P8-LE-NEXT: addis 4, 2, .LCPI11_0@toc@ha
; P8-LE-NEXT: lis 5, 3085
; P8-LE-NEXT: addi 4, 4, .LCPI11_0@toc@l
; P8-LE-NEXT: ori 5, 5, 3599
; P8-LE-NEXT: lxvd2x 0, 0, 4
; P8-LE-NEXT: rldic 4, 5, 32, 4
; P8-LE-NEXT: lis 4, 3085
; P8-LE-NEXT: ori 4, 4, 3599
; P8-LE-NEXT: rldic 4, 4, 32, 4
; P8-LE-NEXT: stxvd2x 0, 0, 3
; P8-LE-NEXT: oris 4, 4, 2057
; P8-LE-NEXT: ori 4, 4, 2571
; P8-LE-NEXT: stxvd2x 0, 0, 3
; P8-LE-NEXT: std 4, 16(3)
; P8-LE-NEXT: blr
;
@@ -1024,13 +1024,13 @@ define dso_local void @foo13_int_be_reuse8B(ptr nocapture noundef writeonly %a)
; P8-BE-LABEL: foo13_int_be_reuse8B:
; P8-BE: # %bb.0: # %entry
; P8-BE-NEXT: ld 4, L..C12(2) # %const.0
; P8-BE-NEXT: lis 5, 1
; P8-BE-NEXT: ori 5, 5, 515
; P8-BE-NEXT: lxvd2x 0, 0, 4
; P8-BE-NEXT: rldic 4, 5, 32, 15
; P8-BE-NEXT: lis 4, 1
; P8-BE-NEXT: ori 4, 4, 515
; P8-BE-NEXT: rldic 4, 4, 32, 15
; P8-BE-NEXT: stxvd2x 0, 0, 3
; P8-BE-NEXT: oris 4, 4, 1029
; P8-BE-NEXT: ori 4, 4, 1543
; P8-BE-NEXT: stxvd2x 0, 0, 3
; P8-BE-NEXT: std 4, 16(3)
; P8-BE-NEXT: blr
;
@@ -1061,14 +1061,14 @@ define dso_local void @foo13_int_be_reuse8B(ptr nocapture noundef writeonly %a)
; P8-LE-LABEL: foo13_int_be_reuse8B:
; P8-LE: # %bb.0: # %entry
; P8-LE-NEXT: addis 4, 2, .LCPI12_0@toc@ha
; P8-LE-NEXT: lis 5, 1
; P8-LE-NEXT: addi 4, 4, .LCPI12_0@toc@l
; P8-LE-NEXT: ori 5, 5, 515
; P8-LE-NEXT: lxvd2x 0, 0, 4
; P8-LE-NEXT: rldic 4, 5, 32, 15
; P8-LE-NEXT: lis 4, 1
; P8-LE-NEXT: ori 4, 4, 515
; P8-LE-NEXT: rldic 4, 4, 32, 15
; P8-LE-NEXT: stxvd2x 0, 0, 3
; P8-LE-NEXT: oris 4, 4, 1029
; P8-LE-NEXT: ori 4, 4, 1543
; P8-LE-NEXT: stxvd2x 0, 0, 3
; P8-LE-NEXT: std 4, 16(3)
; P8-LE-NEXT: blr
;
@@ -1106,13 +1106,13 @@ define dso_local void @foo14_int_le_reuse8B(ptr nocapture noundef writeonly %a)
; P8-BE-LABEL: foo14_int_le_reuse8B:
; P8-BE: # %bb.0: # %entry
; P8-BE-NEXT: ld 4, L..C13(2) # %const.0
; P8-BE-NEXT: lis 5, 2057
; P8-BE-NEXT: ori 5, 5, 2571
; P8-BE-NEXT: lxvd2x 0, 0, 4
; P8-BE-NEXT: rldic 4, 5, 32, 4
; P8-BE-NEXT: lis 4, 2057
; P8-BE-NEXT: ori 4, 4, 2571
; P8-BE-NEXT: rldic 4, 4, 32, 4
; P8-BE-NEXT: stxvd2x 0, 0, 3
; P8-BE-NEXT: oris 4, 4, 3085
; P8-BE-NEXT: ori 4, 4, 3599
; P8-BE-NEXT: stxvd2x 0, 0, 3
; P8-BE-NEXT: std 4, 16(3)
; P8-BE-NEXT: blr
;
@@ -1143,14 +1143,14 @@ define dso_local void @foo14_int_le_reuse8B(ptr nocapture noundef writeonly %a)
; P8-LE-LABEL: foo14_int_le_reuse8B:
; P8-LE: # %bb.0: # %entry
; P8-LE-NEXT: addis 4, 2, .LCPI13_0@toc@ha
; P8-LE-NEXT: lis 5, 2057
; P8-LE-NEXT: addi 4, 4, .LCPI13_0@toc@l
; P8-LE-NEXT: ori 5, 5, 2571
; P8-LE-NEXT: lxvd2x 0, 0, 4
; P8-LE-NEXT: rldic 4, 5, 32, 4
; P8-LE-NEXT: lis 4, 2057
; P8-LE-NEXT: ori 4, 4, 2571
; P8-LE-NEXT: rldic 4, 4, 32, 4
; P8-LE-NEXT: stxvd2x 0, 0, 3
; P8-LE-NEXT: oris 4, 4, 3085
; P8-LE-NEXT: ori 4, 4, 3599
; P8-LE-NEXT: stxvd2x 0, 0, 3
; P8-LE-NEXT: std 4, 16(3)
; P8-LE-NEXT: blr
;
@@ -1254,13 +1254,13 @@ define dso_local void @foo16_int_noreuse8B(ptr nocapture noundef writeonly %a) l
; P8-BE-LABEL: foo16_int_noreuse8B:
; P8-BE: # %bb.0: # %entry
; P8-BE-NEXT: ld 4, L..C15(2) # %const.0
; P8-BE-NEXT: lis 5, 1
; P8-BE-NEXT: ori 5, 5, 515
; P8-BE-NEXT: lxvw4x 0, 0, 4
; P8-BE-NEXT: rldic 4, 5, 32, 15
; P8-BE-NEXT: lis 4, 1
; P8-BE-NEXT: ori 4, 4, 515
; P8-BE-NEXT: rldic 4, 4, 32, 15
; P8-BE-NEXT: stxvw4x 0, 0, 3
; P8-BE-NEXT: oris 4, 4, 1029
; P8-BE-NEXT: ori 4, 4, 1544
; P8-BE-NEXT: stxvw4x 0, 0, 3
; P8-BE-NEXT: std 4, 16(3)
; P8-BE-NEXT: blr
;
@@ -1291,14 +1291,14 @@ define dso_local void @foo16_int_noreuse8B(ptr nocapture noundef writeonly %a) l
; P8-LE-LABEL: foo16_int_noreuse8B:
; P8-LE: # %bb.0: # %entry
; P8-LE-NEXT: addis 4, 2, .LCPI15_0@toc@ha
; P8-LE-NEXT: lis 5, 128
; P8-LE-NEXT: addi 4, 4, .LCPI15_0@toc@l
; P8-LE-NEXT: ori 5, 5, 41153
; P8-LE-NEXT: lxvd2x 0, 0, 4
; P8-LE-NEXT: rldic 4, 5, 35, 5
; P8-LE-NEXT: lis 4, 128
; P8-LE-NEXT: ori 4, 4, 41153
; P8-LE-NEXT: rldic 4, 4, 35, 5
; P8-LE-NEXT: stxvd2x 0, 0, 3
; P8-LE-NEXT: oris 4, 4, 1
; P8-LE-NEXT: ori 4, 4, 515
; P8-LE-NEXT: stxvd2x 0, 0, 3
; P8-LE-NEXT: std 4, 16(3)
; P8-LE-NEXT: blr
;
@@ -1538,12 +1538,12 @@ define dso_local void @foo20_fp_le_reuse8B(ptr nocapture noundef writeonly %a) l
; P8-BE-LABEL: foo20_fp_le_reuse8B:
; P8-BE: # %bb.0: # %entry
; P8-BE-NEXT: ld 4, L..C19(2) # %const.0
; P8-BE-NEXT: lis 5, 16420
; P8-BE-NEXT: lxvd2x 0, 0, 4
; P8-BE-NEXT: ori 4, 5, 13107
; P8-BE-NEXT: lis 4, 16420
; P8-BE-NEXT: ori 4, 4, 13107
; P8-BE-NEXT: rldimi 4, 4, 32, 0
; P8-BE-NEXT: rlwimi 4, 4, 16, 0, 15
; P8-BE-NEXT: stxvd2x 0, 0, 3
; P8-BE-NEXT: rlwimi 4, 4, 16, 0, 15
; P8-BE-NEXT: std 4, 16(3)
; P8-BE-NEXT: blr
;
@@ -1573,13 +1573,13 @@ define dso_local void @foo20_fp_le_reuse8B(ptr nocapture noundef writeonly %a) l
; P8-LE-LABEL: foo20_fp_le_reuse8B:
; P8-LE: # %bb.0: # %entry
; P8-LE-NEXT: addis 4, 2, .LCPI19_0@toc@ha
; P8-LE-NEXT: lis 5, 16420
; P8-LE-NEXT: addi 4, 4, .LCPI19_0@toc@l
; P8-LE-NEXT: lxvd2x 0, 0, 4
; P8-LE-NEXT: ori 4, 5, 13107
; P8-LE-NEXT: lis 4, 16420
; P8-LE-NEXT: ori 4, 4, 13107
; P8-LE-NEXT: rldimi 4, 4, 32, 0
; P8-LE-NEXT: rlwimi 4, 4, 16, 0, 15
; P8-LE-NEXT: stxvd2x 0, 0, 3
; P8-LE-NEXT: rlwimi 4, 4, 16, 0, 15
; P8-LE-NEXT: std 4, 16(3)
; P8-LE-NEXT: blr
;

View File

@@ -178,14 +178,14 @@ define dso_local void @foo3(ptr nocapture noundef writeonly %a) local_unnamed_ad
; P8-LE-LABEL: foo3:
; P8-LE: # %bb.0: # %entry
; P8-LE-NEXT: addis 4, 2, .LCPI2_0@toc@ha
; P8-LE-NEXT: li 5, 3333
; P8-LE-NEXT: addi 4, 4, .LCPI2_0@toc@l
; P8-LE-NEXT: lxvd2x 0, 0, 4
; P8-LE-NEXT: lis 4, 3333
; P8-LE-NEXT: ori 4, 4, 3333
; P8-LE-NEXT: stxvd2x 0, 0, 3
; P8-LE-NEXT: stw 4, 16(3)
; P8-LE-NEXT: sth 5, 20(3)
; P8-LE-NEXT: li 4, 3333
; P8-LE-NEXT: sth 4, 20(3)
; P8-LE-NEXT: blr
;
; P9-LE-LABEL: foo3:
@@ -572,13 +572,13 @@ define dso_local void @foo9(ptr nocapture noundef writeonly %a) local_unnamed_ad
; P8-BE-LABEL: foo9:
; P8-BE: # %bb.0: # %entry
; P8-BE-NEXT: ld 4, L..C8(2) # %const.0
; P8-BE-NEXT: lis 5, 16394
; P8-BE-NEXT: ori 5, 5, 41943
; P8-BE-NEXT: lxvd2x 0, 0, 4
; P8-BE-NEXT: rldic 4, 5, 32, 1
; P8-BE-NEXT: lis 4, 16394
; P8-BE-NEXT: ori 4, 4, 41943
; P8-BE-NEXT: rldic 4, 4, 32, 1
; P8-BE-NEXT: stxvd2x 0, 0, 3
; P8-BE-NEXT: oris 4, 4, 2621
; P8-BE-NEXT: ori 4, 4, 28836
; P8-BE-NEXT: stxvd2x 0, 0, 3
; P8-BE-NEXT: std 4, 16(3)
; P8-BE-NEXT: blr
;
@@ -609,14 +609,14 @@ define dso_local void @foo9(ptr nocapture noundef writeonly %a) local_unnamed_ad
; P8-LE-LABEL: foo9:
; P8-LE: # %bb.0: # %entry
; P8-LE-NEXT: addis 4, 2, .LCPI8_0@toc@ha
; P8-LE-NEXT: lis 5, 16394
; P8-LE-NEXT: addi 4, 4, .LCPI8_0@toc@l
; P8-LE-NEXT: ori 5, 5, 41943
; P8-LE-NEXT: lxvd2x 0, 0, 4
; P8-LE-NEXT: rldic 4, 5, 32, 1
; P8-LE-NEXT: lis 4, 16394
; P8-LE-NEXT: ori 4, 4, 41943
; P8-LE-NEXT: rldic 4, 4, 32, 1
; P8-LE-NEXT: stxvd2x 0, 0, 3
; P8-LE-NEXT: oris 4, 4, 2621
; P8-LE-NEXT: ori 4, 4, 28836
; P8-LE-NEXT: stxvd2x 0, 0, 3
; P8-LE-NEXT: std 4, 16(3)
; P8-LE-NEXT: blr
;

View File

@@ -15,9 +15,9 @@ define void @fold_constant_stores_loaddr(ptr %i8_ptr) {
; LE-LABEL: fold_constant_stores_loaddr:
; LE: # %bb.0: # %entry
; LE-NEXT: li 4, 0
; LE-NEXT: li 5, -86
; LE-NEXT: std 4, 0(3)
; LE-NEXT: stb 5, 0(3)
; LE-NEXT: li 4, -86
; LE-NEXT: stb 4, 0(3)
; LE-NEXT: blr
entry:
store i64 0, ptr %i8_ptr, align 8
@@ -38,9 +38,9 @@ define void @fold_constant_stores_hiaddr(ptr %i8_ptr) {
; LE-LABEL: fold_constant_stores_hiaddr:
; LE: # %bb.0: # %entry
; LE-NEXT: li 4, 0
; LE-NEXT: li 5, -86
; LE-NEXT: std 4, 0(3)
; LE-NEXT: stb 5, 0(3)
; LE-NEXT: li 4, -86
; LE-NEXT: stb 4, 0(3)
; LE-NEXT: blr
entry:
store i64 0, ptr %i8_ptr, align 8

View File

@@ -10,13 +10,13 @@ define <16 x i8> @test_vpermxorb() local_unnamed_addr {
; CHECK-LE-P8-LABEL: test_vpermxorb:
; CHECK-LE-P8: # %bb.0: # %entry
; CHECK-LE-P8-NEXT: addis 3, 2, .LCPI0_0@toc@ha
; CHECK-LE-P8-NEXT: addis 4, 2, .LCPI0_1@toc@ha
; CHECK-LE-P8-NEXT: addi 3, 3, .LCPI0_0@toc@l
; CHECK-LE-P8-NEXT: addi 4, 4, .LCPI0_1@toc@l
; CHECK-LE-P8-NEXT: lxvd2x 0, 0, 3
; CHECK-LE-P8-NEXT: lxvd2x 1, 0, 4
; CHECK-LE-P8-NEXT: addis 3, 2, .LCPI0_1@toc@ha
; CHECK-LE-P8-NEXT: addi 3, 3, .LCPI0_1@toc@l
; CHECK-LE-P8-NEXT: xxswapd 34, 0
; CHECK-LE-P8-NEXT: xxswapd 35, 1
; CHECK-LE-P8-NEXT: lxvd2x 0, 0, 3
; CHECK-LE-P8-NEXT: xxswapd 35, 0
; CHECK-LE-P8-NEXT: vpermxor 2, 3, 2, 2
; CHECK-LE-P8-NEXT: blr
;
@@ -34,11 +34,11 @@ define <16 x i8> @test_vpermxorb() local_unnamed_addr {
; CHECK-BE-P8-LABEL: test_vpermxorb:
; CHECK-BE-P8: # %bb.0: # %entry
; CHECK-BE-P8-NEXT: addis 3, 2, .LCPI0_0@toc@ha
; CHECK-BE-P8-NEXT: addis 4, 2, .LCPI0_1@toc@ha
; CHECK-BE-P8-NEXT: addi 3, 3, .LCPI0_0@toc@l
; CHECK-BE-P8-NEXT: addi 4, 4, .LCPI0_1@toc@l
; CHECK-BE-P8-NEXT: lxvw4x 34, 0, 3
; CHECK-BE-P8-NEXT: lxvw4x 35, 0, 4
; CHECK-BE-P8-NEXT: addis 3, 2, .LCPI0_1@toc@ha
; CHECK-BE-P8-NEXT: addi 3, 3, .LCPI0_1@toc@l
; CHECK-BE-P8-NEXT: lxvw4x 35, 0, 3
; CHECK-BE-P8-NEXT: vpermxor 2, 3, 2, 2
; CHECK-BE-P8-NEXT: blr
entry:
@@ -52,13 +52,13 @@ define <8 x i16> @test_vpermxorh() local_unnamed_addr {
; CHECK-LE-P8-LABEL: test_vpermxorh:
; CHECK-LE-P8: # %bb.0: # %entry
; CHECK-LE-P8-NEXT: addis 3, 2, .LCPI1_0@toc@ha
; CHECK-LE-P8-NEXT: addis 4, 2, .LCPI1_1@toc@ha
; CHECK-LE-P8-NEXT: addi 3, 3, .LCPI1_0@toc@l
; CHECK-LE-P8-NEXT: addi 4, 4, .LCPI1_1@toc@l
; CHECK-LE-P8-NEXT: lxvd2x 0, 0, 3
; CHECK-LE-P8-NEXT: lxvd2x 1, 0, 4
; CHECK-LE-P8-NEXT: addis 3, 2, .LCPI1_1@toc@ha
; CHECK-LE-P8-NEXT: addi 3, 3, .LCPI1_1@toc@l
; CHECK-LE-P8-NEXT: xxswapd 34, 0
; CHECK-LE-P8-NEXT: xxswapd 35, 1
; CHECK-LE-P8-NEXT: lxvd2x 0, 0, 3
; CHECK-LE-P8-NEXT: xxswapd 35, 0
; CHECK-LE-P8-NEXT: vpermxor 2, 3, 2, 2
; CHECK-LE-P8-NEXT: blr
;
@@ -76,11 +76,11 @@ define <8 x i16> @test_vpermxorh() local_unnamed_addr {
; CHECK-BE-P8-LABEL: test_vpermxorh:
; CHECK-BE-P8: # %bb.0: # %entry
; CHECK-BE-P8-NEXT: addis 3, 2, .LCPI1_0@toc@ha
; CHECK-BE-P8-NEXT: addis 4, 2, .LCPI1_1@toc@ha
; CHECK-BE-P8-NEXT: addi 3, 3, .LCPI1_0@toc@l
; CHECK-BE-P8-NEXT: addi 4, 4, .LCPI1_1@toc@l
; CHECK-BE-P8-NEXT: lxvw4x 34, 0, 3
; CHECK-BE-P8-NEXT: lxvw4x 35, 0, 4
; CHECK-BE-P8-NEXT: addis 3, 2, .LCPI1_1@toc@ha
; CHECK-BE-P8-NEXT: addi 3, 3, .LCPI1_1@toc@l
; CHECK-BE-P8-NEXT: lxvw4x 35, 0, 3
; CHECK-BE-P8-NEXT: vpermxor 2, 3, 2, 2
; CHECK-BE-P8-NEXT: blr
entry:
@@ -93,13 +93,13 @@ define <4 x i32> @test_vpermxorw() local_unnamed_addr {
; CHECK-LE-P8-LABEL: test_vpermxorw:
; CHECK-LE-P8: # %bb.0: # %entry
; CHECK-LE-P8-NEXT: addis 3, 2, .LCPI2_0@toc@ha
; CHECK-LE-P8-NEXT: addis 4, 2, .LCPI2_1@toc@ha
; CHECK-LE-P8-NEXT: addi 3, 3, .LCPI2_0@toc@l
; CHECK-LE-P8-NEXT: addi 4, 4, .LCPI2_1@toc@l
; CHECK-LE-P8-NEXT: lxvd2x 0, 0, 3
; CHECK-LE-P8-NEXT: lxvd2x 1, 0, 4
; CHECK-LE-P8-NEXT: addis 3, 2, .LCPI2_1@toc@ha
; CHECK-LE-P8-NEXT: addi 3, 3, .LCPI2_1@toc@l
; CHECK-LE-P8-NEXT: xxswapd 34, 0
; CHECK-LE-P8-NEXT: xxswapd 35, 1
; CHECK-LE-P8-NEXT: lxvd2x 0, 0, 3
; CHECK-LE-P8-NEXT: xxswapd 35, 0
; CHECK-LE-P8-NEXT: vpermxor 2, 3, 2, 2
; CHECK-LE-P8-NEXT: blr
;
@@ -117,11 +117,11 @@ define <4 x i32> @test_vpermxorw() local_unnamed_addr {
; CHECK-BE-P8-LABEL: test_vpermxorw:
; CHECK-BE-P8: # %bb.0: # %entry
; CHECK-BE-P8-NEXT: addis 3, 2, .LCPI2_0@toc@ha
; CHECK-BE-P8-NEXT: addis 4, 2, .LCPI2_1@toc@ha
; CHECK-BE-P8-NEXT: addi 3, 3, .LCPI2_0@toc@l
; CHECK-BE-P8-NEXT: addi 4, 4, .LCPI2_1@toc@l
; CHECK-BE-P8-NEXT: lxvw4x 34, 0, 3
; CHECK-BE-P8-NEXT: lxvw4x 35, 0, 4
; CHECK-BE-P8-NEXT: addis 3, 2, .LCPI2_1@toc@ha
; CHECK-BE-P8-NEXT: addi 3, 3, .LCPI2_1@toc@l
; CHECK-BE-P8-NEXT: lxvw4x 35, 0, 3
; CHECK-BE-P8-NEXT: vpermxor 2, 3, 2, 2
; CHECK-BE-P8-NEXT: blr
entry:
@@ -134,13 +134,13 @@ define <2 x i64> @test_vpermxord() local_unnamed_addr {
; CHECK-LE-P8-LABEL: test_vpermxord:
; CHECK-LE-P8: # %bb.0: # %entry
; CHECK-LE-P8-NEXT: addis 3, 2, .LCPI3_0@toc@ha
; CHECK-LE-P8-NEXT: addis 4, 2, .LCPI3_1@toc@ha
; CHECK-LE-P8-NEXT: addi 3, 3, .LCPI3_0@toc@l
; CHECK-LE-P8-NEXT: addi 4, 4, .LCPI3_1@toc@l
; CHECK-LE-P8-NEXT: lxvd2x 0, 0, 3
; CHECK-LE-P8-NEXT: lxvd2x 1, 0, 4
; CHECK-LE-P8-NEXT: addis 3, 2, .LCPI3_1@toc@ha
; CHECK-LE-P8-NEXT: addi 3, 3, .LCPI3_1@toc@l
; CHECK-LE-P8-NEXT: xxswapd 34, 0
; CHECK-LE-P8-NEXT: xxswapd 35, 1
; CHECK-LE-P8-NEXT: lxvd2x 0, 0, 3
; CHECK-LE-P8-NEXT: xxswapd 35, 0
; CHECK-LE-P8-NEXT: vpermxor 2, 3, 2, 2
; CHECK-LE-P8-NEXT: blr
;
@@ -158,11 +158,11 @@ define <2 x i64> @test_vpermxord() local_unnamed_addr {
; CHECK-BE-P8-LABEL: test_vpermxord:
; CHECK-BE-P8: # %bb.0: # %entry
; CHECK-BE-P8-NEXT: addis 3, 2, .LCPI3_0@toc@ha
; CHECK-BE-P8-NEXT: addis 4, 2, .LCPI3_1@toc@ha
; CHECK-BE-P8-NEXT: addi 3, 3, .LCPI3_0@toc@l
; CHECK-BE-P8-NEXT: addi 4, 4, .LCPI3_1@toc@l
; CHECK-BE-P8-NEXT: lxvw4x 34, 0, 3
; CHECK-BE-P8-NEXT: lxvw4x 35, 0, 4
; CHECK-BE-P8-NEXT: addis 3, 2, .LCPI3_1@toc@ha
; CHECK-BE-P8-NEXT: addi 3, 3, .LCPI3_1@toc@l
; CHECK-BE-P8-NEXT: lxvw4x 35, 0, 3
; CHECK-BE-P8-NEXT: vpermxor 2, 3, 2, 2
; CHECK-BE-P8-NEXT: blr
entry:

View File

@@ -46,11 +46,11 @@ define dso_local signext i32 @test1(ptr %b) local_unnamed_addr {
; CHECK-NEXT: .cfi_def_cfa_offset 128
; CHECK-NEXT: .cfi_offset lr, 16
; CHECK-NEXT: .cfi_offset r30, -16
; CHECK-NEXT: addis r4, r2, a@toc@ha
; CHECK-NEXT: std r30, 112(r1) # 8-byte Folded Spill
; CHECK-NEXT: mr r30, r3
; CHECK-NEXT: lwa r4, a@toc@l(r4)
; CHECK-NEXT: cmpld r4, r3
; CHECK-NEXT: addis r3, r2, a@toc@ha
; CHECK-NEXT: lwa r3, a@toc@l(r3)
; CHECK-NEXT: cmpld r3, r30
; CHECK-NEXT: # implicit-def: $r3
; CHECK-NEXT: bne cr0, .LBB0_2
; CHECK-NEXT: # %bb.1: # %if.then
@@ -129,8 +129,8 @@ define dso_local signext i32 @test2(ptr %p1) local_unnamed_addr {
; CHECK-NEXT: .cfi_offset r30, -16
; CHECK-NEXT: std r30, 112(r1) # 8-byte Folded Spill
; CHECK-NEXT: mr r30, r3
; CHECK-NEXT: cmpldi r3, 0
; CHECK-NEXT: li r3, 0
; CHECK-NEXT: cmpldi r30, 0
; CHECK-NEXT: beq cr0, .LBB1_3
; CHECK-NEXT: # %bb.1: # %if.end
; CHECK-NEXT: addis r4, r2, a@toc@ha

View File

@@ -13,18 +13,18 @@ define void @test(ptr %cast) {
; CHECK-NEXT: std 29, -24(1) # 8-byte Folded Spill
; CHECK-NEXT: std 30, -16(1) # 8-byte Folded Spill
; CHECK-NEXT: stdu 1, -64(1)
; CHECK-NEXT: li 30, 255
; CHECK-NEXT: addi 29, 3, -8
; CHECK-NEXT: addi 30, 3, -8
; CHECK-NEXT: li 29, 255
; CHECK-NEXT: std 0, 80(1)
; CHECK-NEXT: .p2align 5
; CHECK-NEXT: .LBB0_1: # %for.body
; CHECK-NEXT: #
; CHECK-NEXT: lfdu 1, 8(29)
; CHECK-NEXT: lfdu 1, 8(30)
; CHECK-NEXT: bl cos
; CHECK-NEXT: nop
; CHECK-NEXT: addi 30, 30, -1
; CHECK-NEXT: stfd 1, 0(29)
; CHECK-NEXT: cmpldi 30, 0
; CHECK-NEXT: addi 29, 29, -1
; CHECK-NEXT: stfd 1, 0(30)
; CHECK-NEXT: cmpldi 29, 0
; CHECK-NEXT: bc 12, 1, .LBB0_1
; CHECK-NEXT: # %bb.2: # %exit
; CHECK-NEXT: addi 1, 1, 64

View File

@@ -38,23 +38,23 @@ define void @fmul_ctrloop_fp128() nounwind {
; PWR8-NEXT: stdu 1, -112(1)
; PWR8-NEXT: li 3, 48
; PWR8-NEXT: std 0, 128(1)
; PWR8-NEXT: addis 4, 2, x@toc@ha
; PWR8-NEXT: std 28, 80(1) # 8-byte Folded Spill
; PWR8-NEXT: std 29, 88(1) # 8-byte Folded Spill
; PWR8-NEXT: std 30, 96(1) # 8-byte Folded Spill
; PWR8-NEXT: li 30, 4
; PWR8-NEXT: addi 4, 4, x@toc@l
; PWR8-NEXT: li 29, 16
; PWR8-NEXT: std 26, 64(1) # 8-byte Folded Spill
; PWR8-NEXT: stxvd2x 63, 1, 3 # 16-byte Folded Spill
; PWR8-NEXT: addis 3, 2, a@toc@ha
; PWR8-NEXT: std 26, 64(1) # 8-byte Folded Spill
; PWR8-NEXT: std 27, 72(1) # 8-byte Folded Spill
; PWR8-NEXT: addi 3, 3, a@toc@l
; PWR8-NEXT: std 27, 72(1) # 8-byte Folded Spill
; PWR8-NEXT: lxvd2x 0, 0, 3
; PWR8-NEXT: addis 3, 2, y@toc@ha
; PWR8-NEXT: addi 3, 3, y@toc@l
; PWR8-NEXT: addi 28, 3, -16
; PWR8-NEXT: addi 3, 4, -16
; PWR8-NEXT: addis 3, 2, x@toc@ha
; PWR8-NEXT: addi 3, 3, x@toc@l
; PWR8-NEXT: addi 3, 3, -16
; PWR8-NEXT: xxswapd 63, 0
; PWR8-NEXT: .p2align 4
; PWR8-NEXT: .LBB0_1: # %for.body
@@ -66,8 +66,8 @@ define void @fmul_ctrloop_fp128() nounwind {
; PWR8-NEXT: xxswapd 35, 0
; PWR8-NEXT: bl __mulkf3
; PWR8-NEXT: nop
; PWR8-NEXT: xxswapd 0, 34
; PWR8-NEXT: addi 30, 30, -1
; PWR8-NEXT: xxswapd 0, 34
; PWR8-NEXT: mr 3, 26
; PWR8-NEXT: cmpldi 30, 0
; PWR8-NEXT: stxvd2x 0, 28, 29
@@ -77,9 +77,9 @@ define void @fmul_ctrloop_fp128() nounwind {
; PWR8-NEXT: li 3, 48
; PWR8-NEXT: ld 30, 96(1) # 8-byte Folded Reload
; PWR8-NEXT: ld 29, 88(1) # 8-byte Folded Reload
; PWR8-NEXT: lxvd2x 63, 1, 3 # 16-byte Folded Reload
; PWR8-NEXT: ld 28, 80(1) # 8-byte Folded Reload
; PWR8-NEXT: ld 27, 72(1) # 8-byte Folded Reload
; PWR8-NEXT: lxvd2x 63, 1, 3 # 16-byte Folded Reload
; PWR8-NEXT: ld 26, 64(1) # 8-byte Folded Reload
; PWR8-NEXT: addi 1, 1, 112
; PWR8-NEXT: ld 0, 16(1)
@@ -132,12 +132,12 @@ define void @fpext_ctrloop_fp128(ptr %a) nounwind {
; PWR8-NEXT: std 29, -24(1) # 8-byte Folded Spill
; PWR8-NEXT: std 30, -16(1) # 8-byte Folded Spill
; PWR8-NEXT: stdu 1, -64(1)
; PWR8-NEXT: addis 4, 2, y@toc@ha
; PWR8-NEXT: addi 30, 3, -8
; PWR8-NEXT: addis 3, 2, y@toc@ha
; PWR8-NEXT: li 29, 4
; PWR8-NEXT: std 0, 80(1)
; PWR8-NEXT: addi 4, 4, y@toc@l
; PWR8-NEXT: addi 28, 4, -16
; PWR8-NEXT: addi 3, 3, y@toc@l
; PWR8-NEXT: addi 28, 3, -16
; PWR8-NEXT: .p2align 4
; PWR8-NEXT: .LBB1_1: # %for.body
; PWR8-NEXT: #
@@ -145,8 +145,8 @@ define void @fpext_ctrloop_fp128(ptr %a) nounwind {
; PWR8-NEXT: addi 28, 28, 16
; PWR8-NEXT: bl __extenddfkf2
; PWR8-NEXT: nop
; PWR8-NEXT: xxswapd 0, 34
; PWR8-NEXT: addi 29, 29, -1
; PWR8-NEXT: xxswapd 0, 34
; PWR8-NEXT: cmpldi 29, 0
; PWR8-NEXT: stxvd2x 0, 0, 28
; PWR8-NEXT: bc 12, 1, .LBB1_1
@@ -204,12 +204,12 @@ define void @fptrunc_ctrloop_fp128(ptr %a) nounwind {
; PWR8-NEXT: std 29, -24(1) # 8-byte Folded Spill
; PWR8-NEXT: std 30, -16(1) # 8-byte Folded Spill
; PWR8-NEXT: stdu 1, -64(1)
; PWR8-NEXT: addis 4, 2, x@toc@ha
; PWR8-NEXT: addi 30, 3, -8
; PWR8-NEXT: addis 3, 2, x@toc@ha
; PWR8-NEXT: li 29, 4
; PWR8-NEXT: std 0, 80(1)
; PWR8-NEXT: addi 4, 4, x@toc@l
; PWR8-NEXT: addi 28, 4, -16
; PWR8-NEXT: addi 3, 3, x@toc@l
; PWR8-NEXT: addi 28, 3, -16
; PWR8-NEXT: .p2align 4
; PWR8-NEXT: .LBB2_1: # %for.body
; PWR8-NEXT: #

View File

@@ -17,8 +17,8 @@ define cxx_fast_tlscc nonnull ptr @_ZTW2sg() nounwind {
; CHECK-NEXT: mflr 0
; CHECK-NEXT: std 30, -16(1) # 8-byte Folded Spill
; CHECK-NEXT: stdu 1, -48(1)
; CHECK-NEXT: std 0, 64(1)
; CHECK-NEXT: addis 3, 13, __tls_guard@tprel@ha
; CHECK-NEXT: std 0, 64(1)
; CHECK-NEXT: lbz 4, __tls_guard@tprel@l(3)
; CHECK-NEXT: andi. 4, 4, 1
; CHECK-NEXT: bc 12, 1, .LBB0_2

View File

@@ -79,10 +79,10 @@ define ppc_fp128 @test_ctr0() {
; P8LE-NEXT: .cfi_offset r30, -16
; P8LE-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; P8LE-NEXT: stdu r1, -48(r1)
; P8LE-NEXT: xxlxor f1, f1, f1
; P8LE-NEXT: li r3, 1
; P8LE-NEXT: std r0, 64(r1)
; P8LE-NEXT: xxlxor f1, f1, f1
; P8LE-NEXT: xxlxor f2, f2, f2
; P8LE-NEXT: std r0, 64(r1)
; P8LE-NEXT: rldic r30, r3, 62, 1
; P8LE-NEXT: .p2align 5
; P8LE-NEXT: .LBB0_1: # %bb6
@@ -109,9 +109,9 @@ define ppc_fp128 @test_ctr0() {
; P8BE-NEXT: .cfi_def_cfa_offset 128
; P8BE-NEXT: .cfi_offset lr, 16
; P8BE-NEXT: .cfi_offset r30, -16
; P8BE-NEXT: xxlxor f1, f1, f1
; P8BE-NEXT: li r3, 1
; P8BE-NEXT: std r30, 112(r1) # 8-byte Folded Spill
; P8BE-NEXT: xxlxor f1, f1, f1
; P8BE-NEXT: xxlxor f2, f2, f2
; P8BE-NEXT: rldic r30, r3, 62, 1
; P8BE-NEXT: .p2align 5

View File

@@ -32,9 +32,8 @@ entry:
define zeroext i8 @test_byval_mem1(ptr byval(%struct_S1) align 1 %s) {
; CHECK-LABEL: test_byval_mem1:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: mr 4, 3
; CHECK-NEXT: stb 3, -8(1)
; CHECK-NEXT: clrldi 3, 3, 56
; CHECK-NEXT: stb 4, -8(1)
; CHECK-NEXT: blr
entry:
%0 = load i8, ptr %s, align 1
@@ -56,8 +55,8 @@ define void @call_test_byval_mem1_2() #0 {
; CHECK-NEXT: li 7, 4
; CHECK-NEXT: li 8, 5
; CHECK-NEXT: li 9, 6
; CHECK-NEXT: ld 3, .LC0@toc@l(3)
; CHECK-NEXT: li 10, 7
; CHECK-NEXT: ld 3, .LC0@toc@l(3)
; CHECK-NEXT: lbz 3, 0(3)
; CHECK-NEXT: stb 3, 96(1)
; CHECK-NEXT: li 3, 0
@@ -130,16 +129,16 @@ define void @call_test_byval_mem1_4() #0 {
; CHECK-NEXT: std 0, 128(1)
; CHECK-NEXT: .cfi_def_cfa_offset 112
; CHECK-NEXT: .cfi_offset lr, 16
; CHECK-NEXT: addis 3, 2, .LC0@toc@ha
; CHECK-NEXT: li 4, 7
; CHECK-NEXT: li 3, 7
; CHECK-NEXT: li 4, 1
; CHECK-NEXT: li 5, 2
; CHECK-NEXT: li 7, 3
; CHECK-NEXT: li 8, 4
; CHECK-NEXT: li 9, 5
; CHECK-NEXT: li 10, 6
; CHECK-NEXT: std 3, 96(1)
; CHECK-NEXT: addis 3, 2, .LC0@toc@ha
; CHECK-NEXT: ld 3, .LC0@toc@l(3)
; CHECK-NEXT: std 4, 96(1)
; CHECK-NEXT: li 4, 1
; CHECK-NEXT: lbz 6, 0(3)
; CHECK-NEXT: li 3, 0
; CHECK-NEXT: bl test_byval_mem1_4
@@ -273,10 +272,9 @@ define zeroext i8 @test_byval_mem3(ptr byval(%struct_S3) align 1 %s) {
; CHECK-LABEL: test_byval_mem3:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: sth 3, -8(1)
; CHECK-NEXT: rldicl 5, 3, 48, 16
; CHECK-NEXT: lbz 4, -8(1)
; CHECK-NEXT: stb 5, -6(1)
; CHECK-NEXT: mr 3, 4
; CHECK-NEXT: rldicl 3, 3, 48, 16
; CHECK-NEXT: stb 3, -6(1)
; CHECK-NEXT: lbz 3, -8(1)
; CHECK-NEXT: blr
entry:
%0 = load i8, ptr %s, align 1
@@ -347,9 +345,8 @@ entry:
define zeroext i8 @test_byval_mem8(ptr byval(%struct_S8) align 1 %s) {
; CHECK-LABEL: test_byval_mem8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: mr 4, 3
; CHECK-NEXT: std 3, -8(1)
; CHECK-NEXT: clrldi 3, 3, 56
; CHECK-NEXT: std 4, -8(1)
; CHECK-NEXT: blr
entry:
%0 = load i8, ptr %s, align 1
@@ -387,12 +384,11 @@ entry:
define zeroext i8 @test_byval_mem32(ptr byval(%struct_S32) align 1 %s) {
; CHECK-LABEL: test_byval_mem32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: mr 7, 3
; CHECK-NEXT: std 3, -32(1)
; CHECK-NEXT: clrldi 3, 3, 56
; CHECK-NEXT: std 4, -24(1)
; CHECK-NEXT: std 5, -16(1)
; CHECK-NEXT: std 6, -8(1)
; CHECK-NEXT: std 7, -32(1)
; CHECK-NEXT: blr
entry:
%0 = load i8, ptr %s, align 1
@@ -411,11 +407,11 @@ define void @call_test_byval_mem32_2() #0 {
; CHECK-NEXT: vspltisw 2, 1
; CHECK-NEXT: ld 3, .LC5@toc@l(3)
; CHECK-NEXT: xvcvsxwdp 1, 34
; CHECK-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; CHECK-NEXT: ld 7, 24(3)
; CHECK-NEXT: ld 6, 16(3)
; CHECK-NEXT: ld 5, 8(3)
; CHECK-NEXT: ld 4, 0(3)
; CHECK-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; CHECK-NEXT: bl test_byval_mem32_2
; CHECK-NEXT: nop
; CHECK-NEXT: addi 1, 1, 32
@@ -457,11 +453,11 @@ define void @call_test_byval_mem32_3() #0 {
; CHECK-NEXT: li 7, 2
; CHECK-NEXT: ld 3, .LC5@toc@l(3)
; CHECK-NEXT: xvcvsxwdp 1, 34
; CHECK-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; CHECK-NEXT: xvcvsxwdp 2, 35
; CHECK-NEXT: # kill: def $f2 killed $f2 killed $vsl2
; CHECK-NEXT: lxvd2x 0, 3, 4
; CHECK-NEXT: li 4, 88
; CHECK-NEXT: xvcvsxwdp 2, 35
; CHECK-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; CHECK-NEXT: # kill: def $f2 killed $f2 killed $vsl2
; CHECK-NEXT: stxvd2x 0, 1, 4
; CHECK-NEXT: li 4, 72
; CHECK-NEXT: lxvd2x 0, 0, 3

View File

@@ -70,14 +70,14 @@ entry:
; CHECK: addis [[REG1:[0-9]+]], 2, .LC0@toc@ha
; CHECK: std 2, 40(1)
; CHECK: ld {{[0-9]+}}, .LC0@toc@l([[REG1]])
; CHECK: {{mr|ld}} 2,
; CHECK: mtctr
; CHECK: {{mr|ld}} 3,
; CHECK: bctrl
; CHECK: ld 2, 40(1)
; CHECK: std 2, 40(1)
; CHECK: {{mr|ld}} 2,
; CHECK: mtctr
; CHECK: {{mr|ld}} 3,
; CHECK: bctrl
; CHECK: ld 2, 40(1)

View File

@@ -484,8 +484,8 @@ define dso_local void @test_consecutive_i32(<4 x i32> %a, ptr nocapture %b) loca
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xxsldwi vs0, vs34, vs34, 2
; CHECK-NEXT: li r3, 4
; CHECK-NEXT: stxsiwx vs34, r5, r3
; CHECK-NEXT: stfiwx f0, 0, r5
; CHECK-NEXT: stxsiwx vs34, r5, r3
; CHECK-NEXT: blr
;
; CHECK-BE-LABEL: test_consecutive_i32:
@@ -571,7 +571,6 @@ define dso_local void @test_stores_exceed_vec_size(<4 x i32> %a, ptr nocapture %
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addis r3, r2, .LCPI16_0@toc@ha
; CHECK-NEXT: xxsldwi vs1, vs34, vs34, 1
; CHECK-NEXT: li r4, 20
; CHECK-NEXT: addi r3, r3, .LCPI16_0@toc@l
; CHECK-NEXT: lxvd2x vs0, 0, r3
; CHECK-NEXT: li r3, 16
@@ -580,19 +579,20 @@ define dso_local void @test_stores_exceed_vec_size(<4 x i32> %a, ptr nocapture %
; CHECK-NEXT: xxswapd vs0, vs35
; CHECK-NEXT: stxvd2x vs0, 0, r5
; CHECK-NEXT: stfiwx f1, r5, r3
; CHECK-NEXT: stxsiwx vs34, r5, r4
; CHECK-NEXT: li r3, 20
; CHECK-NEXT: stxsiwx vs34, r5, r3
; CHECK-NEXT: blr
;
; CHECK-BE-LABEL: test_stores_exceed_vec_size:
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: addis r3, r2, .LCPI16_0@toc@ha
; CHECK-BE-NEXT: xxsldwi vs0, vs34, vs34, 1
; CHECK-BE-NEXT: li r4, 20
; CHECK-BE-NEXT: addi r3, r3, .LCPI16_0@toc@l
; CHECK-BE-NEXT: lxvw4x vs35, 0, r3
; CHECK-BE-NEXT: li r3, 16
; CHECK-BE-NEXT: stxsiwx vs34, r5, r3
; CHECK-BE-NEXT: stfiwx f0, r5, r4
; CHECK-BE-NEXT: li r3, 20
; CHECK-BE-NEXT: stfiwx f0, r5, r3
; CHECK-BE-NEXT: vperm v3, v2, v2, v3
; CHECK-BE-NEXT: stxvw4x vs35, 0, r5
; CHECK-BE-NEXT: blr
@@ -649,16 +649,16 @@ define void @test_5_consecutive_stores_of_bytes(<16 x i8> %a, ptr nocapture %b)
; CHECK-NEXT: xxswapd vs0, vs34
; CHECK-NEXT: mfvsrd r3, vs34
; CHECK-NEXT: rldicl r6, r3, 32, 56
; CHECK-NEXT: rldicl r3, r3, 56, 56
; CHECK-NEXT: mffprd r4, f0
; CHECK-NEXT: stb r6, 1(r5)
; CHECK-NEXT: rldicl r3, r3, 56, 56
; CHECK-NEXT: stb r3, 2(r5)
; CHECK-NEXT: rldicl r6, r4, 32, 56
; CHECK-NEXT: rldicl r3, r4, 8, 56
; CHECK-NEXT: rldicl r4, r4, 16, 56
; CHECK-NEXT: stb r6, 0(r5)
; CHECK-NEXT: stb r6, 1(r5)
; CHECK-NEXT: rldicl r6, r4, 32, 56
; CHECK-NEXT: stb r3, 3(r5)
; CHECK-NEXT: stb r4, 4(r5)
; CHECK-NEXT: rldicl r3, r4, 16, 56
; CHECK-NEXT: stb r6, 0(r5)
; CHECK-NEXT: stb r3, 4(r5)
; CHECK-NEXT: blr
;
; CHECK-BE-LABEL: test_5_consecutive_stores_of_bytes:
@@ -670,11 +670,11 @@ define void @test_5_consecutive_stores_of_bytes(<16 x i8> %a, ptr nocapture %b)
; CHECK-BE-NEXT: stb r6, 0(r5)
; CHECK-BE-NEXT: rldicl r6, r4, 40, 56
; CHECK-BE-NEXT: rldicl r4, r4, 16, 56
; CHECK-BE-NEXT: stb r6, 1(r5)
; CHECK-BE-NEXT: clrldi r6, r3, 56
; CHECK-BE-NEXT: rldicl r3, r3, 56, 56
; CHECK-BE-NEXT: stb r4, 2(r5)
; CHECK-BE-NEXT: stb r6, 3(r5)
; CHECK-BE-NEXT: clrldi r4, r3, 56
; CHECK-BE-NEXT: rldicl r3, r3, 56, 56
; CHECK-BE-NEXT: stb r6, 1(r5)
; CHECK-BE-NEXT: stb r4, 3(r5)
; CHECK-BE-NEXT: stb r3, 4(r5)
; CHECK-BE-NEXT: blr
;
@@ -733,33 +733,33 @@ entry:
define void @test_13_consecutive_stores_of_bytes(<16 x i8> %a, ptr nocapture %b) local_unnamed_addr #0 {
; CHECK-LABEL: test_13_consecutive_stores_of_bytes:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xxswapd vs0, vs34
; CHECK-NEXT: mfvsrd r3, vs34
; CHECK-NEXT: rldicl r4, r3, 32, 56
; CHECK-NEXT: xxswapd vs0, vs34
; CHECK-NEXT: rldicl r6, r3, 32, 56
; CHECK-NEXT: mffprd r4, f0
; CHECK-NEXT: stb r6, 1(r5)
; CHECK-NEXT: rldicl r6, r3, 56, 56
; CHECK-NEXT: stb r4, 1(r5)
; CHECK-NEXT: rldicl r4, r3, 40, 56
; CHECK-NEXT: mffprd r7, f0
; CHECK-NEXT: stb r6, 2(r5)
; CHECK-NEXT: rldicl r6, r3, 40, 56
; CHECK-NEXT: stb r6, 6(r5)
; CHECK-NEXT: rldicl r6, r3, 24, 56
; CHECK-NEXT: stb r4, 6(r5)
; CHECK-NEXT: rldicl r4, r3, 8, 56
; CHECK-NEXT: stb r6, 7(r5)
; CHECK-NEXT: rldicl r6, r3, 8, 56
; CHECK-NEXT: rldicl r3, r3, 16, 56
; CHECK-NEXT: stb r4, 9(r5)
; CHECK-NEXT: rldicl r4, r7, 32, 56
; CHECK-NEXT: rldicl r6, r7, 8, 56
; CHECK-NEXT: stb r6, 9(r5)
; CHECK-NEXT: rldicl r6, r4, 32, 56
; CHECK-NEXT: stb r3, 12(r5)
; CHECK-NEXT: stb r4, 0(r5)
; CHECK-NEXT: rldicl r4, r7, 16, 56
; CHECK-NEXT: stb r6, 0(r5)
; CHECK-NEXT: rldicl r6, r4, 8, 56
; CHECK-NEXT: stb r6, 3(r5)
; CHECK-NEXT: clrldi r6, r7, 56
; CHECK-NEXT: stb r4, 4(r5)
; CHECK-NEXT: rldicl r4, r7, 48, 56
; CHECK-NEXT: rldicl r6, r4, 16, 56
; CHECK-NEXT: stb r6, 4(r5)
; CHECK-NEXT: clrldi r6, r4, 56
; CHECK-NEXT: stb r6, 5(r5)
; CHECK-NEXT: rldicl r6, r7, 56, 56
; CHECK-NEXT: stb r4, 8(r5)
; CHECK-NEXT: rldicl r4, r7, 24, 56
; CHECK-NEXT: rldicl r6, r4, 48, 56
; CHECK-NEXT: stb r6, 8(r5)
; CHECK-NEXT: rldicl r6, r4, 56, 56
; CHECK-NEXT: rldicl r4, r4, 24, 56
; CHECK-NEXT: stb r6, 10(r5)
; CHECK-NEXT: stb r4, 11(r5)
; CHECK-NEXT: blr
@@ -768,33 +768,33 @@ define void @test_13_consecutive_stores_of_bytes(<16 x i8> %a, ptr nocapture %b)
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: mfvsrd r3, vs34
; CHECK-BE-NEXT: xxswapd vs0, vs34
; CHECK-BE-NEXT: rldicl r4, r3, 40, 56
; CHECK-BE-NEXT: rldicl r6, r3, 40, 56
; CHECK-BE-NEXT: mffprd r4, f0
; CHECK-BE-NEXT: stb r6, 0(r5)
; CHECK-BE-NEXT: clrldi r6, r3, 56
; CHECK-BE-NEXT: stb r4, 0(r5)
; CHECK-BE-NEXT: rldicl r4, r3, 56, 56
; CHECK-BE-NEXT: mffprd r7, f0
; CHECK-BE-NEXT: stb r6, 3(r5)
; CHECK-BE-NEXT: rldicl r6, r3, 56, 56
; CHECK-BE-NEXT: stb r6, 4(r5)
; CHECK-BE-NEXT: rldicl r6, r3, 8, 56
; CHECK-BE-NEXT: stb r4, 4(r5)
; CHECK-BE-NEXT: rldicl r4, r3, 24, 56
; CHECK-BE-NEXT: stb r6, 5(r5)
; CHECK-BE-NEXT: rldicl r6, r3, 24, 56
; CHECK-BE-NEXT: stb r6, 8(r5)
; CHECK-BE-NEXT: rldicl r6, r3, 16, 56
; CHECK-BE-NEXT: stb r4, 8(r5)
; CHECK-BE-NEXT: rldicl r4, r7, 40, 56
; CHECK-BE-NEXT: stb r6, 10(r5)
; CHECK-BE-NEXT: rldicl r6, r7, 16, 56
; CHECK-BE-NEXT: stb r4, 1(r5)
; CHECK-BE-NEXT: rldicl r4, r7, 32, 56
; CHECK-BE-NEXT: stb r6, 2(r5)
; CHECK-BE-NEXT: rldicl r6, r7, 48, 56
; CHECK-BE-NEXT: stb r4, 6(r5)
; CHECK-BE-NEXT: clrldi r4, r7, 56
; CHECK-BE-NEXT: stb r6, 7(r5)
; CHECK-BE-NEXT: rldicl r3, r3, 48, 56
; CHECK-BE-NEXT: rldicl r6, r7, 56, 56
; CHECK-BE-NEXT: stb r4, 9(r5)
; CHECK-BE-NEXT: stb r6, 10(r5)
; CHECK-BE-NEXT: rldicl r6, r4, 40, 56
; CHECK-BE-NEXT: stb r3, 11(r5)
; CHECK-BE-NEXT: stb r6, 12(r5)
; CHECK-BE-NEXT: rldicl r3, r4, 56, 56
; CHECK-BE-NEXT: stb r6, 1(r5)
; CHECK-BE-NEXT: rldicl r6, r4, 16, 56
; CHECK-BE-NEXT: stb r3, 12(r5)
; CHECK-BE-NEXT: stb r6, 2(r5)
; CHECK-BE-NEXT: rldicl r6, r4, 32, 56
; CHECK-BE-NEXT: stb r6, 6(r5)
; CHECK-BE-NEXT: rldicl r6, r4, 48, 56
; CHECK-BE-NEXT: stb r6, 7(r5)
; CHECK-BE-NEXT: clrldi r6, r4, 56
; CHECK-BE-NEXT: stb r6, 9(r5)
; CHECK-BE-NEXT: blr
;
; CHECK-P9-LABEL: test_13_consecutive_stores_of_bytes:
@@ -967,24 +967,24 @@ entry:
define dso_local void @test_elements_from_three_vec(<4 x float> %a, <4 x float> %b, <4 x float> %c, ptr nocapture %d) local_unnamed_addr #0 {
; CHECK-LABEL: test_elements_from_three_vec:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: li r3, 4
; CHECK-NEXT: xxsldwi vs0, vs34, vs34, 3
; CHECK-NEXT: xxsldwi vs1, vs36, vs36, 1
; CHECK-NEXT: li r3, 4
; CHECK-NEXT: li r4, 8
; CHECK-NEXT: stxsiwx vs35, r9, r3
; CHECK-NEXT: li r3, 8
; CHECK-NEXT: stfiwx f0, 0, r9
; CHECK-NEXT: stfiwx f1, r9, r4
; CHECK-NEXT: stfiwx f1, r9, r3
; CHECK-NEXT: blr
;
; CHECK-BE-LABEL: test_elements_from_three_vec:
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: xxsldwi vs0, vs34, vs34, 2
; CHECK-BE-NEXT: xxsldwi vs1, vs35, vs35, 1
; CHECK-BE-NEXT: li r3, 4
; CHECK-BE-NEXT: li r4, 8
; CHECK-BE-NEXT: stxsiwx vs36, r9, r4
; CHECK-BE-NEXT: xxsldwi vs0, vs34, vs34, 2
; CHECK-BE-NEXT: stfiwx f1, r9, r3
; CHECK-BE-NEXT: li r3, 8
; CHECK-BE-NEXT: stfiwx f0, 0, r9
; CHECK-BE-NEXT: stxsiwx vs36, r9, r3
; CHECK-BE-NEXT: blr
;
; CHECK-P9-LABEL: test_elements_from_three_vec:

View File

@@ -438,13 +438,13 @@ define fp128 @testNestedAggregate(ptr byval(%struct.MixedC) nocapture readonly a
;
; CHECK-P8-LABEL: testNestedAggregate:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: li r11, 32
; CHECK-P8-NEXT: std r8, 72(r1)
; CHECK-P8-NEXT: std r7, 64(r1)
; CHECK-P8-NEXT: li r7, 32
; CHECK-P8-NEXT: addi r8, r1, 32
; CHECK-P8-NEXT: std r9, 80(r1)
; CHECK-P8-NEXT: std r10, 88(r1)
; CHECK-P8-NEXT: addi r7, r1, 32
; CHECK-P8-NEXT: lxvd2x vs0, r7, r11
; CHECK-P8-NEXT: lxvd2x vs0, r8, r7
; CHECK-P8-NEXT: std r3, 32(r1)
; CHECK-P8-NEXT: std r4, 40(r1)
; CHECK-P8-NEXT: std r5, 48(r1)
@@ -472,10 +472,10 @@ define fp128 @testUnion_01([1 x i128] %a.coerce) {
;
; CHECK-P8-LABEL: testUnion_01:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: addi r5, r1, -16
; CHECK-P8-NEXT: std r4, -8(r1)
; CHECK-P8-NEXT: std r3, -16(r1)
; CHECK-P8-NEXT: lxvd2x vs0, 0, r5
; CHECK-P8-NEXT: addi r3, r1, -16
; CHECK-P8-NEXT: std r4, -8(r1)
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: blr
@@ -499,10 +499,10 @@ define fp128 @testUnion_02([1 x i128] %a.coerce) {
;
; CHECK-P8-LABEL: testUnion_02:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: addi r5, r1, -16
; CHECK-P8-NEXT: std r4, -8(r1)
; CHECK-P8-NEXT: std r3, -16(r1)
; CHECK-P8-NEXT: lxvd2x vs0, 0, r5
; CHECK-P8-NEXT: addi r3, r1, -16
; CHECK-P8-NEXT: std r4, -8(r1)
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: blr
@@ -597,16 +597,16 @@ define fp128 @sum_float128(i32 signext %count, ...) {
; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: stdu r1, -64(r1)
; CHECK-P8-NEXT: addis r11, r2, .LCPI17_0@toc@ha
; CHECK-P8-NEXT: cmpwi r3, 0
; CHECK-P8-NEXT: std r0, 80(r1)
; CHECK-P8-NEXT: std r4, 104(r1)
; CHECK-P8-NEXT: addis r4, r2, .LCPI17_0@toc@ha
; CHECK-P8-NEXT: cmpwi r3, 0
; CHECK-P8-NEXT: std r5, 112(r1)
; CHECK-P8-NEXT: std r6, 120(r1)
; CHECK-P8-NEXT: addi r11, r11, .LCPI17_0@toc@l
; CHECK-P8-NEXT: lxvd2x vs0, 0, r11
; CHECK-P8-NEXT: addi r4, r4, .LCPI17_0@toc@l
; CHECK-P8-NEXT: std r7, 128(r1)
; CHECK-P8-NEXT: std r8, 136(r1)
; CHECK-P8-NEXT: lxvd2x vs0, 0, r4
; CHECK-P8-NEXT: std r9, 144(r1)
; CHECK-P8-NEXT: std r10, 152(r1)
; CHECK-P8-NEXT: xxswapd v3, vs0

View File

@@ -558,9 +558,9 @@ define fp128 @qp_minnum(ptr nocapture readonly %a,
; CHECK-P8-NEXT: .cfi_def_cfa_offset 32
; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: lxvd2x vs1, 0, r4
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: xxswapd v3, vs1
; CHECK-P8-NEXT: lxvd2x vs0, 0, r4
; CHECK-P8-NEXT: xxswapd v3, vs0
; CHECK-P8-NEXT: bl fminf128
; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: addi r1, r1, 32
@@ -601,9 +601,9 @@ define fp128 @qp_maxnum(ptr nocapture readonly %a,
; CHECK-P8-NEXT: .cfi_def_cfa_offset 32
; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: lxvd2x vs1, 0, r4
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: xxswapd v3, vs1
; CHECK-P8-NEXT: lxvd2x vs0, 0, r4
; CHECK-P8-NEXT: xxswapd v3, vs0
; CHECK-P8-NEXT: bl fmaxf128
; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: addi r1, r1, 32
@@ -644,9 +644,9 @@ define fp128 @qp_pow(ptr nocapture readonly %a,
; CHECK-P8-NEXT: .cfi_def_cfa_offset 32
; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: lxvd2x vs1, 0, r4
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: xxswapd v3, vs1
; CHECK-P8-NEXT: lxvd2x vs0, 0, r4
; CHECK-P8-NEXT: xxswapd v3, vs0
; CHECK-P8-NEXT: bl powf128
; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: addi r1, r1, 32
@@ -771,8 +771,7 @@ define dso_local void @qp_powi(ptr nocapture readonly %a, ptr nocapture readonly
; CHECK-P8-NEXT: std r0, 64(r1)
; CHECK-P8-NEXT: mr r30, r5
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: lwz r3, 0(r4)
; CHECK-P8-NEXT: mr r5, r3
; CHECK-P8-NEXT: lwz r5, 0(r4)
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: bl __powikf2
; CHECK-P8-NEXT: nop
@@ -825,13 +824,13 @@ define fp128 @qp_frem() #0 {
; CHECK-P8-NEXT: .cfi_def_cfa_offset 32
; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: addis r3, r2, a@toc@ha
; CHECK-P8-NEXT: addis r4, r2, b@toc@ha
; CHECK-P8-NEXT: addi r3, r3, a@toc@l
; CHECK-P8-NEXT: addi r4, r4, b@toc@l
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: lxvd2x vs1, 0, r4
; CHECK-P8-NEXT: addis r3, r2, b@toc@ha
; CHECK-P8-NEXT: addi r3, r3, b@toc@l
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: xxswapd v3, vs1
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: xxswapd v3, vs0
; CHECK-P8-NEXT: bl fmodf128
; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: addi r1, r1, 32
@@ -1284,11 +1283,11 @@ define dso_local void @qpFMA(ptr %a, ptr %b, ptr %c, ptr %res) {
; CHECK-P8-NEXT: std r0, 64(r1)
; CHECK-P8-NEXT: mr r30, r6
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: lxvd2x vs1, 0, r4
; CHECK-P8-NEXT: lxvd2x vs2, 0, r5
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: xxswapd v3, vs1
; CHECK-P8-NEXT: xxswapd v4, vs2
; CHECK-P8-NEXT: lxvd2x vs0, 0, r4
; CHECK-P8-NEXT: xxswapd v3, vs0
; CHECK-P8-NEXT: lxvd2x vs0, 0, r5
; CHECK-P8-NEXT: xxswapd v4, vs0
; CHECK-P8-NEXT: bl fmaf128
; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: xxswapd vs0, v2

View File

@@ -75,8 +75,8 @@ define i64 @checkBitcast(fp128 %in, <2 x i64> %in2, ptr %out) local_unnamed_addr
; CHECK-P8-NEXT: xxswapd vs0, v2
; CHECK-P8-NEXT: vaddudm v2, v2, v3
; CHECK-P8-NEXT: mffprd r3, f0
; CHECK-P8-NEXT: xxswapd vs0, v2
; CHECK-P8-NEXT: stxvd2x vs0, 0, r7
; CHECK-P8-NEXT: xxswapd vs1, v2
; CHECK-P8-NEXT: stxvd2x vs1, 0, r7
; CHECK-P8-NEXT: blr
entry:
%0 = bitcast fp128 %in to <2 x i64>

View File

@@ -32,13 +32,13 @@ define dso_local signext i32 @greater_qp() {
; CHECK-P8-NEXT: .cfi_def_cfa_offset 32
; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: addis r3, r2, a_qp@toc@ha
; CHECK-P8-NEXT: addis r4, r2, b_qp@toc@ha
; CHECK-P8-NEXT: addi r3, r3, a_qp@toc@l
; CHECK-P8-NEXT: addi r4, r4, b_qp@toc@l
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: lxvd2x vs1, 0, r4
; CHECK-P8-NEXT: addis r3, r2, b_qp@toc@ha
; CHECK-P8-NEXT: addi r3, r3, b_qp@toc@l
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: xxswapd v3, vs1
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: xxswapd v3, vs0
; CHECK-P8-NEXT: bl __gtkf2
; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: extsw r3, r3
@@ -80,13 +80,13 @@ define dso_local signext i32 @less_qp() {
; CHECK-P8-NEXT: .cfi_def_cfa_offset 32
; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: addis r3, r2, a_qp@toc@ha
; CHECK-P8-NEXT: addis r4, r2, b_qp@toc@ha
; CHECK-P8-NEXT: addi r3, r3, a_qp@toc@l
; CHECK-P8-NEXT: addi r4, r4, b_qp@toc@l
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: lxvd2x vs1, 0, r4
; CHECK-P8-NEXT: addis r3, r2, b_qp@toc@ha
; CHECK-P8-NEXT: addi r3, r3, b_qp@toc@l
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: xxswapd v3, vs1
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: xxswapd v3, vs0
; CHECK-P8-NEXT: bl __ltkf2
; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: rlwinm r3, r3, 1, 31, 31
@@ -126,13 +126,13 @@ define dso_local signext i32 @greater_eq_qp() {
; CHECK-P8-NEXT: .cfi_def_cfa_offset 32
; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: addis r3, r2, a_qp@toc@ha
; CHECK-P8-NEXT: addis r4, r2, b_qp@toc@ha
; CHECK-P8-NEXT: addi r3, r3, a_qp@toc@l
; CHECK-P8-NEXT: addi r4, r4, b_qp@toc@l
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: lxvd2x vs1, 0, r4
; CHECK-P8-NEXT: addis r3, r2, b_qp@toc@ha
; CHECK-P8-NEXT: addi r3, r3, b_qp@toc@l
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: xxswapd v3, vs1
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: xxswapd v3, vs0
; CHECK-P8-NEXT: bl __gekf2
; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: rlwinm r3, r3, 1, 31, 31
@@ -173,13 +173,13 @@ define dso_local signext i32 @less_eq_qp() {
; CHECK-P8-NEXT: .cfi_def_cfa_offset 32
; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: addis r3, r2, a_qp@toc@ha
; CHECK-P8-NEXT: addis r4, r2, b_qp@toc@ha
; CHECK-P8-NEXT: addi r3, r3, a_qp@toc@l
; CHECK-P8-NEXT: addi r4, r4, b_qp@toc@l
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: lxvd2x vs1, 0, r4
; CHECK-P8-NEXT: addis r3, r2, b_qp@toc@ha
; CHECK-P8-NEXT: addi r3, r3, b_qp@toc@l
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: xxswapd v3, vs1
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: xxswapd v3, vs0
; CHECK-P8-NEXT: bl __lekf2
; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: extsw r3, r3
@@ -222,13 +222,13 @@ define dso_local signext i32 @equal_qp() {
; CHECK-P8-NEXT: .cfi_def_cfa_offset 32
; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: addis r3, r2, a_qp@toc@ha
; CHECK-P8-NEXT: addis r4, r2, b_qp@toc@ha
; CHECK-P8-NEXT: addi r3, r3, a_qp@toc@l
; CHECK-P8-NEXT: addi r4, r4, b_qp@toc@l
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: lxvd2x vs1, 0, r4
; CHECK-P8-NEXT: addis r3, r2, b_qp@toc@ha
; CHECK-P8-NEXT: addi r3, r3, b_qp@toc@l
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: xxswapd v3, vs1
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: xxswapd v3, vs0
; CHECK-P8-NEXT: bl __eqkf2
; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: cntlzw r3, r3
@@ -268,13 +268,13 @@ define dso_local signext i32 @not_greater_qp() {
; CHECK-P8-NEXT: .cfi_def_cfa_offset 32
; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: addis r3, r2, a_qp@toc@ha
; CHECK-P8-NEXT: addis r4, r2, b_qp@toc@ha
; CHECK-P8-NEXT: addi r3, r3, a_qp@toc@l
; CHECK-P8-NEXT: addi r4, r4, b_qp@toc@l
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: lxvd2x vs1, 0, r4
; CHECK-P8-NEXT: addis r3, r2, b_qp@toc@ha
; CHECK-P8-NEXT: addi r3, r3, b_qp@toc@l
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: xxswapd v3, vs1
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: xxswapd v3, vs0
; CHECK-P8-NEXT: bl __gtkf2
; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: extsw r3, r3
@@ -317,13 +317,13 @@ define dso_local signext i32 @not_less_qp() {
; CHECK-P8-NEXT: .cfi_def_cfa_offset 32
; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: addis r3, r2, a_qp@toc@ha
; CHECK-P8-NEXT: addis r4, r2, b_qp@toc@ha
; CHECK-P8-NEXT: addi r3, r3, a_qp@toc@l
; CHECK-P8-NEXT: addi r4, r4, b_qp@toc@l
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: lxvd2x vs1, 0, r4
; CHECK-P8-NEXT: addis r3, r2, b_qp@toc@ha
; CHECK-P8-NEXT: addi r3, r3, b_qp@toc@l
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: xxswapd v3, vs1
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: xxswapd v3, vs0
; CHECK-P8-NEXT: bl __ltkf2
; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: rlwinm r3, r3, 1, 31, 31
@@ -365,13 +365,13 @@ define dso_local signext i32 @not_greater_eq_qp() {
; CHECK-P8-NEXT: .cfi_def_cfa_offset 32
; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: addis r3, r2, a_qp@toc@ha
; CHECK-P8-NEXT: addis r4, r2, b_qp@toc@ha
; CHECK-P8-NEXT: addi r3, r3, a_qp@toc@l
; CHECK-P8-NEXT: addi r4, r4, b_qp@toc@l
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: lxvd2x vs1, 0, r4
; CHECK-P8-NEXT: addis r3, r2, b_qp@toc@ha
; CHECK-P8-NEXT: addi r3, r3, b_qp@toc@l
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: xxswapd v3, vs1
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: xxswapd v3, vs0
; CHECK-P8-NEXT: bl __gekf2
; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: rlwinm r3, r3, 1, 31, 31
@@ -412,13 +412,13 @@ define dso_local signext i32 @not_less_eq_qp() {
; CHECK-P8-NEXT: .cfi_def_cfa_offset 32
; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: addis r3, r2, a_qp@toc@ha
; CHECK-P8-NEXT: addis r4, r2, b_qp@toc@ha
; CHECK-P8-NEXT: addi r3, r3, a_qp@toc@l
; CHECK-P8-NEXT: addi r4, r4, b_qp@toc@l
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: lxvd2x vs1, 0, r4
; CHECK-P8-NEXT: addis r3, r2, b_qp@toc@ha
; CHECK-P8-NEXT: addi r3, r3, b_qp@toc@l
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: xxswapd v3, vs1
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: xxswapd v3, vs0
; CHECK-P8-NEXT: bl __lekf2
; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: extsw r3, r3
@@ -460,13 +460,13 @@ define dso_local signext i32 @not_equal_qp() {
; CHECK-P8-NEXT: .cfi_def_cfa_offset 32
; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: addis r3, r2, a_qp@toc@ha
; CHECK-P8-NEXT: addis r4, r2, b_qp@toc@ha
; CHECK-P8-NEXT: addi r3, r3, a_qp@toc@l
; CHECK-P8-NEXT: addi r4, r4, b_qp@toc@l
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: lxvd2x vs1, 0, r4
; CHECK-P8-NEXT: addis r3, r2, b_qp@toc@ha
; CHECK-P8-NEXT: addi r3, r3, b_qp@toc@l
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: xxswapd v3, vs1
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: xxswapd v3, vs0
; CHECK-P8-NEXT: bl __nekf2
; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: cntlzw r3, r3
@@ -510,19 +510,19 @@ define fp128 @greater_sel_qp() {
; CHECK-P8-NEXT: .cfi_offset v30, -32
; CHECK-P8-NEXT: .cfi_offset v31, -16
; CHECK-P8-NEXT: li r3, 48
; CHECK-P8-NEXT: addis r4, r2, b_qp@toc@ha
; CHECK-P8-NEXT: stvx v30, r1, r3 # 16-byte Folded Spill
; CHECK-P8-NEXT: li r3, 64
; CHECK-P8-NEXT: addi r4, r4, b_qp@toc@l
; CHECK-P8-NEXT: stvx v31, r1, r3 # 16-byte Folded Spill
; CHECK-P8-NEXT: addis r3, r2, a_qp@toc@ha
; CHECK-P8-NEXT: lxvd2x vs1, 0, r4
; CHECK-P8-NEXT: addi r3, r3, a_qp@toc@l
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: xxswapd v30, vs1
; CHECK-P8-NEXT: addis r3, r2, b_qp@toc@ha
; CHECK-P8-NEXT: addi r3, r3, b_qp@toc@l
; CHECK-P8-NEXT: xxswapd v31, vs0
; CHECK-P8-NEXT: vmr v3, v30
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: vmr v2, v31
; CHECK-P8-NEXT: xxswapd v30, vs0
; CHECK-P8-NEXT: vmr v3, v30
; CHECK-P8-NEXT: bl __gtkf2
; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: cmpwi r3, 0
@@ -573,19 +573,19 @@ define fp128 @less_sel_qp() {
; CHECK-P8-NEXT: .cfi_offset v30, -32
; CHECK-P8-NEXT: .cfi_offset v31, -16
; CHECK-P8-NEXT: li r3, 48
; CHECK-P8-NEXT: addis r4, r2, b_qp@toc@ha
; CHECK-P8-NEXT: stvx v30, r1, r3 # 16-byte Folded Spill
; CHECK-P8-NEXT: li r3, 64
; CHECK-P8-NEXT: addi r4, r4, b_qp@toc@l
; CHECK-P8-NEXT: stvx v31, r1, r3 # 16-byte Folded Spill
; CHECK-P8-NEXT: addis r3, r2, a_qp@toc@ha
; CHECK-P8-NEXT: lxvd2x vs1, 0, r4
; CHECK-P8-NEXT: addi r3, r3, a_qp@toc@l
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: xxswapd v30, vs1
; CHECK-P8-NEXT: addis r3, r2, b_qp@toc@ha
; CHECK-P8-NEXT: addi r3, r3, b_qp@toc@l
; CHECK-P8-NEXT: xxswapd v31, vs0
; CHECK-P8-NEXT: vmr v3, v30
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: vmr v2, v31
; CHECK-P8-NEXT: xxswapd v30, vs0
; CHECK-P8-NEXT: vmr v3, v30
; CHECK-P8-NEXT: bl __ltkf2
; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: cmpwi r3, 0
@@ -637,19 +637,19 @@ define fp128 @greater_eq_sel_qp() {
; CHECK-P8-NEXT: .cfi_offset v30, -32
; CHECK-P8-NEXT: .cfi_offset v31, -16
; CHECK-P8-NEXT: li r3, 48
; CHECK-P8-NEXT: addis r4, r2, b_qp@toc@ha
; CHECK-P8-NEXT: stvx v30, r1, r3 # 16-byte Folded Spill
; CHECK-P8-NEXT: li r3, 64
; CHECK-P8-NEXT: addi r4, r4, b_qp@toc@l
; CHECK-P8-NEXT: stvx v31, r1, r3 # 16-byte Folded Spill
; CHECK-P8-NEXT: addis r3, r2, a_qp@toc@ha
; CHECK-P8-NEXT: lxvd2x vs1, 0, r4
; CHECK-P8-NEXT: addi r3, r3, a_qp@toc@l
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: xxswapd v30, vs1
; CHECK-P8-NEXT: addis r3, r2, b_qp@toc@ha
; CHECK-P8-NEXT: addi r3, r3, b_qp@toc@l
; CHECK-P8-NEXT: xxswapd v31, vs0
; CHECK-P8-NEXT: vmr v3, v30
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: vmr v2, v31
; CHECK-P8-NEXT: xxswapd v30, vs0
; CHECK-P8-NEXT: vmr v3, v30
; CHECK-P8-NEXT: bl __gekf2
; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: cmpwi r3, -1
@@ -701,19 +701,19 @@ define fp128 @less_eq_sel_qp() {
; CHECK-P8-NEXT: .cfi_offset v30, -32
; CHECK-P8-NEXT: .cfi_offset v31, -16
; CHECK-P8-NEXT: li r3, 48
; CHECK-P8-NEXT: addis r4, r2, b_qp@toc@ha
; CHECK-P8-NEXT: stvx v30, r1, r3 # 16-byte Folded Spill
; CHECK-P8-NEXT: li r3, 64
; CHECK-P8-NEXT: addi r4, r4, b_qp@toc@l
; CHECK-P8-NEXT: stvx v31, r1, r3 # 16-byte Folded Spill
; CHECK-P8-NEXT: addis r3, r2, a_qp@toc@ha
; CHECK-P8-NEXT: lxvd2x vs1, 0, r4
; CHECK-P8-NEXT: addi r3, r3, a_qp@toc@l
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: xxswapd v30, vs1
; CHECK-P8-NEXT: addis r3, r2, b_qp@toc@ha
; CHECK-P8-NEXT: addi r3, r3, b_qp@toc@l
; CHECK-P8-NEXT: xxswapd v31, vs0
; CHECK-P8-NEXT: vmr v3, v30
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: vmr v2, v31
; CHECK-P8-NEXT: xxswapd v30, vs0
; CHECK-P8-NEXT: vmr v3, v30
; CHECK-P8-NEXT: bl __lekf2
; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: cmpwi r3, 1
@@ -764,19 +764,19 @@ define fp128 @equal_sel_qp() {
; CHECK-P8-NEXT: .cfi_offset v30, -32
; CHECK-P8-NEXT: .cfi_offset v31, -16
; CHECK-P8-NEXT: li r3, 48
; CHECK-P8-NEXT: addis r4, r2, b_qp@toc@ha
; CHECK-P8-NEXT: stvx v30, r1, r3 # 16-byte Folded Spill
; CHECK-P8-NEXT: li r3, 64
; CHECK-P8-NEXT: addi r4, r4, b_qp@toc@l
; CHECK-P8-NEXT: stvx v31, r1, r3 # 16-byte Folded Spill
; CHECK-P8-NEXT: addis r3, r2, a_qp@toc@ha
; CHECK-P8-NEXT: lxvd2x vs1, 0, r4
; CHECK-P8-NEXT: addi r3, r3, a_qp@toc@l
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: xxswapd v30, vs1
; CHECK-P8-NEXT: addis r3, r2, b_qp@toc@ha
; CHECK-P8-NEXT: addi r3, r3, b_qp@toc@l
; CHECK-P8-NEXT: xxswapd v31, vs0
; CHECK-P8-NEXT: vmr v3, v30
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: vmr v2, v31
; CHECK-P8-NEXT: xxswapd v30, vs0
; CHECK-P8-NEXT: vmr v3, v30
; CHECK-P8-NEXT: bl __eqkf2
; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: cmplwi r3, 0

View File

@@ -82,8 +82,8 @@ define void @sdwConv2qp_01(ptr nocapture %a, i128 %b) {
; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: mr r30, r3
; CHECK-P8-NEXT: mr r3, r4
; CHECK-P8-NEXT: mr r4, r5
; CHECK-P8-NEXT: std r0, 64(r1)
; CHECK-P8-NEXT: mr r4, r5
; CHECK-P8-NEXT: bl __floattikf
; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: xxswapd vs0, v2
@@ -119,12 +119,11 @@ define void @sdwConv2qp_02(ptr nocapture %a) {
; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: addis r4, r2, .LC0@toc@ha
; CHECK-P8-NEXT: std r0, 64(r1)
; CHECK-P8-NEXT: mr r30, r3
; CHECK-P8-NEXT: ld r4, .LC0@toc@l(r4)
; CHECK-P8-NEXT: ld r4, 16(r4)
; CHECK-P8-NEXT: mr r3, r4
; CHECK-P8-NEXT: addis r3, r2, .LC0@toc@ha
; CHECK-P8-NEXT: std r0, 64(r1)
; CHECK-P8-NEXT: ld r3, .LC0@toc@l(r3)
; CHECK-P8-NEXT: ld r3, 16(r3)
; CHECK-P8-NEXT: bl __floatdikf
; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: xxswapd vs0, v2
@@ -162,8 +161,7 @@ define void @sdwConv2qp_03(ptr nocapture %a, ptr nocapture readonly %b) {
; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: std r0, 64(r1)
; CHECK-P8-NEXT: mr r30, r3
; CHECK-P8-NEXT: ld r4, 0(r4)
; CHECK-P8-NEXT: mr r3, r4
; CHECK-P8-NEXT: ld r3, 0(r4)
; CHECK-P8-NEXT: bl __floatdikf
; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: xxswapd vs0, v2
@@ -204,9 +202,9 @@ define void @sdwConv2qp_04(ptr nocapture %a, i1 %b) {
; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: mr r30, r3
; CHECK-P8-NEXT: andi. r3, r4, 1
; CHECK-P8-NEXT: li r3, 0
; CHECK-P8-NEXT: li r4, -1
; CHECK-P8-NEXT: std r0, 64(r1)
; CHECK-P8-NEXT: li r3, 0
; CHECK-P8-NEXT: iselgt r3, r4, r3
; CHECK-P8-NEXT: bl __floatsikf
; CHECK-P8-NEXT: nop
@@ -293,8 +291,8 @@ define void @udwConv2qp_01(ptr nocapture %a, i128 %b) {
; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: mr r30, r3
; CHECK-P8-NEXT: mr r3, r4
; CHECK-P8-NEXT: mr r4, r5
; CHECK-P8-NEXT: std r0, 64(r1)
; CHECK-P8-NEXT: mr r4, r5
; CHECK-P8-NEXT: bl __floatuntikf
; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: xxswapd vs0, v2
@@ -330,12 +328,11 @@ define void @udwConv2qp_02(ptr nocapture %a) {
; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: addis r4, r2, .LC1@toc@ha
; CHECK-P8-NEXT: std r0, 64(r1)
; CHECK-P8-NEXT: mr r30, r3
; CHECK-P8-NEXT: ld r4, .LC1@toc@l(r4)
; CHECK-P8-NEXT: ld r4, 32(r4)
; CHECK-P8-NEXT: mr r3, r4
; CHECK-P8-NEXT: addis r3, r2, .LC1@toc@ha
; CHECK-P8-NEXT: std r0, 64(r1)
; CHECK-P8-NEXT: ld r3, .LC1@toc@l(r3)
; CHECK-P8-NEXT: ld r3, 32(r3)
; CHECK-P8-NEXT: bl __floatundikf
; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: xxswapd vs0, v2
@@ -373,8 +370,7 @@ define void @udwConv2qp_03(ptr nocapture %a, ptr nocapture readonly %b) {
; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: std r0, 64(r1)
; CHECK-P8-NEXT: mr r30, r3
; CHECK-P8-NEXT: ld r4, 0(r4)
; CHECK-P8-NEXT: mr r3, r4
; CHECK-P8-NEXT: ld r3, 0(r4)
; CHECK-P8-NEXT: bl __floatundikf
; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: xxswapd vs0, v2
@@ -448,12 +444,11 @@ define ptr @sdwConv2qp_testXForm(ptr returned %sink,
; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: lis r5, 1
; CHECK-P8-NEXT: std r0, 64(r1)
; CHECK-P8-NEXT: mr r30, r3
; CHECK-P8-NEXT: ori r5, r5, 7797
; CHECK-P8-NEXT: ldx r4, r4, r5
; CHECK-P8-NEXT: mr r3, r4
; CHECK-P8-NEXT: lis r3, 1
; CHECK-P8-NEXT: std r0, 64(r1)
; CHECK-P8-NEXT: ori r3, r3, 7797
; CHECK-P8-NEXT: ldx r3, r4, r3
; CHECK-P8-NEXT: bl __floatdikf
; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: xxswapd vs0, v2
@@ -493,12 +488,11 @@ define ptr @udwConv2qp_testXForm(ptr returned %sink,
; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: lis r5, 1
; CHECK-P8-NEXT: std r0, 64(r1)
; CHECK-P8-NEXT: mr r30, r3
; CHECK-P8-NEXT: ori r5, r5, 7797
; CHECK-P8-NEXT: ldx r4, r4, r5
; CHECK-P8-NEXT: mr r3, r4
; CHECK-P8-NEXT: lis r3, 1
; CHECK-P8-NEXT: std r0, 64(r1)
; CHECK-P8-NEXT: ori r3, r3, 7797
; CHECK-P8-NEXT: ldx r3, r4, r3
; CHECK-P8-NEXT: bl __floatundikf
; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: xxswapd vs0, v2
@@ -574,8 +568,7 @@ define void @swConv2qp_02(ptr nocapture %a, ptr nocapture readonly %b) {
; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: std r0, 64(r1)
; CHECK-P8-NEXT: mr r30, r3
; CHECK-P8-NEXT: lwa r4, 0(r4)
; CHECK-P8-NEXT: mr r3, r4
; CHECK-P8-NEXT: lwa r3, 0(r4)
; CHECK-P8-NEXT: bl __floatsikf
; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: xxswapd vs0, v2
@@ -613,12 +606,11 @@ define void @swConv2qp_03(ptr nocapture %a) {
; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: addis r4, r2, .LC2@toc@ha
; CHECK-P8-NEXT: std r0, 64(r1)
; CHECK-P8-NEXT: mr r30, r3
; CHECK-P8-NEXT: ld r4, .LC2@toc@l(r4)
; CHECK-P8-NEXT: lwa r4, 12(r4)
; CHECK-P8-NEXT: mr r3, r4
; CHECK-P8-NEXT: addis r3, r2, .LC2@toc@ha
; CHECK-P8-NEXT: std r0, 64(r1)
; CHECK-P8-NEXT: ld r3, .LC2@toc@l(r3)
; CHECK-P8-NEXT: lwa r3, 12(r3)
; CHECK-P8-NEXT: bl __floatsikf
; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: xxswapd vs0, v2
@@ -692,8 +684,7 @@ define void @uwConv2qp_02(ptr nocapture %a, ptr nocapture readonly %b) {
; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: std r0, 64(r1)
; CHECK-P8-NEXT: mr r30, r3
; CHECK-P8-NEXT: lwz r4, 0(r4)
; CHECK-P8-NEXT: mr r3, r4
; CHECK-P8-NEXT: lwz r3, 0(r4)
; CHECK-P8-NEXT: bl __floatunsikf
; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: xxswapd vs0, v2
@@ -731,12 +722,11 @@ define void @uwConv2qp_03(ptr nocapture %a) {
; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: addis r4, r2, .LC3@toc@ha
; CHECK-P8-NEXT: std r0, 64(r1)
; CHECK-P8-NEXT: mr r30, r3
; CHECK-P8-NEXT: ld r4, .LC3@toc@l(r4)
; CHECK-P8-NEXT: lwz r4, 12(r4)
; CHECK-P8-NEXT: mr r3, r4
; CHECK-P8-NEXT: addis r3, r2, .LC3@toc@ha
; CHECK-P8-NEXT: std r0, 64(r1)
; CHECK-P8-NEXT: ld r3, .LC3@toc@l(r3)
; CHECK-P8-NEXT: lwz r3, 12(r3)
; CHECK-P8-NEXT: bl __floatunsikf
; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: xxswapd vs0, v2
@@ -854,8 +844,7 @@ define void @uhwConv2qp_02(ptr nocapture %a, ptr nocapture readonly %b) {
; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: std r0, 64(r1)
; CHECK-P8-NEXT: mr r30, r3
; CHECK-P8-NEXT: lhz r4, 0(r4)
; CHECK-P8-NEXT: mr r3, r4
; CHECK-P8-NEXT: lhz r3, 0(r4)
; CHECK-P8-NEXT: bl __floatunsikf
; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: xxswapd vs0, v2
@@ -893,12 +882,11 @@ define void @uhwConv2qp_03(ptr nocapture %a) {
; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: addis r4, r2, .LC4@toc@ha
; CHECK-P8-NEXT: std r0, 64(r1)
; CHECK-P8-NEXT: mr r30, r3
; CHECK-P8-NEXT: ld r4, .LC4@toc@l(r4)
; CHECK-P8-NEXT: lhz r4, 6(r4)
; CHECK-P8-NEXT: mr r3, r4
; CHECK-P8-NEXT: addis r3, r2, .LC4@toc@ha
; CHECK-P8-NEXT: std r0, 64(r1)
; CHECK-P8-NEXT: ld r3, .LC4@toc@l(r3)
; CHECK-P8-NEXT: lhz r3, 6(r3)
; CHECK-P8-NEXT: bl __floatunsikf
; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: xxswapd vs0, v2
@@ -1017,8 +1005,7 @@ define void @ubConv2qp_02(ptr nocapture %a, ptr nocapture readonly %b) {
; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: std r0, 64(r1)
; CHECK-P8-NEXT: mr r30, r3
; CHECK-P8-NEXT: lbz r4, 0(r4)
; CHECK-P8-NEXT: mr r3, r4
; CHECK-P8-NEXT: lbz r3, 0(r4)
; CHECK-P8-NEXT: bl __floatunsikf
; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: xxswapd vs0, v2
@@ -1056,12 +1043,11 @@ define void @ubConv2qp_03(ptr nocapture %a) {
; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: addis r4, r2, .LC5@toc@ha
; CHECK-P8-NEXT: std r0, 64(r1)
; CHECK-P8-NEXT: mr r30, r3
; CHECK-P8-NEXT: ld r4, .LC5@toc@l(r4)
; CHECK-P8-NEXT: lbz r4, 2(r4)
; CHECK-P8-NEXT: mr r3, r4
; CHECK-P8-NEXT: addis r3, r2, .LC5@toc@ha
; CHECK-P8-NEXT: std r0, 64(r1)
; CHECK-P8-NEXT: ld r3, .LC5@toc@l(r3)
; CHECK-P8-NEXT: lbz r3, 2(r3)
; CHECK-P8-NEXT: bl __floatunsikf
; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: xxswapd vs0, v2
@@ -1183,11 +1169,11 @@ define void @qpConv2dp_02(ptr nocapture %res) {
; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: addis r4, r2, .LC6@toc@ha
; CHECK-P8-NEXT: std r0, 64(r1)
; CHECK-P8-NEXT: mr r30, r3
; CHECK-P8-NEXT: ld r4, .LC6@toc@l(r4)
; CHECK-P8-NEXT: lxvd2x vs0, 0, r4
; CHECK-P8-NEXT: addis r3, r2, .LC6@toc@ha
; CHECK-P8-NEXT: std r0, 64(r1)
; CHECK-P8-NEXT: ld r3, .LC6@toc@l(r3)
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: bl __trunckfdf2
; CHECK-P8-NEXT: nop
@@ -1226,12 +1212,12 @@ define void @qpConv2dp_03(ptr nocapture %res, i32 signext %idx) {
; CHECK-P8-NEXT: std r29, -24(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: stdu r1, -64(r1)
; CHECK-P8-NEXT: mr r30, r4
; CHECK-P8-NEXT: addis r4, r2, .LC7@toc@ha
; CHECK-P8-NEXT: std r0, 80(r1)
; CHECK-P8-NEXT: mr r29, r3
; CHECK-P8-NEXT: ld r4, .LC7@toc@l(r4)
; CHECK-P8-NEXT: lxvd2x vs0, 0, r4
; CHECK-P8-NEXT: addis r3, r2, .LC7@toc@ha
; CHECK-P8-NEXT: std r0, 80(r1)
; CHECK-P8-NEXT: mr r30, r4
; CHECK-P8-NEXT: ld r3, .LC7@toc@l(r3)
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: bl __trunckfdf2
; CHECK-P8-NEXT: nop
@@ -1274,9 +1260,9 @@ define void @qpConv2dp_04(ptr nocapture readonly %a, ptr nocapture readonly %b,
; CHECK-P8-NEXT: std r0, 64(r1)
; CHECK-P8-NEXT: mr r30, r5
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: lxvd2x vs1, 0, r4
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: xxswapd v3, vs1
; CHECK-P8-NEXT: lxvd2x vs0, 0, r4
; CHECK-P8-NEXT: xxswapd v3, vs0
; CHECK-P8-NEXT: bl __addkf3
; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: bl __trunckfdf2
@@ -1348,11 +1334,11 @@ define void @qpConv2sp_02(ptr nocapture %res) {
; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: addis r4, r2, .LC6@toc@ha
; CHECK-P8-NEXT: std r0, 64(r1)
; CHECK-P8-NEXT: mr r30, r3
; CHECK-P8-NEXT: ld r4, .LC6@toc@l(r4)
; CHECK-P8-NEXT: lxvd2x vs0, 0, r4
; CHECK-P8-NEXT: addis r3, r2, .LC6@toc@ha
; CHECK-P8-NEXT: std r0, 64(r1)
; CHECK-P8-NEXT: ld r3, .LC6@toc@l(r3)
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: bl __trunckfsf2
; CHECK-P8-NEXT: nop
@@ -1392,13 +1378,13 @@ define void @qpConv2sp_03(ptr nocapture %res, i32 signext %idx) {
; CHECK-P8-NEXT: std r29, -24(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: stdu r1, -64(r1)
; CHECK-P8-NEXT: mr r30, r4
; CHECK-P8-NEXT: addis r4, r2, .LC7@toc@ha
; CHECK-P8-NEXT: std r0, 80(r1)
; CHECK-P8-NEXT: mr r29, r3
; CHECK-P8-NEXT: ld r4, .LC7@toc@l(r4)
; CHECK-P8-NEXT: addi r4, r4, 48
; CHECK-P8-NEXT: lxvd2x vs0, 0, r4
; CHECK-P8-NEXT: addis r3, r2, .LC7@toc@ha
; CHECK-P8-NEXT: std r0, 80(r1)
; CHECK-P8-NEXT: mr r30, r4
; CHECK-P8-NEXT: ld r3, .LC7@toc@l(r3)
; CHECK-P8-NEXT: addi r3, r3, 48
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: bl __trunckfsf2
; CHECK-P8-NEXT: nop
@@ -1442,9 +1428,9 @@ define void @qpConv2sp_04(ptr nocapture readonly %a, ptr nocapture readonly %b,
; CHECK-P8-NEXT: std r0, 64(r1)
; CHECK-P8-NEXT: mr r30, r5
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: lxvd2x vs1, 0, r4
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: xxswapd v3, vs1
; CHECK-P8-NEXT: lxvd2x vs0, 0, r4
; CHECK-P8-NEXT: xxswapd v3, vs0
; CHECK-P8-NEXT: bl __addkf3
; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: bl __trunckfsf2

View File

@@ -25,15 +25,15 @@ define void @qpFmadd(ptr nocapture readonly %a, ptr nocapture %b,
; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: .cfi_offset v31, -32
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: lxvd2x vs1, 0, r4
; CHECK-P8-NEXT: li r7, 48
; CHECK-P8-NEXT: std r30, 64(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: mr r30, r6
; CHECK-P8-NEXT: lxvd2x vs2, 0, r5
; CHECK-P8-NEXT: stvx v31, r1, r7 # 16-byte Folded Spill
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: xxswapd v3, vs1
; CHECK-P8-NEXT: xxswapd v31, vs2
; CHECK-P8-NEXT: lxvd2x vs0, 0, r4
; CHECK-P8-NEXT: xxswapd v3, vs0
; CHECK-P8-NEXT: lxvd2x vs0, 0, r5
; CHECK-P8-NEXT: xxswapd v31, vs0
; CHECK-P8-NEXT: bl __mulkf3
; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: vmr v3, v31
@@ -79,16 +79,16 @@ define void @qpFmadd_02(ptr nocapture readonly %a,
; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: .cfi_offset v31, -32
; CHECK-P8-NEXT: lxvd2x vs1, 0, r4
; CHECK-P8-NEXT: lxvd2x vs2, 0, r5
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: li r7, 48
; CHECK-P8-NEXT: std r30, 64(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: mr r30, r6
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: stvx v31, r1, r7 # 16-byte Folded Spill
; CHECK-P8-NEXT: xxswapd v2, vs1
; CHECK-P8-NEXT: xxswapd v3, vs2
; CHECK-P8-NEXT: xxswapd v31, vs0
; CHECK-P8-NEXT: lxvd2x vs0, 0, r4
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: lxvd2x vs0, 0, r5
; CHECK-P8-NEXT: xxswapd v3, vs0
; CHECK-P8-NEXT: bl __mulkf3
; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: vmr v3, v2
@@ -141,9 +141,9 @@ define void @qpFmadd_03(ptr nocapture readonly %a,
; CHECK-P8-NEXT: mr r30, r6
; CHECK-P8-NEXT: mr r29, r5
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: lxvd2x vs1, 0, r4
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: xxswapd v3, vs1
; CHECK-P8-NEXT: lxvd2x vs0, 0, r4
; CHECK-P8-NEXT: xxswapd v3, vs0
; CHECK-P8-NEXT: bl __mulkf3
; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: lxvd2x vs0, 0, r29
@@ -190,16 +190,16 @@ define void @qpFnmadd(ptr nocapture readonly %a,
; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: .cfi_offset v31, -32
; CHECK-P8-NEXT: lxvd2x vs1, 0, r4
; CHECK-P8-NEXT: lxvd2x vs2, 0, r5
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: li r7, 64
; CHECK-P8-NEXT: std r30, 80(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: mr r30, r6
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: stvx v31, r1, r7 # 16-byte Folded Spill
; CHECK-P8-NEXT: xxswapd v2, vs1
; CHECK-P8-NEXT: xxswapd v3, vs2
; CHECK-P8-NEXT: xxswapd v31, vs0
; CHECK-P8-NEXT: lxvd2x vs0, 0, r4
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: lxvd2x vs0, 0, r5
; CHECK-P8-NEXT: xxswapd v3, vs0
; CHECK-P8-NEXT: bl __mulkf3
; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: vmr v3, v2
@@ -259,9 +259,9 @@ define void @qpFnmadd_02(ptr nocapture readonly %a,
; CHECK-P8-NEXT: mr r30, r6
; CHECK-P8-NEXT: mr r29, r5
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: lxvd2x vs1, 0, r4
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: xxswapd v3, vs1
; CHECK-P8-NEXT: lxvd2x vs0, 0, r4
; CHECK-P8-NEXT: xxswapd v3, vs0
; CHECK-P8-NEXT: bl __mulkf3
; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: lxvd2x vs0, 0, r29
@@ -315,16 +315,16 @@ define void @qpFmsub(ptr nocapture readonly %a,
; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: .cfi_offset v31, -32
; CHECK-P8-NEXT: lxvd2x vs1, 0, r4
; CHECK-P8-NEXT: lxvd2x vs2, 0, r5
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: li r7, 48
; CHECK-P8-NEXT: std r30, 64(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: mr r30, r6
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: stvx v31, r1, r7 # 16-byte Folded Spill
; CHECK-P8-NEXT: xxswapd v2, vs1
; CHECK-P8-NEXT: xxswapd v3, vs2
; CHECK-P8-NEXT: xxswapd v31, vs0
; CHECK-P8-NEXT: lxvd2x vs0, 0, r4
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: lxvd2x vs0, 0, r5
; CHECK-P8-NEXT: xxswapd v3, vs0
; CHECK-P8-NEXT: bl __mulkf3
; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: vmr v3, v2
@@ -377,9 +377,9 @@ define void @qpFmsub_02(ptr nocapture readonly %a,
; CHECK-P8-NEXT: mr r30, r6
; CHECK-P8-NEXT: mr r29, r5
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: lxvd2x vs1, 0, r4
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: xxswapd v3, vs1
; CHECK-P8-NEXT: lxvd2x vs0, 0, r4
; CHECK-P8-NEXT: xxswapd v3, vs0
; CHECK-P8-NEXT: bl __mulkf3
; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: lxvd2x vs0, 0, r29
@@ -427,16 +427,16 @@ define void @qpFnmsub(ptr nocapture readonly %a,
; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: .cfi_offset v31, -32
; CHECK-P8-NEXT: lxvd2x vs1, 0, r4
; CHECK-P8-NEXT: lxvd2x vs2, 0, r5
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: li r7, 64
; CHECK-P8-NEXT: std r30, 80(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: mr r30, r6
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: stvx v31, r1, r7 # 16-byte Folded Spill
; CHECK-P8-NEXT: xxswapd v2, vs1
; CHECK-P8-NEXT: xxswapd v3, vs2
; CHECK-P8-NEXT: xxswapd v31, vs0
; CHECK-P8-NEXT: lxvd2x vs0, 0, r4
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: lxvd2x vs0, 0, r5
; CHECK-P8-NEXT: xxswapd v3, vs0
; CHECK-P8-NEXT: bl __mulkf3
; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: vmr v3, v2
@@ -496,9 +496,9 @@ define void @qpFnmsub_02(ptr nocapture readonly %a,
; CHECK-P8-NEXT: mr r30, r6
; CHECK-P8-NEXT: mr r29, r5
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: lxvd2x vs1, 0, r4
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: xxswapd v3, vs1
; CHECK-P8-NEXT: lxvd2x vs0, 0, r4
; CHECK-P8-NEXT: xxswapd v3, vs0
; CHECK-P8-NEXT: bl __mulkf3
; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: lxvd2x vs0, 0, r29

View File

@@ -137,11 +137,11 @@ define fp128 @fp128Array(ptr nocapture readonly %farray,
; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: sldi r4, r4, 4
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: add r4, r3, r4
; CHECK-P8-NEXT: addi r4, r4, -16
; CHECK-P8-NEXT: lxvd2x vs1, 0, r4
; CHECK-P8-NEXT: add r3, r3, r4
; CHECK-P8-NEXT: addi r3, r3, -16
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: xxswapd v3, vs1
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: xxswapd v3, vs0
; CHECK-P8-NEXT: bl __addkf3
; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: addi r1, r1, 32
@@ -436,16 +436,15 @@ define fp128 @mixParam_02(fp128 %p1, double %p2, ptr nocapture %p3,
; CHECK-P8-NEXT: add r4, r7, r9
; CHECK-P8-NEXT: vmr v3, v2
; CHECK-P8-NEXT: stfd f31, 72(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: fmr f31, f1
; CHECK-P8-NEXT: stvx v31, r1, r3 # 16-byte Folded Spill
; CHECK-P8-NEXT: lwz r3, 176(r1)
; CHECK-P8-NEXT: add r4, r4, r10
; CHECK-P8-NEXT: fmr f31, f1
; CHECK-P8-NEXT: add r3, r4, r3
; CHECK-P8-NEXT: clrldi r3, r3, 32
; CHECK-P8-NEXT: std r3, 0(r6)
; CHECK-P8-NEXT: lxvd2x vs0, 0, r8
; CHECK-P8-NEXT: xxswapd vs0, vs0
; CHECK-P8-NEXT: xxlor v2, vs0, vs0
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: bl __addkf3
; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: fmr f1, f31
@@ -506,18 +505,17 @@ define fastcc fp128 @mixParam_02f(fp128 %p1, double %p2, ptr nocapture %p3,
; CHECK-P8-NEXT: .cfi_offset f31, -8
; CHECK-P8-NEXT: .cfi_offset v31, -32
; CHECK-P8-NEXT: add r4, r4, r6
; CHECK-P8-NEXT: vmr v3, v2
; CHECK-P8-NEXT: li r9, 48
; CHECK-P8-NEXT: vmr v3, v2
; CHECK-P8-NEXT: stfd f31, 72(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: fmr f31, f1
; CHECK-P8-NEXT: add r4, r4, r7
; CHECK-P8-NEXT: stvx v31, r1, r9 # 16-byte Folded Spill
; CHECK-P8-NEXT: fmr f31, f1
; CHECK-P8-NEXT: add r4, r4, r8
; CHECK-P8-NEXT: clrldi r4, r4, 32
; CHECK-P8-NEXT: std r4, 0(r3)
; CHECK-P8-NEXT: lxvd2x vs0, 0, r5
; CHECK-P8-NEXT: xxswapd vs0, vs0
; CHECK-P8-NEXT: xxlor v2, vs0, vs0
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: bl __addkf3
; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: fmr f1, f31
@@ -577,15 +575,15 @@ define void @mixParam_03(fp128 %f1, ptr nocapture %d1, <4 x i32> %vec1,
; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: .cfi_offset v31, -32
; CHECK-P8-NEXT: xxswapd vs0, v2
; CHECK-P8-NEXT: xxswapd vs1, v3
; CHECK-P8-NEXT: ld r4, 184(r1)
; CHECK-P8-NEXT: li r3, 48
; CHECK-P8-NEXT: xxswapd vs0, v2
; CHECK-P8-NEXT: xxswapd vs1, v3
; CHECK-P8-NEXT: std r30, 64(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: mr r30, r5
; CHECK-P8-NEXT: stvx v31, r1, r3 # 16-byte Folded Spill
; CHECK-P8-NEXT: mr r3, r10
; CHECK-P8-NEXT: stxvd2x vs0, 0, r9
; CHECK-P8-NEXT: mr r3, r10
; CHECK-P8-NEXT: stxvd2x vs1, 0, r4
; CHECK-P8-NEXT: lxvd2x vs0, 0, r9
; CHECK-P8-NEXT: xxswapd v31, vs0
@@ -641,9 +639,9 @@ define fastcc void @mixParam_03f(fp128 %f1, ptr nocapture %d1, <4 x i32> %vec1,
; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: .cfi_offset v31, -32
; CHECK-P8-NEXT: li r6, 48
; CHECK-P8-NEXT: xxswapd vs0, v2
; CHECK-P8-NEXT: xxswapd vs1, v3
; CHECK-P8-NEXT: li r6, 48
; CHECK-P8-NEXT: std r30, 64(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: mr r30, r3
; CHECK-P8-NEXT: mr r3, r5

View File

@@ -62,12 +62,12 @@ define void @qpConv2sdw_02(ptr nocapture %res) local_unnamed_addr #1 {
; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: addis r4, r2, .LC0@toc@ha
; CHECK-P8-NEXT: std r0, 64(r1)
; CHECK-P8-NEXT: mr r30, r3
; CHECK-P8-NEXT: ld r4, .LC0@toc@l(r4)
; CHECK-P8-NEXT: addi r4, r4, 32
; CHECK-P8-NEXT: lxvd2x vs0, 0, r4
; CHECK-P8-NEXT: addis r3, r2, .LC0@toc@ha
; CHECK-P8-NEXT: std r0, 64(r1)
; CHECK-P8-NEXT: ld r3, .LC0@toc@l(r3)
; CHECK-P8-NEXT: addi r3, r3, 32
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: bl __fixkfdi
; CHECK-P8-NEXT: nop
@@ -107,13 +107,13 @@ define i64 @qpConv2sdw_03(ptr nocapture readonly %a) {
; CHECK-P8-NEXT: std r0, 48(r1)
; CHECK-P8-NEXT: .cfi_def_cfa_offset 32
; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: addis r4, r2, .LC0@toc@ha
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: ld r4, .LC0@toc@l(r4)
; CHECK-P8-NEXT: addis r3, r2, .LC0@toc@ha
; CHECK-P8-NEXT: ld r3, .LC0@toc@l(r3)
; CHECK-P8-NEXT: addi r3, r3, 16
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: addi r4, r4, 16
; CHECK-P8-NEXT: lxvd2x vs1, 0, r4
; CHECK-P8-NEXT: xxswapd v3, vs1
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: xxswapd v3, vs0
; CHECK-P8-NEXT: bl __addkf3
; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: bl __fixkfdi
@@ -155,9 +155,9 @@ define void @qpConv2sdw_04(ptr nocapture readonly %a,
; CHECK-P8-NEXT: std r0, 64(r1)
; CHECK-P8-NEXT: mr r30, r5
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: lxvd2x vs1, 0, r4
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: xxswapd v3, vs1
; CHECK-P8-NEXT: lxvd2x vs0, 0, r4
; CHECK-P8-NEXT: xxswapd v3, vs0
; CHECK-P8-NEXT: bl __addkf3
; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: bl __fixkfdi
@@ -201,13 +201,13 @@ define void @qpConv2sdw_testXForm(ptr nocapture %res, i32 signext %idx) {
; CHECK-P8-NEXT: std r29, -24(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: stdu r1, -64(r1)
; CHECK-P8-NEXT: mr r30, r4
; CHECK-P8-NEXT: addis r4, r2, .LC0@toc@ha
; CHECK-P8-NEXT: std r0, 80(r1)
; CHECK-P8-NEXT: mr r29, r3
; CHECK-P8-NEXT: ld r4, .LC0@toc@l(r4)
; CHECK-P8-NEXT: addi r4, r4, 32
; CHECK-P8-NEXT: lxvd2x vs0, 0, r4
; CHECK-P8-NEXT: addis r3, r2, .LC0@toc@ha
; CHECK-P8-NEXT: std r0, 80(r1)
; CHECK-P8-NEXT: mr r30, r4
; CHECK-P8-NEXT: ld r3, .LC0@toc@l(r3)
; CHECK-P8-NEXT: addi r3, r3, 32
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: bl __fixkfdi
; CHECK-P8-NEXT: nop
@@ -281,12 +281,12 @@ define void @qpConv2udw_02(ptr nocapture %res) {
; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: addis r4, r2, .LC0@toc@ha
; CHECK-P8-NEXT: std r0, 64(r1)
; CHECK-P8-NEXT: mr r30, r3
; CHECK-P8-NEXT: ld r4, .LC0@toc@l(r4)
; CHECK-P8-NEXT: addi r4, r4, 32
; CHECK-P8-NEXT: lxvd2x vs0, 0, r4
; CHECK-P8-NEXT: addis r3, r2, .LC0@toc@ha
; CHECK-P8-NEXT: std r0, 64(r1)
; CHECK-P8-NEXT: ld r3, .LC0@toc@l(r3)
; CHECK-P8-NEXT: addi r3, r3, 32
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: bl __fixunskfdi
; CHECK-P8-NEXT: nop
@@ -326,13 +326,13 @@ define i64 @qpConv2udw_03(ptr nocapture readonly %a) {
; CHECK-P8-NEXT: std r0, 48(r1)
; CHECK-P8-NEXT: .cfi_def_cfa_offset 32
; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: addis r4, r2, .LC0@toc@ha
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: ld r4, .LC0@toc@l(r4)
; CHECK-P8-NEXT: addis r3, r2, .LC0@toc@ha
; CHECK-P8-NEXT: ld r3, .LC0@toc@l(r3)
; CHECK-P8-NEXT: addi r3, r3, 16
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: addi r4, r4, 16
; CHECK-P8-NEXT: lxvd2x vs1, 0, r4
; CHECK-P8-NEXT: xxswapd v3, vs1
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: xxswapd v3, vs0
; CHECK-P8-NEXT: bl __addkf3
; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: bl __fixunskfdi
@@ -374,9 +374,9 @@ define void @qpConv2udw_04(ptr nocapture readonly %a,
; CHECK-P8-NEXT: std r0, 64(r1)
; CHECK-P8-NEXT: mr r30, r5
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: lxvd2x vs1, 0, r4
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: xxswapd v3, vs1
; CHECK-P8-NEXT: lxvd2x vs0, 0, r4
; CHECK-P8-NEXT: xxswapd v3, vs0
; CHECK-P8-NEXT: bl __addkf3
; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: bl __fixunskfdi
@@ -420,12 +420,12 @@ define void @qpConv2udw_testXForm(ptr nocapture %res, i32 signext %idx) {
; CHECK-P8-NEXT: std r29, -24(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: stdu r1, -64(r1)
; CHECK-P8-NEXT: mr r30, r4
; CHECK-P8-NEXT: addis r4, r2, .LC0@toc@ha
; CHECK-P8-NEXT: std r0, 80(r1)
; CHECK-P8-NEXT: mr r29, r3
; CHECK-P8-NEXT: ld r4, .LC0@toc@l(r4)
; CHECK-P8-NEXT: lxvd2x vs0, 0, r4
; CHECK-P8-NEXT: addis r3, r2, .LC0@toc@ha
; CHECK-P8-NEXT: std r0, 80(r1)
; CHECK-P8-NEXT: mr r30, r4
; CHECK-P8-NEXT: ld r3, .LC0@toc@l(r3)
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: bl __fixunskfdi
; CHECK-P8-NEXT: nop
@@ -499,12 +499,12 @@ define void @qpConv2sw_02(ptr nocapture %res) {
; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: addis r4, r2, .LC0@toc@ha
; CHECK-P8-NEXT: std r0, 64(r1)
; CHECK-P8-NEXT: mr r30, r3
; CHECK-P8-NEXT: ld r4, .LC0@toc@l(r4)
; CHECK-P8-NEXT: addi r4, r4, 32
; CHECK-P8-NEXT: lxvd2x vs0, 0, r4
; CHECK-P8-NEXT: addis r3, r2, .LC0@toc@ha
; CHECK-P8-NEXT: std r0, 64(r1)
; CHECK-P8-NEXT: ld r3, .LC0@toc@l(r3)
; CHECK-P8-NEXT: addi r3, r3, 32
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: bl __fixkfsi
; CHECK-P8-NEXT: nop
@@ -545,13 +545,13 @@ define signext i32 @qpConv2sw_03(ptr nocapture readonly %a) {
; CHECK-P8-NEXT: std r0, 48(r1)
; CHECK-P8-NEXT: .cfi_def_cfa_offset 32
; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: addis r4, r2, .LC0@toc@ha
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: ld r4, .LC0@toc@l(r4)
; CHECK-P8-NEXT: addis r3, r2, .LC0@toc@ha
; CHECK-P8-NEXT: ld r3, .LC0@toc@l(r3)
; CHECK-P8-NEXT: addi r3, r3, 16
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: addi r4, r4, 16
; CHECK-P8-NEXT: lxvd2x vs1, 0, r4
; CHECK-P8-NEXT: xxswapd v3, vs1
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: xxswapd v3, vs0
; CHECK-P8-NEXT: bl __addkf3
; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: bl __fixkfsi
@@ -594,9 +594,9 @@ define void @qpConv2sw_04(ptr nocapture readonly %a,
; CHECK-P8-NEXT: std r0, 64(r1)
; CHECK-P8-NEXT: mr r30, r5
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: lxvd2x vs1, 0, r4
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: xxswapd v3, vs1
; CHECK-P8-NEXT: lxvd2x vs0, 0, r4
; CHECK-P8-NEXT: xxswapd v3, vs0
; CHECK-P8-NEXT: bl __addkf3
; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: bl __fixkfsi
@@ -668,12 +668,12 @@ define void @qpConv2uw_02(ptr nocapture %res) {
; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: addis r4, r2, .LC0@toc@ha
; CHECK-P8-NEXT: std r0, 64(r1)
; CHECK-P8-NEXT: mr r30, r3
; CHECK-P8-NEXT: ld r4, .LC0@toc@l(r4)
; CHECK-P8-NEXT: addi r4, r4, 32
; CHECK-P8-NEXT: lxvd2x vs0, 0, r4
; CHECK-P8-NEXT: addis r3, r2, .LC0@toc@ha
; CHECK-P8-NEXT: std r0, 64(r1)
; CHECK-P8-NEXT: ld r3, .LC0@toc@l(r3)
; CHECK-P8-NEXT: addi r3, r3, 32
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: bl __fixunskfsi
; CHECK-P8-NEXT: nop
@@ -713,13 +713,13 @@ define zeroext i32 @qpConv2uw_03(ptr nocapture readonly %a) {
; CHECK-P8-NEXT: std r0, 48(r1)
; CHECK-P8-NEXT: .cfi_def_cfa_offset 32
; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: addis r4, r2, .LC0@toc@ha
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: ld r4, .LC0@toc@l(r4)
; CHECK-P8-NEXT: addis r3, r2, .LC0@toc@ha
; CHECK-P8-NEXT: ld r3, .LC0@toc@l(r3)
; CHECK-P8-NEXT: addi r3, r3, 16
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: addi r4, r4, 16
; CHECK-P8-NEXT: lxvd2x vs1, 0, r4
; CHECK-P8-NEXT: xxswapd v3, vs1
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: xxswapd v3, vs0
; CHECK-P8-NEXT: bl __addkf3
; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: bl __fixunskfsi
@@ -761,9 +761,9 @@ define void @qpConv2uw_04(ptr nocapture readonly %a,
; CHECK-P8-NEXT: std r0, 64(r1)
; CHECK-P8-NEXT: mr r30, r5
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: lxvd2x vs1, 0, r4
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: xxswapd v3, vs1
; CHECK-P8-NEXT: lxvd2x vs0, 0, r4
; CHECK-P8-NEXT: xxswapd v3, vs0
; CHECK-P8-NEXT: bl __addkf3
; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: bl __fixunskfsi
@@ -837,12 +837,12 @@ define void @qpConv2shw_02(ptr nocapture %res) {
; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: addis r4, r2, .LC0@toc@ha
; CHECK-P8-NEXT: std r0, 64(r1)
; CHECK-P8-NEXT: mr r30, r3
; CHECK-P8-NEXT: ld r4, .LC0@toc@l(r4)
; CHECK-P8-NEXT: addi r4, r4, 32
; CHECK-P8-NEXT: lxvd2x vs0, 0, r4
; CHECK-P8-NEXT: addis r3, r2, .LC0@toc@ha
; CHECK-P8-NEXT: std r0, 64(r1)
; CHECK-P8-NEXT: ld r3, .LC0@toc@l(r3)
; CHECK-P8-NEXT: addi r3, r3, 32
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: bl __fixkfsi
; CHECK-P8-NEXT: nop
@@ -882,13 +882,13 @@ define signext i16 @qpConv2shw_03(ptr nocapture readonly %a) {
; CHECK-P8-NEXT: std r0, 48(r1)
; CHECK-P8-NEXT: .cfi_def_cfa_offset 32
; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: addis r4, r2, .LC0@toc@ha
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: ld r4, .LC0@toc@l(r4)
; CHECK-P8-NEXT: addis r3, r2, .LC0@toc@ha
; CHECK-P8-NEXT: ld r3, .LC0@toc@l(r3)
; CHECK-P8-NEXT: addi r3, r3, 16
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: addi r4, r4, 16
; CHECK-P8-NEXT: lxvd2x vs1, 0, r4
; CHECK-P8-NEXT: xxswapd v3, vs1
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: xxswapd v3, vs0
; CHECK-P8-NEXT: bl __addkf3
; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: bl __fixkfsi
@@ -930,9 +930,9 @@ define void @qpConv2shw_04(ptr nocapture readonly %a,
; CHECK-P8-NEXT: std r0, 64(r1)
; CHECK-P8-NEXT: mr r30, r5
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: lxvd2x vs1, 0, r4
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: xxswapd v3, vs1
; CHECK-P8-NEXT: lxvd2x vs0, 0, r4
; CHECK-P8-NEXT: xxswapd v3, vs0
; CHECK-P8-NEXT: bl __addkf3
; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: bl __fixkfsi
@@ -1002,12 +1002,12 @@ define void @qpConv2uhw_02(ptr nocapture %res) {
; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: addis r4, r2, .LC0@toc@ha
; CHECK-P8-NEXT: std r0, 64(r1)
; CHECK-P8-NEXT: mr r30, r3
; CHECK-P8-NEXT: ld r4, .LC0@toc@l(r4)
; CHECK-P8-NEXT: addi r4, r4, 32
; CHECK-P8-NEXT: lxvd2x vs0, 0, r4
; CHECK-P8-NEXT: addis r3, r2, .LC0@toc@ha
; CHECK-P8-NEXT: std r0, 64(r1)
; CHECK-P8-NEXT: ld r3, .LC0@toc@l(r3)
; CHECK-P8-NEXT: addi r3, r3, 32
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: bl __fixkfsi
; CHECK-P8-NEXT: nop
@@ -1046,13 +1046,13 @@ define zeroext i16 @qpConv2uhw_03(ptr nocapture readonly %a) {
; CHECK-P8-NEXT: std r0, 48(r1)
; CHECK-P8-NEXT: .cfi_def_cfa_offset 32
; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: addis r4, r2, .LC0@toc@ha
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: ld r4, .LC0@toc@l(r4)
; CHECK-P8-NEXT: addis r3, r2, .LC0@toc@ha
; CHECK-P8-NEXT: ld r3, .LC0@toc@l(r3)
; CHECK-P8-NEXT: addi r3, r3, 16
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: addi r4, r4, 16
; CHECK-P8-NEXT: lxvd2x vs1, 0, r4
; CHECK-P8-NEXT: xxswapd v3, vs1
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: xxswapd v3, vs0
; CHECK-P8-NEXT: bl __addkf3
; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: bl __fixkfsi
@@ -1093,9 +1093,9 @@ define void @qpConv2uhw_04(ptr nocapture readonly %a,
; CHECK-P8-NEXT: std r0, 64(r1)
; CHECK-P8-NEXT: mr r30, r5
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: lxvd2x vs1, 0, r4
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: xxswapd v3, vs1
; CHECK-P8-NEXT: lxvd2x vs0, 0, r4
; CHECK-P8-NEXT: xxswapd v3, vs0
; CHECK-P8-NEXT: bl __addkf3
; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: bl __fixkfsi
@@ -1167,12 +1167,12 @@ define void @qpConv2sb_02(ptr nocapture %res) {
; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: addis r4, r2, .LC0@toc@ha
; CHECK-P8-NEXT: std r0, 64(r1)
; CHECK-P8-NEXT: mr r30, r3
; CHECK-P8-NEXT: ld r4, .LC0@toc@l(r4)
; CHECK-P8-NEXT: addi r4, r4, 32
; CHECK-P8-NEXT: lxvd2x vs0, 0, r4
; CHECK-P8-NEXT: addis r3, r2, .LC0@toc@ha
; CHECK-P8-NEXT: std r0, 64(r1)
; CHECK-P8-NEXT: ld r3, .LC0@toc@l(r3)
; CHECK-P8-NEXT: addi r3, r3, 32
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: bl __fixkfsi
; CHECK-P8-NEXT: nop
@@ -1212,13 +1212,13 @@ define signext i8 @qpConv2sb_03(ptr nocapture readonly %a) {
; CHECK-P8-NEXT: std r0, 48(r1)
; CHECK-P8-NEXT: .cfi_def_cfa_offset 32
; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: addis r4, r2, .LC0@toc@ha
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: ld r4, .LC0@toc@l(r4)
; CHECK-P8-NEXT: addis r3, r2, .LC0@toc@ha
; CHECK-P8-NEXT: ld r3, .LC0@toc@l(r3)
; CHECK-P8-NEXT: addi r3, r3, 16
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: addi r4, r4, 16
; CHECK-P8-NEXT: lxvd2x vs1, 0, r4
; CHECK-P8-NEXT: xxswapd v3, vs1
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: xxswapd v3, vs0
; CHECK-P8-NEXT: bl __addkf3
; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: bl __fixkfsi
@@ -1260,9 +1260,9 @@ define void @qpConv2sb_04(ptr nocapture readonly %a,
; CHECK-P8-NEXT: std r0, 64(r1)
; CHECK-P8-NEXT: mr r30, r5
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: lxvd2x vs1, 0, r4
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: xxswapd v3, vs1
; CHECK-P8-NEXT: lxvd2x vs0, 0, r4
; CHECK-P8-NEXT: xxswapd v3, vs0
; CHECK-P8-NEXT: bl __addkf3
; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: bl __fixkfsi
@@ -1332,12 +1332,12 @@ define void @qpConv2ub_02(ptr nocapture %res) {
; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: addis r4, r2, .LC0@toc@ha
; CHECK-P8-NEXT: std r0, 64(r1)
; CHECK-P8-NEXT: mr r30, r3
; CHECK-P8-NEXT: ld r4, .LC0@toc@l(r4)
; CHECK-P8-NEXT: addi r4, r4, 32
; CHECK-P8-NEXT: lxvd2x vs0, 0, r4
; CHECK-P8-NEXT: addis r3, r2, .LC0@toc@ha
; CHECK-P8-NEXT: std r0, 64(r1)
; CHECK-P8-NEXT: ld r3, .LC0@toc@l(r3)
; CHECK-P8-NEXT: addi r3, r3, 32
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: bl __fixkfsi
; CHECK-P8-NEXT: nop
@@ -1376,13 +1376,13 @@ define zeroext i8 @qpConv2ub_03(ptr nocapture readonly %a) {
; CHECK-P8-NEXT: std r0, 48(r1)
; CHECK-P8-NEXT: .cfi_def_cfa_offset 32
; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: addis r4, r2, .LC0@toc@ha
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: ld r4, .LC0@toc@l(r4)
; CHECK-P8-NEXT: addis r3, r2, .LC0@toc@ha
; CHECK-P8-NEXT: ld r3, .LC0@toc@l(r3)
; CHECK-P8-NEXT: addi r3, r3, 16
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: addi r4, r4, 16
; CHECK-P8-NEXT: lxvd2x vs1, 0, r4
; CHECK-P8-NEXT: xxswapd v3, vs1
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: xxswapd v3, vs0
; CHECK-P8-NEXT: bl __addkf3
; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: bl __fixkfsi
@@ -1423,9 +1423,9 @@ define void @qpConv2ub_04(ptr nocapture readonly %a,
; CHECK-P8-NEXT: std r0, 64(r1)
; CHECK-P8-NEXT: mr r30, r5
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: lxvd2x vs1, 0, r4
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: xxswapd v3, vs1
; CHECK-P8-NEXT: lxvd2x vs0, 0, r4
; CHECK-P8-NEXT: xxswapd v3, vs0
; CHECK-P8-NEXT: bl __addkf3
; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: bl __fixkfsi

View File

@@ -22,10 +22,10 @@ define float @can_fma_with_fewer_uses(float %f1, float %f2, float %f3, float %f4
define float @no_fma_with_fewer_uses(float %f1, float %f2, float %f3, float %f4) {
; CHECK-LABEL: no_fma_with_fewer_uses:
; CHECK: # %bb.0:
; CHECK-NEXT: xsmulsp 0, 3, 4
; CHECK-NEXT: xsmulsp 3, 1, 2
; CHECK-NEXT: xsmaddasp 0, 1, 2
; CHECK-NEXT: xsdivsp 1, 3, 0
; CHECK-NEXT: xsmulsp 3, 3, 4
; CHECK-NEXT: xsmulsp 0, 1, 2
; CHECK-NEXT: xsmaddasp 3, 1, 2
; CHECK-NEXT: xsdivsp 1, 0, 3
; CHECK-NEXT: blr
%mul1 = fmul contract float %f1, %f2
%mul2 = fmul float %f3, %f4

View File

@@ -60,36 +60,34 @@ define dso_local double @fma_combine_two_uses(double %a, double %b, double %c) {
; CHECK-FAST: # %bb.0: # %entry
; CHECK-FAST-NEXT: xsnegdp 0, 1
; CHECK-FAST-NEXT: addis 3, 2, v@toc@ha
; CHECK-FAST-NEXT: addis 4, 2, z@toc@ha
; CHECK-FAST-NEXT: xsnmaddadp 1, 3, 2
; CHECK-FAST-NEXT: xsnegdp 2, 3
; CHECK-FAST-NEXT: stfd 0, v@toc@l(3)
; CHECK-FAST-NEXT: stfd 2, z@toc@l(4)
; CHECK-FAST-NEXT: xsnegdp 0, 3
; CHECK-FAST-NEXT: addis 3, 2, z@toc@ha
; CHECK-FAST-NEXT: stfd 0, z@toc@l(3)
; CHECK-FAST-NEXT: blr
;
; CHECK-FAST-NOVSX-LABEL: fma_combine_two_uses:
; CHECK-FAST-NOVSX: # %bb.0: # %entry
; CHECK-FAST-NOVSX-NEXT: fnmadd 0, 3, 2, 1
; CHECK-FAST-NOVSX-NEXT: fneg 2, 1
; CHECK-FAST-NOVSX-NEXT: fneg 0, 1
; CHECK-FAST-NOVSX-NEXT: addis 3, 2, v@toc@ha
; CHECK-FAST-NOVSX-NEXT: addis 4, 2, z@toc@ha
; CHECK-FAST-NOVSX-NEXT: fneg 3, 3
; CHECK-FAST-NOVSX-NEXT: fmr 1, 0
; CHECK-FAST-NOVSX-NEXT: stfd 2, v@toc@l(3)
; CHECK-FAST-NOVSX-NEXT: stfd 3, z@toc@l(4)
; CHECK-FAST-NOVSX-NEXT: fnmadd 1, 3, 2, 1
; CHECK-FAST-NOVSX-NEXT: stfd 0, v@toc@l(3)
; CHECK-FAST-NOVSX-NEXT: fneg 0, 3
; CHECK-FAST-NOVSX-NEXT: addis 3, 2, z@toc@ha
; CHECK-FAST-NOVSX-NEXT: stfd 0, z@toc@l(3)
; CHECK-FAST-NOVSX-NEXT: blr
;
; CHECK-LABEL: fma_combine_two_uses:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xsnegdp 3, 3
; CHECK-NEXT: xsnegdp 0, 1
; CHECK-NEXT: addis 3, 2, v@toc@ha
; CHECK-NEXT: addis 4, 2, z@toc@ha
; CHECK-NEXT: xsmuldp 0, 3, 2
; CHECK-NEXT: stfd 3, z@toc@l(4)
; CHECK-NEXT: xsnegdp 2, 1
; CHECK-NEXT: xssubdp 0, 0, 1
; CHECK-NEXT: stfd 2, v@toc@l(3)
; CHECK-NEXT: fmr 1, 0
; CHECK-NEXT: stfd 0, v@toc@l(3)
; CHECK-NEXT: xsnegdp 0, 3
; CHECK-NEXT: addis 3, 2, z@toc@ha
; CHECK-NEXT: stfd 0, z@toc@l(3)
; CHECK-NEXT: xsmuldp 0, 0, 2
; CHECK-NEXT: xssubdp 1, 0, 1
; CHECK-NEXT: blr
entry:
%fneg = fneg double %a
@@ -105,29 +103,27 @@ define dso_local double @fma_combine_one_use(double %a, double %b, double %c) {
; CHECK-FAST-LABEL: fma_combine_one_use:
; CHECK-FAST: # %bb.0: # %entry
; CHECK-FAST-NEXT: xsnegdp 0, 1
; CHECK-FAST-NEXT: addis 3, 2, v@toc@ha
; CHECK-FAST-NEXT: xsnmaddadp 1, 3, 2
; CHECK-FAST-NEXT: addis 3, 2, v@toc@ha
; CHECK-FAST-NEXT: stfd 0, v@toc@l(3)
; CHECK-FAST-NEXT: blr
;
; CHECK-FAST-NOVSX-LABEL: fma_combine_one_use:
; CHECK-FAST-NOVSX: # %bb.0: # %entry
; CHECK-FAST-NOVSX-NEXT: fnmadd 0, 3, 2, 1
; CHECK-FAST-NOVSX-NEXT: fneg 2, 1
; CHECK-FAST-NOVSX-NEXT: fneg 0, 1
; CHECK-FAST-NOVSX-NEXT: fnmadd 1, 3, 2, 1
; CHECK-FAST-NOVSX-NEXT: addis 3, 2, v@toc@ha
; CHECK-FAST-NOVSX-NEXT: fmr 1, 0
; CHECK-FAST-NOVSX-NEXT: stfd 2, v@toc@l(3)
; CHECK-FAST-NOVSX-NEXT: stfd 0, v@toc@l(3)
; CHECK-FAST-NOVSX-NEXT: blr
;
; CHECK-LABEL: fma_combine_one_use:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xsnegdp 0, 3
; CHECK-NEXT: xsnegdp 0, 1
; CHECK-NEXT: addis 3, 2, v@toc@ha
; CHECK-NEXT: stfd 0, v@toc@l(3)
; CHECK-NEXT: xsnegdp 0, 3
; CHECK-NEXT: xsmuldp 0, 0, 2
; CHECK-NEXT: xsnegdp 2, 1
; CHECK-NEXT: xssubdp 0, 0, 1
; CHECK-NEXT: stfd 2, v@toc@l(3)
; CHECK-NEXT: fmr 1, 0
; CHECK-NEXT: xssubdp 1, 0, 1
; CHECK-NEXT: blr
entry:
%fneg = fneg double %a
@@ -143,43 +139,43 @@ define dso_local float @fma_combine_no_ice() {
; CHECK-FAST: # %bb.0:
; CHECK-FAST-NEXT: vspltisw 2, 1
; CHECK-FAST-NEXT: addis 3, 2, .LCPI4_0@toc@ha
; CHECK-FAST-NEXT: xvcvsxwdp 3, 34
; CHECK-FAST-NEXT: lfs 0, .LCPI4_0@toc@l(3)
; CHECK-FAST-NEXT: lfs 2, 0(3)
; CHECK-FAST-NEXT: lfs 1, .LCPI4_0@toc@l(3)
; CHECK-FAST-NEXT: addis 3, 2, .LCPI4_1@toc@ha
; CHECK-FAST-NEXT: xvcvsxwdp 0, 34
; CHECK-FAST-NEXT: xsmaddasp 0, 2, 1
; CHECK-FAST-NEXT: lfs 1, .LCPI4_1@toc@l(3)
; CHECK-FAST-NEXT: xsmaddasp 1, 2, 0
; CHECK-FAST-NEXT: xsnmsubasp 1, 0, 2
; CHECK-FAST-NEXT: xsmaddasp 3, 2, 0
; CHECK-FAST-NEXT: xsmaddasp 1, 2, 3
; CHECK-FAST-NEXT: xsnmsubasp 1, 3, 2
; CHECK-FAST-NEXT: blr
;
; CHECK-FAST-NOVSX-LABEL: fma_combine_no_ice:
; CHECK-FAST-NOVSX: # %bb.0:
; CHECK-FAST-NOVSX-NEXT: lfs 0, 0(3)
; CHECK-FAST-NOVSX-NEXT: addis 3, 2, .LCPI4_0@toc@ha
; CHECK-FAST-NOVSX-NEXT: lfs 0, .LCPI4_0@toc@l(3)
; CHECK-FAST-NOVSX-NEXT: lfs 1, .LCPI4_0@toc@l(3)
; CHECK-FAST-NOVSX-NEXT: addis 3, 2, .LCPI4_1@toc@ha
; CHECK-FAST-NOVSX-NEXT: lfs 1, 0(3)
; CHECK-FAST-NOVSX-NEXT: lfs 2, .LCPI4_1@toc@l(3)
; CHECK-FAST-NOVSX-NEXT: addis 3, 2, .LCPI4_2@toc@ha
; CHECK-FAST-NOVSX-NEXT: fmadds 0, 1, 2, 0
; CHECK-FAST-NOVSX-NEXT: fmadds 1, 0, 2, 1
; CHECK-FAST-NOVSX-NEXT: lfs 2, .LCPI4_2@toc@l(3)
; CHECK-FAST-NOVSX-NEXT: fmadds 2, 1, 0, 2
; CHECK-FAST-NOVSX-NEXT: fnmsubs 1, 0, 1, 2
; CHECK-FAST-NOVSX-NEXT: fmadds 2, 0, 1, 2
; CHECK-FAST-NOVSX-NEXT: fnmsubs 1, 1, 0, 2
; CHECK-FAST-NOVSX-NEXT: blr
;
; CHECK-LABEL: fma_combine_no_ice:
; CHECK: # %bb.0:
; CHECK-NEXT: vspltisw 2, 1
; CHECK-NEXT: addis 3, 2, .LCPI4_0@toc@ha
; CHECK-NEXT: xvcvsxwdp 3, 34
; CHECK-NEXT: lfs 0, .LCPI4_0@toc@l(3)
; CHECK-NEXT: lfs 2, 0(3)
; CHECK-NEXT: lfs 3, .LCPI4_0@toc@l(3)
; CHECK-NEXT: addis 3, 2, .LCPI4_1@toc@ha
; CHECK-NEXT: lfs 1, .LCPI4_1@toc@l(3)
; CHECK-NEXT: xvcvsxwdp 0, 34
; CHECK-NEXT: fmr 4, 0
; CHECK-NEXT: xsmaddasp 0, 2, 3
; CHECK-NEXT: xsnmaddasp 4, 2, 3
; CHECK-NEXT: xsmaddasp 1, 2, 0
; CHECK-NEXT: fmr 4, 3
; CHECK-NEXT: xsmaddasp 3, 2, 0
; CHECK-NEXT: xsnmaddasp 4, 2, 0
; CHECK-NEXT: xsmaddasp 1, 2, 3
; CHECK-NEXT: xsmaddasp 1, 4, 2
; CHECK-NEXT: blr
%tmp = load float, ptr undef, align 4
@@ -203,21 +199,21 @@ define dso_local double @getNegatedExpression_crash(double %x, double %y) {
; CHECK-FAST: # %bb.0:
; CHECK-FAST-NEXT: vspltisw 2, -1
; CHECK-FAST-NEXT: addis 3, 2, .LCPI5_0@toc@ha
; CHECK-FAST-NEXT: lfs 4, .LCPI5_0@toc@l(3)
; CHECK-FAST-NEXT: xvcvsxwdp 3, 34
; CHECK-FAST-NEXT: xssubdp 0, 1, 3
; CHECK-FAST-NEXT: # kill: def $f3 killed $f3 killed $vsl3
; CHECK-FAST-NEXT: xsmaddadp 3, 1, 4
; CHECK-FAST-NEXT: xsmaddadp 0, 3, 2
; CHECK-FAST-NEXT: xvcvsxwdp 4, 34
; CHECK-FAST-NEXT: lfs 3, .LCPI5_0@toc@l(3)
; CHECK-FAST-NEXT: xssubdp 0, 1, 4
; CHECK-FAST-NEXT: # kill: def $f4 killed $f4 killed $vsl4
; CHECK-FAST-NEXT: xsmaddadp 4, 1, 3
; CHECK-FAST-NEXT: xsmaddadp 0, 4, 2
; CHECK-FAST-NEXT: fmr 1, 0
; CHECK-FAST-NEXT: blr
;
; CHECK-FAST-NOVSX-LABEL: getNegatedExpression_crash:
; CHECK-FAST-NOVSX: # %bb.0:
; CHECK-FAST-NOVSX-NEXT: addis 3, 2, .LCPI5_0@toc@ha
; CHECK-FAST-NOVSX-NEXT: addis 4, 2, .LCPI5_1@toc@ha
; CHECK-FAST-NOVSX-NEXT: lfs 0, .LCPI5_0@toc@l(3)
; CHECK-FAST-NOVSX-NEXT: lfs 3, .LCPI5_1@toc@l(4)
; CHECK-FAST-NOVSX-NEXT: addis 3, 2, .LCPI5_1@toc@ha
; CHECK-FAST-NOVSX-NEXT: lfs 3, .LCPI5_1@toc@l(3)
; CHECK-FAST-NOVSX-NEXT: fmadd 3, 1, 3, 0
; CHECK-FAST-NOVSX-NEXT: fsub 0, 1, 0
; CHECK-FAST-NOVSX-NEXT: fmadd 1, 3, 2, 0
@@ -227,12 +223,12 @@ define dso_local double @getNegatedExpression_crash(double %x, double %y) {
; CHECK: # %bb.0:
; CHECK-NEXT: vspltisw 2, -1
; CHECK-NEXT: addis 3, 2, .LCPI5_0@toc@ha
; CHECK-NEXT: lfs 4, .LCPI5_0@toc@l(3)
; CHECK-NEXT: xvcvsxwdp 3, 34
; CHECK-NEXT: xssubdp 0, 1, 3
; CHECK-NEXT: # kill: def $f3 killed $f3 killed $vsl3
; CHECK-NEXT: xsmaddadp 3, 1, 4
; CHECK-NEXT: xsmaddadp 0, 3, 2
; CHECK-NEXT: xvcvsxwdp 4, 34
; CHECK-NEXT: lfs 3, .LCPI5_0@toc@l(3)
; CHECK-NEXT: xssubdp 0, 1, 4
; CHECK-NEXT: # kill: def $f4 killed $f4 killed $vsl4
; CHECK-NEXT: xsmaddadp 4, 1, 3
; CHECK-NEXT: xsmaddadp 0, 4, 2
; CHECK-NEXT: fmr 1, 0
; CHECK-NEXT: blr
%neg = fneg reassoc double %x
@@ -334,10 +330,10 @@ define dso_local double @fma_combine_const(double %a, double %b) {
; CHECK-NEXT: addis 3, 2, .LCPI9_0@toc@ha
; CHECK-NEXT: lfd 0, .LCPI9_0@toc@l(3)
; CHECK-NEXT: addis 3, 2, .LCPI9_1@toc@ha
; CHECK-NEXT: lfd 3, .LCPI9_1@toc@l(3)
; CHECK-NEXT: xsmuldp 0, 1, 0
; CHECK-NEXT: lfd 1, .LCPI9_1@toc@l(3)
; CHECK-NEXT: xsmaddadp 2, 0, 1
; CHECK-NEXT: fmr 1, 2
; CHECK-NEXT: xsmaddadp 1, 0, 3
; CHECK-NEXT: blr
entry:
%0 = fmul double %a, 1.1

View File

@@ -302,31 +302,31 @@ define float @fmul_fma_fast2(float %x) {
define float @sqrt_afn_ieee(float %x) #0 {
; FMF-LABEL: sqrt_afn_ieee:
; FMF: # %bb.0:
; FMF-NEXT: xsabsdp 0, 1
; FMF-NEXT: addis 3, 2, .LCPI11_1@toc@ha
; FMF-NEXT: xsabsdp 0, 1
; FMF-NEXT: lfs 2, .LCPI11_1@toc@l(3)
; FMF-NEXT: fcmpu 0, 0, 2
; FMF-NEXT: xxlxor 0, 0, 0
; FMF-NEXT: blt 0, .LBB11_2
; FMF-NEXT: # %bb.1:
; FMF-NEXT: xsrsqrtesp 0, 1
; FMF-NEXT: vspltisw 2, -3
; FMF-NEXT: xsrsqrtesp 2, 1
; FMF-NEXT: addis 3, 2, .LCPI11_0@toc@ha
; FMF-NEXT: lfs 3, .LCPI11_0@toc@l(3)
; FMF-NEXT: vspltisw 2, -3
; FMF-NEXT: lfs 0, .LCPI11_0@toc@l(3)
; FMF-NEXT: xsmulsp 1, 1, 2
; FMF-NEXT: xsmulsp 0, 1, 0
; FMF-NEXT: xsmulsp 1, 1, 2
; FMF-NEXT: xvcvsxwdp 2, 34
; FMF-NEXT: xsmulsp 1, 1, 0
; FMF-NEXT: xsmulsp 0, 1, 0
; FMF-NEXT: xsmulsp 1, 1, 3
; FMF-NEXT: xsaddsp 0, 0, 2
; FMF-NEXT: xsmulsp 0, 1, 0
; FMF-NEXT: xsaddsp 1, 1, 2
; FMF-NEXT: xsmulsp 0, 0, 1
; FMF-NEXT: .LBB11_2:
; FMF-NEXT: fmr 1, 0
; FMF-NEXT: blr
;
; GLOBAL-LABEL: sqrt_afn_ieee:
; GLOBAL: # %bb.0:
; GLOBAL-NEXT: xsabsdp 0, 1
; GLOBAL-NEXT: addis 3, 2, .LCPI11_1@toc@ha
; GLOBAL-NEXT: xsabsdp 0, 1
; GLOBAL-NEXT: lfs 2, .LCPI11_1@toc@l(3)
; GLOBAL-NEXT: fcmpu 0, 0, 2
; GLOBAL-NEXT: xxlxor 0, 0, 0
@@ -335,11 +335,11 @@ define float @sqrt_afn_ieee(float %x) #0 {
; GLOBAL-NEXT: xsrsqrtesp 0, 1
; GLOBAL-NEXT: vspltisw 2, -3
; GLOBAL-NEXT: addis 3, 2, .LCPI11_0@toc@ha
; GLOBAL-NEXT: lfs 3, .LCPI11_0@toc@l(3)
; GLOBAL-NEXT: xvcvsxwdp 2, 34
; GLOBAL-NEXT: xsmulsp 1, 1, 0
; GLOBAL-NEXT: xsmaddasp 2, 1, 0
; GLOBAL-NEXT: xsmulsp 0, 1, 3
; GLOBAL-NEXT: lfs 0, .LCPI11_0@toc@l(3)
; GLOBAL-NEXT: xsmulsp 0, 1, 0
; GLOBAL-NEXT: xsmulsp 0, 0, 2
; GLOBAL-NEXT: .LBB11_2:
; GLOBAL-NEXT: fmr 1, 0
@@ -378,15 +378,15 @@ define float @sqrt_afn_preserve_sign(float %x) #1 {
; FMF-NEXT: beq 0, .LBB13_2
; FMF-NEXT: # %bb.1:
; FMF-NEXT: xsrsqrtesp 0, 1
; FMF-NEXT: vspltisw 2, -3
; FMF-NEXT: addis 3, 2, .LCPI13_0@toc@ha
; FMF-NEXT: lfs 3, .LCPI13_0@toc@l(3)
; FMF-NEXT: xvcvsxwdp 2, 34
; FMF-NEXT: vspltisw 2, -3
; FMF-NEXT: lfs 2, .LCPI13_0@toc@l(3)
; FMF-NEXT: xsmulsp 1, 1, 0
; FMF-NEXT: xsmulsp 2, 1, 2
; FMF-NEXT: xsmulsp 0, 1, 0
; FMF-NEXT: xsmulsp 1, 1, 3
; FMF-NEXT: xsaddsp 0, 0, 2
; FMF-NEXT: xsmulsp 0, 1, 0
; FMF-NEXT: xvcvsxwdp 1, 34
; FMF-NEXT: xsaddsp 0, 0, 1
; FMF-NEXT: xsmulsp 0, 2, 0
; FMF-NEXT: .LBB13_2:
; FMF-NEXT: fmr 1, 0
; FMF-NEXT: blr
@@ -400,11 +400,11 @@ define float @sqrt_afn_preserve_sign(float %x) #1 {
; GLOBAL-NEXT: xsrsqrtesp 0, 1
; GLOBAL-NEXT: vspltisw 2, -3
; GLOBAL-NEXT: addis 3, 2, .LCPI13_0@toc@ha
; GLOBAL-NEXT: lfs 3, .LCPI13_0@toc@l(3)
; GLOBAL-NEXT: xvcvsxwdp 2, 34
; GLOBAL-NEXT: xsmulsp 1, 1, 0
; GLOBAL-NEXT: xsmaddasp 2, 1, 0
; GLOBAL-NEXT: xsmulsp 0, 1, 3
; GLOBAL-NEXT: lfs 0, .LCPI13_0@toc@l(3)
; GLOBAL-NEXT: xsmulsp 0, 1, 0
; GLOBAL-NEXT: xsmulsp 0, 0, 2
; GLOBAL-NEXT: .LBB13_2:
; GLOBAL-NEXT: fmr 1, 0
@@ -440,8 +440,8 @@ define float @sqrt_afn_preserve_sign_inf(float %x) #1 {
define float @sqrt_fast_ieee(float %x) #0 {
; FMF-LABEL: sqrt_fast_ieee:
; FMF: # %bb.0:
; FMF-NEXT: xsabsdp 0, 1
; FMF-NEXT: addis 3, 2, .LCPI15_1@toc@ha
; FMF-NEXT: xsabsdp 0, 1
; FMF-NEXT: lfs 2, .LCPI15_1@toc@l(3)
; FMF-NEXT: fcmpu 0, 0, 2
; FMF-NEXT: xxlxor 0, 0, 0
@@ -450,11 +450,11 @@ define float @sqrt_fast_ieee(float %x) #0 {
; FMF-NEXT: xsrsqrtesp 0, 1
; FMF-NEXT: vspltisw 2, -3
; FMF-NEXT: addis 3, 2, .LCPI15_0@toc@ha
; FMF-NEXT: lfs 3, .LCPI15_0@toc@l(3)
; FMF-NEXT: xvcvsxwdp 2, 34
; FMF-NEXT: xsmulsp 1, 1, 0
; FMF-NEXT: xsmaddasp 2, 1, 0
; FMF-NEXT: xsmulsp 0, 1, 3
; FMF-NEXT: lfs 0, .LCPI15_0@toc@l(3)
; FMF-NEXT: xsmulsp 0, 1, 0
; FMF-NEXT: xsmulsp 0, 0, 2
; FMF-NEXT: .LBB15_2:
; FMF-NEXT: fmr 1, 0
@@ -462,8 +462,8 @@ define float @sqrt_fast_ieee(float %x) #0 {
;
; GLOBAL-LABEL: sqrt_fast_ieee:
; GLOBAL: # %bb.0:
; GLOBAL-NEXT: xsabsdp 0, 1
; GLOBAL-NEXT: addis 3, 2, .LCPI15_1@toc@ha
; GLOBAL-NEXT: xsabsdp 0, 1
; GLOBAL-NEXT: lfs 2, .LCPI15_1@toc@l(3)
; GLOBAL-NEXT: fcmpu 0, 0, 2
; GLOBAL-NEXT: xxlxor 0, 0, 0
@@ -472,11 +472,11 @@ define float @sqrt_fast_ieee(float %x) #0 {
; GLOBAL-NEXT: xsrsqrtesp 0, 1
; GLOBAL-NEXT: vspltisw 2, -3
; GLOBAL-NEXT: addis 3, 2, .LCPI15_0@toc@ha
; GLOBAL-NEXT: lfs 3, .LCPI15_0@toc@l(3)
; GLOBAL-NEXT: xvcvsxwdp 2, 34
; GLOBAL-NEXT: xsmulsp 1, 1, 0
; GLOBAL-NEXT: xsmaddasp 2, 1, 0
; GLOBAL-NEXT: xsmulsp 0, 1, 3
; GLOBAL-NEXT: lfs 0, .LCPI15_0@toc@l(3)
; GLOBAL-NEXT: xsmulsp 0, 1, 0
; GLOBAL-NEXT: xsmulsp 0, 0, 2
; GLOBAL-NEXT: .LBB15_2:
; GLOBAL-NEXT: fmr 1, 0
@@ -505,11 +505,11 @@ define float @sqrt_fast_preserve_sign(float %x) #1 {
; FMF-NEXT: xsrsqrtesp 0, 1
; FMF-NEXT: vspltisw 2, -3
; FMF-NEXT: addis 3, 2, .LCPI16_0@toc@ha
; FMF-NEXT: lfs 3, .LCPI16_0@toc@l(3)
; FMF-NEXT: xvcvsxwdp 2, 34
; FMF-NEXT: xsmulsp 1, 1, 0
; FMF-NEXT: xsmaddasp 2, 1, 0
; FMF-NEXT: xsmulsp 0, 1, 3
; FMF-NEXT: lfs 0, .LCPI16_0@toc@l(3)
; FMF-NEXT: xsmulsp 0, 1, 0
; FMF-NEXT: xsmulsp 0, 0, 2
; FMF-NEXT: .LBB16_2:
; FMF-NEXT: fmr 1, 0
@@ -524,11 +524,11 @@ define float @sqrt_fast_preserve_sign(float %x) #1 {
; GLOBAL-NEXT: xsrsqrtesp 0, 1
; GLOBAL-NEXT: vspltisw 2, -3
; GLOBAL-NEXT: addis 3, 2, .LCPI16_0@toc@ha
; GLOBAL-NEXT: lfs 3, .LCPI16_0@toc@l(3)
; GLOBAL-NEXT: xvcvsxwdp 2, 34
; GLOBAL-NEXT: xsmulsp 1, 1, 0
; GLOBAL-NEXT: xsmaddasp 2, 1, 0
; GLOBAL-NEXT: xsmulsp 0, 1, 3
; GLOBAL-NEXT: lfs 0, .LCPI16_0@toc@l(3)
; GLOBAL-NEXT: xsmulsp 0, 1, 0
; GLOBAL-NEXT: xsmulsp 0, 0, 2
; GLOBAL-NEXT: .LBB16_2:
; GLOBAL-NEXT: fmr 1, 0

View File

@@ -26,13 +26,13 @@ define void @foo_multiple_use(i32 signext %var1) {
; CHECK-LABEL: foo_multiple_use:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xori r3, r3, 1
; CHECK-NEXT: addis r4, r2, res2@toc@ha
; CHECK-NEXT: addis r6, r2, res@toc@ha
; CHECK-NEXT: addis r5, r2, res2@toc@ha
; CHECK-NEXT: cntlzw r3, r3
; CHECK-NEXT: srwi r5, r3, 5
; CHECK-NEXT: srwi r4, r3, 5
; CHECK-NEXT: rlwinm r3, r3, 14, 0, 12
; CHECK-NEXT: stw r5, res2@toc@l(r4)
; CHECK-NEXT: stw r3, res@toc@l(r6)
; CHECK-NEXT: stw r4, res2@toc@l(r5)
; CHECK-NEXT: addis r4, r2, res@toc@ha
; CHECK-NEXT: stw r3, res@toc@l(r4)
; CHECK-NEXT: blr
entry:
%cmp = icmp eq i32 %var1, 1

View File

@@ -7,8 +7,8 @@
define zeroext i1 @abs_isinff(float %x) {
; P8-LABEL: abs_isinff:
; P8: # %bb.0: # %entry
; P8-NEXT: xsabsdp 0, 1
; P8-NEXT: addis 3, 2, .LCPI0_0@toc@ha
; P8-NEXT: xsabsdp 0, 1
; P8-NEXT: li 4, 1
; P8-NEXT: lfs 1, .LCPI0_0@toc@l(3)
; P8-NEXT: li 3, 0
@@ -35,8 +35,8 @@ entry:
define zeroext i1 @abs_isinf(double %x) {
; P8-LABEL: abs_isinf:
; P8: # %bb.0: # %entry
; P8-NEXT: xsabsdp 0, 1
; P8-NEXT: addis 3, 2, .LCPI1_0@toc@ha
; P8-NEXT: xsabsdp 0, 1
; P8-NEXT: li 4, 1
; P8-NEXT: lfs 1, .LCPI1_0@toc@l(3)
; P8-NEXT: li 3, 0
@@ -109,8 +109,8 @@ entry:
define <4 x i1> @abs_isinfv4f32(<4 x float> %x) {
; P8-LABEL: abs_isinfv4f32:
; P8: # %bb.0: # %entry
; P8-NEXT: xvabssp 0, 34
; P8-NEXT: addis 3, 2, .LCPI3_0@toc@ha
; P8-NEXT: xvabssp 0, 34
; P8-NEXT: addi 3, 3, .LCPI3_0@toc@l
; P8-NEXT: lxvd2x 1, 0, 3
; P8-NEXT: xvcmpeqsp 34, 0, 1
@@ -133,8 +133,8 @@ entry:
define <2 x i1> @abs_isinfv2f64(<2 x double> %x) {
; P8-LABEL: abs_isinfv2f64:
; P8: # %bb.0: # %entry
; P8-NEXT: xvabsdp 0, 34
; P8-NEXT: addis 3, 2, .LCPI4_0@toc@ha
; P8-NEXT: xvabsdp 0, 34
; P8-NEXT: addi 3, 3, .LCPI4_0@toc@l
; P8-NEXT: lxvd2x 1, 0, 3
; P8-NEXT: xvcmpeqdp 34, 0, 1

View File

@@ -496,8 +496,8 @@ define signext i32 @ppcq_to_i32(ppc_fp128 %m) #0 {
; NOVSX: # %bb.0: # %entry
; NOVSX-NEXT: mffs f0
; NOVSX-NEXT: mtfsb1 31
; NOVSX-NEXT: addi r3, r1, -4
; NOVSX-NEXT: mtfsb0 30
; NOVSX-NEXT: addi r3, r1, -4
; NOVSX-NEXT: fadd f1, f2, f1
; NOVSX-NEXT: mtfsf 1, f0
; NOVSX-NEXT: fctiwz f0, f1
@@ -616,11 +616,11 @@ define zeroext i32 @ppcq_to_u32(ppc_fp128 %m) #0 {
; P8-NEXT: xxlxor f3, f3, f3
; P8-NEXT: std r30, 112(r1) # 8-byte Folded Spill
; P8-NEXT: lfs f0, .LCPI13_0@toc@l(r3)
; P8-NEXT: fcmpo cr1, f2, f3
; P8-NEXT: lis r3, -32768
; P8-NEXT: fcmpo cr0, f2, f3
; P8-NEXT: fcmpo cr1, f1, f0
; P8-NEXT: crand 4*cr5+lt, 4*cr1+eq, lt
; P8-NEXT: crandc 4*cr5+gt, 4*cr1+lt, 4*cr1+eq
; P8-NEXT: fcmpo cr0, f1, f0
; P8-NEXT: crand 4*cr5+lt, eq, 4*cr1+lt
; P8-NEXT: crandc 4*cr5+gt, lt, eq
; P8-NEXT: cror 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
; P8-NEXT: isel r30, 0, r3, 4*cr5+lt
; P8-NEXT: bc 12, 4*cr5+lt, .LBB13_2
@@ -689,22 +689,22 @@ define zeroext i32 @ppcq_to_u32(ppc_fp128 %m) #0 {
; NOVSX-LABEL: ppcq_to_u32:
; NOVSX: # %bb.0: # %entry
; NOVSX-NEXT: mfocrf r12, 32
; NOVSX-NEXT: mflr r0
; NOVSX-NEXT: stw r12, 8(r1)
; NOVSX-NEXT: mflr r0
; NOVSX-NEXT: stdu r1, -48(r1)
; NOVSX-NEXT: std r0, 64(r1)
; NOVSX-NEXT: .cfi_def_cfa_offset 48
; NOVSX-NEXT: .cfi_offset lr, 16
; NOVSX-NEXT: .cfi_offset cr2, 8
; NOVSX-NEXT: addis r3, r2, .LCPI13_0@toc@ha
; NOVSX-NEXT: addis r4, r2, .LCPI13_1@toc@ha
; NOVSX-NEXT: lfs f0, .LCPI13_0@toc@l(r3)
; NOVSX-NEXT: lfs f4, .LCPI13_1@toc@l(r4)
; NOVSX-NEXT: addis r3, r2, .LCPI13_1@toc@ha
; NOVSX-NEXT: lfs f4, .LCPI13_1@toc@l(r3)
; NOVSX-NEXT: fcmpo cr0, f1, f0
; NOVSX-NEXT: fcmpo cr1, f2, f4
; NOVSX-NEXT: fmr f3, f4
; NOVSX-NEXT: crand 4*cr5+lt, eq, 4*cr1+lt
; NOVSX-NEXT: crandc 4*cr5+gt, lt, eq
; NOVSX-NEXT: crand 4*cr5+lt, eq, 4*cr1+lt
; NOVSX-NEXT: cror 4*cr2+lt, 4*cr5+gt, 4*cr5+lt
; NOVSX-NEXT: bc 12, 4*cr2+lt, .LBB13_2
; NOVSX-NEXT: # %bb.1: # %entry
@@ -714,8 +714,8 @@ define zeroext i32 @ppcq_to_u32(ppc_fp128 %m) #0 {
; NOVSX-NEXT: nop
; NOVSX-NEXT: mffs f0
; NOVSX-NEXT: mtfsb1 31
; NOVSX-NEXT: addi r3, r1, 44
; NOVSX-NEXT: mtfsb0 30
; NOVSX-NEXT: addi r3, r1, 44
; NOVSX-NEXT: fadd f1, f2, f1
; NOVSX-NEXT: mtfsf 1, f0
; NOVSX-NEXT: fctiwz f0, f1
@@ -728,8 +728,8 @@ define zeroext i32 @ppcq_to_u32(ppc_fp128 %m) #0 {
; NOVSX-NEXT: addi r1, r1, 48
; NOVSX-NEXT: ld r0, 16(r1)
; NOVSX-NEXT: lwz r12, 8(r1)
; NOVSX-NEXT: mtocrf 32, r12
; NOVSX-NEXT: mtlr r0
; NOVSX-NEXT: mtocrf 32, r12
; NOVSX-NEXT: blr
entry:
%conv = tail call i32 @llvm.experimental.constrained.fptoui.i32.ppcf128(ppc_fp128 %m, metadata !"fpexcept.strict") #0
@@ -831,10 +831,10 @@ define ppc_fp128 @i1_to_ppcq(i1 signext %m) #0 {
;
; NOVSX-LABEL: i1_to_ppcq:
; NOVSX: # %bb.0: # %entry
; NOVSX-NEXT: addi r4, r1, -4
; NOVSX-NEXT: stw r3, -4(r1)
; NOVSX-NEXT: addi r3, r1, -4
; NOVSX-NEXT: lfiwax f0, 0, r3
; NOVSX-NEXT: addis r3, r2, .LCPI16_0@toc@ha
; NOVSX-NEXT: lfiwax f0, 0, r4
; NOVSX-NEXT: lfs f2, .LCPI16_0@toc@l(r3)
; NOVSX-NEXT: fcfid f1, f0
; NOVSX-NEXT: blr
@@ -860,10 +860,10 @@ define ppc_fp128 @u1_to_ppcq(i1 zeroext %m) #0 {
;
; NOVSX-LABEL: u1_to_ppcq:
; NOVSX: # %bb.0: # %entry
; NOVSX-NEXT: addi r4, r1, -4
; NOVSX-NEXT: stw r3, -4(r1)
; NOVSX-NEXT: addi r3, r1, -4
; NOVSX-NEXT: lfiwax f0, 0, r3
; NOVSX-NEXT: addis r3, r2, .LCPI17_0@toc@ha
; NOVSX-NEXT: lfiwax f0, 0, r4
; NOVSX-NEXT: lfs f2, .LCPI17_0@toc@l(r3)
; NOVSX-NEXT: fcfid f1, f0
; NOVSX-NEXT: blr

View File

@@ -189,9 +189,9 @@ define double @i32_to_d(i32 signext %m) #0 {
;
; NOVSX-LABEL: i32_to_d:
; NOVSX: # %bb.0: # %entry
; NOVSX-NEXT: addi r4, r1, -4
; NOVSX-NEXT: stw r3, -4(r1)
; NOVSX-NEXT: lfiwax f0, 0, r4
; NOVSX-NEXT: addi r3, r1, -4
; NOVSX-NEXT: lfiwax f0, 0, r3
; NOVSX-NEXT: fcfid f1, f0
; NOVSX-NEXT: blr
entry:
@@ -226,9 +226,9 @@ define double @u32_to_d(i32 zeroext %m) #0 {
;
; NOVSX-LABEL: u32_to_d:
; NOVSX: # %bb.0: # %entry
; NOVSX-NEXT: addi r4, r1, -4
; NOVSX-NEXT: stw r3, -4(r1)
; NOVSX-NEXT: lfiwzx f0, 0, r4
; NOVSX-NEXT: addi r3, r1, -4
; NOVSX-NEXT: lfiwzx f0, 0, r3
; NOVSX-NEXT: fcfidu f1, f0
; NOVSX-NEXT: blr
entry:
@@ -263,9 +263,9 @@ define float @i32_to_f(i32 signext %m) #0 {
;
; NOVSX-LABEL: i32_to_f:
; NOVSX: # %bb.0: # %entry
; NOVSX-NEXT: addi r4, r1, -4
; NOVSX-NEXT: stw r3, -4(r1)
; NOVSX-NEXT: lfiwax f0, 0, r4
; NOVSX-NEXT: addi r3, r1, -4
; NOVSX-NEXT: lfiwax f0, 0, r3
; NOVSX-NEXT: fcfids f1, f0
; NOVSX-NEXT: blr
entry:
@@ -300,9 +300,9 @@ define float @u32_to_f(i32 zeroext %m) #0 {
;
; NOVSX-LABEL: u32_to_f:
; NOVSX: # %bb.0: # %entry
; NOVSX-NEXT: addi r4, r1, -4
; NOVSX-NEXT: stw r3, -4(r1)
; NOVSX-NEXT: lfiwzx f0, 0, r4
; NOVSX-NEXT: addi r3, r1, -4
; NOVSX-NEXT: lfiwzx f0, 0, r3
; NOVSX-NEXT: fcfidus f1, f0
; NOVSX-NEXT: blr
entry:

View File

@@ -1705,19 +1705,19 @@ define i32 @fcmp_one_f128(fp128 %a, fp128 %b) #0 {
; P8-NEXT: vmr v31, v3
; P8-NEXT: bl __unordkf2
; P8-NEXT: nop
; P8-NEXT: vmr v2, v30
; P8-NEXT: cntlzw r3, r3
; P8-NEXT: vmr v2, v30
; P8-NEXT: vmr v3, v31
; P8-NEXT: srwi r30, r3, 5
; P8-NEXT: bl __eqkf2
; P8-NEXT: nop
; P8-NEXT: cntlzw r3, r3
; P8-NEXT: li r4, 144
; P8-NEXT: srwi r3, r3, 5
; P8-NEXT: lxvd2x v31, r1, r4 # 16-byte Folded Reload
; P8-NEXT: li r4, 128
; P8-NEXT: xori r3, r3, 1
; P8-NEXT: srwi r3, r3, 5
; P8-NEXT: lxvd2x v30, r1, r4 # 16-byte Folded Reload
; P8-NEXT: xori r3, r3, 1
; P8-NEXT: and r3, r30, r3
; P8-NEXT: ld r30, 160(r1) # 8-byte Folded Reload
; P8-NEXT: addi r1, r1, 176
@@ -1956,19 +1956,19 @@ define i32 @fcmp_ueq_f128(fp128 %a, fp128 %b) #0 {
; P8-NEXT: vmr v31, v3
; P8-NEXT: bl __eqkf2
; P8-NEXT: nop
; P8-NEXT: vmr v2, v30
; P8-NEXT: cntlzw r3, r3
; P8-NEXT: vmr v2, v30
; P8-NEXT: vmr v3, v31
; P8-NEXT: srwi r30, r3, 5
; P8-NEXT: bl __unordkf2
; P8-NEXT: nop
; P8-NEXT: cntlzw r3, r3
; P8-NEXT: li r4, 144
; P8-NEXT: srwi r3, r3, 5
; P8-NEXT: lxvd2x v31, r1, r4 # 16-byte Folded Reload
; P8-NEXT: li r4, 128
; P8-NEXT: xori r3, r3, 1
; P8-NEXT: srwi r3, r3, 5
; P8-NEXT: lxvd2x v30, r1, r4 # 16-byte Folded Reload
; P8-NEXT: xori r3, r3, 1
; P8-NEXT: or r3, r3, r30
; P8-NEXT: ld r30, 160(r1) # 8-byte Folded Reload
; P8-NEXT: addi r1, r1, 176
@@ -2292,19 +2292,19 @@ define i32 @fcmps_one_f128(fp128 %a, fp128 %b) #0 {
; P8-NEXT: vmr v31, v3
; P8-NEXT: bl __unordkf2
; P8-NEXT: nop
; P8-NEXT: vmr v2, v30
; P8-NEXT: cntlzw r3, r3
; P8-NEXT: vmr v2, v30
; P8-NEXT: vmr v3, v31
; P8-NEXT: srwi r30, r3, 5
; P8-NEXT: bl __eqkf2
; P8-NEXT: nop
; P8-NEXT: cntlzw r3, r3
; P8-NEXT: li r4, 144
; P8-NEXT: srwi r3, r3, 5
; P8-NEXT: lxvd2x v31, r1, r4 # 16-byte Folded Reload
; P8-NEXT: li r4, 128
; P8-NEXT: xori r3, r3, 1
; P8-NEXT: srwi r3, r3, 5
; P8-NEXT: lxvd2x v30, r1, r4 # 16-byte Folded Reload
; P8-NEXT: xori r3, r3, 1
; P8-NEXT: and r3, r30, r3
; P8-NEXT: ld r30, 160(r1) # 8-byte Folded Reload
; P8-NEXT: addi r1, r1, 176
@@ -2543,19 +2543,19 @@ define i32 @fcmps_ueq_f128(fp128 %a, fp128 %b) #0 {
; P8-NEXT: vmr v31, v3
; P8-NEXT: bl __eqkf2
; P8-NEXT: nop
; P8-NEXT: vmr v2, v30
; P8-NEXT: cntlzw r3, r3
; P8-NEXT: vmr v2, v30
; P8-NEXT: vmr v3, v31
; P8-NEXT: srwi r30, r3, 5
; P8-NEXT: bl __unordkf2
; P8-NEXT: nop
; P8-NEXT: cntlzw r3, r3
; P8-NEXT: li r4, 144
; P8-NEXT: srwi r3, r3, 5
; P8-NEXT: lxvd2x v31, r1, r4 # 16-byte Folded Reload
; P8-NEXT: li r4, 128
; P8-NEXT: xori r3, r3, 1
; P8-NEXT: srwi r3, r3, 5
; P8-NEXT: lxvd2x v30, r1, r4 # 16-byte Folded Reload
; P8-NEXT: xori r3, r3, 1
; P8-NEXT: or r3, r3, r30
; P8-NEXT: ld r30, 160(r1) # 8-byte Folded Reload
; P8-NEXT: addi r1, r1, 176
@@ -2659,10 +2659,10 @@ define i32 @fcmp_olt_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
; P8-LABEL: fcmp_olt_ppcf128:
; P8: # %bb.0:
; P8-NEXT: fcmpu cr0, f1, f3
; P8-NEXT: fcmpu cr1, f2, f4
; P8-NEXT: li r3, 1
; P8-NEXT: crand 4*cr5+lt, eq, 4*cr1+lt
; P8-NEXT: crandc 4*cr5+gt, lt, eq
; P8-NEXT: fcmpu cr1, f2, f4
; P8-NEXT: crand 4*cr5+lt, eq, 4*cr1+lt
; P8-NEXT: crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
; P8-NEXT: isel r3, 0, r3, 4*cr5+lt
; P8-NEXT: blr
@@ -2681,10 +2681,10 @@ define i32 @fcmp_olt_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
; NOVSX-LABEL: fcmp_olt_ppcf128:
; NOVSX: # %bb.0:
; NOVSX-NEXT: fcmpu cr0, f1, f3
; NOVSX-NEXT: fcmpu cr1, f2, f4
; NOVSX-NEXT: li r3, 1
; NOVSX-NEXT: crand 4*cr5+lt, eq, 4*cr1+lt
; NOVSX-NEXT: crandc 4*cr5+gt, lt, eq
; NOVSX-NEXT: fcmpu cr1, f2, f4
; NOVSX-NEXT: crand 4*cr5+lt, eq, 4*cr1+lt
; NOVSX-NEXT: crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
; NOVSX-NEXT: isel r3, 0, r3, 4*cr5+lt
; NOVSX-NEXT: blr
@@ -2697,12 +2697,12 @@ define i32 @fcmp_ole_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
; P8-LABEL: fcmp_ole_ppcf128:
; P8: # %bb.0:
; P8-NEXT: fcmpu cr0, f2, f4
; P8-NEXT: fcmpu cr1, f1, f3
; P8-NEXT: li r3, 1
; P8-NEXT: crnor 4*cr5+lt, un, gt
; P8-NEXT: crnor 4*cr5+gt, 4*cr1+un, 4*cr1+gt
; P8-NEXT: crand 4*cr5+lt, 4*cr1+eq, 4*cr5+lt
; P8-NEXT: crandc 4*cr5+gt, 4*cr5+gt, 4*cr1+eq
; P8-NEXT: fcmpu cr0, f1, f3
; P8-NEXT: crnor 4*cr5+gt, un, gt
; P8-NEXT: crand 4*cr5+lt, eq, 4*cr5+lt
; P8-NEXT: crandc 4*cr5+gt, 4*cr5+gt, eq
; P8-NEXT: crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
; P8-NEXT: isel r3, 0, r3, 4*cr5+lt
; P8-NEXT: blr
@@ -2723,12 +2723,12 @@ define i32 @fcmp_ole_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
; NOVSX-LABEL: fcmp_ole_ppcf128:
; NOVSX: # %bb.0:
; NOVSX-NEXT: fcmpu cr0, f2, f4
; NOVSX-NEXT: fcmpu cr1, f1, f3
; NOVSX-NEXT: li r3, 1
; NOVSX-NEXT: crnor 4*cr5+lt, un, gt
; NOVSX-NEXT: crnor 4*cr5+gt, 4*cr1+un, 4*cr1+gt
; NOVSX-NEXT: crand 4*cr5+lt, 4*cr1+eq, 4*cr5+lt
; NOVSX-NEXT: crandc 4*cr5+gt, 4*cr5+gt, 4*cr1+eq
; NOVSX-NEXT: fcmpu cr0, f1, f3
; NOVSX-NEXT: crnor 4*cr5+gt, un, gt
; NOVSX-NEXT: crand 4*cr5+lt, eq, 4*cr5+lt
; NOVSX-NEXT: crandc 4*cr5+gt, 4*cr5+gt, eq
; NOVSX-NEXT: crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
; NOVSX-NEXT: isel r3, 0, r3, 4*cr5+lt
; NOVSX-NEXT: blr
@@ -2741,10 +2741,10 @@ define i32 @fcmp_ogt_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
; P8-LABEL: fcmp_ogt_ppcf128:
; P8: # %bb.0:
; P8-NEXT: fcmpu cr0, f1, f3
; P8-NEXT: fcmpu cr1, f2, f4
; P8-NEXT: li r3, 1
; P8-NEXT: crand 4*cr5+lt, eq, 4*cr1+gt
; P8-NEXT: crandc 4*cr5+gt, gt, eq
; P8-NEXT: fcmpu cr1, f2, f4
; P8-NEXT: crand 4*cr5+lt, eq, 4*cr1+gt
; P8-NEXT: crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
; P8-NEXT: isel r3, 0, r3, 4*cr5+lt
; P8-NEXT: blr
@@ -2763,10 +2763,10 @@ define i32 @fcmp_ogt_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
; NOVSX-LABEL: fcmp_ogt_ppcf128:
; NOVSX: # %bb.0:
; NOVSX-NEXT: fcmpu cr0, f1, f3
; NOVSX-NEXT: fcmpu cr1, f2, f4
; NOVSX-NEXT: li r3, 1
; NOVSX-NEXT: crand 4*cr5+lt, eq, 4*cr1+gt
; NOVSX-NEXT: crandc 4*cr5+gt, gt, eq
; NOVSX-NEXT: fcmpu cr1, f2, f4
; NOVSX-NEXT: crand 4*cr5+lt, eq, 4*cr1+gt
; NOVSX-NEXT: crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
; NOVSX-NEXT: isel r3, 0, r3, 4*cr5+lt
; NOVSX-NEXT: blr
@@ -2779,12 +2779,12 @@ define i32 @fcmp_oge_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
; P8-LABEL: fcmp_oge_ppcf128:
; P8: # %bb.0:
; P8-NEXT: fcmpu cr0, f2, f4
; P8-NEXT: fcmpu cr1, f1, f3
; P8-NEXT: li r3, 1
; P8-NEXT: crnor 4*cr5+lt, un, lt
; P8-NEXT: crnor 4*cr5+gt, 4*cr1+un, 4*cr1+lt
; P8-NEXT: crand 4*cr5+lt, 4*cr1+eq, 4*cr5+lt
; P8-NEXT: crandc 4*cr5+gt, 4*cr5+gt, 4*cr1+eq
; P8-NEXT: fcmpu cr0, f1, f3
; P8-NEXT: crnor 4*cr5+gt, un, lt
; P8-NEXT: crand 4*cr5+lt, eq, 4*cr5+lt
; P8-NEXT: crandc 4*cr5+gt, 4*cr5+gt, eq
; P8-NEXT: crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
; P8-NEXT: isel r3, 0, r3, 4*cr5+lt
; P8-NEXT: blr
@@ -2805,12 +2805,12 @@ define i32 @fcmp_oge_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
; NOVSX-LABEL: fcmp_oge_ppcf128:
; NOVSX: # %bb.0:
; NOVSX-NEXT: fcmpu cr0, f2, f4
; NOVSX-NEXT: fcmpu cr1, f1, f3
; NOVSX-NEXT: li r3, 1
; NOVSX-NEXT: crnor 4*cr5+lt, un, lt
; NOVSX-NEXT: crnor 4*cr5+gt, 4*cr1+un, 4*cr1+lt
; NOVSX-NEXT: crand 4*cr5+lt, 4*cr1+eq, 4*cr5+lt
; NOVSX-NEXT: crandc 4*cr5+gt, 4*cr5+gt, 4*cr1+eq
; NOVSX-NEXT: fcmpu cr0, f1, f3
; NOVSX-NEXT: crnor 4*cr5+gt, un, lt
; NOVSX-NEXT: crand 4*cr5+lt, eq, 4*cr5+lt
; NOVSX-NEXT: crandc 4*cr5+gt, 4*cr5+gt, eq
; NOVSX-NEXT: crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
; NOVSX-NEXT: isel r3, 0, r3, 4*cr5+lt
; NOVSX-NEXT: blr
@@ -2823,10 +2823,10 @@ define i32 @fcmp_oeq_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
; P8-LABEL: fcmp_oeq_ppcf128:
; P8: # %bb.0:
; P8-NEXT: fcmpu cr0, f1, f3
; P8-NEXT: fcmpu cr1, f2, f4
; P8-NEXT: li r3, 1
; P8-NEXT: crand 4*cr5+lt, eq, 4*cr1+eq
; P8-NEXT: crandc 4*cr5+gt, eq, eq
; P8-NEXT: fcmpu cr1, f2, f4
; P8-NEXT: crand 4*cr5+lt, eq, 4*cr1+eq
; P8-NEXT: crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
; P8-NEXT: isel r3, 0, r3, 4*cr5+lt
; P8-NEXT: blr
@@ -2845,10 +2845,10 @@ define i32 @fcmp_oeq_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
; NOVSX-LABEL: fcmp_oeq_ppcf128:
; NOVSX: # %bb.0:
; NOVSX-NEXT: fcmpu cr0, f1, f3
; NOVSX-NEXT: fcmpu cr1, f2, f4
; NOVSX-NEXT: li r3, 1
; NOVSX-NEXT: crand 4*cr5+lt, eq, 4*cr1+eq
; NOVSX-NEXT: crandc 4*cr5+gt, eq, eq
; NOVSX-NEXT: fcmpu cr1, f2, f4
; NOVSX-NEXT: crand 4*cr5+lt, eq, 4*cr1+eq
; NOVSX-NEXT: crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
; NOVSX-NEXT: isel r3, 0, r3, 4*cr5+lt
; NOVSX-NEXT: blr
@@ -2861,12 +2861,12 @@ define i32 @fcmp_one_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
; P8-LABEL: fcmp_one_ppcf128:
; P8: # %bb.0:
; P8-NEXT: fcmpu cr0, f2, f4
; P8-NEXT: fcmpu cr1, f1, f3
; P8-NEXT: li r3, 1
; P8-NEXT: crnor 4*cr5+lt, un, eq
; P8-NEXT: crnor 4*cr5+gt, 4*cr1+un, 4*cr1+eq
; P8-NEXT: crand 4*cr5+lt, 4*cr1+eq, 4*cr5+lt
; P8-NEXT: crandc 4*cr5+gt, 4*cr5+gt, 4*cr1+eq
; P8-NEXT: fcmpu cr0, f1, f3
; P8-NEXT: crnor 4*cr5+gt, un, eq
; P8-NEXT: crand 4*cr5+lt, eq, 4*cr5+lt
; P8-NEXT: crandc 4*cr5+gt, 4*cr5+gt, eq
; P8-NEXT: crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
; P8-NEXT: isel r3, 0, r3, 4*cr5+lt
; P8-NEXT: blr
@@ -2887,12 +2887,12 @@ define i32 @fcmp_one_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
; NOVSX-LABEL: fcmp_one_ppcf128:
; NOVSX: # %bb.0:
; NOVSX-NEXT: fcmpu cr0, f2, f4
; NOVSX-NEXT: fcmpu cr1, f1, f3
; NOVSX-NEXT: li r3, 1
; NOVSX-NEXT: crnor 4*cr5+lt, un, eq
; NOVSX-NEXT: crnor 4*cr5+gt, 4*cr1+un, 4*cr1+eq
; NOVSX-NEXT: crand 4*cr5+lt, 4*cr1+eq, 4*cr5+lt
; NOVSX-NEXT: crandc 4*cr5+gt, 4*cr5+gt, 4*cr1+eq
; NOVSX-NEXT: fcmpu cr0, f1, f3
; NOVSX-NEXT: crnor 4*cr5+gt, un, eq
; NOVSX-NEXT: crand 4*cr5+lt, eq, 4*cr5+lt
; NOVSX-NEXT: crandc 4*cr5+gt, 4*cr5+gt, eq
; NOVSX-NEXT: crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
; NOVSX-NEXT: isel r3, 0, r3, 4*cr5+lt
; NOVSX-NEXT: blr
@@ -2904,13 +2904,13 @@ define i32 @fcmp_one_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
define i32 @fcmp_ult_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
; P8-LABEL: fcmp_ult_ppcf128:
; P8: # %bb.0:
; P8-NEXT: fcmpu cr0, f2, f4
; P8-NEXT: fcmpu cr1, f1, f3
; P8-NEXT: fcmpu cr0, f1, f3
; P8-NEXT: li r3, 1
; P8-NEXT: cror 4*cr5+lt, lt, un
; P8-NEXT: cror 4*cr5+gt, 4*cr1+lt, 4*cr1+un
; P8-NEXT: crand 4*cr5+lt, 4*cr1+eq, 4*cr5+lt
; P8-NEXT: crandc 4*cr5+gt, 4*cr5+gt, 4*cr1+eq
; P8-NEXT: cror 4*cr5+gt, lt, un
; P8-NEXT: fcmpu cr1, f2, f4
; P8-NEXT: cror 4*cr5+lt, 4*cr1+lt, 4*cr1+un
; P8-NEXT: crand 4*cr5+lt, eq, 4*cr5+lt
; P8-NEXT: crandc 4*cr5+gt, 4*cr5+gt, eq
; P8-NEXT: crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
; P8-NEXT: isel r3, 0, r3, 4*cr5+lt
; P8-NEXT: blr
@@ -2930,13 +2930,13 @@ define i32 @fcmp_ult_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
;
; NOVSX-LABEL: fcmp_ult_ppcf128:
; NOVSX: # %bb.0:
; NOVSX-NEXT: fcmpu cr0, f2, f4
; NOVSX-NEXT: fcmpu cr1, f1, f3
; NOVSX-NEXT: fcmpu cr0, f1, f3
; NOVSX-NEXT: li r3, 1
; NOVSX-NEXT: cror 4*cr5+lt, lt, un
; NOVSX-NEXT: cror 4*cr5+gt, 4*cr1+lt, 4*cr1+un
; NOVSX-NEXT: crand 4*cr5+lt, 4*cr1+eq, 4*cr5+lt
; NOVSX-NEXT: crandc 4*cr5+gt, 4*cr5+gt, 4*cr1+eq
; NOVSX-NEXT: cror 4*cr5+gt, lt, un
; NOVSX-NEXT: fcmpu cr1, f2, f4
; NOVSX-NEXT: cror 4*cr5+lt, 4*cr1+lt, 4*cr1+un
; NOVSX-NEXT: crand 4*cr5+lt, eq, 4*cr5+lt
; NOVSX-NEXT: crandc 4*cr5+gt, 4*cr5+gt, eq
; NOVSX-NEXT: crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
; NOVSX-NEXT: isel r3, 0, r3, 4*cr5+lt
; NOVSX-NEXT: blr
@@ -2949,8 +2949,8 @@ define i32 @fcmp_ule_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
; P8-LABEL: fcmp_ule_ppcf128:
; P8: # %bb.0:
; P8-NEXT: fcmpu cr0, f2, f4
; P8-NEXT: fcmpu cr1, f1, f3
; P8-NEXT: li r3, 1
; P8-NEXT: fcmpu cr1, f1, f3
; P8-NEXT: crandc 4*cr5+lt, 4*cr1+eq, gt
; P8-NEXT: crnor 4*cr5+gt, 4*cr1+gt, 4*cr1+eq
; P8-NEXT: crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
@@ -2971,8 +2971,8 @@ define i32 @fcmp_ule_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
; NOVSX-LABEL: fcmp_ule_ppcf128:
; NOVSX: # %bb.0:
; NOVSX-NEXT: fcmpu cr0, f2, f4
; NOVSX-NEXT: fcmpu cr1, f1, f3
; NOVSX-NEXT: li r3, 1
; NOVSX-NEXT: fcmpu cr1, f1, f3
; NOVSX-NEXT: crandc 4*cr5+lt, 4*cr1+eq, gt
; NOVSX-NEXT: crnor 4*cr5+gt, 4*cr1+gt, 4*cr1+eq
; NOVSX-NEXT: crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
@@ -2986,13 +2986,13 @@ define i32 @fcmp_ule_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
define i32 @fcmp_ugt_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
; P8-LABEL: fcmp_ugt_ppcf128:
; P8: # %bb.0:
; P8-NEXT: fcmpu cr0, f2, f4
; P8-NEXT: fcmpu cr1, f1, f3
; P8-NEXT: fcmpu cr0, f1, f3
; P8-NEXT: li r3, 1
; P8-NEXT: cror 4*cr5+lt, gt, un
; P8-NEXT: cror 4*cr5+gt, 4*cr1+gt, 4*cr1+un
; P8-NEXT: crand 4*cr5+lt, 4*cr1+eq, 4*cr5+lt
; P8-NEXT: crandc 4*cr5+gt, 4*cr5+gt, 4*cr1+eq
; P8-NEXT: cror 4*cr5+gt, gt, un
; P8-NEXT: fcmpu cr1, f2, f4
; P8-NEXT: cror 4*cr5+lt, 4*cr1+gt, 4*cr1+un
; P8-NEXT: crand 4*cr5+lt, eq, 4*cr5+lt
; P8-NEXT: crandc 4*cr5+gt, 4*cr5+gt, eq
; P8-NEXT: crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
; P8-NEXT: isel r3, 0, r3, 4*cr5+lt
; P8-NEXT: blr
@@ -3012,13 +3012,13 @@ define i32 @fcmp_ugt_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
;
; NOVSX-LABEL: fcmp_ugt_ppcf128:
; NOVSX: # %bb.0:
; NOVSX-NEXT: fcmpu cr0, f2, f4
; NOVSX-NEXT: fcmpu cr1, f1, f3
; NOVSX-NEXT: fcmpu cr0, f1, f3
; NOVSX-NEXT: li r3, 1
; NOVSX-NEXT: cror 4*cr5+lt, gt, un
; NOVSX-NEXT: cror 4*cr5+gt, 4*cr1+gt, 4*cr1+un
; NOVSX-NEXT: crand 4*cr5+lt, 4*cr1+eq, 4*cr5+lt
; NOVSX-NEXT: crandc 4*cr5+gt, 4*cr5+gt, 4*cr1+eq
; NOVSX-NEXT: cror 4*cr5+gt, gt, un
; NOVSX-NEXT: fcmpu cr1, f2, f4
; NOVSX-NEXT: cror 4*cr5+lt, 4*cr1+gt, 4*cr1+un
; NOVSX-NEXT: crand 4*cr5+lt, eq, 4*cr5+lt
; NOVSX-NEXT: crandc 4*cr5+gt, 4*cr5+gt, eq
; NOVSX-NEXT: crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
; NOVSX-NEXT: isel r3, 0, r3, 4*cr5+lt
; NOVSX-NEXT: blr
@@ -3031,8 +3031,8 @@ define i32 @fcmp_uge_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
; P8-LABEL: fcmp_uge_ppcf128:
; P8: # %bb.0:
; P8-NEXT: fcmpu cr0, f2, f4
; P8-NEXT: fcmpu cr1, f1, f3
; P8-NEXT: li r3, 1
; P8-NEXT: fcmpu cr1, f1, f3
; P8-NEXT: crandc 4*cr5+lt, 4*cr1+eq, lt
; P8-NEXT: crnor 4*cr5+gt, 4*cr1+lt, 4*cr1+eq
; P8-NEXT: crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
@@ -3053,8 +3053,8 @@ define i32 @fcmp_uge_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
; NOVSX-LABEL: fcmp_uge_ppcf128:
; NOVSX: # %bb.0:
; NOVSX-NEXT: fcmpu cr0, f2, f4
; NOVSX-NEXT: fcmpu cr1, f1, f3
; NOVSX-NEXT: li r3, 1
; NOVSX-NEXT: fcmpu cr1, f1, f3
; NOVSX-NEXT: crandc 4*cr5+lt, 4*cr1+eq, lt
; NOVSX-NEXT: crnor 4*cr5+gt, 4*cr1+lt, 4*cr1+eq
; NOVSX-NEXT: crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
@@ -3068,13 +3068,13 @@ define i32 @fcmp_uge_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
define i32 @fcmp_ueq_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
; P8-LABEL: fcmp_ueq_ppcf128:
; P8: # %bb.0:
; P8-NEXT: fcmpu cr0, f2, f4
; P8-NEXT: fcmpu cr1, f1, f3
; P8-NEXT: fcmpu cr0, f1, f3
; P8-NEXT: li r3, 1
; P8-NEXT: cror 4*cr5+lt, eq, un
; P8-NEXT: cror 4*cr5+gt, 4*cr1+eq, 4*cr1+un
; P8-NEXT: crand 4*cr5+lt, 4*cr1+eq, 4*cr5+lt
; P8-NEXT: crandc 4*cr5+gt, 4*cr5+gt, 4*cr1+eq
; P8-NEXT: cror 4*cr5+gt, eq, un
; P8-NEXT: fcmpu cr1, f2, f4
; P8-NEXT: cror 4*cr5+lt, 4*cr1+eq, 4*cr1+un
; P8-NEXT: crand 4*cr5+lt, eq, 4*cr5+lt
; P8-NEXT: crandc 4*cr5+gt, 4*cr5+gt, eq
; P8-NEXT: crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
; P8-NEXT: isel r3, 0, r3, 4*cr5+lt
; P8-NEXT: blr
@@ -3094,13 +3094,13 @@ define i32 @fcmp_ueq_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
;
; NOVSX-LABEL: fcmp_ueq_ppcf128:
; NOVSX: # %bb.0:
; NOVSX-NEXT: fcmpu cr0, f2, f4
; NOVSX-NEXT: fcmpu cr1, f1, f3
; NOVSX-NEXT: fcmpu cr0, f1, f3
; NOVSX-NEXT: li r3, 1
; NOVSX-NEXT: cror 4*cr5+lt, eq, un
; NOVSX-NEXT: cror 4*cr5+gt, 4*cr1+eq, 4*cr1+un
; NOVSX-NEXT: crand 4*cr5+lt, 4*cr1+eq, 4*cr5+lt
; NOVSX-NEXT: crandc 4*cr5+gt, 4*cr5+gt, 4*cr1+eq
; NOVSX-NEXT: cror 4*cr5+gt, eq, un
; NOVSX-NEXT: fcmpu cr1, f2, f4
; NOVSX-NEXT: cror 4*cr5+lt, 4*cr1+eq, 4*cr1+un
; NOVSX-NEXT: crand 4*cr5+lt, eq, 4*cr5+lt
; NOVSX-NEXT: crandc 4*cr5+gt, 4*cr5+gt, eq
; NOVSX-NEXT: crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
; NOVSX-NEXT: isel r3, 0, r3, 4*cr5+lt
; NOVSX-NEXT: blr
@@ -3113,8 +3113,8 @@ define i32 @fcmp_une_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
; P8-LABEL: fcmp_une_ppcf128:
; P8: # %bb.0:
; P8-NEXT: fcmpu cr0, f2, f4
; P8-NEXT: fcmpu cr1, f1, f3
; P8-NEXT: li r3, 1
; P8-NEXT: fcmpu cr1, f1, f3
; P8-NEXT: crandc 4*cr5+lt, 4*cr1+eq, eq
; P8-NEXT: crandc 4*cr5+lt, 4*cr1+eq, 4*cr5+lt
; P8-NEXT: isel r3, 0, r3, 4*cr5+lt
@@ -3133,8 +3133,8 @@ define i32 @fcmp_une_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
; NOVSX-LABEL: fcmp_une_ppcf128:
; NOVSX: # %bb.0:
; NOVSX-NEXT: fcmpu cr0, f2, f4
; NOVSX-NEXT: fcmpu cr1, f1, f3
; NOVSX-NEXT: li r3, 1
; NOVSX-NEXT: fcmpu cr1, f1, f3
; NOVSX-NEXT: crandc 4*cr5+lt, 4*cr1+eq, eq
; NOVSX-NEXT: crandc 4*cr5+lt, 4*cr1+eq, 4*cr5+lt
; NOVSX-NEXT: isel r3, 0, r3, 4*cr5+lt
@@ -3148,10 +3148,10 @@ define i32 @fcmps_olt_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
; P8-LABEL: fcmps_olt_ppcf128:
; P8: # %bb.0:
; P8-NEXT: fcmpo cr0, f1, f3
; P8-NEXT: fcmpo cr1, f2, f4
; P8-NEXT: li r3, 1
; P8-NEXT: crand 4*cr5+lt, eq, 4*cr1+lt
; P8-NEXT: crandc 4*cr5+gt, lt, eq
; P8-NEXT: fcmpo cr1, f2, f4
; P8-NEXT: crand 4*cr5+lt, eq, 4*cr1+lt
; P8-NEXT: crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
; P8-NEXT: isel r3, 0, r3, 4*cr5+lt
; P8-NEXT: blr
@@ -3170,10 +3170,10 @@ define i32 @fcmps_olt_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
; NOVSX-LABEL: fcmps_olt_ppcf128:
; NOVSX: # %bb.0:
; NOVSX-NEXT: fcmpo cr0, f1, f3
; NOVSX-NEXT: fcmpo cr1, f2, f4
; NOVSX-NEXT: li r3, 1
; NOVSX-NEXT: crand 4*cr5+lt, eq, 4*cr1+lt
; NOVSX-NEXT: crandc 4*cr5+gt, lt, eq
; NOVSX-NEXT: fcmpo cr1, f2, f4
; NOVSX-NEXT: crand 4*cr5+lt, eq, 4*cr1+lt
; NOVSX-NEXT: crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
; NOVSX-NEXT: isel r3, 0, r3, 4*cr5+lt
; NOVSX-NEXT: blr
@@ -3186,12 +3186,12 @@ define i32 @fcmps_ole_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
; P8-LABEL: fcmps_ole_ppcf128:
; P8: # %bb.0:
; P8-NEXT: fcmpo cr0, f2, f4
; P8-NEXT: fcmpo cr1, f1, f3
; P8-NEXT: li r3, 1
; P8-NEXT: crnor 4*cr5+lt, un, gt
; P8-NEXT: crnor 4*cr5+gt, 4*cr1+un, 4*cr1+gt
; P8-NEXT: crand 4*cr5+lt, 4*cr1+eq, 4*cr5+lt
; P8-NEXT: crandc 4*cr5+gt, 4*cr5+gt, 4*cr1+eq
; P8-NEXT: fcmpo cr0, f1, f3
; P8-NEXT: crnor 4*cr5+gt, un, gt
; P8-NEXT: crand 4*cr5+lt, eq, 4*cr5+lt
; P8-NEXT: crandc 4*cr5+gt, 4*cr5+gt, eq
; P8-NEXT: crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
; P8-NEXT: isel r3, 0, r3, 4*cr5+lt
; P8-NEXT: blr
@@ -3212,12 +3212,12 @@ define i32 @fcmps_ole_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
; NOVSX-LABEL: fcmps_ole_ppcf128:
; NOVSX: # %bb.0:
; NOVSX-NEXT: fcmpo cr0, f2, f4
; NOVSX-NEXT: fcmpo cr1, f1, f3
; NOVSX-NEXT: li r3, 1
; NOVSX-NEXT: crnor 4*cr5+lt, un, gt
; NOVSX-NEXT: crnor 4*cr5+gt, 4*cr1+un, 4*cr1+gt
; NOVSX-NEXT: crand 4*cr5+lt, 4*cr1+eq, 4*cr5+lt
; NOVSX-NEXT: crandc 4*cr5+gt, 4*cr5+gt, 4*cr1+eq
; NOVSX-NEXT: fcmpo cr0, f1, f3
; NOVSX-NEXT: crnor 4*cr5+gt, un, gt
; NOVSX-NEXT: crand 4*cr5+lt, eq, 4*cr5+lt
; NOVSX-NEXT: crandc 4*cr5+gt, 4*cr5+gt, eq
; NOVSX-NEXT: crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
; NOVSX-NEXT: isel r3, 0, r3, 4*cr5+lt
; NOVSX-NEXT: blr
@@ -3230,10 +3230,10 @@ define i32 @fcmps_ogt_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
; P8-LABEL: fcmps_ogt_ppcf128:
; P8: # %bb.0:
; P8-NEXT: fcmpo cr0, f1, f3
; P8-NEXT: fcmpo cr1, f2, f4
; P8-NEXT: li r3, 1
; P8-NEXT: crand 4*cr5+lt, eq, 4*cr1+gt
; P8-NEXT: crandc 4*cr5+gt, gt, eq
; P8-NEXT: fcmpo cr1, f2, f4
; P8-NEXT: crand 4*cr5+lt, eq, 4*cr1+gt
; P8-NEXT: crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
; P8-NEXT: isel r3, 0, r3, 4*cr5+lt
; P8-NEXT: blr
@@ -3252,10 +3252,10 @@ define i32 @fcmps_ogt_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
; NOVSX-LABEL: fcmps_ogt_ppcf128:
; NOVSX: # %bb.0:
; NOVSX-NEXT: fcmpo cr0, f1, f3
; NOVSX-NEXT: fcmpo cr1, f2, f4
; NOVSX-NEXT: li r3, 1
; NOVSX-NEXT: crand 4*cr5+lt, eq, 4*cr1+gt
; NOVSX-NEXT: crandc 4*cr5+gt, gt, eq
; NOVSX-NEXT: fcmpo cr1, f2, f4
; NOVSX-NEXT: crand 4*cr5+lt, eq, 4*cr1+gt
; NOVSX-NEXT: crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
; NOVSX-NEXT: isel r3, 0, r3, 4*cr5+lt
; NOVSX-NEXT: blr
@@ -3268,12 +3268,12 @@ define i32 @fcmps_oge_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
; P8-LABEL: fcmps_oge_ppcf128:
; P8: # %bb.0:
; P8-NEXT: fcmpo cr0, f2, f4
; P8-NEXT: fcmpo cr1, f1, f3
; P8-NEXT: li r3, 1
; P8-NEXT: crnor 4*cr5+lt, un, lt
; P8-NEXT: crnor 4*cr5+gt, 4*cr1+un, 4*cr1+lt
; P8-NEXT: crand 4*cr5+lt, 4*cr1+eq, 4*cr5+lt
; P8-NEXT: crandc 4*cr5+gt, 4*cr5+gt, 4*cr1+eq
; P8-NEXT: fcmpo cr0, f1, f3
; P8-NEXT: crnor 4*cr5+gt, un, lt
; P8-NEXT: crand 4*cr5+lt, eq, 4*cr5+lt
; P8-NEXT: crandc 4*cr5+gt, 4*cr5+gt, eq
; P8-NEXT: crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
; P8-NEXT: isel r3, 0, r3, 4*cr5+lt
; P8-NEXT: blr
@@ -3294,12 +3294,12 @@ define i32 @fcmps_oge_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
; NOVSX-LABEL: fcmps_oge_ppcf128:
; NOVSX: # %bb.0:
; NOVSX-NEXT: fcmpo cr0, f2, f4
; NOVSX-NEXT: fcmpo cr1, f1, f3
; NOVSX-NEXT: li r3, 1
; NOVSX-NEXT: crnor 4*cr5+lt, un, lt
; NOVSX-NEXT: crnor 4*cr5+gt, 4*cr1+un, 4*cr1+lt
; NOVSX-NEXT: crand 4*cr5+lt, 4*cr1+eq, 4*cr5+lt
; NOVSX-NEXT: crandc 4*cr5+gt, 4*cr5+gt, 4*cr1+eq
; NOVSX-NEXT: fcmpo cr0, f1, f3
; NOVSX-NEXT: crnor 4*cr5+gt, un, lt
; NOVSX-NEXT: crand 4*cr5+lt, eq, 4*cr5+lt
; NOVSX-NEXT: crandc 4*cr5+gt, 4*cr5+gt, eq
; NOVSX-NEXT: crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
; NOVSX-NEXT: isel r3, 0, r3, 4*cr5+lt
; NOVSX-NEXT: blr
@@ -3312,10 +3312,10 @@ define i32 @fcmps_oeq_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
; P8-LABEL: fcmps_oeq_ppcf128:
; P8: # %bb.0:
; P8-NEXT: fcmpo cr0, f1, f3
; P8-NEXT: fcmpo cr1, f2, f4
; P8-NEXT: li r3, 1
; P8-NEXT: crand 4*cr5+lt, eq, 4*cr1+eq
; P8-NEXT: crandc 4*cr5+gt, eq, eq
; P8-NEXT: fcmpo cr1, f2, f4
; P8-NEXT: crand 4*cr5+lt, eq, 4*cr1+eq
; P8-NEXT: crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
; P8-NEXT: isel r3, 0, r3, 4*cr5+lt
; P8-NEXT: blr
@@ -3334,10 +3334,10 @@ define i32 @fcmps_oeq_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
; NOVSX-LABEL: fcmps_oeq_ppcf128:
; NOVSX: # %bb.0:
; NOVSX-NEXT: fcmpo cr0, f1, f3
; NOVSX-NEXT: fcmpo cr1, f2, f4
; NOVSX-NEXT: li r3, 1
; NOVSX-NEXT: crand 4*cr5+lt, eq, 4*cr1+eq
; NOVSX-NEXT: crandc 4*cr5+gt, eq, eq
; NOVSX-NEXT: fcmpo cr1, f2, f4
; NOVSX-NEXT: crand 4*cr5+lt, eq, 4*cr1+eq
; NOVSX-NEXT: crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
; NOVSX-NEXT: isel r3, 0, r3, 4*cr5+lt
; NOVSX-NEXT: blr
@@ -3350,12 +3350,12 @@ define i32 @fcmps_one_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
; P8-LABEL: fcmps_one_ppcf128:
; P8: # %bb.0:
; P8-NEXT: fcmpo cr0, f2, f4
; P8-NEXT: fcmpo cr1, f1, f3
; P8-NEXT: li r3, 1
; P8-NEXT: crnor 4*cr5+lt, un, eq
; P8-NEXT: crnor 4*cr5+gt, 4*cr1+un, 4*cr1+eq
; P8-NEXT: crand 4*cr5+lt, 4*cr1+eq, 4*cr5+lt
; P8-NEXT: crandc 4*cr5+gt, 4*cr5+gt, 4*cr1+eq
; P8-NEXT: fcmpo cr0, f1, f3
; P8-NEXT: crnor 4*cr5+gt, un, eq
; P8-NEXT: crand 4*cr5+lt, eq, 4*cr5+lt
; P8-NEXT: crandc 4*cr5+gt, 4*cr5+gt, eq
; P8-NEXT: crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
; P8-NEXT: isel r3, 0, r3, 4*cr5+lt
; P8-NEXT: blr
@@ -3376,12 +3376,12 @@ define i32 @fcmps_one_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
; NOVSX-LABEL: fcmps_one_ppcf128:
; NOVSX: # %bb.0:
; NOVSX-NEXT: fcmpo cr0, f2, f4
; NOVSX-NEXT: fcmpo cr1, f1, f3
; NOVSX-NEXT: li r3, 1
; NOVSX-NEXT: crnor 4*cr5+lt, un, eq
; NOVSX-NEXT: crnor 4*cr5+gt, 4*cr1+un, 4*cr1+eq
; NOVSX-NEXT: crand 4*cr5+lt, 4*cr1+eq, 4*cr5+lt
; NOVSX-NEXT: crandc 4*cr5+gt, 4*cr5+gt, 4*cr1+eq
; NOVSX-NEXT: fcmpo cr0, f1, f3
; NOVSX-NEXT: crnor 4*cr5+gt, un, eq
; NOVSX-NEXT: crand 4*cr5+lt, eq, 4*cr5+lt
; NOVSX-NEXT: crandc 4*cr5+gt, 4*cr5+gt, eq
; NOVSX-NEXT: crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
; NOVSX-NEXT: isel r3, 0, r3, 4*cr5+lt
; NOVSX-NEXT: blr
@@ -3393,13 +3393,13 @@ define i32 @fcmps_one_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
define i32 @fcmps_ult_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
; P8-LABEL: fcmps_ult_ppcf128:
; P8: # %bb.0:
; P8-NEXT: fcmpo cr0, f2, f4
; P8-NEXT: fcmpo cr1, f1, f3
; P8-NEXT: fcmpo cr0, f1, f3
; P8-NEXT: li r3, 1
; P8-NEXT: cror 4*cr5+lt, lt, un
; P8-NEXT: cror 4*cr5+gt, 4*cr1+lt, 4*cr1+un
; P8-NEXT: crand 4*cr5+lt, 4*cr1+eq, 4*cr5+lt
; P8-NEXT: crandc 4*cr5+gt, 4*cr5+gt, 4*cr1+eq
; P8-NEXT: cror 4*cr5+gt, lt, un
; P8-NEXT: fcmpo cr1, f2, f4
; P8-NEXT: cror 4*cr5+lt, 4*cr1+lt, 4*cr1+un
; P8-NEXT: crand 4*cr5+lt, eq, 4*cr5+lt
; P8-NEXT: crandc 4*cr5+gt, 4*cr5+gt, eq
; P8-NEXT: crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
; P8-NEXT: isel r3, 0, r3, 4*cr5+lt
; P8-NEXT: blr
@@ -3419,13 +3419,13 @@ define i32 @fcmps_ult_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
;
; NOVSX-LABEL: fcmps_ult_ppcf128:
; NOVSX: # %bb.0:
; NOVSX-NEXT: fcmpo cr0, f2, f4
; NOVSX-NEXT: fcmpo cr1, f1, f3
; NOVSX-NEXT: fcmpo cr0, f1, f3
; NOVSX-NEXT: li r3, 1
; NOVSX-NEXT: cror 4*cr5+lt, lt, un
; NOVSX-NEXT: cror 4*cr5+gt, 4*cr1+lt, 4*cr1+un
; NOVSX-NEXT: crand 4*cr5+lt, 4*cr1+eq, 4*cr5+lt
; NOVSX-NEXT: crandc 4*cr5+gt, 4*cr5+gt, 4*cr1+eq
; NOVSX-NEXT: cror 4*cr5+gt, lt, un
; NOVSX-NEXT: fcmpo cr1, f2, f4
; NOVSX-NEXT: cror 4*cr5+lt, 4*cr1+lt, 4*cr1+un
; NOVSX-NEXT: crand 4*cr5+lt, eq, 4*cr5+lt
; NOVSX-NEXT: crandc 4*cr5+gt, 4*cr5+gt, eq
; NOVSX-NEXT: crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
; NOVSX-NEXT: isel r3, 0, r3, 4*cr5+lt
; NOVSX-NEXT: blr
@@ -3438,8 +3438,8 @@ define i32 @fcmps_ule_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
; P8-LABEL: fcmps_ule_ppcf128:
; P8: # %bb.0:
; P8-NEXT: fcmpo cr0, f2, f4
; P8-NEXT: fcmpo cr1, f1, f3
; P8-NEXT: li r3, 1
; P8-NEXT: fcmpo cr1, f1, f3
; P8-NEXT: crandc 4*cr5+lt, 4*cr1+eq, gt
; P8-NEXT: crnor 4*cr5+gt, 4*cr1+gt, 4*cr1+eq
; P8-NEXT: crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
@@ -3460,8 +3460,8 @@ define i32 @fcmps_ule_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
; NOVSX-LABEL: fcmps_ule_ppcf128:
; NOVSX: # %bb.0:
; NOVSX-NEXT: fcmpo cr0, f2, f4
; NOVSX-NEXT: fcmpo cr1, f1, f3
; NOVSX-NEXT: li r3, 1
; NOVSX-NEXT: fcmpo cr1, f1, f3
; NOVSX-NEXT: crandc 4*cr5+lt, 4*cr1+eq, gt
; NOVSX-NEXT: crnor 4*cr5+gt, 4*cr1+gt, 4*cr1+eq
; NOVSX-NEXT: crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
@@ -3475,13 +3475,13 @@ define i32 @fcmps_ule_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
define i32 @fcmps_ugt_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
; P8-LABEL: fcmps_ugt_ppcf128:
; P8: # %bb.0:
; P8-NEXT: fcmpo cr0, f2, f4
; P8-NEXT: fcmpo cr1, f1, f3
; P8-NEXT: fcmpo cr0, f1, f3
; P8-NEXT: li r3, 1
; P8-NEXT: cror 4*cr5+lt, gt, un
; P8-NEXT: cror 4*cr5+gt, 4*cr1+gt, 4*cr1+un
; P8-NEXT: crand 4*cr5+lt, 4*cr1+eq, 4*cr5+lt
; P8-NEXT: crandc 4*cr5+gt, 4*cr5+gt, 4*cr1+eq
; P8-NEXT: cror 4*cr5+gt, gt, un
; P8-NEXT: fcmpo cr1, f2, f4
; P8-NEXT: cror 4*cr5+lt, 4*cr1+gt, 4*cr1+un
; P8-NEXT: crand 4*cr5+lt, eq, 4*cr5+lt
; P8-NEXT: crandc 4*cr5+gt, 4*cr5+gt, eq
; P8-NEXT: crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
; P8-NEXT: isel r3, 0, r3, 4*cr5+lt
; P8-NEXT: blr
@@ -3501,13 +3501,13 @@ define i32 @fcmps_ugt_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
;
; NOVSX-LABEL: fcmps_ugt_ppcf128:
; NOVSX: # %bb.0:
; NOVSX-NEXT: fcmpo cr0, f2, f4
; NOVSX-NEXT: fcmpo cr1, f1, f3
; NOVSX-NEXT: fcmpo cr0, f1, f3
; NOVSX-NEXT: li r3, 1
; NOVSX-NEXT: cror 4*cr5+lt, gt, un
; NOVSX-NEXT: cror 4*cr5+gt, 4*cr1+gt, 4*cr1+un
; NOVSX-NEXT: crand 4*cr5+lt, 4*cr1+eq, 4*cr5+lt
; NOVSX-NEXT: crandc 4*cr5+gt, 4*cr5+gt, 4*cr1+eq
; NOVSX-NEXT: cror 4*cr5+gt, gt, un
; NOVSX-NEXT: fcmpo cr1, f2, f4
; NOVSX-NEXT: cror 4*cr5+lt, 4*cr1+gt, 4*cr1+un
; NOVSX-NEXT: crand 4*cr5+lt, eq, 4*cr5+lt
; NOVSX-NEXT: crandc 4*cr5+gt, 4*cr5+gt, eq
; NOVSX-NEXT: crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
; NOVSX-NEXT: isel r3, 0, r3, 4*cr5+lt
; NOVSX-NEXT: blr
@@ -3520,8 +3520,8 @@ define i32 @fcmps_uge_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
; P8-LABEL: fcmps_uge_ppcf128:
; P8: # %bb.0:
; P8-NEXT: fcmpo cr0, f2, f4
; P8-NEXT: fcmpo cr1, f1, f3
; P8-NEXT: li r3, 1
; P8-NEXT: fcmpo cr1, f1, f3
; P8-NEXT: crandc 4*cr5+lt, 4*cr1+eq, lt
; P8-NEXT: crnor 4*cr5+gt, 4*cr1+lt, 4*cr1+eq
; P8-NEXT: crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
@@ -3542,8 +3542,8 @@ define i32 @fcmps_uge_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
; NOVSX-LABEL: fcmps_uge_ppcf128:
; NOVSX: # %bb.0:
; NOVSX-NEXT: fcmpo cr0, f2, f4
; NOVSX-NEXT: fcmpo cr1, f1, f3
; NOVSX-NEXT: li r3, 1
; NOVSX-NEXT: fcmpo cr1, f1, f3
; NOVSX-NEXT: crandc 4*cr5+lt, 4*cr1+eq, lt
; NOVSX-NEXT: crnor 4*cr5+gt, 4*cr1+lt, 4*cr1+eq
; NOVSX-NEXT: crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
@@ -3557,13 +3557,13 @@ define i32 @fcmps_uge_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
define i32 @fcmps_ueq_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
; P8-LABEL: fcmps_ueq_ppcf128:
; P8: # %bb.0:
; P8-NEXT: fcmpo cr0, f2, f4
; P8-NEXT: fcmpo cr1, f1, f3
; P8-NEXT: fcmpo cr0, f1, f3
; P8-NEXT: li r3, 1
; P8-NEXT: cror 4*cr5+lt, eq, un
; P8-NEXT: cror 4*cr5+gt, 4*cr1+eq, 4*cr1+un
; P8-NEXT: crand 4*cr5+lt, 4*cr1+eq, 4*cr5+lt
; P8-NEXT: crandc 4*cr5+gt, 4*cr5+gt, 4*cr1+eq
; P8-NEXT: cror 4*cr5+gt, eq, un
; P8-NEXT: fcmpo cr1, f2, f4
; P8-NEXT: cror 4*cr5+lt, 4*cr1+eq, 4*cr1+un
; P8-NEXT: crand 4*cr5+lt, eq, 4*cr5+lt
; P8-NEXT: crandc 4*cr5+gt, 4*cr5+gt, eq
; P8-NEXT: crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
; P8-NEXT: isel r3, 0, r3, 4*cr5+lt
; P8-NEXT: blr
@@ -3583,13 +3583,13 @@ define i32 @fcmps_ueq_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
;
; NOVSX-LABEL: fcmps_ueq_ppcf128:
; NOVSX: # %bb.0:
; NOVSX-NEXT: fcmpo cr0, f2, f4
; NOVSX-NEXT: fcmpo cr1, f1, f3
; NOVSX-NEXT: fcmpo cr0, f1, f3
; NOVSX-NEXT: li r3, 1
; NOVSX-NEXT: cror 4*cr5+lt, eq, un
; NOVSX-NEXT: cror 4*cr5+gt, 4*cr1+eq, 4*cr1+un
; NOVSX-NEXT: crand 4*cr5+lt, 4*cr1+eq, 4*cr5+lt
; NOVSX-NEXT: crandc 4*cr5+gt, 4*cr5+gt, 4*cr1+eq
; NOVSX-NEXT: cror 4*cr5+gt, eq, un
; NOVSX-NEXT: fcmpo cr1, f2, f4
; NOVSX-NEXT: cror 4*cr5+lt, 4*cr1+eq, 4*cr1+un
; NOVSX-NEXT: crand 4*cr5+lt, eq, 4*cr5+lt
; NOVSX-NEXT: crandc 4*cr5+gt, 4*cr5+gt, eq
; NOVSX-NEXT: crnor 4*cr5+lt, 4*cr5+gt, 4*cr5+lt
; NOVSX-NEXT: isel r3, 0, r3, 4*cr5+lt
; NOVSX-NEXT: blr
@@ -3602,8 +3602,8 @@ define i32 @fcmps_une_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
; P8-LABEL: fcmps_une_ppcf128:
; P8: # %bb.0:
; P8-NEXT: fcmpo cr0, f2, f4
; P8-NEXT: fcmpo cr1, f1, f3
; P8-NEXT: li r3, 1
; P8-NEXT: fcmpo cr1, f1, f3
; P8-NEXT: crandc 4*cr5+lt, 4*cr1+eq, eq
; P8-NEXT: crandc 4*cr5+lt, 4*cr1+eq, 4*cr5+lt
; P8-NEXT: isel r3, 0, r3, 4*cr5+lt
@@ -3622,8 +3622,8 @@ define i32 @fcmps_une_ppcf128(ppc_fp128 %a, ppc_fp128 %b) #0 {
; NOVSX-LABEL: fcmps_une_ppcf128:
; NOVSX: # %bb.0:
; NOVSX-NEXT: fcmpo cr0, f2, f4
; NOVSX-NEXT: fcmpo cr1, f1, f3
; NOVSX-NEXT: li r3, 1
; NOVSX-NEXT: fcmpo cr1, f1, f3
; NOVSX-NEXT: crandc 4*cr5+lt, 4*cr1+eq, eq
; NOVSX-NEXT: crandc 4*cr5+lt, 4*cr1+eq, 4*cr5+lt
; NOVSX-NEXT: isel r3, 0, r3, 4*cr5+lt

View File

@@ -215,11 +215,11 @@ define <4 x float> @nearbyint_v4f32(<4 x float> %vf1, <4 x float> %vf2) strictfp
; P8-NEXT: .cfi_offset v31, -16
; P8-NEXT: xxsldwi vs0, v2, v2, 3
; P8-NEXT: li r3, 128
; P8-NEXT: xscvspdpn f1, vs0
; P8-NEXT: stxvd2x v29, r1, r3 # 16-byte Folded Spill
; P8-NEXT: li r3, 144
; P8-NEXT: stxvd2x v30, r1, r3 # 16-byte Folded Spill
; P8-NEXT: li r3, 160
; P8-NEXT: xscvspdpn f1, vs0
; P8-NEXT: stxvd2x v31, r1, r3 # 16-byte Folded Spill
; P8-NEXT: vmr v31, v2
; P8-NEXT: bl nearbyintf
@@ -243,11 +243,11 @@ define <4 x float> @nearbyint_v4f32(<4 x float> %vf1, <4 x float> %vf2) strictfp
; P8-NEXT: # kill: def $f1 killed $f1 def $vsl1
; P8-NEXT: xxmrghd vs0, v30, vs1
; P8-NEXT: li r3, 160
; P8-NEXT: xvcvdpsp v2, vs0
; P8-NEXT: lxvd2x v31, r1, r3 # 16-byte Folded Reload
; P8-NEXT: li r3, 144
; P8-NEXT: lxvd2x v30, r1, r3 # 16-byte Folded Reload
; P8-NEXT: li r3, 128
; P8-NEXT: xvcvdpsp v2, vs0
; P8-NEXT: vmrgew v2, v2, v29
; P8-NEXT: lxvd2x v29, r1, r3 # 16-byte Folded Reload
; P8-NEXT: addi r1, r1, 176
@@ -380,14 +380,14 @@ define <4 x double> @fpext_v4f64_v4f32(<4 x float> %vf1) strictfp {
; P8-LABEL: fpext_v4f64_v4f32:
; P8: # %bb.0:
; P8-NEXT: xxsldwi vs0, v2, v2, 1
; P8-NEXT: xscvspdpn f3, v2
; P8-NEXT: xxsldwi vs1, v2, v2, 3
; P8-NEXT: xxswapd vs3, v2
; P8-NEXT: xscvspdpn f2, v2
; P8-NEXT: xxswapd vs2, v2
; P8-NEXT: xscvspdpn f0, vs0
; P8-NEXT: xscvspdpn f1, vs1
; P8-NEXT: xscvspdpn f3, vs3
; P8-NEXT: xxmrghd v2, vs2, vs0
; P8-NEXT: xxmrghd v3, vs3, vs1
; P8-NEXT: xxmrghd v2, vs3, vs0
; P8-NEXT: xscvspdpn f0, vs1
; P8-NEXT: xscvspdpn f1, vs2
; P8-NEXT: xxmrghd v3, vs1, vs0
; P8-NEXT: blr
;
; P9-LABEL: fpext_v4f64_v4f32:

View File

@@ -90,9 +90,9 @@ define <4 x float> @fadd_v4f32(<4 x float> %vf1, <4 x float> %vf2) #0 {
; NOVSX-LABEL: fadd_v4f32:
; NOVSX: # %bb.0:
; NOVSX-NEXT: addi r3, r1, -32
; NOVSX-NEXT: addi r4, r1, -48
; NOVSX-NEXT: stvx v3, 0, r3
; NOVSX-NEXT: stvx v2, 0, r4
; NOVSX-NEXT: addi r3, r1, -48
; NOVSX-NEXT: stvx v2, 0, r3
; NOVSX-NEXT: addi r3, r1, -16
; NOVSX-NEXT: lfs f0, -20(r1)
; NOVSX-NEXT: lfs f1, -36(r1)
@@ -216,9 +216,9 @@ define <4 x float> @fsub_v4f32(<4 x float> %vf1, <4 x float> %vf2) #0 {
; NOVSX-LABEL: fsub_v4f32:
; NOVSX: # %bb.0:
; NOVSX-NEXT: addi r3, r1, -32
; NOVSX-NEXT: addi r4, r1, -48
; NOVSX-NEXT: stvx v3, 0, r3
; NOVSX-NEXT: stvx v2, 0, r4
; NOVSX-NEXT: addi r3, r1, -48
; NOVSX-NEXT: stvx v2, 0, r3
; NOVSX-NEXT: addi r3, r1, -16
; NOVSX-NEXT: lfs f0, -20(r1)
; NOVSX-NEXT: lfs f1, -36(r1)
@@ -342,9 +342,9 @@ define <4 x float> @fmul_v4f32(<4 x float> %vf1, <4 x float> %vf2) #0 {
; NOVSX-LABEL: fmul_v4f32:
; NOVSX: # %bb.0:
; NOVSX-NEXT: addi r3, r1, -32
; NOVSX-NEXT: addi r4, r1, -48
; NOVSX-NEXT: stvx v3, 0, r3
; NOVSX-NEXT: stvx v2, 0, r4
; NOVSX-NEXT: addi r3, r1, -48
; NOVSX-NEXT: stvx v2, 0, r3
; NOVSX-NEXT: addi r3, r1, -16
; NOVSX-NEXT: lfs f0, -20(r1)
; NOVSX-NEXT: lfs f1, -36(r1)
@@ -468,9 +468,9 @@ define <4 x float> @fdiv_v4f32(<4 x float> %vf1, <4 x float> %vf2) #0 {
; NOVSX-LABEL: fdiv_v4f32:
; NOVSX: # %bb.0:
; NOVSX-NEXT: addi r3, r1, -32
; NOVSX-NEXT: addi r4, r1, -48
; NOVSX-NEXT: stvx v3, 0, r3
; NOVSX-NEXT: stvx v2, 0, r4
; NOVSX-NEXT: addi r3, r1, -48
; NOVSX-NEXT: stvx v2, 0, r3
; NOVSX-NEXT: addi r3, r1, -16
; NOVSX-NEXT: lfs f0, -20(r1)
; NOVSX-NEXT: lfs f1, -36(r1)
@@ -649,10 +649,10 @@ define <4 x float> @fmadd_v4f32(<4 x float> %vf0, <4 x float> %vf1, <4 x float>
; NOVSX-LABEL: fmadd_v4f32:
; NOVSX: # %bb.0:
; NOVSX-NEXT: addi r3, r1, -32
; NOVSX-NEXT: addi r4, r1, -48
; NOVSX-NEXT: stvx v4, 0, r3
; NOVSX-NEXT: addi r3, r1, -48
; NOVSX-NEXT: stvx v3, 0, r3
; NOVSX-NEXT: addi r3, r1, -64
; NOVSX-NEXT: stvx v3, 0, r4
; NOVSX-NEXT: stvx v2, 0, r3
; NOVSX-NEXT: addi r3, r1, -16
; NOVSX-NEXT: lfs f0, -20(r1)
@@ -912,12 +912,12 @@ define <4 x float> @fmsub_v4f32(<4 x float> %vf0, <4 x float> %vf1, <4 x float>
; NOVSX: # %bb.0:
; NOVSX-NEXT: vspltisb v5, -1
; NOVSX-NEXT: addi r3, r1, -48
; NOVSX-NEXT: addi r4, r1, -64
; NOVSX-NEXT: stvx v3, 0, r3
; NOVSX-NEXT: addi r3, r1, -32
; NOVSX-NEXT: stvx v2, 0, r4
; NOVSX-NEXT: vslw v5, v5, v5
; NOVSX-NEXT: stvx v3, 0, r3
; NOVSX-NEXT: addi r3, r1, -64
; NOVSX-NEXT: vsubfp v4, v5, v4
; NOVSX-NEXT: stvx v2, 0, r3
; NOVSX-NEXT: addi r3, r1, -32
; NOVSX-NEXT: stvx v4, 0, r3
; NOVSX-NEXT: addi r3, r1, -16
; NOVSX-NEXT: lfs f0, -36(r1)
@@ -1184,17 +1184,17 @@ define <4 x float> @fnmadd_v4f32(<4 x float> %vf0, <4 x float> %vf1, <4 x float>
; NOVSX-LABEL: fnmadd_v4f32:
; NOVSX: # %bb.0:
; NOVSX-NEXT: addi r3, r1, -32
; NOVSX-NEXT: addi r4, r1, -48
; NOVSX-NEXT: vspltisb v5, -1
; NOVSX-NEXT: stvx v4, 0, r3
; NOVSX-NEXT: addi r3, r1, -48
; NOVSX-NEXT: stvx v3, 0, r3
; NOVSX-NEXT: addi r3, r1, -64
; NOVSX-NEXT: stvx v3, 0, r4
; NOVSX-NEXT: vslw v3, v5, v5
; NOVSX-NEXT: stvx v2, 0, r3
; NOVSX-NEXT: vspltisb v2, -1
; NOVSX-NEXT: addi r3, r1, -16
; NOVSX-NEXT: lfs f0, -20(r1)
; NOVSX-NEXT: lfs f1, -36(r1)
; NOVSX-NEXT: lfs f2, -52(r1)
; NOVSX-NEXT: vslw v2, v2, v2
; NOVSX-NEXT: fmadds f0, f2, f1, f0
; NOVSX-NEXT: lfs f1, -40(r1)
; NOVSX-NEXT: lfs f2, -56(r1)
@@ -1212,8 +1212,8 @@ define <4 x float> @fnmadd_v4f32(<4 x float> %vf0, <4 x float> %vf1, <4 x float>
; NOVSX-NEXT: lfs f0, -32(r1)
; NOVSX-NEXT: fmadds f0, f2, f1, f0
; NOVSX-NEXT: stfs f0, -16(r1)
; NOVSX-NEXT: lvx v3, 0, r3
; NOVSX-NEXT: vsubfp v2, v2, v3
; NOVSX-NEXT: lvx v2, 0, r3
; NOVSX-NEXT: vsubfp v2, v3, v2
; NOVSX-NEXT: blr
;
; SPE-LABEL: fnmadd_v4f32:
@@ -1459,12 +1459,12 @@ define <4 x float> @fnmsub_v4f32(<4 x float> %vf0, <4 x float> %vf1, <4 x float>
; NOVSX: # %bb.0:
; NOVSX-NEXT: vspltisb v5, -1
; NOVSX-NEXT: addi r3, r1, -48
; NOVSX-NEXT: addi r4, r1, -64
; NOVSX-NEXT: stvx v3, 0, r3
; NOVSX-NEXT: addi r3, r1, -32
; NOVSX-NEXT: stvx v2, 0, r4
; NOVSX-NEXT: vslw v5, v5, v5
; NOVSX-NEXT: stvx v3, 0, r3
; NOVSX-NEXT: addi r3, r1, -64
; NOVSX-NEXT: vsubfp v4, v5, v4
; NOVSX-NEXT: stvx v2, 0, r3
; NOVSX-NEXT: addi r3, r1, -32
; NOVSX-NEXT: stvx v4, 0, r3
; NOVSX-NEXT: addi r3, r1, -16
; NOVSX-NEXT: lfs f0, -36(r1)

View File

@@ -49,12 +49,12 @@ entry:
define i128 @test_neg(ppc_fp128 %x) nounwind {
; PPC64-P8-LABEL: test_neg:
; PPC64-P8: # %bb.0: # %entry
; PPC64-P8-NEXT: li 3, 1
; PPC64-P8-NEXT: mffprd 4, 2
; PPC64-P8-NEXT: mffprd 5, 1
; PPC64-P8-NEXT: rldic 6, 3, 63, 0
; PPC64-P8-NEXT: xor 4, 4, 6
; PPC64-P8-NEXT: xor 3, 5, 6
; PPC64-P8-NEXT: mffprd 3, 1
; PPC64-P8-NEXT: li 5, 1
; PPC64-P8-NEXT: rldic 5, 5, 63, 0
; PPC64-P8-NEXT: xor 3, 3, 5
; PPC64-P8-NEXT: xor 4, 4, 5
; PPC64-P8-NEXT: blr
;
; PPC64-LABEL: test_neg:
@@ -199,13 +199,13 @@ define i128 @test_copysign_const(ppc_fp128 %x) nounwind {
; PPC64-P8-LABEL: test_copysign_const:
; PPC64-P8: # %bb.0: # %entry
; PPC64-P8-NEXT: mffprd 3, 1
; PPC64-P8-NEXT: li 4, 16399
; PPC64-P8-NEXT: li 5, 3019
; PPC64-P8-NEXT: rldicr 6, 3, 0, 0
; PPC64-P8-NEXT: rldic 3, 4, 48, 1
; PPC64-P8-NEXT: rldic 4, 5, 52, 0
; PPC64-P8-NEXT: or 3, 6, 3
; PPC64-P8-NEXT: xor 4, 6, 4
; PPC64-P8-NEXT: rldic 5, 5, 52, 0
; PPC64-P8-NEXT: rldicr 4, 3, 0, 0
; PPC64-P8-NEXT: li 3, 16399
; PPC64-P8-NEXT: rldic 3, 3, 48, 1
; PPC64-P8-NEXT: or 3, 4, 3
; PPC64-P8-NEXT: xor 4, 4, 5
; PPC64-P8-NEXT: blr
;
; PPC64-LABEL: test_copysign_const:

View File

@@ -65,9 +65,9 @@ define dso_local void @callmtfsf(i32 zeroext %a) local_unnamed_addr {
;
; CHECK-AIX32-LABEL: callmtfsf:
; CHECK-AIX32: # %bb.0: # %entry
; CHECK-AIX32-NEXT: addi 4, 1, -4
; CHECK-AIX32-NEXT: stw 3, -4(1)
; CHECK-AIX32-NEXT: lfiwzx 0, 0, 4
; CHECK-AIX32-NEXT: addi 3, 1, -4
; CHECK-AIX32-NEXT: lfiwzx 0, 0, 3
; CHECK-AIX32-NEXT: xscvuxddp 0, 0
; CHECK-AIX32-NEXT: mtfsf 7, 0
; CHECK-AIX32-NEXT: blr

View File

@@ -43,10 +43,10 @@ define i32 @foo() {
; PPC64LE-NEXT: mffs 0
; PPC64LE-NEXT: stfd 0, -16(1)
; PPC64LE-NEXT: lwz 3, -16(1)
; PPC64LE-NEXT: not 4, 3
; PPC64LE-NEXT: clrlwi 3, 3, 30
; PPC64LE-NEXT: rlwinm 4, 4, 31, 31, 31
; PPC64LE-NEXT: xor 3, 3, 4
; PPC64LE-NEXT: clrlwi 4, 3, 30
; PPC64LE-NEXT: not 3, 3
; PPC64LE-NEXT: rlwinm 3, 3, 31, 31, 31
; PPC64LE-NEXT: xor 3, 4, 3
; PPC64LE-NEXT: stw 3, -8(1)
; PPC64LE-NEXT: stw 3, -4(1)
; PPC64LE-NEXT: blr
@@ -55,10 +55,10 @@ define i32 @foo() {
; DM: # %bb.0: # %entry
; DM-NEXT: mffs 0
; DM-NEXT: mffprd 3, 0
; DM-NEXT: not 4, 3
; DM-NEXT: clrlwi 3, 3, 30
; DM-NEXT: rlwinm 4, 4, 31, 31, 31
; DM-NEXT: xor 3, 3, 4
; DM-NEXT: clrlwi 4, 3, 30
; DM-NEXT: not 3, 3
; DM-NEXT: rlwinm 3, 3, 31, 31, 31
; DM-NEXT: xor 3, 4, 3
; DM-NEXT: stw 3, -8(1)
; DM-NEXT: stw 3, -4(1)
; DM-NEXT: blr

View File

@@ -50,27 +50,16 @@ define i64 @rotl_i64_const_shift(i64 %x) {
; When first 2 operands match, it's a rotate (by variable amount).
define i16 @rotl_i16(i16 %x, i16 %z) {
; CHECK32-LABEL: rotl_i16:
; CHECK32: # %bb.0:
; CHECK32-NEXT: clrlwi 6, 4, 28
; CHECK32-NEXT: neg 4, 4
; CHECK32-NEXT: clrlwi 5, 3, 16
; CHECK32-NEXT: clrlwi 4, 4, 28
; CHECK32-NEXT: slw 3, 3, 6
; CHECK32-NEXT: srw 4, 5, 4
; CHECK32-NEXT: or 3, 3, 4
; CHECK32-NEXT: blr
;
; CHECK64-LABEL: rotl_i16:
; CHECK64: # %bb.0:
; CHECK64-NEXT: neg 5, 4
; CHECK64-NEXT: clrlwi 6, 3, 16
; CHECK64-NEXT: clrlwi 4, 4, 28
; CHECK64-NEXT: clrlwi 5, 5, 28
; CHECK64-NEXT: slw 3, 3, 4
; CHECK64-NEXT: srw 4, 6, 5
; CHECK64-NEXT: or 3, 3, 4
; CHECK64-NEXT: blr
; CHECK-LABEL: rotl_i16:
; CHECK: # %bb.0:
; CHECK-NEXT: clrlwi 6, 4, 28
; CHECK-NEXT: neg 4, 4
; CHECK-NEXT: clrlwi 5, 3, 16
; CHECK-NEXT: clrlwi 4, 4, 28
; CHECK-NEXT: slw 3, 3, 6
; CHECK-NEXT: srw 4, 5, 4
; CHECK-NEXT: or 3, 3, 4
; CHECK-NEXT: blr
%f = call i16 @llvm.fshl.i16(i16 %x, i16 %x, i16 %z)
ret i16 %f
}
@@ -210,27 +199,16 @@ define i32 @rotr_i32_const_shift(i32 %x) {
; When first 2 operands match, it's a rotate (by variable amount).
define i16 @rotr_i16(i16 %x, i16 %z) {
; CHECK32-LABEL: rotr_i16:
; CHECK32: # %bb.0:
; CHECK32-NEXT: clrlwi 6, 4, 28
; CHECK32-NEXT: neg 4, 4
; CHECK32-NEXT: clrlwi 5, 3, 16
; CHECK32-NEXT: clrlwi 4, 4, 28
; CHECK32-NEXT: srw 5, 5, 6
; CHECK32-NEXT: slw 3, 3, 4
; CHECK32-NEXT: or 3, 5, 3
; CHECK32-NEXT: blr
;
; CHECK64-LABEL: rotr_i16:
; CHECK64: # %bb.0:
; CHECK64-NEXT: neg 5, 4
; CHECK64-NEXT: clrlwi 6, 3, 16
; CHECK64-NEXT: clrlwi 4, 4, 28
; CHECK64-NEXT: clrlwi 5, 5, 28
; CHECK64-NEXT: srw 4, 6, 4
; CHECK64-NEXT: slw 3, 3, 5
; CHECK64-NEXT: or 3, 4, 3
; CHECK64-NEXT: blr
; CHECK-LABEL: rotr_i16:
; CHECK: # %bb.0:
; CHECK-NEXT: clrlwi 6, 4, 28
; CHECK-NEXT: neg 4, 4
; CHECK-NEXT: clrlwi 5, 3, 16
; CHECK-NEXT: clrlwi 4, 4, 28
; CHECK-NEXT: srw 5, 5, 6
; CHECK-NEXT: slw 3, 3, 4
; CHECK-NEXT: or 3, 5, 3
; CHECK-NEXT: blr
%f = call i16 @llvm.fshr.i16(i16 %x, i16 %x, i16 %z)
ret i16 %f
}

View File

@@ -19,23 +19,14 @@ declare <4 x i32> @llvm.fshr.v4i32(<4 x i32>, <4 x i32>, <4 x i32>)
; General case - all operands can be variables.
define i32 @fshl_i32(i32 %x, i32 %y, i32 %z) {
; CHECK32-LABEL: fshl_i32:
; CHECK32: # %bb.0:
; CHECK32-NEXT: clrlwi 5, 5, 27
; CHECK32-NEXT: slw 3, 3, 5
; CHECK32-NEXT: subfic 5, 5, 32
; CHECK32-NEXT: srw 4, 4, 5
; CHECK32-NEXT: or 3, 3, 4
; CHECK32-NEXT: blr
;
; CHECK64-LABEL: fshl_i32:
; CHECK64: # %bb.0:
; CHECK64-NEXT: clrlwi 5, 5, 27
; CHECK64-NEXT: subfic 6, 5, 32
; CHECK64-NEXT: slw 3, 3, 5
; CHECK64-NEXT: srw 4, 4, 6
; CHECK64-NEXT: or 3, 3, 4
; CHECK64-NEXT: blr
; CHECK-LABEL: fshl_i32:
; CHECK: # %bb.0:
; CHECK-NEXT: clrlwi 5, 5, 27
; CHECK-NEXT: slw 3, 3, 5
; CHECK-NEXT: subfic 5, 5, 32
; CHECK-NEXT: srw 4, 4, 5
; CHECK-NEXT: or 3, 3, 4
; CHECK-NEXT: blr
%f = call i32 @llvm.fshl.i32(i32 %x, i32 %y, i32 %z)
ret i32 %f
}
@@ -89,9 +80,9 @@ define i64 @fshl_i64(i64 %x, i64 %y, i64 %z) {
; CHECK64-LABEL: fshl_i64:
; CHECK64: # %bb.0:
; CHECK64-NEXT: clrlwi 5, 5, 26
; CHECK64-NEXT: subfic 6, 5, 64
; CHECK64-NEXT: sld 3, 3, 5
; CHECK64-NEXT: srd 4, 4, 6
; CHECK64-NEXT: subfic 5, 5, 64
; CHECK64-NEXT: srd 4, 4, 5
; CHECK64-NEXT: or 3, 3, 4
; CHECK64-NEXT: blr
%f = call i64 @llvm.fshl.i64(i64 %x, i64 %y, i64 %z)
@@ -213,16 +204,17 @@ define i128 @fshl_i128(i128 %x, i128 %y, i128 %z) nounwind {
; CHECK64: # %bb.0:
; CHECK64-NEXT: andi. 8, 7, 64
; CHECK64-NEXT: clrlwi 7, 7, 26
; CHECK64-NEXT: iseleq 5, 6, 5
; CHECK64-NEXT: subfic 8, 7, 64
; CHECK64-NEXT: iseleq 5, 6, 5
; CHECK64-NEXT: iseleq 6, 3, 6
; CHECK64-NEXT: iseleq 3, 4, 3
; CHECK64-NEXT: srd 4, 5, 8
; CHECK64-NEXT: sld 5, 6, 7
; CHECK64-NEXT: srd 5, 5, 8
; CHECK64-NEXT: sld 9, 6, 7
; CHECK64-NEXT: srd 6, 6, 8
; CHECK64-NEXT: sld 7, 3, 7
; CHECK64-NEXT: or 3, 5, 4
; CHECK64-NEXT: or 4, 7, 6
; CHECK64-NEXT: sld 3, 3, 7
; CHECK64-NEXT: or 5, 9, 5
; CHECK64-NEXT: or 4, 3, 6
; CHECK64-NEXT: mr 3, 5
; CHECK64-NEXT: blr
%f = call i128 @llvm.fshl.i128(i128 %x, i128 %y, i128 %z)
ret i128 %f
@@ -352,20 +344,20 @@ define i37 @fshl_i37(i37 %x, i37 %y, i37 %z) {
;
; CHECK64-LABEL: fshl_i37:
; CHECK64: # %bb.0:
; CHECK64-NEXT: lis 6, 1771
; CHECK64-NEXT: clrldi 7, 5, 27
; CHECK64-NEXT: ori 6, 6, 15941
; CHECK64-NEXT: lis 7, 1771
; CHECK64-NEXT: clrldi 6, 5, 27
; CHECK64-NEXT: sldi 4, 4, 27
; CHECK64-NEXT: rldic 6, 6, 32, 5
; CHECK64-NEXT: oris 6, 6, 12398
; CHECK64-NEXT: ori 6, 6, 46053
; CHECK64-NEXT: mulhdu 6, 7, 6
; CHECK64-NEXT: ori 7, 7, 15941
; CHECK64-NEXT: rldic 7, 7, 32, 5
; CHECK64-NEXT: oris 7, 7, 12398
; CHECK64-NEXT: ori 7, 7, 46053
; CHECK64-NEXT: mulhdu 6, 6, 7
; CHECK64-NEXT: mulli 6, 6, 37
; CHECK64-NEXT: sub 5, 5, 6
; CHECK64-NEXT: clrlwi 5, 5, 26
; CHECK64-NEXT: subfic 6, 5, 64
; CHECK64-NEXT: sld 3, 3, 5
; CHECK64-NEXT: srd 4, 4, 6
; CHECK64-NEXT: subfic 5, 5, 64
; CHECK64-NEXT: srd 4, 4, 5
; CHECK64-NEXT: or 3, 3, 4
; CHECK64-NEXT: blr
%f = call i37 @llvm.fshl.i37(i37 %x, i37 %y, i37 %z)
@@ -448,23 +440,14 @@ define i8 @fshl_i8_const_fold() {
; General case - all operands can be variables.
define i32 @fshr_i32(i32 %x, i32 %y, i32 %z) {
; CHECK32-LABEL: fshr_i32:
; CHECK32: # %bb.0:
; CHECK32-NEXT: clrlwi 5, 5, 27
; CHECK32-NEXT: srw 4, 4, 5
; CHECK32-NEXT: subfic 5, 5, 32
; CHECK32-NEXT: slw 3, 3, 5
; CHECK32-NEXT: or 3, 3, 4
; CHECK32-NEXT: blr
;
; CHECK64-LABEL: fshr_i32:
; CHECK64: # %bb.0:
; CHECK64-NEXT: clrlwi 5, 5, 27
; CHECK64-NEXT: subfic 6, 5, 32
; CHECK64-NEXT: srw 4, 4, 5
; CHECK64-NEXT: slw 3, 3, 6
; CHECK64-NEXT: or 3, 3, 4
; CHECK64-NEXT: blr
; CHECK-LABEL: fshr_i32:
; CHECK: # %bb.0:
; CHECK-NEXT: clrlwi 5, 5, 27
; CHECK-NEXT: srw 4, 4, 5
; CHECK-NEXT: subfic 5, 5, 32
; CHECK-NEXT: slw 3, 3, 5
; CHECK-NEXT: or 3, 3, 4
; CHECK-NEXT: blr
%f = call i32 @llvm.fshr.i32(i32 %x, i32 %y, i32 %z)
ret i32 %f
}
@@ -518,9 +501,9 @@ define i64 @fshr_i64(i64 %x, i64 %y, i64 %z) {
; CHECK64-LABEL: fshr_i64:
; CHECK64: # %bb.0:
; CHECK64-NEXT: clrlwi 5, 5, 26
; CHECK64-NEXT: subfic 6, 5, 64
; CHECK64-NEXT: srd 4, 4, 5
; CHECK64-NEXT: sld 3, 3, 6
; CHECK64-NEXT: subfic 5, 5, 64
; CHECK64-NEXT: sld 3, 3, 5
; CHECK64-NEXT: or 3, 3, 4
; CHECK64-NEXT: blr
%f = call i64 @llvm.fshr.i64(i64 %x, i64 %y, i64 %z)
@@ -648,21 +631,21 @@ define i37 @fshr_i37(i37 %x, i37 %y, i37 %z) {
;
; CHECK64-LABEL: fshr_i37:
; CHECK64: # %bb.0:
; CHECK64-NEXT: lis 6, 1771
; CHECK64-NEXT: clrldi 7, 5, 27
; CHECK64-NEXT: ori 6, 6, 15941
; CHECK64-NEXT: lis 7, 1771
; CHECK64-NEXT: clrldi 6, 5, 27
; CHECK64-NEXT: sldi 4, 4, 27
; CHECK64-NEXT: rldic 6, 6, 32, 5
; CHECK64-NEXT: oris 6, 6, 12398
; CHECK64-NEXT: ori 6, 6, 46053
; CHECK64-NEXT: mulhdu 6, 7, 6
; CHECK64-NEXT: ori 7, 7, 15941
; CHECK64-NEXT: rldic 7, 7, 32, 5
; CHECK64-NEXT: oris 7, 7, 12398
; CHECK64-NEXT: ori 7, 7, 46053
; CHECK64-NEXT: mulhdu 6, 6, 7
; CHECK64-NEXT: mulli 6, 6, 37
; CHECK64-NEXT: sub 5, 5, 6
; CHECK64-NEXT: addi 5, 5, 27
; CHECK64-NEXT: clrlwi 5, 5, 26
; CHECK64-NEXT: subfic 6, 5, 64
; CHECK64-NEXT: srd 4, 4, 5
; CHECK64-NEXT: sld 3, 3, 6
; CHECK64-NEXT: subfic 5, 5, 64
; CHECK64-NEXT: sld 3, 3, 5
; CHECK64-NEXT: or 3, 3, 4
; CHECK64-NEXT: blr
%f = call i37 @llvm.fshr.i37(i37 %x, i37 %y, i37 %z)

View File

@@ -641,8 +641,8 @@ define <4 x float> @test_extend32_vec4(ptr %p) #0 {
; P8: # %bb.0:
; P8-NEXT: mflr r0
; P8-NEXT: stdu r1, -112(r1)
; P8-NEXT: std r0, 128(r1)
; P8-NEXT: li r4, 48
; P8-NEXT: std r0, 128(r1)
; P8-NEXT: std r30, 96(r1) # 8-byte Folded Spill
; P8-NEXT: mr r30, r3
; P8-NEXT: lhz r3, 6(r3)
@@ -665,19 +665,19 @@ define <4 x float> @test_extend32_vec4(ptr %p) #0 {
; P8-NEXT: xxlor vs61, f1, f1
; P8-NEXT: bl __gnu_h2f_ieee
; P8-NEXT: nop
; P8-NEXT: # kill: def $f1 killed $f1 def $vsl1
; P8-NEXT: xxmrghd vs0, vs63, vs62
; P8-NEXT: li r3, 80
; P8-NEXT: # kill: def $f1 killed $f1 def $vsl1
; P8-NEXT: xxmrghd vs0, vs61, vs1
; P8-NEXT: xxmrghd vs1, vs63, vs62
; P8-NEXT: ld r30, 96(r1) # 8-byte Folded Reload
; P8-NEXT: xxmrghd vs1, vs61, vs1
; P8-NEXT: lxvd2x vs63, r1, r3 # 16-byte Folded Reload
; P8-NEXT: li r3, 64
; P8-NEXT: xvcvdpsp vs34, vs0
; P8-NEXT: xvcvdpsp vs35, vs1
; P8-NEXT: lxvd2x vs62, r1, r3 # 16-byte Folded Reload
; P8-NEXT: li r3, 48
; P8-NEXT: xvcvdpsp vs34, vs0
; P8-NEXT: lxvd2x vs61, r1, r3 # 16-byte Folded Reload
; P8-NEXT: xvcvdpsp vs35, vs1
; P8-NEXT: vmrgew v2, v2, v3
; P8-NEXT: vmrgew v2, v3, v2
; P8-NEXT: addi r1, r1, 112
; P8-NEXT: ld r0, 16(r1)
; P8-NEXT: mtlr r0
@@ -750,8 +750,8 @@ define <4 x double> @test_extend64_vec4(ptr %p) #0 {
; P8: # %bb.0:
; P8-NEXT: mflr r0
; P8-NEXT: stdu r1, -112(r1)
; P8-NEXT: std r0, 128(r1)
; P8-NEXT: li r4, 48
; P8-NEXT: std r0, 128(r1)
; P8-NEXT: std r30, 96(r1) # 8-byte Folded Spill
; P8-NEXT: mr r30, r3
; P8-NEXT: lhz r3, 6(r3)
@@ -1005,22 +1005,22 @@ define void @test_trunc64_vec4(<4 x double> %a, ptr %p) #0 {
; P8-NEXT: stdu r1, -128(r1)
; P8-NEXT: li r3, 48
; P8-NEXT: std r0, 144(r1)
; P8-NEXT: xxswapd vs1, vs34
; P8-NEXT: std r27, 88(r1) # 8-byte Folded Spill
; P8-NEXT: xxswapd vs1, vs34
; P8-NEXT: std r28, 96(r1) # 8-byte Folded Spill
; P8-NEXT: std r29, 104(r1) # 8-byte Folded Spill
; P8-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; P8-NEXT: stxvd2x vs62, r1, r3 # 16-byte Folded Spill
; P8-NEXT: li r3, 64
; P8-NEXT: std r30, 112(r1) # 8-byte Folded Spill
; P8-NEXT: mr r30, r7
; P8-NEXT: stxvd2x vs62, r1, r3 # 16-byte Folded Spill
; P8-NEXT: li r3, 64
; P8-NEXT: vmr v30, v2
; P8-NEXT: stxvd2x vs63, r1, r3 # 16-byte Folded Spill
; P8-NEXT: vmr v31, v3
; P8-NEXT: bl __truncdfhf2
; P8-NEXT: nop
; P8-NEXT: xxswapd vs1, vs63
; P8-NEXT: mr r29, r3
; P8-NEXT: xxswapd vs1, vs63
; P8-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; P8-NEXT: bl __truncdfhf2
; P8-NEXT: nop
@@ -1230,14 +1230,15 @@ define half @PR40273(half) #0 {
; P8-NEXT: clrldi r3, r3, 48
; P8-NEXT: bl __gnu_h2f_ieee
; P8-NEXT: nop
; P8-NEXT: xxlxor f0, f0, f0
; P8-NEXT: fcmpu cr0, f1, f0
; P8-NEXT: fmr f0, f1
; P8-NEXT: xxlxor f1, f1, f1
; P8-NEXT: fcmpu cr0, f0, f1
; P8-NEXT: beq cr0, .LBB20_2
; P8-NEXT: # %bb.1:
; P8-NEXT: vspltisw v2, 1
; P8-NEXT: xvcvsxwdp vs0, vs34
; P8-NEXT: xvcvsxwdp vs1, vs34
; P8-NEXT: .LBB20_2:
; P8-NEXT: fmr f1, f0
; P8-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; P8-NEXT: addi r1, r1, 32
; P8-NEXT: ld r0, 16(r1)
; P8-NEXT: mtlr r0

View File

@@ -28,14 +28,14 @@ define dso_local signext i32 @main() nounwind {
; CHECK-LE-NEXT: bl pluto
; CHECK-LE-NEXT: nop
; CHECK-LE-NEXT: addis 3, 2, global.1@toc@ha
; CHECK-LE-NEXT: li 4, 0
; CHECK-LE-NEXT: li 4, 257
; CHECK-LE-NEXT: li 7, 0
; CHECK-LE-NEXT: li 8, 0
; CHECK-LE-NEXT: li 9, 0
; CHECK-LE-NEXT: addi 5, 3, global.1@toc@l
; CHECK-LE-NEXT: ori 6, 4, 32768
; CHECK-LE-NEXT: li 3, 0
; CHECK-LE-NEXT: ori 6, 3, 32768
; CHECK-LE-NEXT: li 3, 6
; CHECK-LE-NEXT: li 4, 257
; CHECK-LE-NEXT: bl snork
; CHECK-LE-NEXT: nop
; CHECK-LE-NEXT: mr 30, 3

View File

@@ -20,13 +20,13 @@ define void @foo(i8 %x) {
; CHECK-LE-NEXT: stdux 1, 1, 0
; CHECK-LE-NEXT: .cfi_def_cfa_offset 32
; CHECK-LE-NEXT: li 4, 1
; CHECK-LE-NEXT: li 5, -1
; CHECK-LE-NEXT: addi 6, 1, 32
; CHECK-LE-NEXT: addi 5, 1, 32
; CHECK-LE-NEXT: stb 3, 32(1)
; CHECK-LE-NEXT: rldic 4, 4, 31, 32
; CHECK-LE-NEXT: rldic 5, 5, 0, 32
; CHECK-LE-NEXT: stbx 3, 6, 4
; CHECK-LE-NEXT: stbx 3, 6, 5
; CHECK-LE-NEXT: stbx 3, 5, 4
; CHECK-LE-NEXT: li 4, -1
; CHECK-LE-NEXT: rldic 4, 4, 0, 32
; CHECK-LE-NEXT: stbx 3, 5, 4
; CHECK-LE-NEXT: ld 1, 0(1)
; CHECK-LE-NEXT: blr
;

View File

@@ -7,19 +7,19 @@
; RUN: < %s | FileCheck %s --check-prefixes=CHECK,CHECK-P10
; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
; RUN: -mcpu=pwr9 \
; RUN: < %s | FileCheck %s --check-prefixes=CHECK,CHECK-PREP10,CHECK-P9
; RUN: < %s | FileCheck %s --check-prefixes=CHECK,CHECK-PREP10
; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
; RUN: -mcpu=pwr9 \
; RUN: < %s | FileCheck %s --check-prefixes=CHECK,CHECK-PREP10,CHECK-P9
; RUN: < %s | FileCheck %s --check-prefixes=CHECK,CHECK-PREP10
; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
; RUN: -mcpu=pwr8 \
; RUN: < %s | FileCheck %s --check-prefixes=CHECK,CHECK-PREP10,CHECK-P8
; RUN: < %s | FileCheck %s --check-prefixes=CHECK,CHECK-PREP10
; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
; RUN: -mcpu=pwr8 \
; RUN: < %s | FileCheck %s --check-prefixes=CHECK,CHECK-PREP10,CHECK-P8
; RUN: < %s | FileCheck %s --check-prefixes=CHECK,CHECK-PREP10
; RUN: llc -verify-machineinstrs -mtriple=powerpc64-ibm-aix-xcoff \
; RUN: -mcpu=pwr8 \
; RUN: < %s | FileCheck %s --check-prefixes=CHECK,CHECK-PREP10,CHECK-P8
; RUN: < %s | FileCheck %s --check-prefixes=CHECK,CHECK-PREP10
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local i128 @ld_0___int128___int128(i64 %ptr) {
@@ -44,23 +44,14 @@ define dso_local i128 @ld_unalign16___int128___int128(ptr nocapture readonly %pt
; CHECK-P10-NEXT: mr 3, 5
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_unalign16___int128___int128:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: li 4, 1
; CHECK-P9-NEXT: ldx 5, 3, 4
; CHECK-P9-NEXT: li 4, 9
; CHECK-P9-NEXT: ldx 4, 3, 4
; CHECK-P9-NEXT: mr 3, 5
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: ld_unalign16___int128___int128:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: li 4, 1
; CHECK-P8-NEXT: li 6, 9
; CHECK-P8-NEXT: ldx 5, 3, 4
; CHECK-P8-NEXT: ldx 4, 3, 6
; CHECK-P8-NEXT: mr 3, 5
; CHECK-P8-NEXT: blr
; CHECK-PREP10-LABEL: ld_unalign16___int128___int128:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: li 4, 1
; CHECK-PREP10-NEXT: ldx 5, 3, 4
; CHECK-PREP10-NEXT: li 4, 9
; CHECK-PREP10-NEXT: ldx 4, 3, 4
; CHECK-PREP10-NEXT: mr 3, 5
; CHECK-PREP10-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, ptr %ptr, i64 1
%0 = load i128, ptr %add.ptr, align 16
@@ -256,23 +247,14 @@ define dso_local i128 @ld_disjoint_unalign16___int128___int128(i64 %ptr) {
; CHECK-P10-NEXT: pld 4, 14(4), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_unalign16___int128___int128:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: rldicr 4, 3, 0, 51
; CHECK-P9-NEXT: li 3, 6
; CHECK-P9-NEXT: li 5, 14
; CHECK-P9-NEXT: ldx 3, 4, 3
; CHECK-P9-NEXT: ldx 4, 4, 5
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: ld_disjoint_unalign16___int128___int128:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: li 4, 6
; CHECK-P8-NEXT: rldicr 5, 3, 0, 51
; CHECK-P8-NEXT: li 6, 14
; CHECK-P8-NEXT: ldx 3, 5, 4
; CHECK-P8-NEXT: ldx 4, 5, 6
; CHECK-P8-NEXT: blr
; CHECK-PREP10-LABEL: ld_disjoint_unalign16___int128___int128:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: rldicr 4, 3, 0, 51
; CHECK-PREP10-NEXT: li 3, 6
; CHECK-PREP10-NEXT: li 5, 14
; CHECK-PREP10-NEXT: ldx 3, 4, 3
; CHECK-PREP10-NEXT: ldx 4, 4, 5
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%or = or i64 %and, 6
@@ -322,25 +304,15 @@ define dso_local i128 @ld_disjoint_unalign32___int128___int128(i64 %ptr) {
; CHECK-P10-NEXT: pld 4, 100007(4), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_unalign32___int128___int128:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: lis 5, 1
; CHECK-P9-NEXT: rldicr 4, 3, 0, 43
; CHECK-P9-NEXT: ori 3, 5, 34463
; CHECK-P9-NEXT: ori 5, 5, 34471
; CHECK-P9-NEXT: ldx 3, 4, 3
; CHECK-P9-NEXT: ldx 4, 4, 5
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: ld_disjoint_unalign32___int128___int128:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: lis 4, 1
; CHECK-P8-NEXT: rldicr 5, 3, 0, 43
; CHECK-P8-NEXT: ori 3, 4, 34463
; CHECK-P8-NEXT: ori 4, 4, 34471
; CHECK-P8-NEXT: ldx 3, 5, 3
; CHECK-P8-NEXT: ldx 4, 5, 4
; CHECK-P8-NEXT: blr
; CHECK-PREP10-LABEL: ld_disjoint_unalign32___int128___int128:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: lis 5, 1
; CHECK-PREP10-NEXT: rldicr 4, 3, 0, 43
; CHECK-PREP10-NEXT: ori 3, 5, 34463
; CHECK-PREP10-NEXT: ori 5, 5, 34471
; CHECK-PREP10-NEXT: ldx 3, 4, 3
; CHECK-PREP10-NEXT: ldx 4, 4, 5
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1048576
%or = or i64 %and, 99999
@@ -420,29 +392,17 @@ define dso_local i128 @ld_disjoint_unalign64___int128___int128(i64 %ptr) {
; CHECK-P10-NEXT: ldx 4, 4, 6
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_unalign64___int128___int128:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: rldicr 4, 3, 0, 23
; CHECK-P9-NEXT: li 3, 29
; CHECK-P9-NEXT: rldic 3, 3, 35, 24
; CHECK-P9-NEXT: oris 5, 3, 54437
; CHECK-P9-NEXT: ori 3, 5, 4097
; CHECK-P9-NEXT: ori 5, 5, 4105
; CHECK-P9-NEXT: ldx 3, 4, 3
; CHECK-P9-NEXT: ldx 4, 4, 5
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: ld_disjoint_unalign64___int128___int128:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: li 4, 29
; CHECK-P8-NEXT: rldicr 5, 3, 0, 23
; CHECK-P8-NEXT: rldic 4, 4, 35, 24
; CHECK-P8-NEXT: oris 3, 4, 54437
; CHECK-P8-NEXT: ori 4, 3, 4097
; CHECK-P8-NEXT: ori 6, 3, 4105
; CHECK-P8-NEXT: ldx 3, 5, 4
; CHECK-P8-NEXT: ldx 4, 5, 6
; CHECK-P8-NEXT: blr
; CHECK-PREP10-LABEL: ld_disjoint_unalign64___int128___int128:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: rldicr 4, 3, 0, 23
; CHECK-PREP10-NEXT: li 3, 29
; CHECK-PREP10-NEXT: rldic 3, 3, 35, 24
; CHECK-PREP10-NEXT: oris 5, 3, 54437
; CHECK-PREP10-NEXT: ori 3, 5, 4097
; CHECK-PREP10-NEXT: ori 5, 5, 4105
; CHECK-PREP10-NEXT: ldx 3, 4, 3
; CHECK-PREP10-NEXT: ldx 4, 4, 5
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1099511627776
%or = or i64 %and, 1000000000001
@@ -465,33 +425,19 @@ define dso_local i128 @ld_disjoint_align64___int128___int128(i64 %ptr) {
; CHECK-P10-NEXT: ldx 4, 4, 6
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_align64___int128___int128:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: li 5, 29
; CHECK-P9-NEXT: rldicr 4, 3, 0, 23
; CHECK-P9-NEXT: lis 3, 3725
; CHECK-P9-NEXT: rldic 5, 5, 35, 24
; CHECK-P9-NEXT: ori 3, 3, 19025
; CHECK-P9-NEXT: oris 5, 5, 54437
; CHECK-P9-NEXT: rldic 3, 3, 12, 24
; CHECK-P9-NEXT: ori 5, 5, 4104
; CHECK-P9-NEXT: ldx 3, 4, 3
; CHECK-P9-NEXT: ldx 4, 4, 5
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: ld_disjoint_align64___int128___int128:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: li 4, 29
; CHECK-P8-NEXT: rldicr 5, 3, 0, 23
; CHECK-P8-NEXT: lis 3, 3725
; CHECK-P8-NEXT: rldic 4, 4, 35, 24
; CHECK-P8-NEXT: ori 3, 3, 19025
; CHECK-P8-NEXT: oris 4, 4, 54437
; CHECK-P8-NEXT: rldic 3, 3, 12, 24
; CHECK-P8-NEXT: ori 4, 4, 4104
; CHECK-P8-NEXT: ldx 3, 5, 3
; CHECK-P8-NEXT: ldx 4, 5, 4
; CHECK-P8-NEXT: blr
; CHECK-PREP10-LABEL: ld_disjoint_align64___int128___int128:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: li 5, 29
; CHECK-PREP10-NEXT: rldicr 4, 3, 0, 23
; CHECK-PREP10-NEXT: lis 3, 3725
; CHECK-PREP10-NEXT: rldic 5, 5, 35, 24
; CHECK-PREP10-NEXT: ori 3, 3, 19025
; CHECK-PREP10-NEXT: oris 5, 5, 54437
; CHECK-PREP10-NEXT: rldic 3, 3, 12, 24
; CHECK-PREP10-NEXT: ori 5, 5, 4104
; CHECK-PREP10-NEXT: ldx 3, 4, 3
; CHECK-PREP10-NEXT: ldx 4, 4, 5
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1099511627776
%or = or i64 %and, 1000000000000
@@ -536,23 +482,14 @@ define dso_local i128 @ld_cst_unalign32___int128___int128() {
; CHECK-P10-NEXT: ld 4, 0(4)
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_cst_unalign32___int128___int128:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: lis 4, 1
; CHECK-P9-NEXT: ori 3, 4, 34463
; CHECK-P9-NEXT: ori 4, 4, 34471
; CHECK-P9-NEXT: ld 3, 0(3)
; CHECK-P9-NEXT: ld 4, 0(4)
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: ld_cst_unalign32___int128___int128:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: lis 3, 1
; CHECK-P8-NEXT: ori 4, 3, 34463
; CHECK-P8-NEXT: ori 5, 3, 34471
; CHECK-P8-NEXT: ld 3, 0(4)
; CHECK-P8-NEXT: ld 4, 0(5)
; CHECK-P8-NEXT: blr
; CHECK-PREP10-LABEL: ld_cst_unalign32___int128___int128:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: lis 4, 1
; CHECK-PREP10-NEXT: ori 3, 4, 34463
; CHECK-PREP10-NEXT: ori 4, 4, 34471
; CHECK-PREP10-NEXT: ld 3, 0(3)
; CHECK-PREP10-NEXT: ld 4, 0(4)
; CHECK-PREP10-NEXT: blr
entry:
%0 = load i128, ptr inttoptr (i64 99999 to ptr), align 16
ret i128 %0
@@ -584,27 +521,16 @@ define dso_local i128 @ld_cst_unalign64___int128___int128() {
; CHECK-P10-NEXT: ld 4, 0(5)
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_cst_unalign64___int128___int128:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: li 3, 29
; CHECK-P9-NEXT: rldic 3, 3, 35, 24
; CHECK-P9-NEXT: oris 4, 3, 54437
; CHECK-P9-NEXT: ori 3, 4, 4097
; CHECK-P9-NEXT: ori 4, 4, 4105
; CHECK-P9-NEXT: ld 3, 0(3)
; CHECK-P9-NEXT: ld 4, 0(4)
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: ld_cst_unalign64___int128___int128:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: li 3, 29
; CHECK-P8-NEXT: rldic 3, 3, 35, 24
; CHECK-P8-NEXT: oris 3, 3, 54437
; CHECK-P8-NEXT: ori 4, 3, 4097
; CHECK-P8-NEXT: ori 5, 3, 4105
; CHECK-P8-NEXT: ld 3, 0(4)
; CHECK-P8-NEXT: ld 4, 0(5)
; CHECK-P8-NEXT: blr
; CHECK-PREP10-LABEL: ld_cst_unalign64___int128___int128:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: li 3, 29
; CHECK-PREP10-NEXT: rldic 3, 3, 35, 24
; CHECK-PREP10-NEXT: oris 4, 3, 54437
; CHECK-PREP10-NEXT: ori 3, 4, 4097
; CHECK-PREP10-NEXT: ori 4, 4, 4105
; CHECK-PREP10-NEXT: ld 3, 0(3)
; CHECK-PREP10-NEXT: ld 4, 0(4)
; CHECK-PREP10-NEXT: blr
entry:
%0 = load i128, ptr inttoptr (i64 1000000000001 to ptr), align 16
ret i128 %0
@@ -623,31 +549,18 @@ define dso_local i128 @ld_cst_align64___int128___int128() {
; CHECK-P10-NEXT: ld 3, 0(3)
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_cst_align64___int128___int128:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: li 4, 29
; CHECK-P9-NEXT: lis 3, 3725
; CHECK-P9-NEXT: rldic 4, 4, 35, 24
; CHECK-P9-NEXT: ori 3, 3, 19025
; CHECK-P9-NEXT: oris 4, 4, 54437
; CHECK-P9-NEXT: rldic 3, 3, 12, 24
; CHECK-P9-NEXT: ori 4, 4, 4104
; CHECK-P9-NEXT: ld 3, 0(3)
; CHECK-P9-NEXT: ld 4, 0(4)
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: ld_cst_align64___int128___int128:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: li 3, 29
; CHECK-P8-NEXT: lis 4, 3725
; CHECK-P8-NEXT: rldic 3, 3, 35, 24
; CHECK-P8-NEXT: ori 4, 4, 19025
; CHECK-P8-NEXT: oris 3, 3, 54437
; CHECK-P8-NEXT: rldic 4, 4, 12, 24
; CHECK-P8-NEXT: ori 5, 3, 4104
; CHECK-P8-NEXT: ld 3, 0(4)
; CHECK-P8-NEXT: ld 4, 0(5)
; CHECK-P8-NEXT: blr
; CHECK-PREP10-LABEL: ld_cst_align64___int128___int128:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: li 4, 29
; CHECK-PREP10-NEXT: lis 3, 3725
; CHECK-PREP10-NEXT: rldic 4, 4, 35, 24
; CHECK-PREP10-NEXT: ori 3, 3, 19025
; CHECK-PREP10-NEXT: oris 4, 4, 54437
; CHECK-PREP10-NEXT: rldic 3, 3, 12, 24
; CHECK-PREP10-NEXT: ori 4, 4, 4104
; CHECK-PREP10-NEXT: ld 3, 0(3)
; CHECK-PREP10-NEXT: ld 4, 0(4)
; CHECK-PREP10-NEXT: blr
entry:
%0 = load i128, ptr inttoptr (i64 1000000000000 to ptr), align 4096
ret i128 %0
@@ -674,21 +587,13 @@ define dso_local void @st_unalign16__int128___int128(ptr nocapture %ptr, i128 %s
; CHECK-P10-NEXT: pstd 4, 1(3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_unalign16__int128___int128:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: li 6, 9
; CHECK-P9-NEXT: stdx 5, 3, 6
; CHECK-P9-NEXT: li 5, 1
; CHECK-P9-NEXT: stdx 4, 3, 5
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: st_unalign16__int128___int128:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: li 6, 9
; CHECK-P8-NEXT: li 7, 1
; CHECK-P8-NEXT: stdx 5, 3, 6
; CHECK-P8-NEXT: stdx 4, 3, 7
; CHECK-P8-NEXT: blr
; CHECK-PREP10-LABEL: st_unalign16__int128___int128:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: li 6, 9
; CHECK-PREP10-NEXT: stdx 5, 3, 6
; CHECK-PREP10-NEXT: li 5, 1
; CHECK-PREP10-NEXT: stdx 4, 3, 5
; CHECK-PREP10-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, ptr %ptr, i64 1
store i128 %str, ptr %add.ptr, align 16
@@ -874,23 +779,14 @@ define dso_local void @st_disjoint_unalign16__int128___int128(i64 %ptr, i128 %st
; CHECK-P10-NEXT: pstd 4, 6(3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_unalign16__int128___int128:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: rldicr 3, 3, 0, 51
; CHECK-P9-NEXT: li 6, 14
; CHECK-P9-NEXT: stdx 5, 3, 6
; CHECK-P9-NEXT: li 5, 6
; CHECK-P9-NEXT: stdx 4, 3, 5
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: st_disjoint_unalign16__int128___int128:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: li 6, 14
; CHECK-P8-NEXT: rldicr 3, 3, 0, 51
; CHECK-P8-NEXT: li 7, 6
; CHECK-P8-NEXT: stdx 5, 3, 6
; CHECK-P8-NEXT: stdx 4, 3, 7
; CHECK-P8-NEXT: blr
; CHECK-PREP10-LABEL: st_disjoint_unalign16__int128___int128:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: rldicr 3, 3, 0, 51
; CHECK-PREP10-NEXT: li 6, 14
; CHECK-PREP10-NEXT: stdx 5, 3, 6
; CHECK-PREP10-NEXT: li 5, 6
; CHECK-PREP10-NEXT: stdx 4, 3, 5
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%or = or i64 %and, 6
@@ -940,25 +836,15 @@ define dso_local void @st_disjoint_unalign32__int128___int128(i64 %ptr, i128 %st
; CHECK-P10-NEXT: pstd 4, 99999(3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_unalign32__int128___int128:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: lis 6, 1
; CHECK-P9-NEXT: rldicr 3, 3, 0, 43
; CHECK-P9-NEXT: ori 7, 6, 34471
; CHECK-P9-NEXT: stdx 5, 3, 7
; CHECK-P9-NEXT: ori 5, 6, 34463
; CHECK-P9-NEXT: stdx 4, 3, 5
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: st_disjoint_unalign32__int128___int128:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: lis 6, 1
; CHECK-P8-NEXT: rldicr 3, 3, 0, 43
; CHECK-P8-NEXT: ori 7, 6, 34471
; CHECK-P8-NEXT: ori 6, 6, 34463
; CHECK-P8-NEXT: stdx 5, 3, 7
; CHECK-P8-NEXT: stdx 4, 3, 6
; CHECK-P8-NEXT: blr
; CHECK-PREP10-LABEL: st_disjoint_unalign32__int128___int128:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: lis 6, 1
; CHECK-PREP10-NEXT: rldicr 3, 3, 0, 43
; CHECK-PREP10-NEXT: ori 7, 6, 34471
; CHECK-PREP10-NEXT: stdx 5, 3, 7
; CHECK-PREP10-NEXT: ori 5, 6, 34463
; CHECK-PREP10-NEXT: stdx 4, 3, 5
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1048576
%or = or i64 %and, 99999
@@ -977,27 +863,16 @@ define dso_local void @st_disjoint_align32__int128___int128(i64 %ptr, i128 %str)
; CHECK-P10-NEXT: pstd 4, 999990000(3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32__int128___int128:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: lis 6, -15264
; CHECK-P9-NEXT: and 3, 3, 6
; CHECK-P9-NEXT: lis 6, 15258
; CHECK-P9-NEXT: ori 7, 6, 41720
; CHECK-P9-NEXT: stdx 5, 3, 7
; CHECK-P9-NEXT: ori 5, 6, 41712
; CHECK-P9-NEXT: stdx 4, 3, 5
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: st_disjoint_align32__int128___int128:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: lis 6, -15264
; CHECK-P8-NEXT: lis 7, 15258
; CHECK-P8-NEXT: and 3, 3, 6
; CHECK-P8-NEXT: ori 6, 7, 41720
; CHECK-P8-NEXT: ori 7, 7, 41712
; CHECK-P8-NEXT: stdx 5, 3, 6
; CHECK-P8-NEXT: stdx 4, 3, 7
; CHECK-P8-NEXT: blr
; CHECK-PREP10-LABEL: st_disjoint_align32__int128___int128:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: lis 6, -15264
; CHECK-PREP10-NEXT: and 3, 3, 6
; CHECK-PREP10-NEXT: lis 6, 15258
; CHECK-PREP10-NEXT: ori 7, 6, 41720
; CHECK-PREP10-NEXT: stdx 5, 3, 7
; CHECK-PREP10-NEXT: ori 5, 6, 41712
; CHECK-PREP10-NEXT: stdx 4, 3, 5
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1000341504
%or = or i64 %and, 999990000
@@ -1049,29 +924,17 @@ define dso_local void @st_disjoint_unalign64__int128___int128(i64 %ptr, i128 %st
; CHECK-P10-NEXT: stdx 4, 3, 5
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_unalign64__int128___int128:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: li 6, 29
; CHECK-P9-NEXT: rldicr 3, 3, 0, 23
; CHECK-P9-NEXT: rldic 6, 6, 35, 24
; CHECK-P9-NEXT: oris 6, 6, 54437
; CHECK-P9-NEXT: ori 7, 6, 4105
; CHECK-P9-NEXT: stdx 5, 3, 7
; CHECK-P9-NEXT: ori 5, 6, 4097
; CHECK-P9-NEXT: stdx 4, 3, 5
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: st_disjoint_unalign64__int128___int128:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: li 6, 29
; CHECK-P8-NEXT: rldicr 3, 3, 0, 23
; CHECK-P8-NEXT: rldic 6, 6, 35, 24
; CHECK-P8-NEXT: oris 6, 6, 54437
; CHECK-P8-NEXT: ori 7, 6, 4105
; CHECK-P8-NEXT: ori 6, 6, 4097
; CHECK-P8-NEXT: stdx 5, 3, 7
; CHECK-P8-NEXT: stdx 4, 3, 6
; CHECK-P8-NEXT: blr
; CHECK-PREP10-LABEL: st_disjoint_unalign64__int128___int128:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: li 6, 29
; CHECK-PREP10-NEXT: rldicr 3, 3, 0, 23
; CHECK-PREP10-NEXT: rldic 6, 6, 35, 24
; CHECK-PREP10-NEXT: oris 6, 6, 54437
; CHECK-PREP10-NEXT: ori 7, 6, 4105
; CHECK-PREP10-NEXT: stdx 5, 3, 7
; CHECK-PREP10-NEXT: ori 5, 6, 4097
; CHECK-PREP10-NEXT: stdx 4, 3, 5
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1099511627776
%or = or i64 %and, 1000000000001
@@ -1094,33 +957,19 @@ define dso_local void @st_disjoint_align64__int128___int128(i64 %ptr, i128 %str)
; CHECK-P10-NEXT: stdx 4, 3, 5
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align64__int128___int128:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: lis 6, 3725
; CHECK-P9-NEXT: rldicr 3, 3, 0, 23
; CHECK-P9-NEXT: ori 6, 6, 19025
; CHECK-P9-NEXT: rldic 6, 6, 12, 24
; CHECK-P9-NEXT: stdx 4, 3, 6
; CHECK-P9-NEXT: li 4, 29
; CHECK-P9-NEXT: rldic 4, 4, 35, 24
; CHECK-P9-NEXT: oris 4, 4, 54437
; CHECK-P9-NEXT: ori 4, 4, 4104
; CHECK-P9-NEXT: stdx 5, 3, 4
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: st_disjoint_align64__int128___int128:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: li 6, 29
; CHECK-P8-NEXT: lis 7, 3725
; CHECK-P8-NEXT: rldic 6, 6, 35, 24
; CHECK-P8-NEXT: ori 7, 7, 19025
; CHECK-P8-NEXT: oris 6, 6, 54437
; CHECK-P8-NEXT: rldicr 3, 3, 0, 23
; CHECK-P8-NEXT: rldic 7, 7, 12, 24
; CHECK-P8-NEXT: ori 6, 6, 4104
; CHECK-P8-NEXT: stdx 4, 3, 7
; CHECK-P8-NEXT: stdx 5, 3, 6
; CHECK-P8-NEXT: blr
; CHECK-PREP10-LABEL: st_disjoint_align64__int128___int128:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: lis 6, 3725
; CHECK-PREP10-NEXT: rldicr 3, 3, 0, 23
; CHECK-PREP10-NEXT: ori 6, 6, 19025
; CHECK-PREP10-NEXT: rldic 6, 6, 12, 24
; CHECK-PREP10-NEXT: stdx 4, 3, 6
; CHECK-PREP10-NEXT: li 4, 29
; CHECK-PREP10-NEXT: rldic 4, 4, 35, 24
; CHECK-PREP10-NEXT: oris 4, 4, 54437
; CHECK-PREP10-NEXT: ori 4, 4, 4104
; CHECK-PREP10-NEXT: stdx 5, 3, 4
; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -1099511627776
%or = or i64 %and, 1000000000000
@@ -1131,29 +980,13 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_cst_unalign16__int128___int128(i128 %str) {
; CHECK-P10-LABEL: st_cst_unalign16__int128___int128:
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: li 5, 263
; CHECK-P10-NEXT: std 4, 0(5)
; CHECK-P10-NEXT: li 4, 255
; CHECK-P10-NEXT: std 3, 0(4)
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_cst_unalign16__int128___int128:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: li 5, 263
; CHECK-P9-NEXT: std 4, 0(5)
; CHECK-P9-NEXT: li 4, 255
; CHECK-P9-NEXT: std 3, 0(4)
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: st_cst_unalign16__int128___int128:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: li 5, 263
; CHECK-P8-NEXT: li 6, 255
; CHECK-P8-NEXT: std 4, 0(5)
; CHECK-P8-NEXT: std 3, 0(6)
; CHECK-P8-NEXT: blr
; CHECK-LABEL: st_cst_unalign16__int128___int128:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: li 5, 263
; CHECK-NEXT: std 4, 0(5)
; CHECK-NEXT: li 4, 255
; CHECK-NEXT: std 3, 0(4)
; CHECK-NEXT: blr
entry:
store i128 %str, ptr inttoptr (i64 255 to ptr), align 16
ret void
@@ -1181,23 +1014,14 @@ define dso_local void @st_cst_unalign32__int128___int128(i128 %str) {
; CHECK-P10-NEXT: std 3, 0(4)
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_cst_unalign32__int128___int128:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: lis 5, 1
; CHECK-P9-NEXT: ori 6, 5, 34471
; CHECK-P9-NEXT: std 4, 0(6)
; CHECK-P9-NEXT: ori 4, 5, 34463
; CHECK-P9-NEXT: std 3, 0(4)
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: st_cst_unalign32__int128___int128:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: lis 5, 1
; CHECK-P8-NEXT: ori 6, 5, 34471
; CHECK-P8-NEXT: ori 5, 5, 34463
; CHECK-P8-NEXT: std 4, 0(6)
; CHECK-P8-NEXT: std 3, 0(5)
; CHECK-P8-NEXT: blr
; CHECK-PREP10-LABEL: st_cst_unalign32__int128___int128:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: lis 5, 1
; CHECK-PREP10-NEXT: ori 6, 5, 34471
; CHECK-PREP10-NEXT: std 4, 0(6)
; CHECK-PREP10-NEXT: ori 4, 5, 34463
; CHECK-PREP10-NEXT: std 3, 0(4)
; CHECK-PREP10-NEXT: blr
entry:
store i128 %str, ptr inttoptr (i64 99999 to ptr), align 16
ret void
@@ -1229,27 +1053,16 @@ define dso_local void @st_cst_unalign64__int128___int128(i128 %str) {
; CHECK-P10-NEXT: std 3, 0(4)
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_cst_unalign64__int128___int128:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: li 5, 29
; CHECK-P9-NEXT: rldic 5, 5, 35, 24
; CHECK-P9-NEXT: oris 5, 5, 54437
; CHECK-P9-NEXT: ori 6, 5, 4105
; CHECK-P9-NEXT: std 4, 0(6)
; CHECK-P9-NEXT: ori 4, 5, 4097
; CHECK-P9-NEXT: std 3, 0(4)
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: st_cst_unalign64__int128___int128:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: li 5, 29
; CHECK-P8-NEXT: rldic 5, 5, 35, 24
; CHECK-P8-NEXT: oris 5, 5, 54437
; CHECK-P8-NEXT: ori 6, 5, 4105
; CHECK-P8-NEXT: ori 5, 5, 4097
; CHECK-P8-NEXT: std 4, 0(6)
; CHECK-P8-NEXT: std 3, 0(5)
; CHECK-P8-NEXT: blr
; CHECK-PREP10-LABEL: st_cst_unalign64__int128___int128:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: li 5, 29
; CHECK-PREP10-NEXT: rldic 5, 5, 35, 24
; CHECK-PREP10-NEXT: oris 5, 5, 54437
; CHECK-PREP10-NEXT: ori 6, 5, 4105
; CHECK-PREP10-NEXT: std 4, 0(6)
; CHECK-PREP10-NEXT: ori 4, 5, 4097
; CHECK-PREP10-NEXT: std 3, 0(4)
; CHECK-PREP10-NEXT: blr
entry:
store i128 %str, ptr inttoptr (i64 1000000000001 to ptr), align 16
ret void
@@ -1268,31 +1081,18 @@ define dso_local void @st_cst_align64__int128___int128(i128 %str) {
; CHECK-P10-NEXT: std 3, 0(4)
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_cst_align64__int128___int128:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: lis 5, 3725
; CHECK-P9-NEXT: ori 5, 5, 19025
; CHECK-P9-NEXT: rldic 5, 5, 12, 24
; CHECK-P9-NEXT: std 3, 0(5)
; CHECK-P9-NEXT: li 3, 29
; CHECK-P9-NEXT: rldic 3, 3, 35, 24
; CHECK-P9-NEXT: oris 3, 3, 54437
; CHECK-P9-NEXT: ori 3, 3, 4104
; CHECK-P9-NEXT: std 4, 0(3)
; CHECK-P9-NEXT: blr
;
; CHECK-P8-LABEL: st_cst_align64__int128___int128:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: li 5, 29
; CHECK-P8-NEXT: lis 6, 3725
; CHECK-P8-NEXT: rldic 5, 5, 35, 24
; CHECK-P8-NEXT: ori 6, 6, 19025
; CHECK-P8-NEXT: oris 5, 5, 54437
; CHECK-P8-NEXT: rldic 6, 6, 12, 24
; CHECK-P8-NEXT: ori 5, 5, 4104
; CHECK-P8-NEXT: std 3, 0(6)
; CHECK-P8-NEXT: std 4, 0(5)
; CHECK-P8-NEXT: blr
; CHECK-PREP10-LABEL: st_cst_align64__int128___int128:
; CHECK-PREP10: # %bb.0: # %entry
; CHECK-PREP10-NEXT: lis 5, 3725
; CHECK-PREP10-NEXT: ori 5, 5, 19025
; CHECK-PREP10-NEXT: rldic 5, 5, 12, 24
; CHECK-PREP10-NEXT: std 3, 0(5)
; CHECK-PREP10-NEXT: li 3, 29
; CHECK-PREP10-NEXT: rldic 3, 3, 35, 24
; CHECK-PREP10-NEXT: oris 3, 3, 54437
; CHECK-PREP10-NEXT: ori 3, 3, 4104
; CHECK-PREP10-NEXT: std 4, 0(3)
; CHECK-PREP10-NEXT: blr
entry:
store i128 %str, ptr inttoptr (i64 1000000000000 to ptr), align 4096
ret void

View File

@@ -25,15 +25,15 @@ define <8 x i32> @test_large_vec_vaarg(i32 %n, ...) {
; LE-NEXT: rldicr 3, 3, 0, 59
; LE-NEXT: addi 4, 3, 16
; LE-NEXT: std 4, -8(1)
; LE-NEXT: ld 4, -8(1)
; LE-NEXT: lxvd2x 0, 0, 3
; LE-NEXT: addi 4, 4, 15
; LE-NEXT: rldicr 4, 4, 0, 59
; LE-NEXT: ld 3, -8(1)
; LE-NEXT: addi 3, 3, 15
; LE-NEXT: rldicr 3, 3, 0, 59
; LE-NEXT: addi 4, 3, 16
; LE-NEXT: std 4, -8(1)
; LE-NEXT: xxswapd 34, 0
; LE-NEXT: addi 5, 4, 16
; LE-NEXT: std 5, -8(1)
; LE-NEXT: lxvd2x 1, 0, 4
; LE-NEXT: xxswapd 35, 1
; LE-NEXT: lxvd2x 0, 0, 3
; LE-NEXT: xxswapd 35, 0
; LE-NEXT: blr
%args = alloca ptr, align 4
%x = va_arg ptr %args, <8 x i32>

View File

@@ -20,8 +20,8 @@ declare void @llvm.memcpy.p0.p0.i64(ptr nocapture writeonly, ptr nocapture reado
define linkonce_odr void @ZN6snappyDecompressor_(ptr %this, ptr %writer) {
; CHECK-LABEL: ZN6snappyDecompressor_:
; CHECK: # %bb.0: # %entry
; CHECK: addis 3, 2, .L__ModuleStringPool@toc@ha
; CHECK: addi 25, 3, .L__ModuleStringPool@toc@l
; CHECK: addis 4, 2, .L__ModuleStringPool@toc@ha
; CHECK: addi 25, 4, .L__ModuleStringPool@toc@l
; CHECK: .LBB0_2: # %for.cond
; CHECK-NOT: addis {{[0-9]+}}, 2, .L__ModuleStringPool@toc@ha
; CHECK: bctrl

View File

@@ -67,35 +67,34 @@
define signext i32 @test(ptr nocapture %FP) local_unnamed_addr #0 {
; CHECKLX-LABEL: test:
; CHECKLX: # %bb.0: # %entry
; CHECKLX-NEXT: addis 4, 2, .LC0@toc@ha
; CHECKLX-NEXT: addis 5, 2, .LC1@toc@ha
; CHECKLX-NEXT: mr 12, 3
; CHECKLX-NEXT: ld 4, .LC0@toc@l(4)
; CHECKLX-NEXT: ld 5, .LC1@toc@l(5)
; CHECKLX-NEXT: lwz 6, 0(4)
; CHECKLX-NEXT: lwz 7, 0(5)
; CHECKLX-NEXT: cmpw 6, 7
; CHECKLX-NEXT: lwz 6, 0(4)
; CHECKLX-NEXT: bgt 0, .LBB0_2
; CHECKLX-NEXT: addis 3, 2, .LC0@toc@ha
; CHECKLX-NEXT: addis 4, 2, .LC1@toc@ha
; CHECKLX-NEXT: ld 3, .LC0@toc@l(3)
; CHECKLX-NEXT: ld 5, .LC1@toc@l(4)
; CHECKLX-NEXT: lwz 6, 0(3)
; CHECKLX-NEXT: .p2align 5
; CHECKLX-NEXT: .LBB0_1: # %if.end
; CHECKLX-NEXT: #
; CHECKLX-NEXT: addi 3, 6, 1
; CHECKLX-NEXT: stw 3, 0(4)
; CHECKLX-NEXT: lwz 3, 0(4)
; CHECKLX-NEXT: lwz 6, 0(5)
; CHECKLX-NEXT: cmpw 3, 6
; CHECKLX-NEXT: lwz 6, 0(4)
; CHECKLX-NEXT: ble 0, .LBB0_1
; CHECKLX-NEXT: .LBB0_2: # %if.then
; CHECKLX-NEXT: lwz 7, 0(5)
; CHECKLX-NEXT: lwz 4, 0(3)
; CHECKLX-NEXT: cmpw 6, 7
; CHECKLX-NEXT: bgt 0, .LBB0_3
; CHECKLX-NEXT: # %bb.2: # %if.end
; CHECKLX-NEXT: #
; CHECKLX-NEXT: addi 4, 4, 1
; CHECKLX-NEXT: stw 4, 0(3)
; CHECKLX-NEXT: lwz 6, 0(3)
; CHECKLX-NEXT: b .LBB0_1
; CHECKLX-NEXT: .LBB0_3: # %if.then
; CHECKLX-NEXT: mflr 0
; CHECKLX-NEXT: stdu 1, -32(1)
; CHECKLX-NEXT: std 2, 24(1)
; CHECKLX-NEXT: std 0, 48(1)
; CHECKLX-NEXT: .cfi_def_cfa_offset 32
; CHECKLX-NEXT: .cfi_offset lr, 16
; CHECKLX-NEXT: extsw 3, 6
; CHECKLX-NEXT: mtctr 12
; CHECKLX-NEXT: extsw 3, 4
; CHECKLX-NEXT: bctrl
; CHECKLX-NEXT: ld 2, 24(1)
; CHECKLX-NEXT: addi 1, 1, 32

View File

@@ -222,16 +222,16 @@ define dso_local void @test4(ptr nocapture %c, ptr nocapture readonly %a) local_
;
; P8-AIX32-LABEL: test4:
; P8-AIX32: # %bb.0: # %entry
; P8-AIX32-NEXT: lwz r5, L..C0(r2) # %const.0
; P8-AIX32-NEXT: lwz r6, 28(r4)
; P8-AIX32-NEXT: lwz r4, 24(r4)
; P8-AIX32-NEXT: stw r6, -16(r1)
; P8-AIX32-NEXT: stw r4, -32(r1)
; P8-AIX32-NEXT: lwz r5, 24(r4)
; P8-AIX32-NEXT: lwz r4, 28(r4)
; P8-AIX32-NEXT: stw r4, -16(r1)
; P8-AIX32-NEXT: lwz r4, L..C0(r2) # %const.0
; P8-AIX32-NEXT: stw r5, -32(r1)
; P8-AIX32-NEXT: lxvw4x v2, 0, r4
; P8-AIX32-NEXT: addi r4, r1, -16
; P8-AIX32-NEXT: lxvw4x v2, 0, r5
; P8-AIX32-NEXT: addi r5, r1, -32
; P8-AIX32-NEXT: lxvw4x v3, 0, r4
; P8-AIX32-NEXT: lxvw4x v4, 0, r5
; P8-AIX32-NEXT: addi r4, r1, -32
; P8-AIX32-NEXT: lxvw4x v4, 0, r4
; P8-AIX32-NEXT: vperm v2, v4, v3, v2
; P8-AIX32-NEXT: stxvw4x v2, 0, r3
; P8-AIX32-NEXT: blr
@@ -299,16 +299,16 @@ define void @test5(ptr %a, ptr %in) {
;
; P8-AIX32-LABEL: test5:
; P8-AIX32: # %bb.0: # %entry
; P8-AIX32-NEXT: lwz r5, L..C1(r2) # %const.0
; P8-AIX32-NEXT: lwz r4, 0(r4)
; P8-AIX32-NEXT: srawi r5, r4, 31
; P8-AIX32-NEXT: stw r4, -16(r1)
; P8-AIX32-NEXT: srawi r4, r4, 31
; P8-AIX32-NEXT: stw r4, -32(r1)
; P8-AIX32-NEXT: lxvw4x v2, 0, r5
; P8-AIX32-NEXT: lwz r4, L..C1(r2) # %const.0
; P8-AIX32-NEXT: stw r5, -32(r1)
; P8-AIX32-NEXT: lxvw4x v2, 0, r4
; P8-AIX32-NEXT: addi r4, r1, -16
; P8-AIX32-NEXT: addi r5, r1, -32
; P8-AIX32-NEXT: lxvw4x v3, 0, r4
; P8-AIX32-NEXT: lxvw4x v4, 0, r5
; P8-AIX32-NEXT: addi r4, r1, -32
; P8-AIX32-NEXT: lxvw4x v4, 0, r4
; P8-AIX32-NEXT: vperm v2, v4, v3, v2
; P8-AIX32-NEXT: stxvw4x v2, 0, r3
; P8-AIX32-NEXT: blr
@@ -376,16 +376,16 @@ define void @test6(ptr %a, ptr %in) {
;
; P8-AIX32-LABEL: test6:
; P8-AIX32: # %bb.0: # %entry
; P8-AIX32-NEXT: lwz r6, L..C2(r2) # %const.0
; P8-AIX32-NEXT: lwz r4, 0(r4)
; P8-AIX32-NEXT: li r5, 0
; P8-AIX32-NEXT: stw r5, -32(r1)
; P8-AIX32-NEXT: addi r5, r1, -16
; P8-AIX32-NEXT: stw r4, -16(r1)
; P8-AIX32-NEXT: lwz r4, L..C2(r2) # %const.0
; P8-AIX32-NEXT: lxvw4x v2, 0, r4
; P8-AIX32-NEXT: addi r4, r1, -32
; P8-AIX32-NEXT: lxvw4x v2, 0, r6
; P8-AIX32-NEXT: lxvw4x v3, 0, r4
; P8-AIX32-NEXT: lxvw4x v4, 0, r5
; P8-AIX32-NEXT: addi r4, r1, -16
; P8-AIX32-NEXT: lxvw4x v4, 0, r4
; P8-AIX32-NEXT: vperm v2, v3, v4, v2
; P8-AIX32-NEXT: stxvw4x v2, 0, r3
; P8-AIX32-NEXT: blr
@@ -823,12 +823,12 @@ define <16 x i8> @unadjusted_lxvdsx(ptr %s, ptr %t) {
; P8-AIX32: # %bb.0: # %entry
; P8-AIX32-NEXT: lwz r4, 4(r3)
; P8-AIX32-NEXT: stw r4, -16(r1)
; P8-AIX32-NEXT: addi r4, r1, -32
; P8-AIX32-NEXT: lwz r3, 0(r3)
; P8-AIX32-NEXT: stw r3, -32(r1)
; P8-AIX32-NEXT: addi r3, r1, -16
; P8-AIX32-NEXT: lxvw4x vs0, 0, r3
; P8-AIX32-NEXT: lxvw4x vs1, 0, r4
; P8-AIX32-NEXT: addi r3, r1, -32
; P8-AIX32-NEXT: lxvw4x vs1, 0, r3
; P8-AIX32-NEXT: xxmrghw vs0, vs1, vs0
; P8-AIX32-NEXT: xxmrghd v2, vs0, vs0
; P8-AIX32-NEXT: blr
@@ -1250,11 +1250,11 @@ define <2 x double> @test_v2f64_multiple_use(ptr nocapture readonly %a, ptr noca
; P8-NEXT: lfs f0, 0(r3)
; P8-NEXT: lfd f1, 0(r4)
; P8-NEXT: xsadddp f1, f1, f0
; P8-NEXT: xxspltd v2, vs0, 0
; P8-NEXT: stfd f1, 0(r4)
; P8-NEXT: lfd f1, 0(r5)
; P8-NEXT: xsadddp f1, f1, f0
; P8-NEXT: stfd f1, 0(r5)
; P8-NEXT: xxspltd v2, vs0, 0
; P8-NEXT: xsadddp f0, f1, f0
; P8-NEXT: stfd f0, 0(r5)
; P8-NEXT: blr
;
; P7-LABEL: test_v2f64_multiple_use:
@@ -1286,11 +1286,11 @@ define <2 x double> @test_v2f64_multiple_use(ptr nocapture readonly %a, ptr noca
; P8-AIX32-NEXT: lfs f0, 0(r3)
; P8-AIX32-NEXT: lfd f1, 0(r4)
; P8-AIX32-NEXT: xsadddp f1, f1, f0
; P8-AIX32-NEXT: xxmrghd v2, vs0, vs0
; P8-AIX32-NEXT: stfd f1, 0(r4)
; P8-AIX32-NEXT: lfd f1, 0(r5)
; P8-AIX32-NEXT: xsadddp f1, f1, f0
; P8-AIX32-NEXT: stfd f1, 0(r5)
; P8-AIX32-NEXT: xxmrghd v2, vs0, vs0
; P8-AIX32-NEXT: xsadddp f0, f1, f0
; P8-AIX32-NEXT: stfd f0, 0(r5)
; P8-AIX32-NEXT: blr
;
; P7-AIX32-LABEL: test_v2f64_multiple_use:

View File

@@ -70,12 +70,12 @@ define <2 x i64> @load_swap01(ptr %vp1, ptr %vp2) {
define <4 x i32> @load_swap10(ptr %vp1, ptr %vp2) {
; CHECK-P8-LABEL: load_swap10:
; CHECK-P8: # %bb.0:
; CHECK-P8-NEXT: addis r4, r2, .LCPI2_0@toc@ha
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: addi r4, r4, .LCPI2_0@toc@l
; CHECK-P8-NEXT: lxvd2x vs1, 0, r4
; CHECK-P8-NEXT: addis r3, r2, .LCPI2_0@toc@ha
; CHECK-P8-NEXT: addi r3, r3, .LCPI2_0@toc@l
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: xxswapd v3, vs1
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: xxswapd v3, vs0
; CHECK-P8-NEXT: vperm v2, v2, v2, v3
; CHECK-P8-NEXT: blr
;
@@ -86,10 +86,10 @@ define <4 x i32> @load_swap10(ptr %vp1, ptr %vp2) {
;
; CHECK-P8-BE-LABEL: load_swap10:
; CHECK-P8-BE: # %bb.0:
; CHECK-P8-BE-NEXT: addis r4, r2, .LCPI2_0@toc@ha
; CHECK-P8-BE-NEXT: lxvw4x v2, 0, r3
; CHECK-P8-BE-NEXT: addi r4, r4, .LCPI2_0@toc@l
; CHECK-P8-BE-NEXT: lxvw4x v3, 0, r4
; CHECK-P8-BE-NEXT: addis r3, r2, .LCPI2_0@toc@ha
; CHECK-P8-BE-NEXT: addi r3, r3, .LCPI2_0@toc@l
; CHECK-P8-BE-NEXT: lxvw4x v3, 0, r3
; CHECK-P8-BE-NEXT: vperm v2, v2, v2, v3
; CHECK-P8-BE-NEXT: blr
;
@@ -110,12 +110,12 @@ define <4 x i32> @load_swap10(ptr %vp1, ptr %vp2) {
define <4 x i32> @load_swap11(ptr %vp1, ptr %vp2) {
; CHECK-P8-LABEL: load_swap11:
; CHECK-P8: # %bb.0:
; CHECK-P8-NEXT: addis r3, r2, .LCPI3_0@toc@ha
; CHECK-P8-NEXT: lxvd2x vs0, 0, r4
; CHECK-P8-NEXT: addis r3, r2, .LCPI3_0@toc@ha
; CHECK-P8-NEXT: addi r3, r3, .LCPI3_0@toc@l
; CHECK-P8-NEXT: lxvd2x vs1, 0, r3
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: xxswapd v3, vs1
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: xxswapd v3, vs0
; CHECK-P8-NEXT: vperm v2, v2, v2, v3
; CHECK-P8-NEXT: blr
;
@@ -150,12 +150,12 @@ define <4 x i32> @load_swap11(ptr %vp1, ptr %vp2) {
define <8 x i16> @load_swap20(ptr %vp1, ptr %vp2){
; CHECK-P8-LABEL: load_swap20:
; CHECK-P8: # %bb.0:
; CHECK-P8-NEXT: addis r4, r2, .LCPI4_0@toc@ha
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: addi r4, r4, .LCPI4_0@toc@l
; CHECK-P8-NEXT: lxvd2x vs1, 0, r4
; CHECK-P8-NEXT: addis r3, r2, .LCPI4_0@toc@ha
; CHECK-P8-NEXT: addi r3, r3, .LCPI4_0@toc@l
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: xxswapd v3, vs1
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: xxswapd v3, vs0
; CHECK-P8-NEXT: vperm v2, v2, v2, v3
; CHECK-P8-NEXT: blr
;
@@ -166,10 +166,10 @@ define <8 x i16> @load_swap20(ptr %vp1, ptr %vp2){
;
; CHECK-P8-BE-LABEL: load_swap20:
; CHECK-P8-BE: # %bb.0:
; CHECK-P8-BE-NEXT: addis r4, r2, .LCPI4_0@toc@ha
; CHECK-P8-BE-NEXT: lxvw4x v2, 0, r3
; CHECK-P8-BE-NEXT: addi r4, r4, .LCPI4_0@toc@l
; CHECK-P8-BE-NEXT: lxvw4x v3, 0, r4
; CHECK-P8-BE-NEXT: addis r3, r2, .LCPI4_0@toc@ha
; CHECK-P8-BE-NEXT: addi r3, r3, .LCPI4_0@toc@l
; CHECK-P8-BE-NEXT: lxvw4x v3, 0, r3
; CHECK-P8-BE-NEXT: vperm v2, v2, v2, v3
; CHECK-P8-BE-NEXT: blr
;
@@ -190,12 +190,12 @@ define <8 x i16> @load_swap20(ptr %vp1, ptr %vp2){
define <8 x i16> @load_swap21(ptr %vp1, ptr %vp2){
; CHECK-P8-LABEL: load_swap21:
; CHECK-P8: # %bb.0:
; CHECK-P8-NEXT: addis r3, r2, .LCPI5_0@toc@ha
; CHECK-P8-NEXT: lxvd2x vs0, 0, r4
; CHECK-P8-NEXT: addis r3, r2, .LCPI5_0@toc@ha
; CHECK-P8-NEXT: addi r3, r3, .LCPI5_0@toc@l
; CHECK-P8-NEXT: lxvd2x vs1, 0, r3
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: xxswapd v3, vs1
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: xxswapd v3, vs0
; CHECK-P8-NEXT: vperm v2, v2, v2, v3
; CHECK-P8-NEXT: blr
;
@@ -230,12 +230,12 @@ define <8 x i16> @load_swap21(ptr %vp1, ptr %vp2){
define <16 x i8> @load_swap30(ptr %vp1, ptr %vp2){
; CHECK-P8-LABEL: load_swap30:
; CHECK-P8: # %bb.0:
; CHECK-P8-NEXT: addis r4, r2, .LCPI6_0@toc@ha
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: addi r4, r4, .LCPI6_0@toc@l
; CHECK-P8-NEXT: lxvd2x vs1, 0, r4
; CHECK-P8-NEXT: addis r3, r2, .LCPI6_0@toc@ha
; CHECK-P8-NEXT: addi r3, r3, .LCPI6_0@toc@l
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: xxswapd v3, vs1
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: xxswapd v3, vs0
; CHECK-P8-NEXT: vperm v2, v2, v2, v3
; CHECK-P8-NEXT: blr
;
@@ -246,10 +246,10 @@ define <16 x i8> @load_swap30(ptr %vp1, ptr %vp2){
;
; CHECK-P8-BE-LABEL: load_swap30:
; CHECK-P8-BE: # %bb.0:
; CHECK-P8-BE-NEXT: addis r4, r2, .LCPI6_0@toc@ha
; CHECK-P8-BE-NEXT: lxvw4x v2, 0, r3
; CHECK-P8-BE-NEXT: addi r4, r4, .LCPI6_0@toc@l
; CHECK-P8-BE-NEXT: lxvw4x v3, 0, r4
; CHECK-P8-BE-NEXT: addis r3, r2, .LCPI6_0@toc@ha
; CHECK-P8-BE-NEXT: addi r3, r3, .LCPI6_0@toc@l
; CHECK-P8-BE-NEXT: lxvw4x v3, 0, r3
; CHECK-P8-BE-NEXT: vperm v2, v2, v2, v3
; CHECK-P8-BE-NEXT: blr
;
@@ -267,12 +267,12 @@ define <16 x i8> @load_swap30(ptr %vp1, ptr %vp2){
define <16 x i8> @load_swap31(ptr %vp1, ptr %vp2){
; CHECK-P8-LABEL: load_swap31:
; CHECK-P8: # %bb.0:
; CHECK-P8-NEXT: addis r3, r2, .LCPI7_0@toc@ha
; CHECK-P8-NEXT: lxvd2x vs0, 0, r4
; CHECK-P8-NEXT: addis r3, r2, .LCPI7_0@toc@ha
; CHECK-P8-NEXT: addi r3, r3, .LCPI7_0@toc@l
; CHECK-P8-NEXT: lxvd2x vs1, 0, r3
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: xxswapd v3, vs1
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: xxswapd v3, vs0
; CHECK-P8-NEXT: vperm v2, v2, v2, v3
; CHECK-P8-NEXT: blr
;
@@ -332,12 +332,12 @@ define <2 x double> @load_swap40(ptr %vp1, ptr %vp2) {
define <4 x float> @load_swap50(ptr %vp1, ptr %vp2) {
; CHECK-P8-LABEL: load_swap50:
; CHECK-P8: # %bb.0:
; CHECK-P8-NEXT: addis r4, r2, .LCPI9_0@toc@ha
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: addi r4, r4, .LCPI9_0@toc@l
; CHECK-P8-NEXT: lxvd2x vs1, 0, r4
; CHECK-P8-NEXT: addis r3, r2, .LCPI9_0@toc@ha
; CHECK-P8-NEXT: addi r3, r3, .LCPI9_0@toc@l
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: xxswapd v3, vs1
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: xxswapd v3, vs0
; CHECK-P8-NEXT: vperm v2, v2, v2, v3
; CHECK-P8-NEXT: blr
;
@@ -348,10 +348,10 @@ define <4 x float> @load_swap50(ptr %vp1, ptr %vp2) {
;
; CHECK-P8-BE-LABEL: load_swap50:
; CHECK-P8-BE: # %bb.0:
; CHECK-P8-BE-NEXT: addis r4, r2, .LCPI9_0@toc@ha
; CHECK-P8-BE-NEXT: lxvw4x v2, 0, r3
; CHECK-P8-BE-NEXT: addi r4, r4, .LCPI9_0@toc@l
; CHECK-P8-BE-NEXT: lxvw4x v3, 0, r4
; CHECK-P8-BE-NEXT: addis r3, r2, .LCPI9_0@toc@ha
; CHECK-P8-BE-NEXT: addi r3, r3, .LCPI9_0@toc@l
; CHECK-P8-BE-NEXT: lxvw4x v3, 0, r3
; CHECK-P8-BE-NEXT: vperm v2, v2, v2, v3
; CHECK-P8-BE-NEXT: blr
;
@@ -372,12 +372,12 @@ define <4 x float> @load_swap50(ptr %vp1, ptr %vp2) {
define <4 x float> @load_swap51(ptr %vp1, ptr %vp2) {
; CHECK-P8-LABEL: load_swap51:
; CHECK-P8: # %bb.0:
; CHECK-P8-NEXT: addis r3, r2, .LCPI10_0@toc@ha
; CHECK-P8-NEXT: lxvd2x vs0, 0, r4
; CHECK-P8-NEXT: addis r3, r2, .LCPI10_0@toc@ha
; CHECK-P8-NEXT: addi r3, r3, .LCPI10_0@toc@l
; CHECK-P8-NEXT: lxvd2x vs1, 0, r3
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: xxswapd v3, vs1
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: xxswapd v3, vs0
; CHECK-P8-NEXT: vperm v2, v2, v2, v3
; CHECK-P8-NEXT: blr
;

View File

@@ -40,10 +40,10 @@ define signext i32 @zeroEqualityTest01(ptr %x, ptr %y) {
; CHECK-NEXT: cmpld 5, 6
; CHECK-NEXT: bne 0, .LBB1_2
; CHECK-NEXT: # %bb.1: # %loadbb1
; CHECK-NEXT: ld 3, 8(3)
; CHECK-NEXT: ld 5, 8(3)
; CHECK-NEXT: ld 4, 8(4)
; CHECK-NEXT: cmpld 3, 4
; CHECK-NEXT: li 3, 0
; CHECK-NEXT: cmpld 5, 4
; CHECK-NEXT: beqlr 0
; CHECK-NEXT: .LBB1_2: # %res_block
; CHECK-NEXT: li 3, 1
@@ -68,10 +68,10 @@ define signext i32 @zeroEqualityTest03(ptr %x, ptr %y) {
; CHECK-NEXT: cmplw 5, 6
; CHECK-NEXT: bne 0, .LBB2_3
; CHECK-NEXT: # %bb.2: # %loadbb2
; CHECK-NEXT: lbz 3, 6(3)
; CHECK-NEXT: lbz 5, 6(3)
; CHECK-NEXT: lbz 4, 6(4)
; CHECK-NEXT: cmplw 3, 4
; CHECK-NEXT: li 3, 0
; CHECK-NEXT: cmplw 5, 4
; CHECK-NEXT: beqlr 0
; CHECK-NEXT: .LBB2_3: # %res_block
; CHECK-NEXT: li 3, 1
@@ -121,18 +121,18 @@ define signext i32 @equalityFoldTwoConstants() {
define signext i32 @equalityFoldOneConstant(ptr %X) {
; CHECK-LABEL: equalityFoldOneConstant:
; CHECK: # %bb.0:
; CHECK-NEXT: ld 4, 0(3)
; CHECK-NEXT: li 5, 1
; CHECK-NEXT: ld 4, 0(3)
; CHECK-NEXT: rldic 5, 5, 32, 31
; CHECK-NEXT: cmpld 4, 5
; CHECK-NEXT: bne 0, .LBB6_2
; CHECK-NEXT: # %bb.1: # %loadbb1
; CHECK-NEXT: lis 4, -32768
; CHECK-NEXT: ld 3, 8(3)
; CHECK-NEXT: ori 4, 4, 1
; CHECK-NEXT: rldic 4, 4, 1, 30
; CHECK-NEXT: cmpld 3, 4
; CHECK-NEXT: lis 5, -32768
; CHECK-NEXT: ld 4, 8(3)
; CHECK-NEXT: li 3, 0
; CHECK-NEXT: ori 5, 5, 1
; CHECK-NEXT: rldic 5, 5, 1, 30
; CHECK-NEXT: cmpld 4, 5
; CHECK-NEXT: beq 0, .LBB6_3
; CHECK-NEXT: .LBB6_2: # %res_block
; CHECK-NEXT: li 3, 1

View File

@@ -10,9 +10,9 @@ define signext i32 @memcmp8(ptr nocapture readonly %buffer1, ptr nocapture reado
; CHECK-NEXT: subfe 5, 4, 4
; CHECK-NEXT: subc 4, 3, 4
; CHECK-NEXT: subfe 3, 3, 3
; CHECK-NEXT: neg 4, 5
; CHECK-NEXT: neg 5, 5
; CHECK-NEXT: neg 3, 3
; CHECK-NEXT: sub 3, 4, 3
; CHECK-NEXT: sub 3, 5, 3
; CHECK-NEXT: extsw 3, 3
; CHECK-NEXT: blr
%call = tail call signext i32 @memcmp(ptr %buffer1, ptr %buffer2, i64 8)
@@ -26,9 +26,9 @@ define signext i32 @memcmp4(ptr nocapture readonly %buffer1, ptr nocapture reado
; CHECK-NEXT: lwbrx 4, 0, 4
; CHECK-NEXT: sub 5, 4, 3
; CHECK-NEXT: sub 3, 3, 4
; CHECK-NEXT: rldicl 4, 5, 1, 63
; CHECK-NEXT: rldicl 5, 5, 1, 63
; CHECK-NEXT: rldicl 3, 3, 1, 63
; CHECK-NEXT: sub 3, 4, 3
; CHECK-NEXT: sub 3, 5, 3
; CHECK-NEXT: extsw 3, 3
; CHECK-NEXT: blr
%call = tail call signext i32 @memcmp(ptr %buffer1, ptr %buffer2, i64 4)

View File

@@ -852,10 +852,10 @@ entry:
define dso_local void @memset2TailV1B2(ptr nocapture noundef writeonly %p) local_unnamed_addr {
; P8-BE-LABEL: memset2TailV1B2:
; P8-BE: # %bb.0: # %entry
; P8-BE-NEXT: ld 4, L..C7(2) # %const.0
; P8-BE-NEXT: lxvw4x 0, 0, 4
; P8-BE-NEXT: li 4, -23131
; P8-BE-NEXT: sth 4, 16(3)
; P8-BE-NEXT: ld 4, L..C7(2) # %const.0
; P8-BE-NEXT: lxvw4x 0, 0, 4
; P8-BE-NEXT: stxvw4x 0, 0, 3
; P8-BE-NEXT: blr
;
@@ -877,11 +877,11 @@ define dso_local void @memset2TailV1B2(ptr nocapture noundef writeonly %p) local
;
; P8-LE-LABEL: memset2TailV1B2:
; P8-LE: # %bb.0: # %entry
; P8-LE-NEXT: li 4, -23131
; P8-LE-NEXT: sth 4, 16(3)
; P8-LE-NEXT: addis 4, 2, .LCPI16_0@toc@ha
; P8-LE-NEXT: addi 4, 4, .LCPI16_0@toc@l
; P8-LE-NEXT: lxvd2x 0, 0, 4
; P8-LE-NEXT: li 4, -23131
; P8-LE-NEXT: sth 4, 16(3)
; P8-LE-NEXT: stxvd2x 0, 0, 3
; P8-LE-NEXT: blr
;
@@ -908,10 +908,10 @@ entry:
define dso_local void @memset2TailV1B1(ptr nocapture noundef writeonly %p) local_unnamed_addr {
; P8-BE-LABEL: memset2TailV1B1:
; P8-BE: # %bb.0: # %entry
; P8-BE-NEXT: ld 4, L..C8(2) # %const.0
; P8-BE-NEXT: lxvw4x 0, 0, 4
; P8-BE-NEXT: li 4, -91
; P8-BE-NEXT: stb 4, 16(3)
; P8-BE-NEXT: ld 4, L..C8(2) # %const.0
; P8-BE-NEXT: lxvw4x 0, 0, 4
; P8-BE-NEXT: stxvw4x 0, 0, 3
; P8-BE-NEXT: blr
;
@@ -933,11 +933,11 @@ define dso_local void @memset2TailV1B1(ptr nocapture noundef writeonly %p) local
;
; P8-LE-LABEL: memset2TailV1B1:
; P8-LE: # %bb.0: # %entry
; P8-LE-NEXT: li 4, -91
; P8-LE-NEXT: stb 4, 16(3)
; P8-LE-NEXT: addis 4, 2, .LCPI17_0@toc@ha
; P8-LE-NEXT: addi 4, 4, .LCPI17_0@toc@l
; P8-LE-NEXT: lxvd2x 0, 0, 4
; P8-LE-NEXT: li 4, -91
; P8-LE-NEXT: stb 4, 16(3)
; P8-LE-NEXT: stxvd2x 0, 0, 3
; P8-LE-NEXT: blr
;
@@ -1082,10 +1082,10 @@ entry:
define dso_local void @memsetTailV0B9(ptr nocapture noundef writeonly %p) local_unnamed_addr {
; P8-BE-LABEL: memsetTailV0B9:
; P8-BE: # %bb.0: # %entry
; P8-BE-NEXT: li 4, 15
; P8-BE-NEXT: stb 4, 8(3)
; P8-BE-NEXT: lis 4, 3855
; P8-BE-NEXT: li 5, 15
; P8-BE-NEXT: ori 4, 4, 3855
; P8-BE-NEXT: stb 5, 8(3)
; P8-BE-NEXT: rldimi 4, 4, 32, 0
; P8-BE-NEXT: std 4, 0(3)
; P8-BE-NEXT: blr
@@ -1111,10 +1111,10 @@ define dso_local void @memsetTailV0B9(ptr nocapture noundef writeonly %p) local_
;
; P8-LE-LABEL: memsetTailV0B9:
; P8-LE: # %bb.0: # %entry
; P8-LE-NEXT: li 4, 15
; P8-LE-NEXT: stb 4, 8(3)
; P8-LE-NEXT: lis 4, 3855
; P8-LE-NEXT: li 5, 15
; P8-LE-NEXT: ori 4, 4, 3855
; P8-LE-NEXT: stb 5, 8(3)
; P8-LE-NEXT: rldimi 4, 4, 32, 0
; P8-LE-NEXT: std 4, 0(3)
; P8-LE-NEXT: blr
@@ -1247,10 +1247,10 @@ entry:
define dso_local void @memsetTailV0B5(ptr nocapture noundef writeonly %p) local_unnamed_addr {
; P8-BE-LABEL: memsetTailV0B5:
; P8-BE: # %bb.0: # %entry
; P8-BE-NEXT: li 4, 15
; P8-BE-NEXT: stb 4, 4(3)
; P8-BE-NEXT: lis 4, 3855
; P8-BE-NEXT: li 5, 15
; P8-BE-NEXT: ori 4, 4, 3855
; P8-BE-NEXT: stb 5, 4(3)
; P8-BE-NEXT: stw 4, 0(3)
; P8-BE-NEXT: blr
;
@@ -1273,10 +1273,10 @@ define dso_local void @memsetTailV0B5(ptr nocapture noundef writeonly %p) local_
;
; P8-LE-LABEL: memsetTailV0B5:
; P8-LE: # %bb.0: # %entry
; P8-LE-NEXT: li 4, 15
; P8-LE-NEXT: stb 4, 4(3)
; P8-LE-NEXT: lis 4, 3855
; P8-LE-NEXT: li 5, 15
; P8-LE-NEXT: ori 4, 4, 3855
; P8-LE-NEXT: stb 5, 4(3)
; P8-LE-NEXT: stw 4, 0(3)
; P8-LE-NEXT: blr
;

View File

@@ -257,8 +257,8 @@ define dso_local signext i32 @str1() local_unnamed_addr #0 {
; AIX64: # %bb.0: # %entry
; AIX64-NEXT: mflr r0
; AIX64-NEXT: stdu r1, -112(r1)
; AIX64-NEXT: ld r3, L..C0(r2) # @__ModuleStringPool
; AIX64-NEXT: li r4, 0
; AIX64-NEXT: ld r3, L..C0(r2) # @__ModuleStringPool
; AIX64-NEXT: std r0, 128(r1)
; AIX64-NEXT: ori r4, r4, 35612
; AIX64-NEXT: add r3, r3, r4
@@ -318,18 +318,18 @@ define dso_local signext i32 @array0() local_unnamed_addr #0 {
; AIX32: # %bb.0: # %entry
; AIX32-NEXT: mflr r0
; AIX32-NEXT: stwu r1, -96(r1)
; AIX32-NEXT: lwz r3, L..C0(r2) # @__ModuleStringPool
; AIX32-NEXT: lis r4, 0
; AIX32-NEXT: stw r0, 104(r1)
; AIX32-NEXT: ori r5, r4, 35596
; AIX32-NEXT: ori r4, r4, 35584
; AIX32-NEXT: lxvw4x vs0, r3, r5
; AIX32-NEXT: lxvw4x vs1, r3, r4
; AIX32-NEXT: li r4, 12
; AIX32-NEXT: lis r6, 0
; AIX32-NEXT: lwz r4, L..C0(r2) # @__ModuleStringPool
; AIX32-NEXT: li r5, 12
; AIX32-NEXT: addi r3, r1, 64
; AIX32-NEXT: rlwimi r4, r3, 0, 30, 27
; AIX32-NEXT: stxvw4x vs0, 0, r4
; AIX32-NEXT: stxvw4x vs1, 0, r3
; AIX32-NEXT: stw r0, 104(r1)
; AIX32-NEXT: ori r7, r6, 35596
; AIX32-NEXT: rlwimi r5, r3, 0, 30, 27
; AIX32-NEXT: lxvw4x vs0, r4, r7
; AIX32-NEXT: stxvw4x vs0, 0, r5
; AIX32-NEXT: ori r5, r6, 35584
; AIX32-NEXT: lxvw4x vs0, r4, r5
; AIX32-NEXT: stxvw4x vs0, 0, r3
; AIX32-NEXT: bl .calleeInt[PR]
; AIX32-NEXT: nop
; AIX32-NEXT: addi r1, r1, 96
@@ -341,17 +341,17 @@ define dso_local signext i32 @array0() local_unnamed_addr #0 {
; AIX64: # %bb.0: # %entry
; AIX64-NEXT: mflr r0
; AIX64-NEXT: stdu r1, -144(r1)
; AIX64-NEXT: ld r3, L..C0(r2) # @__ModuleStringPool
; AIX64-NEXT: li r4, 0
; AIX64-NEXT: li r3, 0
; AIX64-NEXT: ld r4, L..C0(r2) # @__ModuleStringPool
; AIX64-NEXT: std r0, 160(r1)
; AIX64-NEXT: ori r5, r4, 35596
; AIX64-NEXT: ori r4, r4, 35584
; AIX64-NEXT: lxvw4x vs0, r3, r5
; AIX64-NEXT: lxvw4x vs1, r3, r4
; AIX64-NEXT: addi r4, r1, 124
; AIX64-NEXT: ori r5, r3, 35596
; AIX64-NEXT: ori r3, r3, 35584
; AIX64-NEXT: lxvw4x vs0, r4, r5
; AIX64-NEXT: addi r5, r1, 124
; AIX64-NEXT: stxvw4x vs0, 0, r5
; AIX64-NEXT: lxvw4x vs0, r4, r3
; AIX64-NEXT: addi r3, r1, 112
; AIX64-NEXT: stxvw4x vs0, 0, r4
; AIX64-NEXT: stxvw4x vs1, 0, r3
; AIX64-NEXT: stxvw4x vs0, 0, r3
; AIX64-NEXT: bl .calleeInt[PR]
; AIX64-NEXT: nop
; AIX64-NEXT: addi r1, r1, 144
@@ -370,11 +370,11 @@ define dso_local signext i32 @array0() local_unnamed_addr #0 {
; LINUX64BE-NEXT: ori r5, r4, 35596
; LINUX64BE-NEXT: ori r4, r4, 35584
; LINUX64BE-NEXT: lxvw4x vs0, r3, r5
; LINUX64BE-NEXT: lxvw4x vs1, r3, r4
; LINUX64BE-NEXT: addi r4, r1, 124
; LINUX64BE-NEXT: addi r5, r1, 124
; LINUX64BE-NEXT: stxvw4x vs0, 0, r5
; LINUX64BE-NEXT: lxvw4x vs0, r3, r4
; LINUX64BE-NEXT: addi r3, r1, 112
; LINUX64BE-NEXT: stxvw4x vs0, 0, r4
; LINUX64BE-NEXT: stxvw4x vs1, 0, r3
; LINUX64BE-NEXT: stxvw4x vs0, 0, r3
; LINUX64BE-NEXT: bl calleeInt
; LINUX64BE-NEXT: nop
; LINUX64BE-NEXT: addi r1, r1, 144
@@ -393,11 +393,11 @@ define dso_local signext i32 @array0() local_unnamed_addr #0 {
; LINUX64LE-NEXT: ori r5, r4, 35596
; LINUX64LE-NEXT: ori r4, r4, 35584
; LINUX64LE-NEXT: lxvd2x vs0, r3, r5
; LINUX64LE-NEXT: lxvd2x vs1, r3, r4
; LINUX64LE-NEXT: addi r4, r1, 44
; LINUX64LE-NEXT: addi r5, r1, 44
; LINUX64LE-NEXT: stxvd2x vs0, 0, r5
; LINUX64LE-NEXT: lxvd2x vs0, r3, r4
; LINUX64LE-NEXT: addi r3, r1, 32
; LINUX64LE-NEXT: stxvd2x vs0, 0, r4
; LINUX64LE-NEXT: stxvd2x vs1, 0, r3
; LINUX64LE-NEXT: stxvd2x vs0, 0, r3
; LINUX64LE-NEXT: bl calleeInt
; LINUX64LE-NEXT: nop
; LINUX64LE-NEXT: addi r1, r1, 64
@@ -420,27 +420,27 @@ define dso_local signext i32 @array1() local_unnamed_addr #0 {
; AIX32-NEXT: stwu r1, -176(r1)
; AIX32-NEXT: lwz r4, L..C0(r2) # @__ModuleStringPool
; AIX32-NEXT: li r5, 96
; AIX32-NEXT: li r6, 80
; AIX32-NEXT: li r7, 64
; AIX32-NEXT: li r8, 48
; AIX32-NEXT: li r9, 32
; AIX32-NEXT: li r10, 16
; AIX32-NEXT: addi r3, r1, 64
; AIX32-NEXT: stw r0, 184(r1)
; AIX32-NEXT: lxvw4x vs0, r4, r5
; AIX32-NEXT: lxvw4x vs1, r4, r6
; AIX32-NEXT: lxvw4x vs2, r4, r7
; AIX32-NEXT: lxvw4x vs3, r4, r8
; AIX32-NEXT: lxvw4x vs4, r4, r9
; AIX32-NEXT: lxvw4x vs5, r4, r10
; AIX32-NEXT: lxvw4x vs6, 0, r4
; AIX32-NEXT: stxvw4x vs0, r3, r5
; AIX32-NEXT: stxvw4x vs1, r3, r6
; AIX32-NEXT: stxvw4x vs2, r3, r7
; AIX32-NEXT: stxvw4x vs3, r3, r8
; AIX32-NEXT: stxvw4x vs4, r3, r9
; AIX32-NEXT: stxvw4x vs5, r3, r10
; AIX32-NEXT: stxvw4x vs6, 0, r3
; AIX32-NEXT: li r5, 80
; AIX32-NEXT: lxvw4x vs0, r4, r5
; AIX32-NEXT: stxvw4x vs0, r3, r5
; AIX32-NEXT: li r5, 64
; AIX32-NEXT: lxvw4x vs0, r4, r5
; AIX32-NEXT: stxvw4x vs0, r3, r5
; AIX32-NEXT: li r5, 48
; AIX32-NEXT: lxvw4x vs0, r4, r5
; AIX32-NEXT: stxvw4x vs0, r3, r5
; AIX32-NEXT: li r5, 32
; AIX32-NEXT: lxvw4x vs0, r4, r5
; AIX32-NEXT: stxvw4x vs0, r3, r5
; AIX32-NEXT: li r5, 16
; AIX32-NEXT: lxvw4x vs0, r4, r5
; AIX32-NEXT: stxvw4x vs0, r3, r5
; AIX32-NEXT: lxvw4x vs0, 0, r4
; AIX32-NEXT: stxvw4x vs0, 0, r3
; AIX32-NEXT: bl .calleeInt[PR]
; AIX32-NEXT: nop
; AIX32-NEXT: addi r1, r1, 176
@@ -454,27 +454,27 @@ define dso_local signext i32 @array1() local_unnamed_addr #0 {
; AIX64-NEXT: stdu r1, -224(r1)
; AIX64-NEXT: ld r4, L..C0(r2) # @__ModuleStringPool
; AIX64-NEXT: li r5, 96
; AIX64-NEXT: li r6, 80
; AIX64-NEXT: li r7, 64
; AIX64-NEXT: li r8, 48
; AIX64-NEXT: li r9, 32
; AIX64-NEXT: li r10, 16
; AIX64-NEXT: addi r3, r1, 112
; AIX64-NEXT: std r0, 240(r1)
; AIX64-NEXT: lxvw4x vs0, r4, r5
; AIX64-NEXT: lxvw4x vs1, r4, r6
; AIX64-NEXT: lxvw4x vs2, r4, r7
; AIX64-NEXT: lxvw4x vs3, r4, r8
; AIX64-NEXT: lxvw4x vs4, r4, r9
; AIX64-NEXT: lxvw4x vs5, r4, r10
; AIX64-NEXT: lxvw4x vs6, 0, r4
; AIX64-NEXT: stxvw4x vs0, r3, r5
; AIX64-NEXT: stxvw4x vs1, r3, r6
; AIX64-NEXT: stxvw4x vs2, r3, r7
; AIX64-NEXT: stxvw4x vs3, r3, r8
; AIX64-NEXT: stxvw4x vs4, r3, r9
; AIX64-NEXT: stxvw4x vs5, r3, r10
; AIX64-NEXT: stxvw4x vs6, 0, r3
; AIX64-NEXT: li r5, 80
; AIX64-NEXT: lxvw4x vs0, r4, r5
; AIX64-NEXT: stxvw4x vs0, r3, r5
; AIX64-NEXT: li r5, 64
; AIX64-NEXT: lxvw4x vs0, r4, r5
; AIX64-NEXT: stxvw4x vs0, r3, r5
; AIX64-NEXT: li r5, 48
; AIX64-NEXT: lxvw4x vs0, r4, r5
; AIX64-NEXT: stxvw4x vs0, r3, r5
; AIX64-NEXT: li r5, 32
; AIX64-NEXT: lxvw4x vs0, r4, r5
; AIX64-NEXT: stxvw4x vs0, r3, r5
; AIX64-NEXT: li r5, 16
; AIX64-NEXT: lxvw4x vs0, r4, r5
; AIX64-NEXT: stxvw4x vs0, r3, r5
; AIX64-NEXT: lxvw4x vs0, 0, r4
; AIX64-NEXT: stxvw4x vs0, 0, r3
; AIX64-NEXT: bl .calleeInt[PR]
; AIX64-NEXT: nop
; AIX64-NEXT: addi r1, r1, 224
@@ -486,30 +486,30 @@ define dso_local signext i32 @array1() local_unnamed_addr #0 {
; LINUX64BE: # %bb.0: # %entry
; LINUX64BE-NEXT: mflr r0
; LINUX64BE-NEXT: stdu r1, -224(r1)
; LINUX64BE-NEXT: addis r3, r2, .L__ModuleStringPool@toc@ha
; LINUX64BE-NEXT: li r4, 96
; LINUX64BE-NEXT: li r6, 80
; LINUX64BE-NEXT: li r7, 64
; LINUX64BE-NEXT: li r8, 48
; LINUX64BE-NEXT: li r9, 32
; LINUX64BE-NEXT: li r10, 16
; LINUX64BE-NEXT: addi r5, r3, .L__ModuleStringPool@toc@l
; LINUX64BE-NEXT: addis r4, r2, .L__ModuleStringPool@toc@ha
; LINUX64BE-NEXT: li r5, 96
; LINUX64BE-NEXT: addi r3, r1, 112
; LINUX64BE-NEXT: std r0, 240(r1)
; LINUX64BE-NEXT: lxvw4x vs0, r5, r4
; LINUX64BE-NEXT: lxvw4x vs1, r5, r6
; LINUX64BE-NEXT: lxvw4x vs2, r5, r7
; LINUX64BE-NEXT: lxvw4x vs3, r5, r8
; LINUX64BE-NEXT: lxvw4x vs4, r5, r9
; LINUX64BE-NEXT: lxvw4x vs5, r5, r10
; LINUX64BE-NEXT: lxvw4x vs6, 0, r5
; LINUX64BE-NEXT: stxvw4x vs0, r3, r4
; LINUX64BE-NEXT: stxvw4x vs1, r3, r6
; LINUX64BE-NEXT: stxvw4x vs2, r3, r7
; LINUX64BE-NEXT: stxvw4x vs3, r3, r8
; LINUX64BE-NEXT: stxvw4x vs4, r3, r9
; LINUX64BE-NEXT: stxvw4x vs5, r3, r10
; LINUX64BE-NEXT: stxvw4x vs6, 0, r3
; LINUX64BE-NEXT: addi r4, r4, .L__ModuleStringPool@toc@l
; LINUX64BE-NEXT: lxvw4x vs0, r4, r5
; LINUX64BE-NEXT: stxvw4x vs0, r3, r5
; LINUX64BE-NEXT: li r5, 80
; LINUX64BE-NEXT: lxvw4x vs0, r4, r5
; LINUX64BE-NEXT: stxvw4x vs0, r3, r5
; LINUX64BE-NEXT: li r5, 64
; LINUX64BE-NEXT: lxvw4x vs0, r4, r5
; LINUX64BE-NEXT: stxvw4x vs0, r3, r5
; LINUX64BE-NEXT: li r5, 48
; LINUX64BE-NEXT: lxvw4x vs0, r4, r5
; LINUX64BE-NEXT: stxvw4x vs0, r3, r5
; LINUX64BE-NEXT: li r5, 32
; LINUX64BE-NEXT: lxvw4x vs0, r4, r5
; LINUX64BE-NEXT: stxvw4x vs0, r3, r5
; LINUX64BE-NEXT: li r5, 16
; LINUX64BE-NEXT: lxvw4x vs0, r4, r5
; LINUX64BE-NEXT: stxvw4x vs0, r3, r5
; LINUX64BE-NEXT: lxvw4x vs0, 0, r4
; LINUX64BE-NEXT: stxvw4x vs0, 0, r3
; LINUX64BE-NEXT: bl calleeInt
; LINUX64BE-NEXT: nop
; LINUX64BE-NEXT: addi r1, r1, 224
@@ -521,30 +521,30 @@ define dso_local signext i32 @array1() local_unnamed_addr #0 {
; LINUX64LE: # %bb.0: # %entry
; LINUX64LE-NEXT: mflr r0
; LINUX64LE-NEXT: stdu r1, -144(r1)
; LINUX64LE-NEXT: addis r3, r2, .L__ModuleStringPool@toc@ha
; LINUX64LE-NEXT: li r4, 96
; LINUX64LE-NEXT: li r6, 80
; LINUX64LE-NEXT: li r7, 64
; LINUX64LE-NEXT: li r8, 48
; LINUX64LE-NEXT: li r9, 32
; LINUX64LE-NEXT: li r10, 16
; LINUX64LE-NEXT: addi r5, r3, .L__ModuleStringPool@toc@l
; LINUX64LE-NEXT: addis r4, r2, .L__ModuleStringPool@toc@ha
; LINUX64LE-NEXT: li r5, 96
; LINUX64LE-NEXT: addi r3, r1, 32
; LINUX64LE-NEXT: std r0, 160(r1)
; LINUX64LE-NEXT: lxvd2x vs0, r5, r4
; LINUX64LE-NEXT: lxvd2x vs1, r5, r6
; LINUX64LE-NEXT: lxvd2x vs2, r5, r7
; LINUX64LE-NEXT: lxvd2x vs3, r5, r8
; LINUX64LE-NEXT: lxvd2x vs4, r5, r9
; LINUX64LE-NEXT: lxvd2x vs5, r5, r10
; LINUX64LE-NEXT: lxvd2x vs6, 0, r5
; LINUX64LE-NEXT: stxvd2x vs0, r3, r4
; LINUX64LE-NEXT: stxvd2x vs1, r3, r6
; LINUX64LE-NEXT: stxvd2x vs2, r3, r7
; LINUX64LE-NEXT: stxvd2x vs3, r3, r8
; LINUX64LE-NEXT: stxvd2x vs4, r3, r9
; LINUX64LE-NEXT: stxvd2x vs5, r3, r10
; LINUX64LE-NEXT: stxvd2x vs6, 0, r3
; LINUX64LE-NEXT: addi r4, r4, .L__ModuleStringPool@toc@l
; LINUX64LE-NEXT: lxvd2x vs0, r4, r5
; LINUX64LE-NEXT: stxvd2x vs0, r3, r5
; LINUX64LE-NEXT: li r5, 80
; LINUX64LE-NEXT: lxvd2x vs0, r4, r5
; LINUX64LE-NEXT: stxvd2x vs0, r3, r5
; LINUX64LE-NEXT: li r5, 64
; LINUX64LE-NEXT: lxvd2x vs0, r4, r5
; LINUX64LE-NEXT: stxvd2x vs0, r3, r5
; LINUX64LE-NEXT: li r5, 48
; LINUX64LE-NEXT: lxvd2x vs0, r4, r5
; LINUX64LE-NEXT: stxvd2x vs0, r3, r5
; LINUX64LE-NEXT: li r5, 32
; LINUX64LE-NEXT: lxvd2x vs0, r4, r5
; LINUX64LE-NEXT: stxvd2x vs0, r3, r5
; LINUX64LE-NEXT: li r5, 16
; LINUX64LE-NEXT: lxvd2x vs0, r4, r5
; LINUX64LE-NEXT: stxvd2x vs0, r3, r5
; LINUX64LE-NEXT: lxvd2x vs0, 0, r4
; LINUX64LE-NEXT: stxvd2x vs0, 0, r3
; LINUX64LE-NEXT: bl calleeInt
; LINUX64LE-NEXT: nop
; LINUX64LE-NEXT: addi r1, r1, 144
@@ -567,33 +567,33 @@ define dso_local signext i32 @array2() local_unnamed_addr #0 {
; AIX32-NEXT: stwu r1, -176(r1)
; AIX32-NEXT: lwz r4, L..C0(r2) # @__ModuleStringPool
; AIX32-NEXT: li r3, 208
; AIX32-NEXT: li r5, 192
; AIX32-NEXT: li r6, 176
; AIX32-NEXT: li r7, 160
; AIX32-NEXT: li r8, 144
; AIX32-NEXT: li r5, 96
; AIX32-NEXT: stw r0, 184(r1)
; AIX32-NEXT: lxvw4x vs0, r4, r3
; AIX32-NEXT: lxvw4x vs1, r4, r5
; AIX32-NEXT: li r5, 96
; AIX32-NEXT: addi r3, r1, 64
; AIX32-NEXT: lxvw4x vs2, r4, r6
; AIX32-NEXT: lxvw4x vs3, r4, r7
; AIX32-NEXT: li r6, 128
; AIX32-NEXT: li r7, 112
; AIX32-NEXT: lxvw4x vs4, r4, r8
; AIX32-NEXT: lxvw4x vs5, r4, r6
; AIX32-NEXT: stxvw4x vs0, r3, r5
; AIX32-NEXT: lxvw4x vs0, r4, r7
; AIX32-NEXT: li r4, 80
; AIX32-NEXT: li r5, 192
; AIX32-NEXT: lxvw4x vs0, r4, r5
; AIX32-NEXT: li r5, 80
; AIX32-NEXT: stxvw4x vs0, r3, r5
; AIX32-NEXT: li r5, 176
; AIX32-NEXT: lxvw4x vs0, r4, r5
; AIX32-NEXT: li r5, 64
; AIX32-NEXT: stxvw4x vs1, r3, r4
; AIX32-NEXT: li r4, 48
; AIX32-NEXT: stxvw4x vs2, r3, r5
; AIX32-NEXT: stxvw4x vs0, r3, r5
; AIX32-NEXT: li r5, 160
; AIX32-NEXT: lxvw4x vs0, r4, r5
; AIX32-NEXT: li r5, 48
; AIX32-NEXT: stxvw4x vs0, r3, r5
; AIX32-NEXT: li r5, 144
; AIX32-NEXT: lxvw4x vs0, r4, r5
; AIX32-NEXT: li r5, 32
; AIX32-NEXT: stxvw4x vs3, r3, r4
; AIX32-NEXT: li r4, 16
; AIX32-NEXT: stxvw4x vs4, r3, r5
; AIX32-NEXT: stxvw4x vs5, r3, r4
; AIX32-NEXT: stxvw4x vs0, r3, r5
; AIX32-NEXT: li r5, 128
; AIX32-NEXT: lxvw4x vs0, r4, r5
; AIX32-NEXT: li r5, 16
; AIX32-NEXT: stxvw4x vs0, r3, r5
; AIX32-NEXT: li r5, 112
; AIX32-NEXT: lxvw4x vs0, r4, r5
; AIX32-NEXT: stxvw4x vs0, 0, r3
; AIX32-NEXT: bl .calleeInt[PR]
; AIX32-NEXT: nop
@@ -608,33 +608,33 @@ define dso_local signext i32 @array2() local_unnamed_addr #0 {
; AIX64-NEXT: stdu r1, -224(r1)
; AIX64-NEXT: ld r4, L..C0(r2) # @__ModuleStringPool
; AIX64-NEXT: li r3, 208
; AIX64-NEXT: li r5, 192
; AIX64-NEXT: li r6, 176
; AIX64-NEXT: li r7, 160
; AIX64-NEXT: li r8, 144
; AIX64-NEXT: li r5, 96
; AIX64-NEXT: std r0, 240(r1)
; AIX64-NEXT: lxvw4x vs0, r4, r3
; AIX64-NEXT: lxvw4x vs1, r4, r5
; AIX64-NEXT: li r5, 96
; AIX64-NEXT: addi r3, r1, 112
; AIX64-NEXT: lxvw4x vs2, r4, r6
; AIX64-NEXT: lxvw4x vs3, r4, r7
; AIX64-NEXT: li r6, 128
; AIX64-NEXT: li r7, 112
; AIX64-NEXT: lxvw4x vs4, r4, r8
; AIX64-NEXT: lxvw4x vs5, r4, r6
; AIX64-NEXT: stxvw4x vs0, r3, r5
; AIX64-NEXT: lxvw4x vs0, r4, r7
; AIX64-NEXT: li r4, 80
; AIX64-NEXT: li r5, 192
; AIX64-NEXT: lxvw4x vs0, r4, r5
; AIX64-NEXT: li r5, 80
; AIX64-NEXT: stxvw4x vs0, r3, r5
; AIX64-NEXT: li r5, 176
; AIX64-NEXT: lxvw4x vs0, r4, r5
; AIX64-NEXT: li r5, 64
; AIX64-NEXT: stxvw4x vs1, r3, r4
; AIX64-NEXT: li r4, 48
; AIX64-NEXT: stxvw4x vs2, r3, r5
; AIX64-NEXT: stxvw4x vs0, r3, r5
; AIX64-NEXT: li r5, 160
; AIX64-NEXT: lxvw4x vs0, r4, r5
; AIX64-NEXT: li r5, 48
; AIX64-NEXT: stxvw4x vs0, r3, r5
; AIX64-NEXT: li r5, 144
; AIX64-NEXT: lxvw4x vs0, r4, r5
; AIX64-NEXT: li r5, 32
; AIX64-NEXT: stxvw4x vs3, r3, r4
; AIX64-NEXT: li r4, 16
; AIX64-NEXT: stxvw4x vs4, r3, r5
; AIX64-NEXT: stxvw4x vs5, r3, r4
; AIX64-NEXT: stxvw4x vs0, r3, r5
; AIX64-NEXT: li r5, 128
; AIX64-NEXT: lxvw4x vs0, r4, r5
; AIX64-NEXT: li r5, 16
; AIX64-NEXT: stxvw4x vs0, r3, r5
; AIX64-NEXT: li r5, 112
; AIX64-NEXT: lxvw4x vs0, r4, r5
; AIX64-NEXT: stxvw4x vs0, 0, r3
; AIX64-NEXT: bl .calleeInt[PR]
; AIX64-NEXT: nop
@@ -649,34 +649,34 @@ define dso_local signext i32 @array2() local_unnamed_addr #0 {
; LINUX64BE-NEXT: stdu r1, -224(r1)
; LINUX64BE-NEXT: addis r3, r2, .L__ModuleStringPool@toc@ha
; LINUX64BE-NEXT: li r4, 208
; LINUX64BE-NEXT: li r6, 176
; LINUX64BE-NEXT: li r7, 144
; LINUX64BE-NEXT: li r5, 96
; LINUX64BE-NEXT: std r0, 240(r1)
; LINUX64BE-NEXT: addi r5, r3, .L__ModuleStringPool@toc@l
; LINUX64BE-NEXT: li r3, 192
; LINUX64BE-NEXT: lxvw4x vs0, r5, r4
; LINUX64BE-NEXT: li r4, 160
; LINUX64BE-NEXT: lxvw4x vs1, r5, r3
; LINUX64BE-NEXT: addi r6, r3, .L__ModuleStringPool@toc@l
; LINUX64BE-NEXT: addi r3, r1, 112
; LINUX64BE-NEXT: lxvw4x vs2, r5, r6
; LINUX64BE-NEXT: li r6, 96
; LINUX64BE-NEXT: lxvw4x vs3, r5, r4
; LINUX64BE-NEXT: li r4, 128
; LINUX64BE-NEXT: lxvw4x vs4, r5, r7
; LINUX64BE-NEXT: li r7, 112
; LINUX64BE-NEXT: lxvw4x vs5, r5, r4
; LINUX64BE-NEXT: lxvw4x vs0, r6, r4
; LINUX64BE-NEXT: li r4, 192
; LINUX64BE-NEXT: stxvw4x vs0, r3, r5
; LINUX64BE-NEXT: lxvw4x vs0, r6, r4
; LINUX64BE-NEXT: li r4, 80
; LINUX64BE-NEXT: stxvw4x vs0, r3, r6
; LINUX64BE-NEXT: lxvw4x vs0, r5, r7
; LINUX64BE-NEXT: li r5, 64
; LINUX64BE-NEXT: stxvw4x vs1, r3, r4
; LINUX64BE-NEXT: stxvw4x vs0, r3, r4
; LINUX64BE-NEXT: li r4, 176
; LINUX64BE-NEXT: lxvw4x vs0, r6, r4
; LINUX64BE-NEXT: li r4, 64
; LINUX64BE-NEXT: stxvw4x vs0, r3, r4
; LINUX64BE-NEXT: li r4, 160
; LINUX64BE-NEXT: lxvw4x vs0, r6, r4
; LINUX64BE-NEXT: li r4, 48
; LINUX64BE-NEXT: stxvw4x vs2, r3, r5
; LINUX64BE-NEXT: li r5, 32
; LINUX64BE-NEXT: stxvw4x vs3, r3, r4
; LINUX64BE-NEXT: stxvw4x vs0, r3, r4
; LINUX64BE-NEXT: li r4, 144
; LINUX64BE-NEXT: lxvw4x vs0, r6, r4
; LINUX64BE-NEXT: li r4, 32
; LINUX64BE-NEXT: stxvw4x vs0, r3, r4
; LINUX64BE-NEXT: li r4, 128
; LINUX64BE-NEXT: lxvw4x vs0, r6, r4
; LINUX64BE-NEXT: li r4, 16
; LINUX64BE-NEXT: stxvw4x vs4, r3, r5
; LINUX64BE-NEXT: stxvw4x vs5, r3, r4
; LINUX64BE-NEXT: stxvw4x vs0, r3, r4
; LINUX64BE-NEXT: li r4, 112
; LINUX64BE-NEXT: lxvw4x vs0, r6, r4
; LINUX64BE-NEXT: stxvw4x vs0, 0, r3
; LINUX64BE-NEXT: bl calleeInt
; LINUX64BE-NEXT: nop
@@ -691,34 +691,34 @@ define dso_local signext i32 @array2() local_unnamed_addr #0 {
; LINUX64LE-NEXT: stdu r1, -144(r1)
; LINUX64LE-NEXT: addis r3, r2, .L__ModuleStringPool@toc@ha
; LINUX64LE-NEXT: li r4, 208
; LINUX64LE-NEXT: li r6, 176
; LINUX64LE-NEXT: li r7, 144
; LINUX64LE-NEXT: li r5, 96
; LINUX64LE-NEXT: std r0, 160(r1)
; LINUX64LE-NEXT: addi r5, r3, .L__ModuleStringPool@toc@l
; LINUX64LE-NEXT: li r3, 192
; LINUX64LE-NEXT: lxvd2x vs0, r5, r4
; LINUX64LE-NEXT: li r4, 160
; LINUX64LE-NEXT: lxvd2x vs1, r5, r3
; LINUX64LE-NEXT: addi r6, r3, .L__ModuleStringPool@toc@l
; LINUX64LE-NEXT: addi r3, r1, 32
; LINUX64LE-NEXT: lxvd2x vs2, r5, r6
; LINUX64LE-NEXT: li r6, 96
; LINUX64LE-NEXT: lxvd2x vs3, r5, r4
; LINUX64LE-NEXT: li r4, 128
; LINUX64LE-NEXT: lxvd2x vs4, r5, r7
; LINUX64LE-NEXT: li r7, 112
; LINUX64LE-NEXT: lxvd2x vs5, r5, r4
; LINUX64LE-NEXT: lxvd2x vs0, r6, r4
; LINUX64LE-NEXT: li r4, 192
; LINUX64LE-NEXT: stxvd2x vs0, r3, r5
; LINUX64LE-NEXT: lxvd2x vs0, r6, r4
; LINUX64LE-NEXT: li r4, 80
; LINUX64LE-NEXT: stxvd2x vs0, r3, r6
; LINUX64LE-NEXT: lxvd2x vs0, r5, r7
; LINUX64LE-NEXT: li r5, 64
; LINUX64LE-NEXT: stxvd2x vs1, r3, r4
; LINUX64LE-NEXT: stxvd2x vs0, r3, r4
; LINUX64LE-NEXT: li r4, 176
; LINUX64LE-NEXT: lxvd2x vs0, r6, r4
; LINUX64LE-NEXT: li r4, 64
; LINUX64LE-NEXT: stxvd2x vs0, r3, r4
; LINUX64LE-NEXT: li r4, 160
; LINUX64LE-NEXT: lxvd2x vs0, r6, r4
; LINUX64LE-NEXT: li r4, 48
; LINUX64LE-NEXT: stxvd2x vs2, r3, r5
; LINUX64LE-NEXT: li r5, 32
; LINUX64LE-NEXT: stxvd2x vs3, r3, r4
; LINUX64LE-NEXT: stxvd2x vs0, r3, r4
; LINUX64LE-NEXT: li r4, 144
; LINUX64LE-NEXT: lxvd2x vs0, r6, r4
; LINUX64LE-NEXT: li r4, 32
; LINUX64LE-NEXT: stxvd2x vs0, r3, r4
; LINUX64LE-NEXT: li r4, 128
; LINUX64LE-NEXT: lxvd2x vs0, r6, r4
; LINUX64LE-NEXT: li r4, 16
; LINUX64LE-NEXT: stxvd2x vs4, r3, r5
; LINUX64LE-NEXT: stxvd2x vs5, r3, r4
; LINUX64LE-NEXT: stxvd2x vs0, r3, r4
; LINUX64LE-NEXT: li r4, 112
; LINUX64LE-NEXT: lxvd2x vs0, r6, r4
; LINUX64LE-NEXT: stxvd2x vs0, 0, r3
; LINUX64LE-NEXT: bl calleeInt
; LINUX64LE-NEXT: nop

View File

@@ -8,7 +8,7 @@
; RUN: -ppc-asm-full-reg-names < %s | FileCheck %s --check-prefixes=LINUX64LE,LINUXDATA
;; This @GLOBALSTRING is a user of @.str which causes @.str to not get pooled.
;; This @GLOBALSTRING is a user of @.str which causes @.str to not get pooled.
@.str = private unnamed_addr constant [47 x i8] c"This is the global string that is at the top.\0A\00", align 1
@GLOBALSTRING = dso_local local_unnamed_addr global ptr @.str, align 8
@@ -169,18 +169,19 @@ define dso_local signext i32 @str3() local_unnamed_addr #0 {
; AIX32-NEXT: mflr r0
; AIX32-NEXT: stwu r1, -64(r1)
; AIX32-NEXT: stw r0, 72(r1)
; AIX32-NEXT: stw r30, 56(r1) # 4-byte Folded Spill
; AIX32-NEXT: lwz r30, L..C0(r2) # @__ModuleStringPool
; AIX32-NEXT: addi r3, r30, 434
; AIX32-NEXT: stw r31, 60(r1) # 4-byte Folded Spill
; AIX32-NEXT: lwz r31, L..C0(r2) # @__ModuleStringPool
; AIX32-NEXT: addi r3, r31, 434
; AIX32-NEXT: bl .callee[PR]
; AIX32-NEXT: nop
; AIX32-NEXT: addi r4, r31, 388
; AIX32-NEXT: mr r31, r3
; AIX32-NEXT: mr r3, r4
; AIX32-NEXT: addi r3, r30, 388
; AIX32-NEXT: bl .callee[PR]
; AIX32-NEXT: nop
; AIX32-NEXT: add r3, r3, r31
; AIX32-NEXT: lwz r31, 60(r1) # 4-byte Folded Reload
; AIX32-NEXT: lwz r30, 56(r1) # 4-byte Folded Reload
; AIX32-NEXT: addi r1, r1, 64
; AIX32-NEXT: lwz r0, 8(r1)
; AIX32-NEXT: mtlr r0
@@ -193,8 +194,8 @@ define dso_local signext i32 @str3() local_unnamed_addr #0 {
; AIX64-NEXT: std r0, 144(r1)
; AIX64-NEXT: std r30, 112(r1) # 8-byte Folded Spill
; AIX64-NEXT: ld r30, L..C0(r2) # @__ModuleStringPool
; AIX64-NEXT: std r31, 120(r1) # 8-byte Folded Spill
; AIX64-NEXT: addi r3, r30, 434
; AIX64-NEXT: std r31, 120(r1) # 8-byte Folded Spill
; AIX64-NEXT: bl .callee[PR]
; AIX64-NEXT: nop
; AIX64-NEXT: mr r31, r3
@@ -217,8 +218,8 @@ define dso_local signext i32 @str3() local_unnamed_addr #0 {
; LINUX64BE-NEXT: addis r3, r2, .L__ModuleStringPool@toc@ha
; LINUX64BE-NEXT: std r0, 160(r1)
; LINUX64BE-NEXT: std r29, 120(r1) # 8-byte Folded Spill
; LINUX64BE-NEXT: std r30, 128(r1) # 8-byte Folded Spill
; LINUX64BE-NEXT: addi r29, r3, .L__ModuleStringPool@toc@l
; LINUX64BE-NEXT: std r30, 128(r1) # 8-byte Folded Spill
; LINUX64BE-NEXT: addi r3, r29, 434
; LINUX64BE-NEXT: bl callee
; LINUX64BE-NEXT: nop
@@ -397,17 +398,17 @@ define dso_local signext i32 @array1() local_unnamed_addr #0 {
; AIX32: # %bb.0: # %entry
; AIX32-NEXT: mflr r0
; AIX32-NEXT: stwu r1, -96(r1)
; AIX32-NEXT: lwz r3, L..C0(r2) # @__ModuleStringPool
; AIX32-NEXT: li r4, 372
; AIX32-NEXT: li r5, 360
; AIX32-NEXT: stw r0, 104(r1)
; AIX32-NEXT: lxvw4x vs0, r3, r4
; AIX32-NEXT: lxvw4x vs1, r3, r5
; AIX32-NEXT: li r4, 12
; AIX32-NEXT: lwz r4, L..C0(r2) # @__ModuleStringPool
; AIX32-NEXT: li r6, 372
; AIX32-NEXT: li r5, 12
; AIX32-NEXT: addi r3, r1, 64
; AIX32-NEXT: rlwimi r4, r3, 0, 30, 27
; AIX32-NEXT: stxvw4x vs0, 0, r4
; AIX32-NEXT: stxvw4x vs1, 0, r3
; AIX32-NEXT: stw r0, 104(r1)
; AIX32-NEXT: rlwimi r5, r3, 0, 30, 27
; AIX32-NEXT: lxvw4x vs0, r4, r6
; AIX32-NEXT: stxvw4x vs0, 0, r5
; AIX32-NEXT: li r5, 360
; AIX32-NEXT: lxvw4x vs0, r4, r5
; AIX32-NEXT: stxvw4x vs0, 0, r3
; AIX32-NEXT: bl .calleeInt[PR]
; AIX32-NEXT: nop
; AIX32-NEXT: addi r1, r1, 96
@@ -421,14 +422,14 @@ define dso_local signext i32 @array1() local_unnamed_addr #0 {
; AIX64-NEXT: stdu r1, -144(r1)
; AIX64-NEXT: ld r3, L..C0(r2) # @__ModuleStringPool
; AIX64-NEXT: li r4, 372
; AIX64-NEXT: li r5, 360
; AIX64-NEXT: std r0, 160(r1)
; AIX64-NEXT: lxvw4x vs0, r3, r4
; AIX64-NEXT: lxvw4x vs1, r3, r5
; AIX64-NEXT: addi r4, r1, 124
; AIX64-NEXT: addi r3, r1, 112
; AIX64-NEXT: stxvw4x vs0, 0, r4
; AIX64-NEXT: stxvw4x vs1, 0, r3
; AIX64-NEXT: li r4, 360
; AIX64-NEXT: lxvw4x vs0, r3, r4
; AIX64-NEXT: addi r3, r1, 112
; AIX64-NEXT: stxvw4x vs0, 0, r3
; AIX64-NEXT: bl .calleeInt[PR]
; AIX64-NEXT: nop
; AIX64-NEXT: addi r1, r1, 144
@@ -442,15 +443,15 @@ define dso_local signext i32 @array1() local_unnamed_addr #0 {
; LINUX64BE-NEXT: stdu r1, -144(r1)
; LINUX64BE-NEXT: addis r3, r2, .L__ModuleStringPool@toc@ha
; LINUX64BE-NEXT: li r4, 372
; LINUX64BE-NEXT: li r5, 360
; LINUX64BE-NEXT: std r0, 160(r1)
; LINUX64BE-NEXT: addi r3, r3, .L__ModuleStringPool@toc@l
; LINUX64BE-NEXT: lxvw4x vs0, r3, r4
; LINUX64BE-NEXT: lxvw4x vs1, r3, r5
; LINUX64BE-NEXT: addi r4, r1, 124
; LINUX64BE-NEXT: addi r3, r1, 112
; LINUX64BE-NEXT: stxvw4x vs0, 0, r4
; LINUX64BE-NEXT: stxvw4x vs1, 0, r3
; LINUX64BE-NEXT: li r4, 360
; LINUX64BE-NEXT: lxvw4x vs0, r3, r4
; LINUX64BE-NEXT: addi r3, r1, 112
; LINUX64BE-NEXT: stxvw4x vs0, 0, r3
; LINUX64BE-NEXT: bl calleeInt
; LINUX64BE-NEXT: nop
; LINUX64BE-NEXT: addi r1, r1, 144
@@ -464,15 +465,15 @@ define dso_local signext i32 @array1() local_unnamed_addr #0 {
; LINUX64LE-NEXT: stdu r1, -64(r1)
; LINUX64LE-NEXT: addis r3, r2, .L__ModuleStringPool@toc@ha
; LINUX64LE-NEXT: li r4, 372
; LINUX64LE-NEXT: li r5, 360
; LINUX64LE-NEXT: std r0, 80(r1)
; LINUX64LE-NEXT: addi r3, r3, .L__ModuleStringPool@toc@l
; LINUX64LE-NEXT: lxvd2x vs0, r3, r4
; LINUX64LE-NEXT: lxvd2x vs1, r3, r5
; LINUX64LE-NEXT: addi r4, r1, 44
; LINUX64LE-NEXT: addi r3, r1, 32
; LINUX64LE-NEXT: stxvd2x vs0, 0, r4
; LINUX64LE-NEXT: stxvd2x vs1, 0, r3
; LINUX64LE-NEXT: li r4, 360
; LINUX64LE-NEXT: lxvd2x vs0, r3, r4
; LINUX64LE-NEXT: addi r3, r1, 32
; LINUX64LE-NEXT: stxvd2x vs0, 0, r3
; LINUX64LE-NEXT: bl calleeInt
; LINUX64LE-NEXT: nop
; LINUX64LE-NEXT: addi r1, r1, 64
@@ -532,21 +533,20 @@ define dso_local signext i32 @str6() local_unnamed_addr #0 {
; AIX32-NEXT: mflr r0
; AIX32-NEXT: stwu r1, -80(r1)
; AIX32-NEXT: li r3, 17152
; AIX32-NEXT: lis r4, 16963
; AIX32-NEXT: stw r0, 88(r1)
; AIX32-NEXT: lis r5, 16706
; AIX32-NEXT: sth r3, 72(r1)
; AIX32-NEXT: ori r3, r4, 16706
; AIX32-NEXT: ori r4, r5, 17217
; AIX32-NEXT: stw r31, 76(r1) # 4-byte Folded Spill
; AIX32-NEXT: sth r3, 72(r1)
; AIX32-NEXT: lis r3, 16963
; AIX32-NEXT: ori r3, r3, 16706
; AIX32-NEXT: stw r3, 68(r1)
; AIX32-NEXT: lis r3, 16706
; AIX32-NEXT: ori r3, r3, 17217
; AIX32-NEXT: stw r3, 64(r1)
; AIX32-NEXT: addi r3, r1, 64
; AIX32-NEXT: stw r4, 64(r1)
; AIX32-NEXT: bl .callee[PR]
; AIX32-NEXT: nop
; AIX32-NEXT: addi r4, r1, 69
; AIX32-NEXT: mr r31, r3
; AIX32-NEXT: mr r3, r4
; AIX32-NEXT: addi r3, r1, 69
; AIX32-NEXT: bl .callee[PR]
; AIX32-NEXT: nop
; AIX32-NEXT: add r3, r3, r31
@@ -560,14 +560,14 @@ define dso_local signext i32 @str6() local_unnamed_addr #0 {
; AIX64: # %bb.0: # %entry
; AIX64-NEXT: mflr r0
; AIX64-NEXT: stdu r1, -144(r1)
; AIX64-NEXT: lis r3, 16706
; AIX64-NEXT: li r3, 17152
; AIX64-NEXT: std r0, 160(r1)
; AIX64-NEXT: li r4, 17152
; AIX64-NEXT: std r31, 136(r1) # 8-byte Folded Spill
; AIX64-NEXT: sth r3, 128(r1)
; AIX64-NEXT: lis r3, 16706
; AIX64-NEXT: ori r3, r3, 17217
; AIX64-NEXT: rldic r3, r3, 32, 1
; AIX64-NEXT: oris r3, r3, 16963
; AIX64-NEXT: sth r4, 128(r1)
; AIX64-NEXT: ori r3, r3, 16706
; AIX64-NEXT: std r3, 120(r1)
; AIX64-NEXT: addi r3, r1, 120
@@ -589,14 +589,14 @@ define dso_local signext i32 @str6() local_unnamed_addr #0 {
; LINUX64BE: # %bb.0: # %entry
; LINUX64BE-NEXT: mflr r0
; LINUX64BE-NEXT: stdu r1, -144(r1)
; LINUX64BE-NEXT: lis r3, 16706
; LINUX64BE-NEXT: li r3, 17152
; LINUX64BE-NEXT: std r0, 160(r1)
; LINUX64BE-NEXT: li r4, 17152
; LINUX64BE-NEXT: std r30, 128(r1) # 8-byte Folded Spill
; LINUX64BE-NEXT: sth r3, 120(r1)
; LINUX64BE-NEXT: lis r3, 16706
; LINUX64BE-NEXT: ori r3, r3, 17217
; LINUX64BE-NEXT: rldic r3, r3, 32, 1
; LINUX64BE-NEXT: oris r3, r3, 16963
; LINUX64BE-NEXT: sth r4, 120(r1)
; LINUX64BE-NEXT: ori r3, r3, 16706
; LINUX64BE-NEXT: std r3, 112(r1)
; LINUX64BE-NEXT: addi r3, r1, 112
@@ -619,11 +619,11 @@ define dso_local signext i32 @str6() local_unnamed_addr #0 {
; LINUX64LE-NEXT: mflr r0
; LINUX64LE-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; LINUX64LE-NEXT: stdu r1, -64(r1)
; LINUX64LE-NEXT: lis r3, 8480
; LINUX64LE-NEXT: li r3, 67
; LINUX64LE-NEXT: std r0, 80(r1)
; LINUX64LE-NEXT: li r4, 67
; LINUX64LE-NEXT: sth r3, 40(r1)
; LINUX64LE-NEXT: lis r3, 8480
; LINUX64LE-NEXT: ori r3, r3, 41377
; LINUX64LE-NEXT: sth r4, 40(r1)
; LINUX64LE-NEXT: rldic r3, r3, 33, 1
; LINUX64LE-NEXT: oris r3, r3, 16707
; LINUX64LE-NEXT: ori r3, r3, 16961
@@ -665,10 +665,9 @@ define dso_local signext i32 @str7() local_unnamed_addr #0 {
; AIX32-NEXT: lwz r3, 0(r3)
; AIX32-NEXT: bl .callee[PR]
; AIX32-NEXT: nop
; AIX32-NEXT: lwz r4, L..C0(r2) # @__ModuleStringPool
; AIX32-NEXT: mr r31, r3
; AIX32-NEXT: addi r4, r4, 458
; AIX32-NEXT: mr r3, r4
; AIX32-NEXT: lwz r3, L..C0(r2) # @__ModuleStringPool
; AIX32-NEXT: addi r3, r3, 458
; AIX32-NEXT: bl .callee[PR]
; AIX32-NEXT: nop
; AIX32-NEXT: add r3, r3, r31
@@ -707,8 +706,8 @@ define dso_local signext i32 @str7() local_unnamed_addr #0 {
; LINUX64BE-NEXT: stdu r1, -128(r1)
; LINUX64BE-NEXT: std r0, 144(r1)
; LINUX64BE-NEXT: addis r3, r2, GLOBALSTRING@toc@ha
; LINUX64BE-NEXT: std r30, 112(r1) # 8-byte Folded Spill
; LINUX64BE-NEXT: ld r3, GLOBALSTRING@toc@l(r3)
; LINUX64BE-NEXT: std r30, 112(r1) # 8-byte Folded Spill
; LINUX64BE-NEXT: bl callee
; LINUX64BE-NEXT: nop
; LINUX64BE-NEXT: mr r30, r3
@@ -766,10 +765,9 @@ define dso_local signext i32 @mixed1() local_unnamed_addr #0 {
; AIX32-NEXT: stw r31, 60(r1) # 4-byte Folded Spill
; AIX32-NEXT: bl .calleeInt[PR]
; AIX32-NEXT: nop
; AIX32-NEXT: lwz r4, L..C0(r2) # @__ModuleStringPool
; AIX32-NEXT: mr r31, r3
; AIX32-NEXT: addi r4, r4, 400
; AIX32-NEXT: mr r3, r4
; AIX32-NEXT: lwz r3, L..C0(r2) # @__ModuleStringPool
; AIX32-NEXT: addi r3, r3, 400
; AIX32-NEXT: bl .callee[PR]
; AIX32-NEXT: nop
; AIX32-NEXT: add r3, r3, r31
@@ -863,33 +861,28 @@ define dso_local signext i32 @mixed2() local_unnamed_addr #0 {
; AIX32-NEXT: stw r0, 120(r1)
; AIX32-NEXT: stw r30, 104(r1) # 4-byte Folded Spill
; AIX32-NEXT: lwz r30, L..C0(r2) # @__ModuleStringPool
; AIX32-NEXT: li r3, 372
; AIX32-NEXT: li r4, 360
; AIX32-NEXT: stw r31, 108(r1) # 4-byte Folded Spill
; AIX32-NEXT: lxvw4x vs0, r30, r3
; AIX32-NEXT: lxvw4x vs1, r30, r4
; AIX32-NEXT: li r5, 372
; AIX32-NEXT: li r4, 12
; AIX32-NEXT: addi r3, r1, 64
; AIX32-NEXT: stw r31, 108(r1) # 4-byte Folded Spill
; AIX32-NEXT: rlwimi r4, r3, 0, 30, 27
; AIX32-NEXT: lxvw4x vs0, r30, r5
; AIX32-NEXT: stxvw4x vs0, 0, r4
; AIX32-NEXT: stxvw4x vs1, 0, r3
; AIX32-NEXT: li r4, 360
; AIX32-NEXT: lxvw4x vs0, r30, r4
; AIX32-NEXT: stxvw4x vs0, 0, r3
; AIX32-NEXT: bl .calleeInt[PR]
; AIX32-NEXT: nop
; AIX32-NEXT: lwz r4, L..C3(r2) # @IntArray2
; AIX32-NEXT: mr r31, r3
; AIX32-NEXT: mr r3, r4
; AIX32-NEXT: lwz r3, L..C3(r2) # @IntArray2
; AIX32-NEXT: bl .calleeInt[PR]
; AIX32-NEXT: nop
; AIX32-NEXT: addi r4, r30, 400
; AIX32-NEXT: mr r5, r3
; AIX32-NEXT: mr r3, r4
; AIX32-NEXT: add r31, r5, r31
; AIX32-NEXT: add r31, r3, r31
; AIX32-NEXT: addi r3, r30, 400
; AIX32-NEXT: bl .callee[PR]
; AIX32-NEXT: nop
; AIX32-NEXT: addi r4, r30, 473
; AIX32-NEXT: mr r5, r3
; AIX32-NEXT: mr r3, r4
; AIX32-NEXT: add r31, r31, r5
; AIX32-NEXT: add r31, r31, r3
; AIX32-NEXT: addi r3, r30, 473
; AIX32-NEXT: bl .callee[PR]
; AIX32-NEXT: nop
; AIX32-NEXT: add r3, r31, r3
@@ -908,28 +901,26 @@ define dso_local signext i32 @mixed2() local_unnamed_addr #0 {
; AIX64-NEXT: std r30, 144(r1) # 8-byte Folded Spill
; AIX64-NEXT: ld r30, L..C0(r2) # @__ModuleStringPool
; AIX64-NEXT: li r3, 372
; AIX64-NEXT: li r4, 360
; AIX64-NEXT: std r31, 152(r1) # 8-byte Folded Spill
; AIX64-NEXT: lxvw4x vs0, r30, r3
; AIX64-NEXT: lxvw4x vs1, r30, r4
; AIX64-NEXT: addi r4, r1, 124
; AIX64-NEXT: addi r3, r1, 124
; AIX64-NEXT: stxvw4x vs0, 0, r3
; AIX64-NEXT: li r3, 360
; AIX64-NEXT: lxvw4x vs0, r30, r3
; AIX64-NEXT: addi r3, r1, 112
; AIX64-NEXT: stxvw4x vs0, 0, r4
; AIX64-NEXT: stxvw4x vs1, 0, r3
; AIX64-NEXT: stxvw4x vs0, 0, r3
; AIX64-NEXT: bl .calleeInt[PR]
; AIX64-NEXT: nop
; AIX64-NEXT: mr r31, r3
; AIX64-NEXT: ld r3, L..C3(r2) # @IntArray2
; AIX64-NEXT: bl .calleeInt[PR]
; AIX64-NEXT: nop
; AIX64-NEXT: addi r4, r30, 400
; AIX64-NEXT: add r31, r3, r31
; AIX64-NEXT: mr r3, r4
; AIX64-NEXT: addi r3, r30, 400
; AIX64-NEXT: bl .callee[PR]
; AIX64-NEXT: nop
; AIX64-NEXT: addi r4, r30, 473
; AIX64-NEXT: add r31, r31, r3
; AIX64-NEXT: mr r3, r4
; AIX64-NEXT: addi r3, r30, 473
; AIX64-NEXT: bl .callee[PR]
; AIX64-NEXT: nop
; AIX64-NEXT: add r3, r31, r3
@@ -948,16 +939,16 @@ define dso_local signext i32 @mixed2() local_unnamed_addr #0 {
; LINUX64BE-NEXT: addis r3, r2, .L__ModuleStringPool@toc@ha
; LINUX64BE-NEXT: std r0, 192(r1)
; LINUX64BE-NEXT: std r29, 152(r1) # 8-byte Folded Spill
; LINUX64BE-NEXT: li r4, 360
; LINUX64BE-NEXT: li r4, 372
; LINUX64BE-NEXT: std r30, 160(r1) # 8-byte Folded Spill
; LINUX64BE-NEXT: addi r29, r3, .L__ModuleStringPool@toc@l
; LINUX64BE-NEXT: li r3, 372
; LINUX64BE-NEXT: addi r3, r1, 124
; LINUX64BE-NEXT: lxvw4x vs0, r29, r4
; LINUX64BE-NEXT: stxvw4x vs0, 0, r3
; LINUX64BE-NEXT: li r3, 360
; LINUX64BE-NEXT: lxvw4x vs0, r29, r3
; LINUX64BE-NEXT: addi r3, r1, 112
; LINUX64BE-NEXT: lxvw4x vs1, r29, r4
; LINUX64BE-NEXT: addi r4, r1, 124
; LINUX64BE-NEXT: stxvw4x vs0, 0, r4
; LINUX64BE-NEXT: stxvw4x vs1, 0, r3
; LINUX64BE-NEXT: stxvw4x vs0, 0, r3
; LINUX64BE-NEXT: bl calleeInt
; LINUX64BE-NEXT: nop
; LINUX64BE-NEXT: mr r30, r3
@@ -965,14 +956,12 @@ define dso_local signext i32 @mixed2() local_unnamed_addr #0 {
; LINUX64BE-NEXT: addi r3, r3, IntArray2@toc@l
; LINUX64BE-NEXT: bl calleeInt
; LINUX64BE-NEXT: nop
; LINUX64BE-NEXT: addi r4, r29, 400
; LINUX64BE-NEXT: add r30, r3, r30
; LINUX64BE-NEXT: mr r3, r4
; LINUX64BE-NEXT: addi r3, r29, 400
; LINUX64BE-NEXT: bl callee
; LINUX64BE-NEXT: nop
; LINUX64BE-NEXT: addi r4, r29, 473
; LINUX64BE-NEXT: add r30, r30, r3
; LINUX64BE-NEXT: mr r3, r4
; LINUX64BE-NEXT: addi r3, r29, 473
; LINUX64BE-NEXT: bl callee
; LINUX64BE-NEXT: nop
; LINUX64BE-NEXT: add r3, r30, r3
@@ -991,16 +980,16 @@ define dso_local signext i32 @mixed2() local_unnamed_addr #0 {
; LINUX64LE-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; LINUX64LE-NEXT: stdu r1, -96(r1)
; LINUX64LE-NEXT: addis r3, r2, .L__ModuleStringPool@toc@ha
; LINUX64LE-NEXT: li r4, 360
; LINUX64LE-NEXT: li r4, 372
; LINUX64LE-NEXT: std r0, 112(r1)
; LINUX64LE-NEXT: addi r29, r3, .L__ModuleStringPool@toc@l
; LINUX64LE-NEXT: li r3, 372
; LINUX64LE-NEXT: addi r3, r1, 44
; LINUX64LE-NEXT: lxvd2x vs0, r29, r4
; LINUX64LE-NEXT: stxvd2x vs0, 0, r3
; LINUX64LE-NEXT: li r3, 360
; LINUX64LE-NEXT: lxvd2x vs0, r29, r3
; LINUX64LE-NEXT: lxvd2x vs1, r29, r4
; LINUX64LE-NEXT: addi r4, r1, 44
; LINUX64LE-NEXT: addi r3, r1, 32
; LINUX64LE-NEXT: stxvd2x vs0, 0, r4
; LINUX64LE-NEXT: stxvd2x vs1, 0, r3
; LINUX64LE-NEXT: stxvd2x vs0, 0, r3
; LINUX64LE-NEXT: bl calleeInt
; LINUX64LE-NEXT: nop
; LINUX64LE-NEXT: mr r30, r3
@@ -1008,14 +997,12 @@ define dso_local signext i32 @mixed2() local_unnamed_addr #0 {
; LINUX64LE-NEXT: addi r3, r3, IntArray2@toc@l
; LINUX64LE-NEXT: bl calleeInt
; LINUX64LE-NEXT: nop
; LINUX64LE-NEXT: addi r4, r29, 400
; LINUX64LE-NEXT: add r30, r3, r30
; LINUX64LE-NEXT: mr r3, r4
; LINUX64LE-NEXT: addi r3, r29, 400
; LINUX64LE-NEXT: bl callee
; LINUX64LE-NEXT: nop
; LINUX64LE-NEXT: addi r4, r29, 473
; LINUX64LE-NEXT: add r30, r30, r3
; LINUX64LE-NEXT: mr r3, r4
; LINUX64LE-NEXT: addi r3, r29, 473
; LINUX64LE-NEXT: bl callee
; LINUX64LE-NEXT: nop
; LINUX64LE-NEXT: add r3, r30, r3

View File

@@ -67,23 +67,23 @@ define dso_local void @testLdSt(i64 %SrcIdx, i64 %DstIdx) {
; LE-PWR8-LABEL: testLdSt:
; LE-PWR8: # %bb.0: # %entry
; LE-PWR8-NEXT: addis r3, r2, f@toc@ha
; LE-PWR8-NEXT: li r4, 96
; LE-PWR8-NEXT: li r5, 112
; LE-PWR8-NEXT: li r4, 64
; LE-PWR8-NEXT: addi r3, r3, f@toc@l
; LE-PWR8-NEXT: lxvd2x vs0, r3, r4
; LE-PWR8-NEXT: li r4, 64
; LE-PWR8-NEXT: lxvd2x vs1, r3, r5
; LE-PWR8-NEXT: li r5, 80
; LE-PWR8-NEXT: li r4, 80
; LE-PWR8-NEXT: lxvd2x vs1, r3, r4
; LE-PWR8-NEXT: li r4, 96
; LE-PWR8-NEXT: lxvd2x vs2, r3, r4
; LE-PWR8-NEXT: lxvd2x vs3, r3, r5
; LE-PWR8-NEXT: li r4, 112
; LE-PWR8-NEXT: lxvd2x vs3, r3, r4
; LE-PWR8-NEXT: li r4, 176
; LE-PWR8-NEXT: li r5, 160
; LE-PWR8-NEXT: stxvd2x vs1, r3, r4
; LE-PWR8-NEXT: li r4, 144
; LE-PWR8-NEXT: stxvd2x vs0, r3, r5
; LE-PWR8-NEXT: li r5, 128
; LE-PWR8-NEXT: stxvd2x vs3, r3, r4
; LE-PWR8-NEXT: stxvd2x vs2, r3, r5
; LE-PWR8-NEXT: li r4, 160
; LE-PWR8-NEXT: stxvd2x vs2, r3, r4
; LE-PWR8-NEXT: li r4, 144
; LE-PWR8-NEXT: stxvd2x vs1, r3, r4
; LE-PWR8-NEXT: li r4, 128
; LE-PWR8-NEXT: stxvd2x vs0, r3, r4
; LE-PWR8-NEXT: blr
;
; BE-PWR9-LABEL: testLdSt:
@@ -103,23 +103,23 @@ define dso_local void @testLdSt(i64 %SrcIdx, i64 %DstIdx) {
; BE-PWR8-LABEL: testLdSt:
; BE-PWR8: # %bb.0: # %entry
; BE-PWR8-NEXT: addis r3, r2, f@toc@ha
; BE-PWR8-NEXT: li r4, 96
; BE-PWR8-NEXT: li r5, 112
; BE-PWR8-NEXT: li r4, 64
; BE-PWR8-NEXT: addi r3, r3, f@toc@l
; BE-PWR8-NEXT: lxvd2x vs0, r3, r4
; BE-PWR8-NEXT: li r4, 64
; BE-PWR8-NEXT: lxvd2x vs1, r3, r5
; BE-PWR8-NEXT: li r5, 80
; BE-PWR8-NEXT: li r4, 80
; BE-PWR8-NEXT: lxvd2x vs1, r3, r4
; BE-PWR8-NEXT: li r4, 96
; BE-PWR8-NEXT: lxvd2x vs2, r3, r4
; BE-PWR8-NEXT: lxvd2x vs3, r3, r5
; BE-PWR8-NEXT: li r4, 112
; BE-PWR8-NEXT: lxvd2x vs3, r3, r4
; BE-PWR8-NEXT: li r4, 176
; BE-PWR8-NEXT: li r5, 160
; BE-PWR8-NEXT: stxvd2x vs1, r3, r4
; BE-PWR8-NEXT: li r4, 144
; BE-PWR8-NEXT: stxvd2x vs0, r3, r5
; BE-PWR8-NEXT: li r5, 128
; BE-PWR8-NEXT: stxvd2x vs3, r3, r4
; BE-PWR8-NEXT: stxvd2x vs2, r3, r5
; BE-PWR8-NEXT: li r4, 160
; BE-PWR8-NEXT: stxvd2x vs2, r3, r4
; BE-PWR8-NEXT: li r4, 144
; BE-PWR8-NEXT: stxvd2x vs1, r3, r4
; BE-PWR8-NEXT: li r4, 128
; BE-PWR8-NEXT: stxvd2x vs0, r3, r4
; BE-PWR8-NEXT: blr
entry:
%arrayidx = getelementptr inbounds <512 x i1>, ptr @f, i64 1
@@ -187,21 +187,21 @@ define dso_local void @testXLdSt(i64 %SrcIdx, i64 %DstIdx) {
; LE-PWR8: # %bb.0: # %entry
; LE-PWR8-NEXT: addis r5, r2, f@toc@ha
; LE-PWR8-NEXT: sldi r3, r3, 6
; LE-PWR8-NEXT: li r6, 48
; LE-PWR8-NEXT: li r8, 16
; LE-PWR8-NEXT: li r9, 32
; LE-PWR8-NEXT: li r7, 16
; LE-PWR8-NEXT: li r8, 32
; LE-PWR8-NEXT: li r9, 48
; LE-PWR8-NEXT: addi r5, r5, f@toc@l
; LE-PWR8-NEXT: add r7, r5, r3
; LE-PWR8-NEXT: lxvd2x vs0, r5, r3
; LE-PWR8-NEXT: add r6, r5, r3
; LE-PWR8-NEXT: lxvd2x vs3, r5, r3
; LE-PWR8-NEXT: sldi r3, r4, 6
; LE-PWR8-NEXT: lxvd2x vs1, r7, r6
; LE-PWR8-NEXT: lxvd2x vs2, r7, r8
; LE-PWR8-NEXT: add r4, r5, r3
; LE-PWR8-NEXT: lxvd2x vs3, r7, r9
; LE-PWR8-NEXT: stxvd2x vs0, r5, r3
; LE-PWR8-NEXT: stxvd2x vs1, r4, r6
; LE-PWR8-NEXT: stxvd2x vs3, r4, r9
; LE-PWR8-NEXT: stxvd2x vs2, r4, r8
; LE-PWR8-NEXT: lxvd2x vs0, r6, r7
; LE-PWR8-NEXT: lxvd2x vs1, r6, r8
; LE-PWR8-NEXT: lxvd2x vs2, r6, r9
; LE-PWR8-NEXT: stxvd2x vs3, r5, r3
; LE-PWR8-NEXT: add r3, r5, r3
; LE-PWR8-NEXT: stxvd2x vs2, r3, r9
; LE-PWR8-NEXT: stxvd2x vs1, r3, r8
; LE-PWR8-NEXT: stxvd2x vs0, r3, r7
; LE-PWR8-NEXT: blr
;
; BE-PWR9-LABEL: testXLdSt:
@@ -226,21 +226,21 @@ define dso_local void @testXLdSt(i64 %SrcIdx, i64 %DstIdx) {
; BE-PWR8: # %bb.0: # %entry
; BE-PWR8-NEXT: addis r5, r2, f@toc@ha
; BE-PWR8-NEXT: sldi r3, r3, 6
; BE-PWR8-NEXT: li r6, 32
; BE-PWR8-NEXT: li r7, 48
; BE-PWR8-NEXT: li r9, 16
; BE-PWR8-NEXT: li r7, 32
; BE-PWR8-NEXT: li r8, 48
; BE-PWR8-NEXT: sldi r4, r4, 6
; BE-PWR8-NEXT: addi r5, r5, f@toc@l
; BE-PWR8-NEXT: add r8, r5, r3
; BE-PWR8-NEXT: lxvd2x vs2, r5, r3
; BE-PWR8-NEXT: sldi r3, r4, 6
; BE-PWR8-NEXT: lxvd2x vs0, r8, r6
; BE-PWR8-NEXT: lxvd2x vs1, r8, r7
; BE-PWR8-NEXT: add r4, r5, r3
; BE-PWR8-NEXT: lxvd2x vs3, r8, r9
; BE-PWR8-NEXT: stxvd2x vs2, r5, r3
; BE-PWR8-NEXT: stxvd2x vs1, r4, r7
; BE-PWR8-NEXT: stxvd2x vs0, r4, r6
; BE-PWR8-NEXT: stxvd2x vs3, r4, r9
; BE-PWR8-NEXT: add r6, r5, r3
; BE-PWR8-NEXT: lxvd2x vs0, r5, r3
; BE-PWR8-NEXT: li r3, 16
; BE-PWR8-NEXT: lxvd2x vs1, r6, r3
; BE-PWR8-NEXT: lxvd2x vs2, r6, r7
; BE-PWR8-NEXT: lxvd2x vs3, r6, r8
; BE-PWR8-NEXT: add r6, r5, r4
; BE-PWR8-NEXT: stxvd2x vs0, r5, r4
; BE-PWR8-NEXT: stxvd2x vs3, r6, r8
; BE-PWR8-NEXT: stxvd2x vs2, r6, r7
; BE-PWR8-NEXT: stxvd2x vs1, r6, r3
; BE-PWR8-NEXT: blr
entry:
%arrayidx = getelementptr inbounds <512 x i1>, ptr @f, i64 %SrcIdx
@@ -302,23 +302,23 @@ define dso_local void @testUnalignedLdSt() {
; LE-PWR8-LABEL: testUnalignedLdSt:
; LE-PWR8: # %bb.0: # %entry
; LE-PWR8-NEXT: addis r3, r2, f@toc@ha
; LE-PWR8-NEXT: li r4, 43
; LE-PWR8-NEXT: li r5, 59
; LE-PWR8-NEXT: li r4, 11
; LE-PWR8-NEXT: addi r3, r3, f@toc@l
; LE-PWR8-NEXT: lxvd2x vs0, r3, r4
; LE-PWR8-NEXT: li r4, 11
; LE-PWR8-NEXT: lxvd2x vs1, r3, r5
; LE-PWR8-NEXT: li r5, 27
; LE-PWR8-NEXT: li r4, 27
; LE-PWR8-NEXT: lxvd2x vs1, r3, r4
; LE-PWR8-NEXT: li r4, 43
; LE-PWR8-NEXT: lxvd2x vs2, r3, r4
; LE-PWR8-NEXT: lxvd2x vs3, r3, r5
; LE-PWR8-NEXT: li r4, 59
; LE-PWR8-NEXT: lxvd2x vs3, r3, r4
; LE-PWR8-NEXT: li r4, 67
; LE-PWR8-NEXT: li r5, 51
; LE-PWR8-NEXT: stxvd2x vs1, r3, r4
; LE-PWR8-NEXT: li r4, 35
; LE-PWR8-NEXT: stxvd2x vs0, r3, r5
; LE-PWR8-NEXT: li r5, 19
; LE-PWR8-NEXT: stxvd2x vs3, r3, r4
; LE-PWR8-NEXT: stxvd2x vs2, r3, r5
; LE-PWR8-NEXT: li r4, 51
; LE-PWR8-NEXT: stxvd2x vs2, r3, r4
; LE-PWR8-NEXT: li r4, 35
; LE-PWR8-NEXT: stxvd2x vs1, r3, r4
; LE-PWR8-NEXT: li r4, 19
; LE-PWR8-NEXT: stxvd2x vs0, r3, r4
; LE-PWR8-NEXT: blr
;
; BE-PWR9-LABEL: testUnalignedLdSt:
@@ -346,23 +346,23 @@ define dso_local void @testUnalignedLdSt() {
; BE-PWR8-LABEL: testUnalignedLdSt:
; BE-PWR8: # %bb.0: # %entry
; BE-PWR8-NEXT: addis r3, r2, f@toc@ha
; BE-PWR8-NEXT: li r4, 43
; BE-PWR8-NEXT: li r5, 59
; BE-PWR8-NEXT: li r4, 11
; BE-PWR8-NEXT: addi r3, r3, f@toc@l
; BE-PWR8-NEXT: lxvd2x vs0, r3, r4
; BE-PWR8-NEXT: li r4, 11
; BE-PWR8-NEXT: lxvd2x vs1, r3, r5
; BE-PWR8-NEXT: li r5, 27
; BE-PWR8-NEXT: li r4, 27
; BE-PWR8-NEXT: lxvd2x vs1, r3, r4
; BE-PWR8-NEXT: li r4, 43
; BE-PWR8-NEXT: lxvd2x vs2, r3, r4
; BE-PWR8-NEXT: lxvd2x vs3, r3, r5
; BE-PWR8-NEXT: li r4, 59
; BE-PWR8-NEXT: lxvd2x vs3, r3, r4
; BE-PWR8-NEXT: li r4, 67
; BE-PWR8-NEXT: li r5, 51
; BE-PWR8-NEXT: stxvd2x vs1, r3, r4
; BE-PWR8-NEXT: li r4, 35
; BE-PWR8-NEXT: stxvd2x vs0, r3, r5
; BE-PWR8-NEXT: li r5, 19
; BE-PWR8-NEXT: stxvd2x vs3, r3, r4
; BE-PWR8-NEXT: stxvd2x vs2, r3, r5
; BE-PWR8-NEXT: li r4, 51
; BE-PWR8-NEXT: stxvd2x vs2, r3, r4
; BE-PWR8-NEXT: li r4, 35
; BE-PWR8-NEXT: stxvd2x vs1, r3, r4
; BE-PWR8-NEXT: li r4, 19
; BE-PWR8-NEXT: stxvd2x vs0, r3, r4
; BE-PWR8-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, ptr @f, i64 11
@@ -405,14 +405,14 @@ define dso_local void @testLdStPair(i64 %SrcIdx, i64 %DstIdx) {
; LE-PWR8: # %bb.0: # %entry
; LE-PWR8-NEXT: addis r3, r2, g@toc@ha
; LE-PWR8-NEXT: li r4, 32
; LE-PWR8-NEXT: li r5, 48
; LE-PWR8-NEXT: addi r3, r3, g@toc@l
; LE-PWR8-NEXT: lxvd2x vs0, r3, r4
; LE-PWR8-NEXT: lxvd2x vs1, r3, r5
; LE-PWR8-NEXT: li r4, 48
; LE-PWR8-NEXT: lxvd2x vs1, r3, r4
; LE-PWR8-NEXT: li r4, 80
; LE-PWR8-NEXT: li r5, 64
; LE-PWR8-NEXT: stxvd2x vs1, r3, r4
; LE-PWR8-NEXT: stxvd2x vs0, r3, r5
; LE-PWR8-NEXT: li r4, 64
; LE-PWR8-NEXT: stxvd2x vs0, r3, r4
; LE-PWR8-NEXT: blr
;
; BE-PWR9-LABEL: testLdStPair:
@@ -429,14 +429,14 @@ define dso_local void @testLdStPair(i64 %SrcIdx, i64 %DstIdx) {
; BE-PWR8: # %bb.0: # %entry
; BE-PWR8-NEXT: addis r3, r2, g@toc@ha
; BE-PWR8-NEXT: li r4, 32
; BE-PWR8-NEXT: li r5, 48
; BE-PWR8-NEXT: addi r3, r3, g@toc@l
; BE-PWR8-NEXT: lxvd2x vs0, r3, r4
; BE-PWR8-NEXT: lxvd2x vs1, r3, r5
; BE-PWR8-NEXT: li r4, 48
; BE-PWR8-NEXT: lxvd2x vs1, r3, r4
; BE-PWR8-NEXT: li r4, 80
; BE-PWR8-NEXT: li r5, 64
; BE-PWR8-NEXT: stxvd2x vs1, r3, r4
; BE-PWR8-NEXT: stxvd2x vs0, r3, r5
; BE-PWR8-NEXT: li r4, 64
; BE-PWR8-NEXT: stxvd2x vs0, r3, r4
; BE-PWR8-NEXT: blr
entry:
%arrayidx = getelementptr inbounds <256 x i1>, ptr @g, i64 1
@@ -521,15 +521,15 @@ define dso_local void @testXLdStPair(i64 %SrcIdx, i64 %DstIdx) {
; BE-PWR8: # %bb.0: # %entry
; BE-PWR8-NEXT: addis r5, r2, g@toc@ha
; BE-PWR8-NEXT: sldi r3, r3, 5
; BE-PWR8-NEXT: li r7, 16
; BE-PWR8-NEXT: sldi r4, r4, 5
; BE-PWR8-NEXT: addi r5, r5, g@toc@l
; BE-PWR8-NEXT: add r6, r5, r3
; BE-PWR8-NEXT: lxvd2x vs0, r5, r3
; BE-PWR8-NEXT: sldi r3, r4, 5
; BE-PWR8-NEXT: lxvd2x vs1, r6, r7
; BE-PWR8-NEXT: add r4, r5, r3
; BE-PWR8-NEXT: stxvd2x vs0, r5, r3
; BE-PWR8-NEXT: stxvd2x vs1, r4, r7
; BE-PWR8-NEXT: li r3, 16
; BE-PWR8-NEXT: lxvd2x vs1, r6, r3
; BE-PWR8-NEXT: add r6, r5, r4
; BE-PWR8-NEXT: stxvd2x vs0, r5, r4
; BE-PWR8-NEXT: stxvd2x vs1, r6, r3
; BE-PWR8-NEXT: blr
entry:
%arrayidx = getelementptr inbounds <256 x i1>, ptr @g, i64 %SrcIdx
@@ -576,14 +576,14 @@ define dso_local void @testUnalignedLdStPair() {
; LE-PWR8: # %bb.0: # %entry
; LE-PWR8-NEXT: addis r3, r2, g@toc@ha
; LE-PWR8-NEXT: li r4, 11
; LE-PWR8-NEXT: li r5, 27
; LE-PWR8-NEXT: addi r3, r3, g@toc@l
; LE-PWR8-NEXT: lxvd2x vs0, r3, r4
; LE-PWR8-NEXT: lxvd2x vs1, r3, r5
; LE-PWR8-NEXT: li r4, 27
; LE-PWR8-NEXT: lxvd2x vs1, r3, r4
; LE-PWR8-NEXT: li r4, 35
; LE-PWR8-NEXT: li r5, 19
; LE-PWR8-NEXT: stxvd2x vs1, r3, r4
; LE-PWR8-NEXT: stxvd2x vs0, r3, r5
; LE-PWR8-NEXT: li r4, 19
; LE-PWR8-NEXT: stxvd2x vs0, r3, r4
; LE-PWR8-NEXT: blr
;
; BE-PWR9-LABEL: testUnalignedLdStPair:
@@ -604,14 +604,14 @@ define dso_local void @testUnalignedLdStPair() {
; BE-PWR8: # %bb.0: # %entry
; BE-PWR8-NEXT: addis r3, r2, g@toc@ha
; BE-PWR8-NEXT: li r4, 11
; BE-PWR8-NEXT: li r5, 27
; BE-PWR8-NEXT: addi r3, r3, g@toc@l
; BE-PWR8-NEXT: lxvd2x vs0, r3, r4
; BE-PWR8-NEXT: lxvd2x vs1, r3, r5
; BE-PWR8-NEXT: li r4, 27
; BE-PWR8-NEXT: lxvd2x vs1, r3, r4
; BE-PWR8-NEXT: li r4, 35
; BE-PWR8-NEXT: li r5, 19
; BE-PWR8-NEXT: stxvd2x vs1, r3, r4
; BE-PWR8-NEXT: stxvd2x vs0, r3, r5
; BE-PWR8-NEXT: li r4, 19
; BE-PWR8-NEXT: stxvd2x vs0, r3, r4
; BE-PWR8-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, ptr @g, i64 11

View File

@@ -20,7 +20,7 @@ define void @bn_mul_comba8(ptr nocapture %r, ptr nocapture readonly %a, ptr noca
; CHECK-ITIN: mulhdu
; CHECK-ITIN-NEXT: mulld
; CHECK-ITIN-NEXT: mulhdu
; CHECK-ITIN-NEXT: mulld
; CHECK-ITIN: mulld
; CHECK-ITIN-NEXT: mulhdu
%1 = load i64, ptr %a, align 8

View File

@@ -4,36 +4,35 @@
define signext i32 @test(ptr noalias %PtrA, ptr noalias %PtrB, i32 signext %LenA, i32 signext %LenB) #0 {
; CHECK-LABEL: test:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: li 6, 0
; CHECK-NEXT: addi 7, 3, 4
; CHECK-NEXT: addi 6, 3, 4
; CHECK-NEXT: addi 4, 4, -4
; CHECK-NEXT: li 8, 0
; CHECK-NEXT: li 7, 0
; CHECK-NEXT: .LBB0_1: # %block3
; CHECK-NEXT: # =>This Loop Header: Depth=1
; CHECK-NEXT: # Child Loop BB0_2 Depth 2
; CHECK-NEXT: mr 9, 6
; CHECK-NEXT: addi 6, 6, 1
; CHECK-NEXT: extsw 8, 8
; CHECK-NEXT: cmpw 6, 5
; CHECK-NEXT: extsw 9, 9
; CHECK-NEXT: crnot 20, 0
; CHECK-NEXT: sldi 10, 8, 2
; CHECK-NEXT: sldi 9, 9, 2
; CHECK-NEXT: extsw 9, 8
; CHECK-NEXT: addi 8, 8, 1
; CHECK-NEXT: extsw 7, 7
; CHECK-NEXT: cmpw 8, 5
; CHECK-NEXT: sldi 10, 7, 2
; CHECK-NEXT: sldi 9, 9, 2
; CHECK-NEXT: addi 7, 7, 1
; CHECK-NEXT: add 10, 4, 10
; CHECK-NEXT: crnot 20, 0
; CHECK-NEXT: bc 12, 20, .LBB0_5
; CHECK-NEXT: .p2align 5
; CHECK-NEXT: .LBB0_2: # %if.end
; CHECK-NEXT: # Parent Loop BB0_1 Depth=1
; CHECK-NEXT: # => This Inner Loop Header: Depth=2
; CHECK-NEXT: lwz 11, 4(10)
; CHECK-NEXT: cmplwi 11, 0
; CHECK-NEXT: lwz 12, 4(10)
; CHECK-NEXT: addi 11, 10, 4
; CHECK-NEXT: cmplwi 12, 0
; CHECK-NEXT: beq 0, .LBB0_4
; CHECK-NEXT: # %bb.3: # %if.then4
; CHECK-NEXT: #
; CHECK-NEXT: lwzx 12, 7, 9
; CHECK-NEXT: addi 8, 8, 1
; CHECK-NEXT: lwzx 12, 6, 9
; CHECK-NEXT: addi 7, 7, 1
; CHECK-NEXT: stw 12, 8(10)
; CHECK-NEXT: mr 10, 11
; CHECK-NEXT: bc 4, 20, .LBB0_2
@@ -41,9 +40,9 @@ define signext i32 @test(ptr noalias %PtrA, ptr noalias %PtrB, i32 signext %LenA
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB0_4: # %if.end9
; CHECK-NEXT: #
; CHECK-NEXT: lwzx 10, 7, 9
; CHECK-NEXT: lwzx 10, 6, 9
; CHECK-NEXT: addi 10, 10, 1
; CHECK-NEXT: stwx 10, 7, 9
; CHECK-NEXT: stwx 10, 6, 9
; CHECK-NEXT: b .LBB0_1
; CHECK-NEXT: .LBB0_5: # %if.then
; CHECK-NEXT: lwax 3, 9, 3

View File

@@ -18,25 +18,25 @@ define dso_local void @test(ptr nocapture readonly %Fptr, ptr nocapture %Vptr) l
; CHECK-NEXT: vspltisw 2, 1
; CHECK-NEXT: .Ltmp0:
; CHECK-NEXT: .loc 1 2 38 prologue_end # test.c:2:38
; CHECK-NEXT: lfs 1, 0(3)
; CHECK-NEXT: lfs 0, 0(3)
; CHECK-NEXT: addis 3, 2, .LCPI0_0@toc@ha
; CHECK-NEXT: .Ltmp1:
; CHECK-NEXT: .loc 1 0 38 is_stmt 0 # test.c:0:38
; CHECK-NEXT: xvcvsxwdp 1, 34
; CHECK-NEXT: lfd 2, .LCPI0_0@toc@l(3)
; CHECK-NEXT: xvcvsxwdp 0, 34
; CHECK-NEXT: .loc 1 2 27 # test.c:2:27
; CHECK-NEXT: xssubdp 0, 0, 1
; CHECK-NEXT: xssubdp 1, 1, 0
; CHECK-NEXT: .loc 1 2 45 # test.c:2:45
; CHECK-NEXT: xsadddp 0, 0, 2
; CHECK-NEXT: xsadddp 1, 1, 2
; CHECK-NEXT: .Ltmp2:
; CHECK-NEXT: #DEBUG_VALUE: test:Val <- undef
; CHECK-NEXT: .loc 1 0 45 # test.c:0:45
; CHECK-NEXT: xxlxor 2, 2, 2
; CHECK-NEXT: .loc 1 3 26 is_stmt 1 # test.c:3:26
; CHECK-NEXT: xxmrghd 1, 1, 2
; CHECK-NEXT: xxmrghd 0, 2, 0
; CHECK-NEXT: xvcvdpsp 34, 1
; CHECK-NEXT: xvcvdpsp 35, 0
; CHECK-NEXT: xxmrghd 0, 0, 2
; CHECK-NEXT: xvcvdpsp 34, 0
; CHECK-NEXT: xxmrghd 1, 2, 1
; CHECK-NEXT: xvcvdpsp 35, 1
; CHECK-NEXT: vmrgew 2, 2, 3
; CHECK-NEXT: .loc 1 3 9 is_stmt 0 # test.c:3:9
; CHECK-NEXT: xxswapd 0, 34

View File

@@ -30,11 +30,11 @@ entry:
; CHECK-NO-ISEL: bc 12, 2, [[TRUE:.LBB[0-9]+]]
; CHECK-NO-ISEL: b [[SUCCESSOR:.LBB[0-9]+]]
; CHECK-NO-ISEL: [[TRUE]]
; CHECK-NO-ISEL-NEXT: addi {{[0-9]+}}, {{[0-9]+}}, 0
; CHECK-NO-ISEL: addi {{[0-9]+}}, {{[0-9]+}}, -2
; CHECK: addi
; CHECK: isel
; CHECK-NO-ISEL: bc 12, 2, [[TRUE:.LBB[0-9]+]]
; CHECK-NO-ISEL: ori 10, 11, 0
; CHECK-NO-ISEL: ori 3, 7, 0
; CHECK-NO-ISEL-NEXT: b [[SUCCESSOR:.LBB[0-9]+]]
; CHECK-NO-ISEL: [[TRUE]]
; CHECK: blr

View File

@@ -1112,11 +1112,11 @@ entry:
define signext i8 @getvelsc(<16 x i8> %vsc, i32 signext %i) {
; CHECK-LABEL: getvelsc:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: clrldi r4, r5, 32
; CHECK-NEXT: li r3, 7
; CHECK-NEXT: andi. r5, r4, 8
; CHECK-NEXT: andc r3, r3, r4
; CHECK-NEXT: lvsl v3, 0, r5
; CHECK-NEXT: clrldi r3, r5, 32
; CHECK-NEXT: andi. r4, r3, 8
; CHECK-NEXT: lvsl v3, 0, r4
; CHECK-NEXT: li r4, 7
; CHECK-NEXT: andc r3, r4, r3
; CHECK-NEXT: sldi r3, r3, 3
; CHECK-NEXT: vperm v2, v2, v2, v3
; CHECK-NEXT: mfvsrd r4, v2
@@ -1126,14 +1126,14 @@ define signext i8 @getvelsc(<16 x i8> %vsc, i32 signext %i) {
;
; CHECK-LE-LABEL: getvelsc:
; CHECK-LE: # %bb.0: # %entry
; CHECK-LE-NEXT: li r3, 8
; CHECK-LE-NEXT: clrldi r4, r5, 32
; CHECK-LE-NEXT: andc r3, r3, r4
; CHECK-LE-NEXT: lvsl v3, 0, r3
; CHECK-LE-NEXT: li r3, 7
; CHECK-LE-NEXT: and r3, r3, r4
; CHECK-LE-NEXT: vperm v2, v2, v2, v3
; CHECK-LE-NEXT: clrldi r3, r5, 32
; CHECK-LE-NEXT: li r4, 8
; CHECK-LE-NEXT: andc r4, r4, r3
; CHECK-LE-NEXT: lvsl v3, 0, r4
; CHECK-LE-NEXT: li r4, 7
; CHECK-LE-NEXT: and r3, r4, r3
; CHECK-LE-NEXT: sldi r3, r3, 3
; CHECK-LE-NEXT: vperm v2, v2, v2, v3
; CHECK-LE-NEXT: mfvsrd r4, v2
; CHECK-LE-NEXT: srd r3, r4, r3
; CHECK-LE-NEXT: extsb r3, r3
@@ -1142,10 +1142,10 @@ define signext i8 @getvelsc(<16 x i8> %vsc, i32 signext %i) {
; CHECK-AIX-LABEL: getvelsc:
; CHECK-AIX: # %bb.0: # %entry
; CHECK-AIX-NEXT: clrldi 3, 3, 32
; CHECK-AIX-NEXT: andi. 4, 3, 8
; CHECK-AIX-NEXT: lvsl 3, 0, 4
; CHECK-AIX-NEXT: li 4, 7
; CHECK-AIX-NEXT: andi. 5, 3, 8
; CHECK-AIX-NEXT: andc 3, 4, 3
; CHECK-AIX-NEXT: lvsl 3, 0, 5
; CHECK-AIX-NEXT: sldi 3, 3, 3
; CHECK-AIX-NEXT: vperm 2, 2, 2, 3
; CHECK-AIX-NEXT: mfvsrd 4, 34
@@ -1163,11 +1163,11 @@ entry:
define zeroext i8 @getveluc(<16 x i8> %vuc, i32 signext %i) {
; CHECK-LABEL: getveluc:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: clrldi r4, r5, 32
; CHECK-NEXT: li r3, 7
; CHECK-NEXT: andi. r5, r4, 8
; CHECK-NEXT: andc r3, r3, r4
; CHECK-NEXT: lvsl v3, 0, r5
; CHECK-NEXT: clrldi r3, r5, 32
; CHECK-NEXT: andi. r4, r3, 8
; CHECK-NEXT: lvsl v3, 0, r4
; CHECK-NEXT: li r4, 7
; CHECK-NEXT: andc r3, r4, r3
; CHECK-NEXT: sldi r3, r3, 3
; CHECK-NEXT: vperm v2, v2, v2, v3
; CHECK-NEXT: mfvsrd r4, v2
@@ -1177,14 +1177,14 @@ define zeroext i8 @getveluc(<16 x i8> %vuc, i32 signext %i) {
;
; CHECK-LE-LABEL: getveluc:
; CHECK-LE: # %bb.0: # %entry
; CHECK-LE-NEXT: li r3, 8
; CHECK-LE-NEXT: clrldi r4, r5, 32
; CHECK-LE-NEXT: andc r3, r3, r4
; CHECK-LE-NEXT: lvsl v3, 0, r3
; CHECK-LE-NEXT: li r3, 7
; CHECK-LE-NEXT: and r3, r3, r4
; CHECK-LE-NEXT: vperm v2, v2, v2, v3
; CHECK-LE-NEXT: clrldi r3, r5, 32
; CHECK-LE-NEXT: li r4, 8
; CHECK-LE-NEXT: andc r4, r4, r3
; CHECK-LE-NEXT: lvsl v3, 0, r4
; CHECK-LE-NEXT: li r4, 7
; CHECK-LE-NEXT: and r3, r4, r3
; CHECK-LE-NEXT: sldi r3, r3, 3
; CHECK-LE-NEXT: vperm v2, v2, v2, v3
; CHECK-LE-NEXT: mfvsrd r4, v2
; CHECK-LE-NEXT: srd r3, r4, r3
; CHECK-LE-NEXT: clrldi r3, r3, 56
@@ -1193,10 +1193,10 @@ define zeroext i8 @getveluc(<16 x i8> %vuc, i32 signext %i) {
; CHECK-AIX-LABEL: getveluc:
; CHECK-AIX: # %bb.0: # %entry
; CHECK-AIX-NEXT: clrldi 3, 3, 32
; CHECK-AIX-NEXT: andi. 4, 3, 8
; CHECK-AIX-NEXT: lvsl 3, 0, 4
; CHECK-AIX-NEXT: li 4, 7
; CHECK-AIX-NEXT: andi. 5, 3, 8
; CHECK-AIX-NEXT: andc 3, 4, 3
; CHECK-AIX-NEXT: lvsl 3, 0, 5
; CHECK-AIX-NEXT: sldi 3, 3, 3
; CHECK-AIX-NEXT: vperm 2, 2, 2, 3
; CHECK-AIX-NEXT: mfvsrd 4, 34
@@ -1678,13 +1678,13 @@ entry:
define signext i16 @getvelss(<8 x i16> %vss, i32 signext %i) {
; CHECK-LABEL: getvelss:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: clrldi r4, r5, 32
; CHECK-NEXT: li r3, 3
; CHECK-NEXT: andi. r5, r4, 4
; CHECK-NEXT: andc r3, r3, r4
; CHECK-NEXT: sldi r5, r5, 1
; CHECK-NEXT: clrldi r3, r5, 32
; CHECK-NEXT: andi. r4, r3, 4
; CHECK-NEXT: sldi r4, r4, 1
; CHECK-NEXT: lvsl v3, 0, r4
; CHECK-NEXT: li r4, 3
; CHECK-NEXT: andc r3, r4, r3
; CHECK-NEXT: sldi r3, r3, 4
; CHECK-NEXT: lvsl v3, 0, r5
; CHECK-NEXT: vperm v2, v2, v2, v3
; CHECK-NEXT: mfvsrd r4, v2
; CHECK-NEXT: srd r3, r4, r3
@@ -1693,15 +1693,15 @@ define signext i16 @getvelss(<8 x i16> %vss, i32 signext %i) {
;
; CHECK-LE-LABEL: getvelss:
; CHECK-LE: # %bb.0: # %entry
; CHECK-LE-NEXT: li r3, 4
; CHECK-LE-NEXT: clrldi r4, r5, 32
; CHECK-LE-NEXT: andc r3, r3, r4
; CHECK-LE-NEXT: sldi r3, r3, 1
; CHECK-LE-NEXT: lvsl v3, 0, r3
; CHECK-LE-NEXT: li r3, 3
; CHECK-LE-NEXT: and r3, r3, r4
; CHECK-LE-NEXT: vperm v2, v2, v2, v3
; CHECK-LE-NEXT: clrldi r3, r5, 32
; CHECK-LE-NEXT: li r4, 4
; CHECK-LE-NEXT: andc r4, r4, r3
; CHECK-LE-NEXT: sldi r4, r4, 1
; CHECK-LE-NEXT: lvsl v3, 0, r4
; CHECK-LE-NEXT: li r4, 3
; CHECK-LE-NEXT: and r3, r4, r3
; CHECK-LE-NEXT: sldi r3, r3, 4
; CHECK-LE-NEXT: vperm v2, v2, v2, v3
; CHECK-LE-NEXT: mfvsrd r4, v2
; CHECK-LE-NEXT: srd r3, r4, r3
; CHECK-LE-NEXT: extsh r3, r3
@@ -1710,12 +1710,12 @@ define signext i16 @getvelss(<8 x i16> %vss, i32 signext %i) {
; CHECK-AIX-LABEL: getvelss:
; CHECK-AIX: # %bb.0: # %entry
; CHECK-AIX-NEXT: clrldi 3, 3, 32
; CHECK-AIX-NEXT: andi. 4, 3, 4
; CHECK-AIX-NEXT: sldi 4, 4, 1
; CHECK-AIX-NEXT: lvsl 3, 0, 4
; CHECK-AIX-NEXT: li 4, 3
; CHECK-AIX-NEXT: andi. 5, 3, 4
; CHECK-AIX-NEXT: andc 3, 4, 3
; CHECK-AIX-NEXT: sldi 5, 5, 1
; CHECK-AIX-NEXT: sldi 3, 3, 4
; CHECK-AIX-NEXT: lvsl 3, 0, 5
; CHECK-AIX-NEXT: vperm 2, 2, 2, 3
; CHECK-AIX-NEXT: mfvsrd 4, 34
; CHECK-AIX-NEXT: srd 3, 4, 3
@@ -1732,13 +1732,13 @@ entry:
define zeroext i16 @getvelus(<8 x i16> %vus, i32 signext %i) {
; CHECK-LABEL: getvelus:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: clrldi r4, r5, 32
; CHECK-NEXT: li r3, 3
; CHECK-NEXT: andi. r5, r4, 4
; CHECK-NEXT: andc r3, r3, r4
; CHECK-NEXT: sldi r5, r5, 1
; CHECK-NEXT: clrldi r3, r5, 32
; CHECK-NEXT: andi. r4, r3, 4
; CHECK-NEXT: sldi r4, r4, 1
; CHECK-NEXT: lvsl v3, 0, r4
; CHECK-NEXT: li r4, 3
; CHECK-NEXT: andc r3, r4, r3
; CHECK-NEXT: sldi r3, r3, 4
; CHECK-NEXT: lvsl v3, 0, r5
; CHECK-NEXT: vperm v2, v2, v2, v3
; CHECK-NEXT: mfvsrd r4, v2
; CHECK-NEXT: srd r3, r4, r3
@@ -1747,15 +1747,15 @@ define zeroext i16 @getvelus(<8 x i16> %vus, i32 signext %i) {
;
; CHECK-LE-LABEL: getvelus:
; CHECK-LE: # %bb.0: # %entry
; CHECK-LE-NEXT: li r3, 4
; CHECK-LE-NEXT: clrldi r4, r5, 32
; CHECK-LE-NEXT: andc r3, r3, r4
; CHECK-LE-NEXT: sldi r3, r3, 1
; CHECK-LE-NEXT: lvsl v3, 0, r3
; CHECK-LE-NEXT: li r3, 3
; CHECK-LE-NEXT: and r3, r3, r4
; CHECK-LE-NEXT: vperm v2, v2, v2, v3
; CHECK-LE-NEXT: clrldi r3, r5, 32
; CHECK-LE-NEXT: li r4, 4
; CHECK-LE-NEXT: andc r4, r4, r3
; CHECK-LE-NEXT: sldi r4, r4, 1
; CHECK-LE-NEXT: lvsl v3, 0, r4
; CHECK-LE-NEXT: li r4, 3
; CHECK-LE-NEXT: and r3, r4, r3
; CHECK-LE-NEXT: sldi r3, r3, 4
; CHECK-LE-NEXT: vperm v2, v2, v2, v3
; CHECK-LE-NEXT: mfvsrd r4, v2
; CHECK-LE-NEXT: srd r3, r4, r3
; CHECK-LE-NEXT: clrldi r3, r3, 48
@@ -1764,12 +1764,12 @@ define zeroext i16 @getvelus(<8 x i16> %vus, i32 signext %i) {
; CHECK-AIX-LABEL: getvelus:
; CHECK-AIX: # %bb.0: # %entry
; CHECK-AIX-NEXT: clrldi 3, 3, 32
; CHECK-AIX-NEXT: andi. 4, 3, 4
; CHECK-AIX-NEXT: sldi 4, 4, 1
; CHECK-AIX-NEXT: lvsl 3, 0, 4
; CHECK-AIX-NEXT: li 4, 3
; CHECK-AIX-NEXT: andi. 5, 3, 4
; CHECK-AIX-NEXT: andc 3, 4, 3
; CHECK-AIX-NEXT: sldi 5, 5, 1
; CHECK-AIX-NEXT: sldi 3, 3, 4
; CHECK-AIX-NEXT: lvsl 3, 0, 5
; CHECK-AIX-NEXT: vperm 2, 2, 2, 3
; CHECK-AIX-NEXT: mfvsrd 4, 34
; CHECK-AIX-NEXT: srd 3, 4, 3
@@ -2000,13 +2000,13 @@ entry:
define signext i32 @getvelsi(<4 x i32> %vsi, i32 signext %i) {
; CHECK-LABEL: getvelsi:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: clrldi r4, r5, 32
; CHECK-NEXT: li r3, 1
; CHECK-NEXT: andi. r5, r4, 2
; CHECK-NEXT: andc r3, r3, r4
; CHECK-NEXT: sldi r5, r5, 2
; CHECK-NEXT: clrldi r3, r5, 32
; CHECK-NEXT: andi. r4, r3, 2
; CHECK-NEXT: sldi r4, r4, 2
; CHECK-NEXT: lvsl v3, 0, r4
; CHECK-NEXT: li r4, 1
; CHECK-NEXT: andc r3, r4, r3
; CHECK-NEXT: sldi r3, r3, 5
; CHECK-NEXT: lvsl v3, 0, r5
; CHECK-NEXT: vperm v2, v2, v2, v3
; CHECK-NEXT: mfvsrd r4, v2
; CHECK-NEXT: srd r3, r4, r3
@@ -2015,15 +2015,15 @@ define signext i32 @getvelsi(<4 x i32> %vsi, i32 signext %i) {
;
; CHECK-LE-LABEL: getvelsi:
; CHECK-LE: # %bb.0: # %entry
; CHECK-LE-NEXT: li r3, 2
; CHECK-LE-NEXT: clrldi r4, r5, 32
; CHECK-LE-NEXT: andc r3, r3, r4
; CHECK-LE-NEXT: sldi r3, r3, 2
; CHECK-LE-NEXT: lvsl v3, 0, r3
; CHECK-LE-NEXT: li r3, 1
; CHECK-LE-NEXT: and r3, r3, r4
; CHECK-LE-NEXT: vperm v2, v2, v2, v3
; CHECK-LE-NEXT: clrldi r3, r5, 32
; CHECK-LE-NEXT: li r4, 2
; CHECK-LE-NEXT: andc r4, r4, r3
; CHECK-LE-NEXT: sldi r4, r4, 2
; CHECK-LE-NEXT: lvsl v3, 0, r4
; CHECK-LE-NEXT: li r4, 1
; CHECK-LE-NEXT: and r3, r4, r3
; CHECK-LE-NEXT: sldi r3, r3, 5
; CHECK-LE-NEXT: vperm v2, v2, v2, v3
; CHECK-LE-NEXT: mfvsrd r4, v2
; CHECK-LE-NEXT: srd r3, r4, r3
; CHECK-LE-NEXT: extsw r3, r3
@@ -2032,12 +2032,12 @@ define signext i32 @getvelsi(<4 x i32> %vsi, i32 signext %i) {
; CHECK-AIX-LABEL: getvelsi:
; CHECK-AIX: # %bb.0: # %entry
; CHECK-AIX-NEXT: clrldi 3, 3, 32
; CHECK-AIX-NEXT: andi. 4, 3, 2
; CHECK-AIX-NEXT: sldi 4, 4, 2
; CHECK-AIX-NEXT: lvsl 3, 0, 4
; CHECK-AIX-NEXT: li 4, 1
; CHECK-AIX-NEXT: andi. 5, 3, 2
; CHECK-AIX-NEXT: andc 3, 4, 3
; CHECK-AIX-NEXT: sldi 5, 5, 2
; CHECK-AIX-NEXT: sldi 3, 3, 5
; CHECK-AIX-NEXT: lvsl 3, 0, 5
; CHECK-AIX-NEXT: vperm 2, 2, 2, 3
; CHECK-AIX-NEXT: mfvsrd 4, 34
; CHECK-AIX-NEXT: srd 3, 4, 3
@@ -2053,13 +2053,13 @@ entry:
define zeroext i32 @getvelui(<4 x i32> %vui, i32 signext %i) {
; CHECK-LABEL: getvelui:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: clrldi r4, r5, 32
; CHECK-NEXT: li r3, 1
; CHECK-NEXT: andi. r5, r4, 2
; CHECK-NEXT: andc r3, r3, r4
; CHECK-NEXT: sldi r5, r5, 2
; CHECK-NEXT: clrldi r3, r5, 32
; CHECK-NEXT: andi. r4, r3, 2
; CHECK-NEXT: sldi r4, r4, 2
; CHECK-NEXT: lvsl v3, 0, r4
; CHECK-NEXT: li r4, 1
; CHECK-NEXT: andc r3, r4, r3
; CHECK-NEXT: sldi r3, r3, 5
; CHECK-NEXT: lvsl v3, 0, r5
; CHECK-NEXT: vperm v2, v2, v2, v3
; CHECK-NEXT: mfvsrd r4, v2
; CHECK-NEXT: srd r3, r4, r3
@@ -2068,15 +2068,15 @@ define zeroext i32 @getvelui(<4 x i32> %vui, i32 signext %i) {
;
; CHECK-LE-LABEL: getvelui:
; CHECK-LE: # %bb.0: # %entry
; CHECK-LE-NEXT: li r3, 2
; CHECK-LE-NEXT: clrldi r4, r5, 32
; CHECK-LE-NEXT: andc r3, r3, r4
; CHECK-LE-NEXT: sldi r3, r3, 2
; CHECK-LE-NEXT: lvsl v3, 0, r3
; CHECK-LE-NEXT: li r3, 1
; CHECK-LE-NEXT: and r3, r3, r4
; CHECK-LE-NEXT: vperm v2, v2, v2, v3
; CHECK-LE-NEXT: clrldi r3, r5, 32
; CHECK-LE-NEXT: li r4, 2
; CHECK-LE-NEXT: andc r4, r4, r3
; CHECK-LE-NEXT: sldi r4, r4, 2
; CHECK-LE-NEXT: lvsl v3, 0, r4
; CHECK-LE-NEXT: li r4, 1
; CHECK-LE-NEXT: and r3, r4, r3
; CHECK-LE-NEXT: sldi r3, r3, 5
; CHECK-LE-NEXT: vperm v2, v2, v2, v3
; CHECK-LE-NEXT: mfvsrd r4, v2
; CHECK-LE-NEXT: srd r3, r4, r3
; CHECK-LE-NEXT: clrldi r3, r3, 32
@@ -2085,12 +2085,12 @@ define zeroext i32 @getvelui(<4 x i32> %vui, i32 signext %i) {
; CHECK-AIX-LABEL: getvelui:
; CHECK-AIX: # %bb.0: # %entry
; CHECK-AIX-NEXT: clrldi 3, 3, 32
; CHECK-AIX-NEXT: andi. 4, 3, 2
; CHECK-AIX-NEXT: sldi 4, 4, 2
; CHECK-AIX-NEXT: lvsl 3, 0, 4
; CHECK-AIX-NEXT: li 4, 1
; CHECK-AIX-NEXT: andi. 5, 3, 2
; CHECK-AIX-NEXT: andc 3, 4, 3
; CHECK-AIX-NEXT: sldi 5, 5, 2
; CHECK-AIX-NEXT: sldi 3, 3, 5
; CHECK-AIX-NEXT: lvsl 3, 0, 5
; CHECK-AIX-NEXT: vperm 2, 2, 2, 3
; CHECK-AIX-NEXT: mfvsrd 4, 34
; CHECK-AIX-NEXT: srd 3, 4, 3
@@ -2214,9 +2214,9 @@ define i64 @getvelsl(<2 x i64> %vsl, i32 signext %i) {
;
; CHECK-LE-LABEL: getvelsl:
; CHECK-LE: # %bb.0: # %entry
; CHECK-LE-NEXT: li r3, 1
; CHECK-LE-NEXT: clrldi r4, r5, 32
; CHECK-LE-NEXT: andc r3, r3, r4
; CHECK-LE-NEXT: clrldi r3, r5, 32
; CHECK-LE-NEXT: li r4, 1
; CHECK-LE-NEXT: andc r3, r4, r3
; CHECK-LE-NEXT: sldi r3, r3, 3
; CHECK-LE-NEXT: lvsl v3, 0, r3
; CHECK-LE-NEXT: vperm v2, v2, v2, v3
@@ -2252,9 +2252,9 @@ define i64 @getvelul(<2 x i64> %vul, i32 signext %i) {
;
; CHECK-LE-LABEL: getvelul:
; CHECK-LE: # %bb.0: # %entry
; CHECK-LE-NEXT: li r3, 1
; CHECK-LE-NEXT: clrldi r4, r5, 32
; CHECK-LE-NEXT: andc r3, r3, r4
; CHECK-LE-NEXT: clrldi r3, r5, 32
; CHECK-LE-NEXT: li r4, 1
; CHECK-LE-NEXT: andc r3, r4, r3
; CHECK-LE-NEXT: sldi r3, r3, 3
; CHECK-LE-NEXT: lvsl v3, 0, r3
; CHECK-LE-NEXT: vperm v2, v2, v2, v3
@@ -2472,9 +2472,9 @@ define double @getveld(<2 x double> %vd, i32 signext %i) {
;
; CHECK-LE-LABEL: getveld:
; CHECK-LE: # %bb.0: # %entry
; CHECK-LE-NEXT: li r3, 1
; CHECK-LE-NEXT: clrldi r4, r5, 32
; CHECK-LE-NEXT: andc r3, r3, r4
; CHECK-LE-NEXT: clrldi r3, r5, 32
; CHECK-LE-NEXT: li r4, 1
; CHECK-LE-NEXT: andc r3, r4, r3
; CHECK-LE-NEXT: sldi r3, r3, 3
; CHECK-LE-NEXT: lvsl v3, 0, r3
; CHECK-LE-NEXT: vperm v2, v2, v2, v3

View File

@@ -1,4 +1,4 @@
; RUN: llc -relocation-model=static -verify-machineinstrs -mcpu=pwr7 -O1 -code-model=medium <%s | FileCheck %s
; RUN: llc -relocation-model=static -verify-machineinstrs -mcpu=pwr7 -O1 -code-model=medium <%s | FileCheck %s -check-prefix=P7
; RUN: llc -relocation-model=static -verify-machineinstrs -mcpu=pwr8 -O1 -code-model=medium <%s | FileCheck %s
; Test peephole optimization for medium code model (32-bit TOC offsets)
@@ -208,13 +208,21 @@ entry:
; CHECK-LABEL: test_d2:
; CHECK: addis [[REGSTRUCT:[0-9]+]], 2, d2v@toc@ha
; CHECK: ld [[REG0_0:[0-9]+]], d2v@toc@l([[REGSTRUCT]])
; CHECK: addi [[BASEV:[0-9]+]], [[REGSTRUCT]], d2v@toc@l
; CHECK-DAG: ld [[REG0_0:[0-9]+]], d2v@toc@l([[REGSTRUCT]])
; CHECK-DAG: ld [[REG1_0:[0-9]+]], 8([[BASEV]])
; CHECK-DAG: addi [[REG0_1:[0-9]+]], [[REG0_0]], 1
; CHECK-DAG: ld [[REG1_0:[0-9]+]], 8([[BASEV]])
; CHECK-DAG: addi [[REG1_1:[0-9]+]], [[REG1_0]], 2
; CHECK-DAG: std [[REG0_1]], d2v@toc@l([[REGSTRUCT]])
; CHECK-DAG: std [[REG1_1]], 8([[BASEV]])
; P7: addis [[REGSTRUCT:[0-9]+]], 2, d2v@toc@ha
; P7: addi [[BASEV:[0-9]+]], [[REGSTRUCT]], d2v@toc@l
; P7: ld [[REG0_0:[0-9]+]], d2v@toc@l([[REGSTRUCT]])
; P7-DAG: addi [[REG0_1:[0-9]+]], [[REG0_0]], 1
; P7-DAG: ld [[REG1_0:[0-9]+]], 8([[BASEV]])
; P7-DAG: addi [[REG1_1:[0-9]+]], [[REG1_0]], 2
; P7-DAG: std [[REG0_1]], d2v@toc@l([[REGSTRUCT]])
; P7-DAG: std [[REG1_1]], 8([[BASEV]])
define dso_local void @test_d2() nounwind {
entry:

View File

@@ -10,31 +10,31 @@ declare double @llvm.pow.f64 (double, double);
define float @llvmintr_powf_f32_fast025(float %a) #1 {
; CHECK-LNX-LABEL: llvmintr_powf_f32_fast025:
; CHECK-LNX: # %bb.0: # %entry
; CHECK-LNX-NEXT: xsrsqrtesp 0, 1
; CHECK-LNX-NEXT: vspltisw 2, -3
; CHECK-LNX-NEXT: xsrsqrtesp 2, 1
; CHECK-LNX-NEXT: addis 3, 2, .LCPI0_0@toc@ha
; CHECK-LNX-NEXT: lfs 4, .LCPI0_0@toc@l(3)
; CHECK-LNX-NEXT: vspltisw 2, -3
; CHECK-LNX-NEXT: lfs 0, .LCPI0_0@toc@l(3)
; CHECK-LNX-NEXT: addis 3, 2, .LCPI0_1@toc@ha
; CHECK-LNX-NEXT: lfs 5, .LCPI0_1@toc@l(3)
; CHECK-LNX-NEXT: xvcvsxwdp 2, 34
; CHECK-LNX-NEXT: xsmulsp 3, 1, 0
; CHECK-LNX-NEXT: xxlxor 5, 5, 5
; CHECK-LNX-NEXT: xsmulsp 3, 1, 2
; CHECK-LNX-NEXT: xsabsdp 1, 1
; CHECK-LNX-NEXT: xsmulsp 0, 3, 0
; CHECK-LNX-NEXT: xsmulsp 3, 3, 4
; CHECK-LNX-NEXT: xssubsp 1, 1, 5
; CHECK-LNX-NEXT: xsaddsp 0, 0, 2
; CHECK-LNX-NEXT: xsmulsp 0, 3, 0
; CHECK-LNX-NEXT: xxlxor 3, 3, 3
; CHECK-LNX-NEXT: fsel 0, 1, 0, 3
; CHECK-LNX-NEXT: xsrsqrtesp 1, 0
; CHECK-LNX-NEXT: xsmulsp 6, 0, 1
; CHECK-LNX-NEXT: xsabsdp 0, 0
; CHECK-LNX-NEXT: xsmulsp 1, 6, 1
; CHECK-LNX-NEXT: xsmulsp 4, 6, 4
; CHECK-LNX-NEXT: xssubsp 0, 0, 5
; CHECK-LNX-NEXT: xsaddsp 1, 1, 2
; CHECK-LNX-NEXT: xsmulsp 1, 4, 1
; CHECK-LNX-NEXT: fsel 1, 0, 1, 3
; CHECK-LNX-NEXT: xsmulsp 4, 3, 0
; CHECK-LNX-NEXT: xsmulsp 2, 3, 2
; CHECK-LNX-NEXT: xvcvsxwdp 3, 34
; CHECK-LNX-NEXT: xsaddsp 2, 2, 3
; CHECK-LNX-NEXT: xsmulsp 2, 4, 2
; CHECK-LNX-NEXT: lfs 4, .LCPI0_1@toc@l(3)
; CHECK-LNX-NEXT: xssubsp 1, 1, 4
; CHECK-LNX-NEXT: fsel 1, 1, 2, 5
; CHECK-LNX-NEXT: xsrsqrtesp 2, 1
; CHECK-LNX-NEXT: xsmulsp 6, 1, 2
; CHECK-LNX-NEXT: xsabsdp 1, 1
; CHECK-LNX-NEXT: xsmulsp 2, 6, 2
; CHECK-LNX-NEXT: xsmulsp 0, 6, 0
; CHECK-LNX-NEXT: xssubsp 1, 1, 4
; CHECK-LNX-NEXT: xsaddsp 2, 2, 3
; CHECK-LNX-NEXT: xsmulsp 0, 0, 2
; CHECK-LNX-NEXT: fsel 1, 1, 0, 5
; CHECK-LNX-NEXT: blr
;
; CHECK-AIX-LABEL: llvmintr_powf_f32_fast025:
@@ -60,19 +60,19 @@ entry:
define double @llvmintr_pow_f64_fast025(double %a) #1 {
; CHECK-LNX-LABEL: llvmintr_pow_f64_fast025:
; CHECK-LNX: # %bb.0: # %entry
; CHECK-LNX-NEXT: vspltisw 2, -3
; CHECK-LNX-NEXT: xstsqrtdp 0, 1
; CHECK-LNX-NEXT: vspltisw 2, -3
; CHECK-LNX-NEXT: addis 3, 2, .LCPI1_0@toc@ha
; CHECK-LNX-NEXT: lfs 0, .LCPI1_0@toc@l(3)
; CHECK-LNX-NEXT: xvcvsxwdp 2, 34
; CHECK-LNX-NEXT: lfs 0, .LCPI1_0@toc@l(3)
; CHECK-LNX-NEXT: bc 12, 2, .LBB1_3
; CHECK-LNX-NEXT: # %bb.1: # %entry
; CHECK-LNX-NEXT: xsrsqrtedp 3, 1
; CHECK-LNX-NEXT: xsmuldp 4, 1, 3
; CHECK-LNX-NEXT: xsmuldp 4, 4, 3
; CHECK-LNX-NEXT: xsmuldp 3, 3, 0
; CHECK-LNX-NEXT: xsadddp 4, 4, 2
; CHECK-LNX-NEXT: xsmuldp 3, 3, 4
; CHECK-LNX-NEXT: xsmuldp 5, 1, 3
; CHECK-LNX-NEXT: xsmuldp 4, 3, 0
; CHECK-LNX-NEXT: xsmuldp 3, 5, 3
; CHECK-LNX-NEXT: xsadddp 3, 3, 2
; CHECK-LNX-NEXT: xsmuldp 3, 4, 3
; CHECK-LNX-NEXT: xsmuldp 1, 1, 3
; CHECK-LNX-NEXT: xsmuldp 3, 1, 3
; CHECK-LNX-NEXT: xsmuldp 1, 1, 0
@@ -124,32 +124,32 @@ entry:
define float @llvmintr_powf_f32_fast075(float %a) #1 {
; CHECK-LNX-LABEL: llvmintr_powf_f32_fast075:
; CHECK-LNX: # %bb.0: # %entry
; CHECK-LNX-NEXT: xsrsqrtesp 0, 1
; CHECK-LNX-NEXT: vspltisw 2, -3
; CHECK-LNX-NEXT: xsrsqrtesp 2, 1
; CHECK-LNX-NEXT: addis 3, 2, .LCPI2_0@toc@ha
; CHECK-LNX-NEXT: lfs 4, .LCPI2_0@toc@l(3)
; CHECK-LNX-NEXT: vspltisw 2, -3
; CHECK-LNX-NEXT: lfs 0, .LCPI2_0@toc@l(3)
; CHECK-LNX-NEXT: addis 3, 2, .LCPI2_1@toc@ha
; CHECK-LNX-NEXT: lfs 5, .LCPI2_1@toc@l(3)
; CHECK-LNX-NEXT: xvcvsxwdp 2, 34
; CHECK-LNX-NEXT: xsmulsp 3, 1, 0
; CHECK-LNX-NEXT: xxlxor 5, 5, 5
; CHECK-LNX-NEXT: xsmulsp 3, 1, 2
; CHECK-LNX-NEXT: xsabsdp 1, 1
; CHECK-LNX-NEXT: xsmulsp 0, 3, 0
; CHECK-LNX-NEXT: xsmulsp 3, 3, 4
; CHECK-LNX-NEXT: xssubsp 1, 1, 5
; CHECK-LNX-NEXT: xsaddsp 0, 0, 2
; CHECK-LNX-NEXT: xsmulsp 0, 3, 0
; CHECK-LNX-NEXT: xxlxor 3, 3, 3
; CHECK-LNX-NEXT: fsel 0, 1, 0, 3
; CHECK-LNX-NEXT: xsrsqrtesp 1, 0
; CHECK-LNX-NEXT: xsmulsp 6, 0, 1
; CHECK-LNX-NEXT: xsmulsp 1, 6, 1
; CHECK-LNX-NEXT: xsmulsp 4, 6, 4
; CHECK-LNX-NEXT: xsaddsp 1, 1, 2
; CHECK-LNX-NEXT: xsabsdp 2, 0
; CHECK-LNX-NEXT: xsmulsp 1, 4, 1
; CHECK-LNX-NEXT: xssubsp 2, 2, 5
; CHECK-LNX-NEXT: fsel 1, 2, 1, 3
; CHECK-LNX-NEXT: xsmulsp 1, 0, 1
; CHECK-LNX-NEXT: xsmulsp 4, 3, 0
; CHECK-LNX-NEXT: xsmulsp 2, 3, 2
; CHECK-LNX-NEXT: xvcvsxwdp 3, 34
; CHECK-LNX-NEXT: xsaddsp 2, 2, 3
; CHECK-LNX-NEXT: xsmulsp 2, 4, 2
; CHECK-LNX-NEXT: lfs 4, .LCPI2_1@toc@l(3)
; CHECK-LNX-NEXT: xssubsp 1, 1, 4
; CHECK-LNX-NEXT: fsel 1, 1, 2, 5
; CHECK-LNX-NEXT: xsrsqrtesp 2, 1
; CHECK-LNX-NEXT: xsmulsp 6, 1, 2
; CHECK-LNX-NEXT: xsmulsp 2, 6, 2
; CHECK-LNX-NEXT: xsmulsp 0, 6, 0
; CHECK-LNX-NEXT: xsaddsp 2, 2, 3
; CHECK-LNX-NEXT: xsmulsp 0, 0, 2
; CHECK-LNX-NEXT: xsabsdp 2, 1
; CHECK-LNX-NEXT: xssubsp 2, 2, 4
; CHECK-LNX-NEXT: fsel 0, 2, 0, 5
; CHECK-LNX-NEXT: xsmulsp 1, 1, 0
; CHECK-LNX-NEXT: blr
;
; CHECK-AIX-LABEL: llvmintr_powf_f32_fast075:
@@ -175,19 +175,19 @@ entry:
define double @llvmintr_pow_f64_fast075(double %a) #1 {
; CHECK-LNX-LABEL: llvmintr_pow_f64_fast075:
; CHECK-LNX: # %bb.0: # %entry
; CHECK-LNX-NEXT: vspltisw 2, -3
; CHECK-LNX-NEXT: xstsqrtdp 0, 1
; CHECK-LNX-NEXT: vspltisw 2, -3
; CHECK-LNX-NEXT: addis 3, 2, .LCPI3_0@toc@ha
; CHECK-LNX-NEXT: lfs 0, .LCPI3_0@toc@l(3)
; CHECK-LNX-NEXT: xvcvsxwdp 2, 34
; CHECK-LNX-NEXT: lfs 0, .LCPI3_0@toc@l(3)
; CHECK-LNX-NEXT: bc 12, 2, .LBB3_3
; CHECK-LNX-NEXT: # %bb.1: # %entry
; CHECK-LNX-NEXT: xsrsqrtedp 3, 1
; CHECK-LNX-NEXT: xsmuldp 4, 1, 3
; CHECK-LNX-NEXT: xsmuldp 4, 4, 3
; CHECK-LNX-NEXT: xsmuldp 3, 3, 0
; CHECK-LNX-NEXT: xsadddp 4, 4, 2
; CHECK-LNX-NEXT: xsmuldp 3, 3, 4
; CHECK-LNX-NEXT: xsmuldp 5, 1, 3
; CHECK-LNX-NEXT: xsmuldp 4, 3, 0
; CHECK-LNX-NEXT: xsmuldp 3, 5, 3
; CHECK-LNX-NEXT: xsadddp 3, 3, 2
; CHECK-LNX-NEXT: xsmuldp 3, 4, 3
; CHECK-LNX-NEXT: xsmuldp 1, 1, 3
; CHECK-LNX-NEXT: xsmuldp 3, 1, 3
; CHECK-LNX-NEXT: xsmuldp 1, 1, 0

View File

@@ -10,15 +10,15 @@ define dso_local fastcc void @BuildVectorICE() unnamed_addr {
; 32BIT: # %bb.0: # %entry
; 32BIT-NEXT: stwu 1, -64(1)
; 32BIT-NEXT: .cfi_def_cfa_offset 64
; 32BIT-NEXT: li 3, .LCPI0_0@l
; 32BIT-NEXT: lis 4, .LCPI0_0@ha
; 32BIT-NEXT: addi 5, 1, 16
; 32BIT-NEXT: li 4, .LCPI0_0@l
; 32BIT-NEXT: lis 5, .LCPI0_0@ha
; 32BIT-NEXT: lxvw4x 34, 0, 3
; 32BIT-NEXT: li 3, 0
; 32BIT-NEXT: addi 6, 1, 48
; 32BIT-NEXT: li 7, 0
; 32BIT-NEXT: lxvw4x 34, 0, 3
; 32BIT-NEXT: lxvw4x 35, 4, 3
; 32BIT-NEXT: li 3, 0
; 32BIT-NEXT: lxvw4x 35, 5, 4
; 32BIT-NEXT: addi 4, 1, 32
; 32BIT-NEXT: addi 5, 1, 16
; 32BIT-NEXT: .p2align 4
; 32BIT-NEXT: .LBB0_1: # %while.body
; 32BIT-NEXT: #
@@ -36,8 +36,8 @@ define dso_local fastcc void @BuildVectorICE() unnamed_addr {
;
; 64BIT-LABEL: BuildVectorICE:
; 64BIT: # %bb.0: # %entry
; 64BIT-NEXT: li 3, 0
; 64BIT-NEXT: lxvw4x 34, 0, 3
; 64BIT-NEXT: li 3, 0
; 64BIT-NEXT: rldimi 3, 3, 32, 0
; 64BIT-NEXT: mtfprd 0, 3
; 64BIT-NEXT: li 3, 0

View File

@@ -19,11 +19,10 @@ define dso_local i64 @test_xor(ptr nocapture noundef readonly %inp) local_unname
;
; 32BIT-LABEL: test_xor:
; 32BIT: # %bb.0: # %entry
; 32BIT-NEXT: mr r4, r3
; 32BIT-NEXT: lbz r4, 0(r3)
; 32BIT-NEXT: lbz r3, 1(r3)
; 32BIT-NEXT: xor r4, r3, r4
; 32BIT-NEXT: li r3, 0
; 32BIT-NEXT: lbz r5, 0(r4)
; 32BIT-NEXT: lbz r4, 1(r4)
; 32BIT-NEXT: xor r4, r4, r5
; 32BIT-NEXT: blr
entry:
%0 = load i8, ptr %inp, align 1
@@ -46,13 +45,12 @@ define dso_local i64 @test_xor2(ptr nocapture noundef readonly %inp) local_unnam
;
; 32BIT-LABEL: test_xor2:
; 32BIT: # %bb.0: # %entry
; 32BIT-NEXT: mr r4, r3
; 32BIT-NEXT: li r3, 0
; 32BIT-NEXT: lbz r5, 0(r4)
; 32BIT-NEXT: lbz r6, 1(r4)
; 32BIT-NEXT: lbz r4, 2(r4)
; 32BIT-NEXT: xor r5, r6, r5
; 32BIT-NEXT: lbz r4, 0(r3)
; 32BIT-NEXT: lbz r5, 1(r3)
; 32BIT-NEXT: lbz r3, 2(r3)
; 32BIT-NEXT: xor r4, r5, r4
; 32BIT-NEXT: xor r4, r4, r3
; 32BIT-NEXT: li r3, 0
; 32BIT-NEXT: blr
entry:
%0 = load i8, ptr %inp, align 1
@@ -76,11 +74,10 @@ define dso_local i64 @test_or(ptr nocapture noundef readonly %inp) local_unnamed
;
; 32BIT-LABEL: test_or:
; 32BIT: # %bb.0: # %entry
; 32BIT-NEXT: mr r4, r3
; 32BIT-NEXT: lbz r4, 0(r3)
; 32BIT-NEXT: lbz r3, 1(r3)
; 32BIT-NEXT: or r4, r3, r4
; 32BIT-NEXT: li r3, 0
; 32BIT-NEXT: lbz r5, 0(r4)
; 32BIT-NEXT: lbz r4, 1(r4)
; 32BIT-NEXT: or r4, r4, r5
; 32BIT-NEXT: blr
entry:
%0 = load i8, ptr %inp, align 1
@@ -103,13 +100,12 @@ define dso_local i64 @test_or2(ptr nocapture noundef readonly %inp) local_unname
;
; 32BIT-LABEL: test_or2:
; 32BIT: # %bb.0: # %entry
; 32BIT-NEXT: mr r4, r3
; 32BIT-NEXT: li r3, 0
; 32BIT-NEXT: lbz r5, 0(r4)
; 32BIT-NEXT: lbz r6, 1(r4)
; 32BIT-NEXT: lbz r4, 2(r4)
; 32BIT-NEXT: or r5, r6, r5
; 32BIT-NEXT: lbz r4, 0(r3)
; 32BIT-NEXT: lbz r5, 1(r3)
; 32BIT-NEXT: lbz r3, 2(r3)
; 32BIT-NEXT: or r4, r5, r4
; 32BIT-NEXT: or r4, r4, r3
; 32BIT-NEXT: li r3, 0
; 32BIT-NEXT: blr
entry:
%0 = load i8, ptr %inp, align 1
@@ -133,11 +129,10 @@ define dso_local i64 @test_and(ptr nocapture noundef readonly %inp) local_unname
;
; 32BIT-LABEL: test_and:
; 32BIT: # %bb.0: # %entry
; 32BIT-NEXT: mr r4, r3
; 32BIT-NEXT: lbz r4, 0(r3)
; 32BIT-NEXT: lbz r3, 1(r3)
; 32BIT-NEXT: and r4, r3, r4
; 32BIT-NEXT: li r3, 0
; 32BIT-NEXT: lbz r5, 0(r4)
; 32BIT-NEXT: lbz r4, 1(r4)
; 32BIT-NEXT: and r4, r4, r5
; 32BIT-NEXT: blr
entry:
%0 = load i8, ptr %inp, align 1
@@ -160,13 +155,12 @@ define dso_local i64 @test_and2(ptr nocapture noundef readonly %inp) local_unnam
;
; 32BIT-LABEL: test_and2:
; 32BIT: # %bb.0: # %entry
; 32BIT-NEXT: mr r4, r3
; 32BIT-NEXT: li r3, 0
; 32BIT-NEXT: lbz r5, 0(r4)
; 32BIT-NEXT: lbz r6, 1(r4)
; 32BIT-NEXT: lbz r4, 2(r4)
; 32BIT-NEXT: and r5, r6, r5
; 32BIT-NEXT: lbz r4, 0(r3)
; 32BIT-NEXT: lbz r5, 1(r3)
; 32BIT-NEXT: lbz r3, 2(r3)
; 32BIT-NEXT: and r4, r5, r4
; 32BIT-NEXT: and r4, r4, r3
; 32BIT-NEXT: li r3, 0
; 32BIT-NEXT: blr
entry:
%0 = load i8, ptr %inp, align 1
@@ -185,24 +179,23 @@ define dso_local i64 @test_mixed(ptr nocapture noundef readonly %inp) local_unna
; 64BIT: # %bb.0: # %entry
; 64BIT-NEXT: lbz r4, 0(r3)
; 64BIT-NEXT: lbz r5, 1(r3)
; 64BIT-NEXT: lbz r6, 2(r3)
; 64BIT-NEXT: lbz r3, 3(r3)
; 64BIT-NEXT: and r4, r5, r4
; 64BIT-NEXT: xor r4, r4, r6
; 64BIT-NEXT: lbz r5, 2(r3)
; 64BIT-NEXT: lbz r3, 3(r3)
; 64BIT-NEXT: xor r4, r4, r5
; 64BIT-NEXT: or r3, r4, r3
; 64BIT-NEXT: blr
;
; 32BIT-LABEL: test_mixed:
; 32BIT: # %bb.0: # %entry
; 32BIT-NEXT: mr r4, r3
; 32BIT-NEXT: lbz r4, 0(r3)
; 32BIT-NEXT: lbz r5, 1(r3)
; 32BIT-NEXT: and r4, r5, r4
; 32BIT-NEXT: lbz r5, 2(r3)
; 32BIT-NEXT: lbz r3, 3(r3)
; 32BIT-NEXT: xor r4, r4, r5
; 32BIT-NEXT: or r4, r4, r3
; 32BIT-NEXT: li r3, 0
; 32BIT-NEXT: lbz r5, 0(r4)
; 32BIT-NEXT: lbz r6, 1(r4)
; 32BIT-NEXT: lbz r7, 2(r4)
; 32BIT-NEXT: lbz r4, 3(r4)
; 32BIT-NEXT: and r5, r6, r5
; 32BIT-NEXT: xor r5, r5, r7
; 32BIT-NEXT: or r4, r5, r4
; 32BIT-NEXT: blr
entry:
%0 = load i8, ptr %inp, align 1
@@ -268,9 +261,8 @@ define dso_local i64 @test_load(ptr nocapture noundef readonly %inp) local_unnam
;
; 32BIT-LABEL: test_load:
; 32BIT: # %bb.0: # %entry
; 32BIT-NEXT: mr r4, r3
; 32BIT-NEXT: lbz r4, 0(r3)
; 32BIT-NEXT: li r3, 0
; 32BIT-NEXT: lbz r4, 0(r4)
; 32BIT-NEXT: blr
entry:
%0 = load i8, ptr %inp, align 1
@@ -288,11 +280,10 @@ define dso_local i64 @test_and32(ptr nocapture noundef readonly %inp) local_unna
;
; 32BIT-LABEL: test_and32:
; 32BIT: # %bb.0: # %entry
; 32BIT-NEXT: mr r4, r3
; 32BIT-NEXT: lwz r4, 0(r3)
; 32BIT-NEXT: lwz r3, 4(r3)
; 32BIT-NEXT: and r4, r3, r4
; 32BIT-NEXT: li r3, 0
; 32BIT-NEXT: lwz r5, 0(r4)
; 32BIT-NEXT: lwz r4, 4(r4)
; 32BIT-NEXT: and r4, r4, r5
; 32BIT-NEXT: blr
entry:
%0 = load i32, ptr %inp, align 4

View File

@@ -6,51 +6,28 @@
; Function Attrs: norecurse nounwind readonly
define signext i32 @limit_loop(i32 signext %iters, ptr nocapture readonly %vec, i32 signext %limit) local_unnamed_addr {
; V01-LABEL: limit_loop:
; V01: # %bb.0: # %entry
; V01-NEXT: mr 6, 3
; V01-NEXT: li 3, 0
; V01-NEXT: cmpwi 6, 0
; V01-NEXT: blelr 0
; V01-NEXT: # %bb.1: # %for.body.preheader
; V01-NEXT: mtctr 6
; V01-NEXT: addi 4, 4, -4
; V01-NEXT: b .LBB0_3
; V01-NEXT: .p2align 4
; V01-NEXT: .LBB0_2: # %for.cond
; V01-NEXT: #
; V01-NEXT: bdzlr
; V01-NEXT: .LBB0_3: # %for.body
; V01-NEXT: #
; V01-NEXT: lwzu 6, 4(4)
; V01-NEXT: cmpw 6, 5
; V01-NEXT: blt 0, .LBB0_2
; V01-NEXT: # %bb.4:
; V01-NEXT: li 3, 1
; V01-NEXT: blr
;
; V23-LABEL: limit_loop:
; V23: # %bb.0: # %entry
; V23-NEXT: mr 6, 3
; V23-NEXT: li 3, 0
; V23-NEXT: cmpwi 6, 0
; V23-NEXT: blelr 0
; V23-NEXT: # %bb.1: # %for.body.preheader
; V23-NEXT: addi 4, 4, -4
; V23-NEXT: mtctr 6
; V23-NEXT: b .LBB0_3
; V23-NEXT: .p2align 4
; V23-NEXT: .LBB0_2: # %for.cond
; V23-NEXT: #
; V23-NEXT: bdzlr
; V23-NEXT: .LBB0_3: # %for.body
; V23-NEXT: #
; V23-NEXT: lwzu 6, 4(4)
; V23-NEXT: cmpw 6, 5
; V23-NEXT: blt 0, .LBB0_2
; V23-NEXT: # %bb.4:
; V23-NEXT: li 3, 1
; V23-NEXT: blr
; CHECK-LABEL: limit_loop:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: mr 6, 3
; CHECK-NEXT: li 3, 0
; CHECK-NEXT: cmpwi 6, 0
; CHECK-NEXT: blelr 0
; CHECK-NEXT: # %bb.1: # %for.body.preheader
; CHECK-NEXT: mtctr 6
; CHECK-NEXT: addi 4, 4, -4
; CHECK-NEXT: b .LBB0_3
; CHECK-NEXT: .p2align 4
; CHECK-NEXT: .LBB0_2: # %for.cond
; CHECK-NEXT: #
; CHECK-NEXT: bdzlr
; CHECK-NEXT: .LBB0_3: # %for.body
; CHECK-NEXT: #
; CHECK-NEXT: lwzu 6, 4(4)
; CHECK-NEXT: cmpw 6, 5
; CHECK-NEXT: blt 0, .LBB0_2
; CHECK-NEXT: # %bb.4:
; CHECK-NEXT: li 3, 1
; CHECK-NEXT: blr
entry:
%cmp5 = icmp sgt i32 %iters, 0
br i1 %cmp5, label %for.body.preheader, label %cleanup
@@ -78,8 +55,9 @@ cleanup: ; preds = %for.body, %for.cond
;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
; CHECK: {{.*}}
; CHECK-V0: {{.*}}
; CHECK-V1: {{.*}}
; CHECK-V2: {{.*}}
; CHECK-V3: {{.*}}
; V01: {{.*}}
; V23: {{.*}}

View File

@@ -11,11 +11,11 @@
define dso_local i64 @rotatemask32(i64 noundef %word) local_unnamed_addr #0 {
; AIX32-LABEL: rotatemask32:
; AIX32: # %bb.0: # %entry
; AIX32-NEXT: cntlzw r5, r4
; AIX32-NEXT: cntlzw r5, r3
; AIX32-NEXT: cmplwi r3, 0
; AIX32-NEXT: cntlzw r3, r3
; AIX32-NEXT: addi r5, r5, 32
; AIX32-NEXT: iseleq r3, r5, r3
; AIX32-NEXT: cntlzw r3, r4
; AIX32-NEXT: addi r3, r3, 32
; AIX32-NEXT: iseleq r3, r3, r5
; AIX32-NEXT: rlwnm r4, r4, r3, 1, 31
; AIX32-NEXT: li r3, 0
; AIX32-NEXT: blr
@@ -53,23 +53,23 @@ declare i32 @llvm.fshl.i32(i32, i32, i32) #0
define dso_local i64 @rotatemask64(i64 noundef %word) local_unnamed_addr #0 {
; AIX32-LABEL: rotatemask64:
; AIX32: # %bb.0: # %entry
; AIX32-NEXT: cntlzw r5, r4
; AIX32-NEXT: cntlzw r6, r3
; AIX32-NEXT: cmplwi r3, 0
; AIX32-NEXT: addi r5, r5, 32
; AIX32-NEXT: iseleq r5, r5, r6
; AIX32-NEXT: cntlzw r6, r4
; AIX32-NEXT: addi r6, r6, 32
; AIX32-NEXT: cntlzw r5, r3
; AIX32-NEXT: iseleq r5, r6, r5
; AIX32-NEXT: andi. r6, r5, 32
; AIX32-NEXT: clrlwi r5, r5, 27
; AIX32-NEXT: iseleq r6, r3, r4
; AIX32-NEXT: subfic r7, r5, 32
; AIX32-NEXT: iseleq r3, r4, r3
; AIX32-NEXT: slw r8, r6, r5
; AIX32-NEXT: srw r6, r6, r7
; AIX32-NEXT: srw r4, r3, r7
; AIX32-NEXT: slw r3, r3, r5
; AIX32-NEXT: or r5, r8, r4
; AIX32-NEXT: or r4, r3, r6
; AIX32-NEXT: clrlwi r3, r5, 1
; AIX32-NEXT: subfic r7, r5, 32
; AIX32-NEXT: slw r4, r3, r5
; AIX32-NEXT: srw r3, r3, r7
; AIX32-NEXT: slw r5, r6, r5
; AIX32-NEXT: srw r8, r6, r7
; AIX32-NEXT: or r3, r5, r3
; AIX32-NEXT: or r4, r4, r8
; AIX32-NEXT: clrlwi r3, r3, 1
; AIX32-NEXT: blr
;
; AIX64-LABEL: rotatemask64:
@@ -101,23 +101,23 @@ declare i64 @llvm.fshl.i64(i64, i64, i64) #1
define dso_local i64 @rotatemask64_2(i64 noundef %word) local_unnamed_addr #0 {
; AIX32-LABEL: rotatemask64_2:
; AIX32: # %bb.0: # %entry
; AIX32-NEXT: cntlzw r5, r4
; AIX32-NEXT: cntlzw r6, r3
; AIX32-NEXT: cmplwi r3, 0
; AIX32-NEXT: addi r5, r5, 32
; AIX32-NEXT: iseleq r5, r5, r6
; AIX32-NEXT: cntlzw r6, r4
; AIX32-NEXT: addi r6, r6, 32
; AIX32-NEXT: cntlzw r5, r3
; AIX32-NEXT: iseleq r5, r6, r5
; AIX32-NEXT: andi. r6, r5, 32
; AIX32-NEXT: clrlwi r5, r5, 27
; AIX32-NEXT: iseleq r6, r3, r4
; AIX32-NEXT: subfic r7, r5, 32
; AIX32-NEXT: iseleq r3, r4, r3
; AIX32-NEXT: slw r8, r6, r5
; AIX32-NEXT: srw r6, r6, r7
; AIX32-NEXT: srw r4, r3, r7
; AIX32-NEXT: slw r3, r3, r5
; AIX32-NEXT: or r5, r8, r4
; AIX32-NEXT: or r4, r3, r6
; AIX32-NEXT: clrlwi r3, r5, 1
; AIX32-NEXT: subfic r7, r5, 32
; AIX32-NEXT: slw r4, r3, r5
; AIX32-NEXT: srw r3, r3, r7
; AIX32-NEXT: slw r5, r6, r5
; AIX32-NEXT: srw r8, r6, r7
; AIX32-NEXT: or r3, r5, r3
; AIX32-NEXT: or r4, r4, r8
; AIX32-NEXT: clrlwi r3, r3, 1
; AIX32-NEXT: blr
;
; AIX64-LABEL: rotatemask64_2:
@@ -147,21 +147,21 @@ entry:
define dso_local i64 @rotatemask64_3(i64 noundef %word) local_unnamed_addr #0 {
; AIX32-LABEL: rotatemask64_3:
; AIX32: # %bb.0: # %entry
; AIX32-NEXT: cntlzw r5, r4
; AIX32-NEXT: cntlzw r6, r3
; AIX32-NEXT: cmplwi r3, 0
; AIX32-NEXT: addi r5, r5, 32
; AIX32-NEXT: iseleq r5, r5, r6
; AIX32-NEXT: cntlzw r6, r4
; AIX32-NEXT: addi r6, r6, 32
; AIX32-NEXT: cntlzw r5, r3
; AIX32-NEXT: iseleq r5, r6, r5
; AIX32-NEXT: andi. r6, r5, 32
; AIX32-NEXT: clrlwi r5, r5, 27
; AIX32-NEXT: iseleq r6, r3, r4
; AIX32-NEXT: subfic r7, r5, 32
; AIX32-NEXT: iseleq r3, r4, r3
; AIX32-NEXT: srw r4, r6, r7
; AIX32-NEXT: slw r8, r3, r5
; AIX32-NEXT: subfic r7, r5, 32
; AIX32-NEXT: srw r8, r6, r7
; AIX32-NEXT: slw r4, r3, r5
; AIX32-NEXT: srw r3, r3, r7
; AIX32-NEXT: slw r5, r6, r5
; AIX32-NEXT: or r4, r8, r4
; AIX32-NEXT: or r4, r4, r8
; AIX32-NEXT: or r3, r5, r3
; AIX32-NEXT: clrlwi r3, r3, 1
; AIX32-NEXT: rlwinm r4, r4, 0, 0, 23
@@ -201,17 +201,17 @@ define dso_local i64 @rotatemask64_nocount(i64 noundef %word, i64 noundef %clz)
; AIX32-LABEL: rotatemask64_nocount:
; AIX32: # %bb.0: # %entry
; AIX32-NEXT: andi. r5, r6, 32
; AIX32-NEXT: clrlwi r5, r6, 27
; AIX32-NEXT: iseleq r6, r3, r4
; AIX32-NEXT: subfic r7, r5, 32
; AIX32-NEXT: clrlwi r6, r6, 27
; AIX32-NEXT: subfic r7, r6, 32
; AIX32-NEXT: iseleq r5, r3, r4
; AIX32-NEXT: iseleq r3, r4, r3
; AIX32-NEXT: slw r8, r6, r5
; AIX32-NEXT: srw r4, r3, r7
; AIX32-NEXT: srw r6, r6, r7
; AIX32-NEXT: slw r3, r3, r5
; AIX32-NEXT: or r5, r8, r4
; AIX32-NEXT: or r4, r3, r6
; AIX32-NEXT: clrlwi r3, r5, 8
; AIX32-NEXT: srw r8, r5, r7
; AIX32-NEXT: slw r4, r3, r6
; AIX32-NEXT: srw r3, r3, r7
; AIX32-NEXT: slw r5, r5, r6
; AIX32-NEXT: or r3, r5, r3
; AIX32-NEXT: or r4, r4, r8
; AIX32-NEXT: clrlwi r3, r3, 8
; AIX32-NEXT: blr
;
; AIX64-LABEL: rotatemask64_nocount:
@@ -238,17 +238,17 @@ define dso_local i64 @builtincheck(i64 noundef %word, i64 noundef %shift) local_
; AIX32-LABEL: builtincheck:
; AIX32: # %bb.0: # %entry
; AIX32-NEXT: andi. r5, r6, 32
; AIX32-NEXT: clrlwi r5, r6, 27
; AIX32-NEXT: iseleq r6, r3, r4
; AIX32-NEXT: subfic r7, r5, 32
; AIX32-NEXT: clrlwi r6, r6, 27
; AIX32-NEXT: subfic r7, r6, 32
; AIX32-NEXT: iseleq r5, r3, r4
; AIX32-NEXT: iseleq r3, r4, r3
; AIX32-NEXT: slw r8, r6, r5
; AIX32-NEXT: srw r4, r3, r7
; AIX32-NEXT: srw r6, r6, r7
; AIX32-NEXT: slw r3, r3, r5
; AIX32-NEXT: or r5, r8, r4
; AIX32-NEXT: or r4, r3, r6
; AIX32-NEXT: clrlwi r3, r5, 1
; AIX32-NEXT: srw r8, r5, r7
; AIX32-NEXT: slw r4, r3, r6
; AIX32-NEXT: srw r3, r3, r7
; AIX32-NEXT: slw r5, r5, r6
; AIX32-NEXT: or r3, r5, r3
; AIX32-NEXT: or r4, r4, r8
; AIX32-NEXT: clrlwi r3, r3, 1
; AIX32-NEXT: blr
;
; AIX64-LABEL: builtincheck:
@@ -275,10 +275,10 @@ define dso_local i64 @immshift(i64 noundef %word) local_unnamed_addr #0 {
; AIX32-LABEL: immshift:
; AIX32: # %bb.0: # %entry
; AIX32-NEXT: rotlwi r5, r3, 15
; AIX32-NEXT: srwi r6, r4, 17
; AIX32-NEXT: rlwimi r5, r4, 15, 0, 16
; AIX32-NEXT: rlwimi r6, r3, 15, 12, 16
; AIX32-NEXT: mr r3, r6
; AIX32-NEXT: srwi r4, r4, 17
; AIX32-NEXT: rlwimi r4, r3, 15, 12, 16
; AIX32-NEXT: mr r3, r4
; AIX32-NEXT: mr r4, r5
; AIX32-NEXT: blr
;
@@ -307,23 +307,23 @@ define dso_local i64 @twomasks(i64 noundef %word) local_unnamed_addr #0 {
; AIX32: # %bb.0: # %entry
; AIX32-NEXT: mflr r0
; AIX32-NEXT: stwu r1, -64(r1)
; AIX32-NEXT: cntlzw r5, r4
; AIX32-NEXT: cntlzw r6, r3
; AIX32-NEXT: stw r0, 72(r1)
; AIX32-NEXT: cmplwi r3, 0
; AIX32-NEXT: addi r5, r5, 32
; AIX32-NEXT: iseleq r5, r5, r6
; AIX32-NEXT: cntlzw r6, r4
; AIX32-NEXT: stw r0, 72(r1)
; AIX32-NEXT: addi r6, r6, 32
; AIX32-NEXT: cntlzw r5, r3
; AIX32-NEXT: iseleq r5, r6, r5
; AIX32-NEXT: andi. r6, r5, 32
; AIX32-NEXT: clrlwi r5, r5, 27
; AIX32-NEXT: iseleq r6, r3, r4
; AIX32-NEXT: subfic r7, r5, 32
; AIX32-NEXT: iseleq r3, r4, r3
; AIX32-NEXT: slw r8, r6, r5
; AIX32-NEXT: srw r6, r6, r7
; AIX32-NEXT: srw r4, r3, r7
; AIX32-NEXT: slw r3, r3, r5
; AIX32-NEXT: or r5, r8, r4
; AIX32-NEXT: or r4, r3, r6
; AIX32-NEXT: subfic r7, r5, 32
; AIX32-NEXT: srw r8, r6, r7
; AIX32-NEXT: slw r4, r3, r5
; AIX32-NEXT: srw r3, r3, r7
; AIX32-NEXT: slw r5, r6, r5
; AIX32-NEXT: or r4, r4, r8
; AIX32-NEXT: or r5, r5, r3
; AIX32-NEXT: clrlwi r3, r5, 1
; AIX32-NEXT: clrlwi r5, r5, 16
; AIX32-NEXT: mr r6, r4
@@ -397,27 +397,28 @@ define dso_local i64 @tworotates(i64 noundef %word) local_unnamed_addr #0 {
; AIX32: # %bb.0: # %entry
; AIX32-NEXT: mflr r0
; AIX32-NEXT: stwu r1, -64(r1)
; AIX32-NEXT: cntlzw r5, r4
; AIX32-NEXT: cntlzw r6, r3
; AIX32-NEXT: stw r0, 72(r1)
; AIX32-NEXT: cmplwi r3, 0
; AIX32-NEXT: addi r5, r5, 32
; AIX32-NEXT: iseleq r5, r5, r6
; AIX32-NEXT: cntlzw r6, r4
; AIX32-NEXT: stw r0, 72(r1)
; AIX32-NEXT: addi r6, r6, 32
; AIX32-NEXT: cntlzw r5, r3
; AIX32-NEXT: iseleq r5, r6, r5
; AIX32-NEXT: andi. r6, r5, 32
; AIX32-NEXT: clrlwi r5, r5, 27
; AIX32-NEXT: iseleq r7, r3, r4
; AIX32-NEXT: subfic r8, r5, 32
; AIX32-NEXT: rotlwi r6, r3, 23
; AIX32-NEXT: iseleq r6, r3, r4
; AIX32-NEXT: iseleq r9, r4, r3
; AIX32-NEXT: slw r11, r7, r5
; AIX32-NEXT: srw r7, r7, r8
; AIX32-NEXT: srw r10, r9, r8
; AIX32-NEXT: slw r8, r9, r5
; AIX32-NEXT: srwi r5, r4, 9
; AIX32-NEXT: or r9, r11, r10
; AIX32-NEXT: subfic r7, r5, 32
; AIX32-NEXT: srw r8, r6, r7
; AIX32-NEXT: slw r10, r9, r5
; AIX32-NEXT: srw r7, r9, r7
; AIX32-NEXT: slw r5, r6, r5
; AIX32-NEXT: rotlwi r6, r3, 23
; AIX32-NEXT: or r5, r5, r7
; AIX32-NEXT: or r8, r10, r8
; AIX32-NEXT: rlwimi r6, r4, 23, 0, 8
; AIX32-NEXT: or r4, r8, r7
; AIX32-NEXT: clrlwi r7, r9, 1
; AIX32-NEXT: clrlwi r7, r5, 1
; AIX32-NEXT: srwi r5, r4, 9
; AIX32-NEXT: mr r4, r8
; AIX32-NEXT: rlwimi r5, r3, 23, 1, 8
; AIX32-NEXT: mr r3, r7
; AIX32-NEXT: bl .callee[PR]

View File

@@ -506,11 +506,11 @@ if.end: ; preds = %for.body, %if.else
;
; CHECK-32: mr 3, 4
; CHECK-32-NEXT: mr 5, 4
; CHECK-32-NEXT: mr 6, 4
; ENABLE-32-NEXT: stw 0, 72(1)
; CHECK-32: mr 6, 4
; CHECK-32-NEXT: mr 7, 4
; CHECK-32-NEXT: mr 8, 4
; CHECK-32-NEXT: mr 9, 4
; ENABLE-32-NEXT: stw 0, 72(1)
;
; CHECK-NEXT: bl {{.*}}someVariadicFunc
; CHECK: slwi 3, 3, 3

View File

@@ -17,12 +17,12 @@ define i64 @setb1(i64 %a, i64 %b) {
;
; CHECK-PWR8-LABEL: setb1:
; CHECK-PWR8: # %bb.0:
; CHECK-PWR8-NEXT: xor r6, r3, r4
; CHECK-PWR8-NEXT: li r5, -1
; CHECK-PWR8-NEXT: addic r7, r6, -1
; CHECK-PWR8-NEXT: xor r5, r3, r4
; CHECK-PWR8-NEXT: cmpd r3, r4
; CHECK-PWR8-NEXT: subfe r6, r7, r6
; CHECK-PWR8-NEXT: isellt r3, r5, r6
; CHECK-PWR8-NEXT: li r3, -1
; CHECK-PWR8-NEXT: addic r6, r5, -1
; CHECK-PWR8-NEXT: subfe r5, r6, r5
; CHECK-PWR8-NEXT: isellt r3, r3, r5
; CHECK-PWR8-NEXT: blr
%t1 = icmp slt i64 %a, %b
%t2 = icmp ne i64 %a, %b
@@ -41,12 +41,12 @@ define i64 @setb2(i64 %a, i64 %b) {
;
; CHECK-PWR8-LABEL: setb2:
; CHECK-PWR8: # %bb.0:
; CHECK-PWR8-NEXT: xor r6, r3, r4
; CHECK-PWR8-NEXT: li r5, -1
; CHECK-PWR8-NEXT: addic r7, r6, -1
; CHECK-PWR8-NEXT: xor r5, r3, r4
; CHECK-PWR8-NEXT: cmpd r4, r3
; CHECK-PWR8-NEXT: subfe r6, r7, r6
; CHECK-PWR8-NEXT: iselgt r3, r5, r6
; CHECK-PWR8-NEXT: li r3, -1
; CHECK-PWR8-NEXT: addic r6, r5, -1
; CHECK-PWR8-NEXT: subfe r5, r6, r5
; CHECK-PWR8-NEXT: iselgt r3, r3, r5
; CHECK-PWR8-NEXT: blr
%t1 = icmp sgt i64 %b, %a
%t2 = icmp ne i64 %a, %b
@@ -65,12 +65,12 @@ define i64 @setb3(i64 %a, i64 %b) {
;
; CHECK-PWR8-LABEL: setb3:
; CHECK-PWR8: # %bb.0:
; CHECK-PWR8-NEXT: xor r6, r4, r3
; CHECK-PWR8-NEXT: li r5, -1
; CHECK-PWR8-NEXT: addic r7, r6, -1
; CHECK-PWR8-NEXT: xor r5, r4, r3
; CHECK-PWR8-NEXT: cmpd r3, r4
; CHECK-PWR8-NEXT: subfe r6, r7, r6
; CHECK-PWR8-NEXT: isellt r3, r5, r6
; CHECK-PWR8-NEXT: li r3, -1
; CHECK-PWR8-NEXT: addic r6, r5, -1
; CHECK-PWR8-NEXT: subfe r5, r6, r5
; CHECK-PWR8-NEXT: isellt r3, r3, r5
; CHECK-PWR8-NEXT: blr
%t1 = icmp slt i64 %a, %b
%t2 = icmp ne i64 %b, %a
@@ -89,12 +89,12 @@ define i64 @setb4(i64 %a, i64 %b) {
;
; CHECK-PWR8-LABEL: setb4:
; CHECK-PWR8: # %bb.0:
; CHECK-PWR8-NEXT: xor r6, r4, r3
; CHECK-PWR8-NEXT: li r5, -1
; CHECK-PWR8-NEXT: addic r7, r6, -1
; CHECK-PWR8-NEXT: xor r5, r4, r3
; CHECK-PWR8-NEXT: cmpd r4, r3
; CHECK-PWR8-NEXT: subfe r6, r7, r6
; CHECK-PWR8-NEXT: iselgt r3, r5, r6
; CHECK-PWR8-NEXT: li r3, -1
; CHECK-PWR8-NEXT: addic r6, r5, -1
; CHECK-PWR8-NEXT: subfe r5, r6, r5
; CHECK-PWR8-NEXT: iselgt r3, r3, r5
; CHECK-PWR8-NEXT: blr
%t1 = icmp sgt i64 %b, %a
%t2 = icmp ne i64 %b, %a
@@ -113,14 +113,14 @@ define i64 @setb5(i64 %a, i64 %b) {
;
; CHECK-PWR8-LABEL: setb5:
; CHECK-PWR8: # %bb.0:
; CHECK-PWR8-NEXT: sradi r6, r4, 63
; CHECK-PWR8-NEXT: rldicl r7, r3, 1, 63
; CHECK-PWR8-NEXT: li r5, -1
; CHECK-PWR8-NEXT: subc r8, r4, r3
; CHECK-PWR8-NEXT: sradi r5, r4, 63
; CHECK-PWR8-NEXT: rldicl r6, r3, 1, 63
; CHECK-PWR8-NEXT: subc r7, r4, r3
; CHECK-PWR8-NEXT: adde r5, r6, r5
; CHECK-PWR8-NEXT: cmpd r3, r4
; CHECK-PWR8-NEXT: adde r6, r7, r6
; CHECK-PWR8-NEXT: xori r6, r6, 1
; CHECK-PWR8-NEXT: isellt r3, r5, r6
; CHECK-PWR8-NEXT: li r3, -1
; CHECK-PWR8-NEXT: xori r5, r5, 1
; CHECK-PWR8-NEXT: isellt r3, r3, r5
; CHECK-PWR8-NEXT: blr
%t1 = icmp slt i64 %a, %b
%t2 = icmp sgt i64 %a, %b
@@ -139,14 +139,14 @@ define i64 @setb6(i64 %a, i64 %b) {
;
; CHECK-PWR8-LABEL: setb6:
; CHECK-PWR8: # %bb.0:
; CHECK-PWR8-NEXT: sradi r6, r4, 63
; CHECK-PWR8-NEXT: rldicl r7, r3, 1, 63
; CHECK-PWR8-NEXT: li r5, -1
; CHECK-PWR8-NEXT: subc r8, r4, r3
; CHECK-PWR8-NEXT: sradi r5, r4, 63
; CHECK-PWR8-NEXT: rldicl r6, r3, 1, 63
; CHECK-PWR8-NEXT: subc r7, r4, r3
; CHECK-PWR8-NEXT: adde r5, r6, r5
; CHECK-PWR8-NEXT: cmpd r4, r3
; CHECK-PWR8-NEXT: adde r6, r7, r6
; CHECK-PWR8-NEXT: xori r6, r6, 1
; CHECK-PWR8-NEXT: iselgt r3, r5, r6
; CHECK-PWR8-NEXT: li r3, -1
; CHECK-PWR8-NEXT: xori r5, r5, 1
; CHECK-PWR8-NEXT: iselgt r3, r3, r5
; CHECK-PWR8-NEXT: blr
%t1 = icmp sgt i64 %b, %a
%t2 = icmp sgt i64 %a, %b
@@ -165,14 +165,14 @@ define i64 @setb7(i64 %a, i64 %b) {
;
; CHECK-PWR8-LABEL: setb7:
; CHECK-PWR8: # %bb.0:
; CHECK-PWR8-NEXT: sradi r6, r4, 63
; CHECK-PWR8-NEXT: rldicl r7, r3, 1, 63
; CHECK-PWR8-NEXT: li r5, -1
; CHECK-PWR8-NEXT: subc r8, r4, r3
; CHECK-PWR8-NEXT: sradi r5, r4, 63
; CHECK-PWR8-NEXT: rldicl r6, r3, 1, 63
; CHECK-PWR8-NEXT: subc r7, r4, r3
; CHECK-PWR8-NEXT: adde r5, r6, r5
; CHECK-PWR8-NEXT: cmpd r3, r4
; CHECK-PWR8-NEXT: adde r6, r7, r6
; CHECK-PWR8-NEXT: xori r6, r6, 1
; CHECK-PWR8-NEXT: isellt r3, r5, r6
; CHECK-PWR8-NEXT: li r3, -1
; CHECK-PWR8-NEXT: xori r5, r5, 1
; CHECK-PWR8-NEXT: isellt r3, r3, r5
; CHECK-PWR8-NEXT: blr
%t1 = icmp slt i64 %a, %b
%t2 = icmp slt i64 %b, %a
@@ -191,14 +191,14 @@ define i64 @setb8(i64 %a, i64 %b) {
;
; CHECK-PWR8-LABEL: setb8:
; CHECK-PWR8: # %bb.0:
; CHECK-PWR8-NEXT: sradi r6, r4, 63
; CHECK-PWR8-NEXT: rldicl r7, r3, 1, 63
; CHECK-PWR8-NEXT: li r5, -1
; CHECK-PWR8-NEXT: subc r8, r4, r3
; CHECK-PWR8-NEXT: sradi r5, r4, 63
; CHECK-PWR8-NEXT: rldicl r6, r3, 1, 63
; CHECK-PWR8-NEXT: subc r7, r4, r3
; CHECK-PWR8-NEXT: adde r5, r6, r5
; CHECK-PWR8-NEXT: cmpd r4, r3
; CHECK-PWR8-NEXT: adde r6, r7, r6
; CHECK-PWR8-NEXT: xori r6, r6, 1
; CHECK-PWR8-NEXT: iselgt r3, r5, r6
; CHECK-PWR8-NEXT: li r3, -1
; CHECK-PWR8-NEXT: xori r5, r5, 1
; CHECK-PWR8-NEXT: iselgt r3, r3, r5
; CHECK-PWR8-NEXT: blr
%t1 = icmp sgt i64 %b, %a
%t2 = icmp slt i64 %b, %a
@@ -217,12 +217,12 @@ define i64 @setb9(i64 %a, i64 %b) {
;
; CHECK-PWR8-LABEL: setb9:
; CHECK-PWR8: # %bb.0:
; CHECK-PWR8-NEXT: xor r6, r3, r4
; CHECK-PWR8-NEXT: li r5, 1
; CHECK-PWR8-NEXT: subfic r6, r6, 0
; CHECK-PWR8-NEXT: xor r5, r3, r4
; CHECK-PWR8-NEXT: cmpd r3, r4
; CHECK-PWR8-NEXT: subfe r3, r6, r6
; CHECK-PWR8-NEXT: iselgt r3, r5, r3
; CHECK-PWR8-NEXT: li r3, 1
; CHECK-PWR8-NEXT: subfic r5, r5, 0
; CHECK-PWR8-NEXT: subfe r5, r5, r5
; CHECK-PWR8-NEXT: iselgt r3, r3, r5
; CHECK-PWR8-NEXT: blr
%t1 = icmp sgt i64 %a, %b
%t2 = icmp ne i64 %a, %b
@@ -241,12 +241,12 @@ define i64 @setb10(i64 %a, i64 %b) {
;
; CHECK-PWR8-LABEL: setb10:
; CHECK-PWR8: # %bb.0:
; CHECK-PWR8-NEXT: xor r6, r3, r4
; CHECK-PWR8-NEXT: li r5, 1
; CHECK-PWR8-NEXT: subfic r6, r6, 0
; CHECK-PWR8-NEXT: xor r5, r3, r4
; CHECK-PWR8-NEXT: cmpd r4, r3
; CHECK-PWR8-NEXT: subfe r3, r6, r6
; CHECK-PWR8-NEXT: isellt r3, r5, r3
; CHECK-PWR8-NEXT: li r3, 1
; CHECK-PWR8-NEXT: subfic r5, r5, 0
; CHECK-PWR8-NEXT: subfe r5, r5, r5
; CHECK-PWR8-NEXT: isellt r3, r3, r5
; CHECK-PWR8-NEXT: blr
%t1 = icmp slt i64 %b, %a
%t2 = icmp ne i64 %a, %b
@@ -265,12 +265,12 @@ define i64 @setb11(i64 %a, i64 %b) {
;
; CHECK-PWR8-LABEL: setb11:
; CHECK-PWR8: # %bb.0:
; CHECK-PWR8-NEXT: xor r6, r4, r3
; CHECK-PWR8-NEXT: li r5, 1
; CHECK-PWR8-NEXT: subfic r6, r6, 0
; CHECK-PWR8-NEXT: xor r5, r4, r3
; CHECK-PWR8-NEXT: cmpd r3, r4
; CHECK-PWR8-NEXT: subfe r3, r6, r6
; CHECK-PWR8-NEXT: iselgt r3, r5, r3
; CHECK-PWR8-NEXT: li r3, 1
; CHECK-PWR8-NEXT: subfic r5, r5, 0
; CHECK-PWR8-NEXT: subfe r5, r5, r5
; CHECK-PWR8-NEXT: iselgt r3, r3, r5
; CHECK-PWR8-NEXT: blr
%t1 = icmp sgt i64 %a, %b
%t2 = icmp ne i64 %b, %a
@@ -289,12 +289,12 @@ define i64 @setb12(i64 %a, i64 %b) {
;
; CHECK-PWR8-LABEL: setb12:
; CHECK-PWR8: # %bb.0:
; CHECK-PWR8-NEXT: xor r6, r4, r3
; CHECK-PWR8-NEXT: li r5, 1
; CHECK-PWR8-NEXT: subfic r6, r6, 0
; CHECK-PWR8-NEXT: xor r5, r4, r3
; CHECK-PWR8-NEXT: cmpd r4, r3
; CHECK-PWR8-NEXT: subfe r3, r6, r6
; CHECK-PWR8-NEXT: isellt r3, r5, r3
; CHECK-PWR8-NEXT: li r3, 1
; CHECK-PWR8-NEXT: subfic r5, r5, 0
; CHECK-PWR8-NEXT: subfe r5, r5, r5
; CHECK-PWR8-NEXT: isellt r3, r3, r5
; CHECK-PWR8-NEXT: blr
%t1 = icmp slt i64 %b, %a
%t2 = icmp ne i64 %b, %a
@@ -313,15 +313,15 @@ define i64 @setb13(i64 %a, i64 %b) {
;
; CHECK-PWR8-LABEL: setb13:
; CHECK-PWR8: # %bb.0:
; CHECK-PWR8-NEXT: sradi r6, r3, 63
; CHECK-PWR8-NEXT: rldicl r7, r4, 1, 63
; CHECK-PWR8-NEXT: li r5, 1
; CHECK-PWR8-NEXT: subc r8, r3, r4
; CHECK-PWR8-NEXT: sradi r5, r3, 63
; CHECK-PWR8-NEXT: rldicl r6, r4, 1, 63
; CHECK-PWR8-NEXT: subc r7, r3, r4
; CHECK-PWR8-NEXT: adde r5, r6, r5
; CHECK-PWR8-NEXT: cmpd r3, r4
; CHECK-PWR8-NEXT: adde r6, r7, r6
; CHECK-PWR8-NEXT: xori r6, r6, 1
; CHECK-PWR8-NEXT: neg r6, r6
; CHECK-PWR8-NEXT: iselgt r3, r5, r6
; CHECK-PWR8-NEXT: li r3, 1
; CHECK-PWR8-NEXT: xori r5, r5, 1
; CHECK-PWR8-NEXT: neg r5, r5
; CHECK-PWR8-NEXT: iselgt r3, r3, r5
; CHECK-PWR8-NEXT: blr
%t1 = icmp sgt i64 %a, %b
%t2 = icmp slt i64 %a, %b
@@ -340,15 +340,15 @@ define i64 @setb14(i64 %a, i64 %b) {
;
; CHECK-PWR8-LABEL: setb14:
; CHECK-PWR8: # %bb.0:
; CHECK-PWR8-NEXT: sradi r6, r3, 63
; CHECK-PWR8-NEXT: rldicl r7, r4, 1, 63
; CHECK-PWR8-NEXT: li r5, 1
; CHECK-PWR8-NEXT: subc r8, r3, r4
; CHECK-PWR8-NEXT: sradi r5, r3, 63
; CHECK-PWR8-NEXT: rldicl r6, r4, 1, 63
; CHECK-PWR8-NEXT: subc r7, r3, r4
; CHECK-PWR8-NEXT: adde r5, r6, r5
; CHECK-PWR8-NEXT: cmpd r4, r3
; CHECK-PWR8-NEXT: adde r6, r7, r6
; CHECK-PWR8-NEXT: xori r6, r6, 1
; CHECK-PWR8-NEXT: neg r6, r6
; CHECK-PWR8-NEXT: isellt r3, r5, r6
; CHECK-PWR8-NEXT: li r3, 1
; CHECK-PWR8-NEXT: xori r5, r5, 1
; CHECK-PWR8-NEXT: neg r5, r5
; CHECK-PWR8-NEXT: isellt r3, r3, r5
; CHECK-PWR8-NEXT: blr
%t1 = icmp slt i64 %b, %a
%t2 = icmp slt i64 %a, %b
@@ -367,15 +367,15 @@ define i64 @setb15(i64 %a, i64 %b) {
;
; CHECK-PWR8-LABEL: setb15:
; CHECK-PWR8: # %bb.0:
; CHECK-PWR8-NEXT: sradi r6, r3, 63
; CHECK-PWR8-NEXT: rldicl r7, r4, 1, 63
; CHECK-PWR8-NEXT: li r5, 1
; CHECK-PWR8-NEXT: subc r8, r3, r4
; CHECK-PWR8-NEXT: sradi r5, r3, 63
; CHECK-PWR8-NEXT: rldicl r6, r4, 1, 63
; CHECK-PWR8-NEXT: subc r7, r3, r4
; CHECK-PWR8-NEXT: adde r5, r6, r5
; CHECK-PWR8-NEXT: cmpd r3, r4
; CHECK-PWR8-NEXT: adde r6, r7, r6
; CHECK-PWR8-NEXT: xori r6, r6, 1
; CHECK-PWR8-NEXT: neg r6, r6
; CHECK-PWR8-NEXT: iselgt r3, r5, r6
; CHECK-PWR8-NEXT: li r3, 1
; CHECK-PWR8-NEXT: xori r5, r5, 1
; CHECK-PWR8-NEXT: neg r5, r5
; CHECK-PWR8-NEXT: iselgt r3, r3, r5
; CHECK-PWR8-NEXT: blr
%t1 = icmp sgt i64 %a, %b
%t2 = icmp sgt i64 %b, %a
@@ -394,15 +394,15 @@ define i64 @setb16(i64 %a, i64 %b) {
;
; CHECK-PWR8-LABEL: setb16:
; CHECK-PWR8: # %bb.0:
; CHECK-PWR8-NEXT: sradi r6, r3, 63
; CHECK-PWR8-NEXT: rldicl r7, r4, 1, 63
; CHECK-PWR8-NEXT: li r5, 1
; CHECK-PWR8-NEXT: subc r8, r3, r4
; CHECK-PWR8-NEXT: sradi r5, r3, 63
; CHECK-PWR8-NEXT: rldicl r6, r4, 1, 63
; CHECK-PWR8-NEXT: subc r7, r3, r4
; CHECK-PWR8-NEXT: adde r5, r6, r5
; CHECK-PWR8-NEXT: cmpd r4, r3
; CHECK-PWR8-NEXT: adde r6, r7, r6
; CHECK-PWR8-NEXT: xori r6, r6, 1
; CHECK-PWR8-NEXT: neg r6, r6
; CHECK-PWR8-NEXT: isellt r3, r5, r6
; CHECK-PWR8-NEXT: li r3, 1
; CHECK-PWR8-NEXT: xori r5, r5, 1
; CHECK-PWR8-NEXT: neg r5, r5
; CHECK-PWR8-NEXT: isellt r3, r3, r5
; CHECK-PWR8-NEXT: blr
%t1 = icmp slt i64 %b, %a
%t2 = icmp sgt i64 %b, %a
@@ -421,8 +421,8 @@ define i64 @setb17(i64 %a, i64 %b) {
;
; CHECK-PWR8-LABEL: setb17:
; CHECK-PWR8: # %bb.0:
; CHECK-PWR8-NEXT: li r5, -1
; CHECK-PWR8-NEXT: cmpd r3, r4
; CHECK-PWR8-NEXT: li r5, -1
; CHECK-PWR8-NEXT: li r6, 1
; CHECK-PWR8-NEXT: iselgt r5, r6, r5
; CHECK-PWR8-NEXT: cmpld r3, r4
@@ -445,8 +445,8 @@ define i64 @setb18(i64 %a, i64 %b) {
;
; CHECK-PWR8-LABEL: setb18:
; CHECK-PWR8: # %bb.0:
; CHECK-PWR8-NEXT: li r5, -1
; CHECK-PWR8-NEXT: cmpd r3, r4
; CHECK-PWR8-NEXT: li r5, -1
; CHECK-PWR8-NEXT: li r6, 1
; CHECK-PWR8-NEXT: iselgt r5, r6, r5
; CHECK-PWR8-NEXT: cmpld r4, r3
@@ -469,8 +469,8 @@ define i64 @setb19(i64 %a, i64 %b) {
;
; CHECK-PWR8-LABEL: setb19:
; CHECK-PWR8: # %bb.0:
; CHECK-PWR8-NEXT: li r5, -1
; CHECK-PWR8-NEXT: cmpd r4, r3
; CHECK-PWR8-NEXT: li r5, -1
; CHECK-PWR8-NEXT: li r6, 1
; CHECK-PWR8-NEXT: isellt r5, r6, r5
; CHECK-PWR8-NEXT: cmpld r3, r4
@@ -493,8 +493,8 @@ define i64 @setb20(i64 %a, i64 %b) {
;
; CHECK-PWR8-LABEL: setb20:
; CHECK-PWR8: # %bb.0:
; CHECK-PWR8-NEXT: li r5, -1
; CHECK-PWR8-NEXT: cmpd r4, r3
; CHECK-PWR8-NEXT: li r5, -1
; CHECK-PWR8-NEXT: li r6, 1
; CHECK-PWR8-NEXT: isellt r5, r6, r5
; CHECK-PWR8-NEXT: cmpld r4, r3
@@ -517,8 +517,8 @@ define i64 @setb21(i64 %a, i64 %b) {
;
; CHECK-PWR8-LABEL: setb21:
; CHECK-PWR8: # %bb.0:
; CHECK-PWR8-NEXT: li r5, 1
; CHECK-PWR8-NEXT: cmpd r3, r4
; CHECK-PWR8-NEXT: li r5, 1
; CHECK-PWR8-NEXT: li r6, -1
; CHECK-PWR8-NEXT: isellt r5, r6, r5
; CHECK-PWR8-NEXT: cmpld r3, r4
@@ -541,8 +541,8 @@ define i64 @setb22(i64 %a, i64 %b) {
;
; CHECK-PWR8-LABEL: setb22:
; CHECK-PWR8: # %bb.0:
; CHECK-PWR8-NEXT: li r5, 1
; CHECK-PWR8-NEXT: cmpd r3, r4
; CHECK-PWR8-NEXT: li r5, 1
; CHECK-PWR8-NEXT: li r6, -1
; CHECK-PWR8-NEXT: isellt r5, r6, r5
; CHECK-PWR8-NEXT: cmpld r4, r3
@@ -565,8 +565,8 @@ define i64 @setb23(i64 %a, i64 %b) {
;
; CHECK-PWR8-LABEL: setb23:
; CHECK-PWR8: # %bb.0:
; CHECK-PWR8-NEXT: li r5, 1
; CHECK-PWR8-NEXT: cmpd r4, r3
; CHECK-PWR8-NEXT: li r5, 1
; CHECK-PWR8-NEXT: li r6, -1
; CHECK-PWR8-NEXT: iselgt r5, r6, r5
; CHECK-PWR8-NEXT: cmpld r3, r4
@@ -589,8 +589,8 @@ define i64 @setb24(i64 %a, i64 %b) {
;
; CHECK-PWR8-LABEL: setb24:
; CHECK-PWR8: # %bb.0:
; CHECK-PWR8-NEXT: li r5, 1
; CHECK-PWR8-NEXT: cmpd r4, r3
; CHECK-PWR8-NEXT: li r5, 1
; CHECK-PWR8-NEXT: li r6, -1
; CHECK-PWR8-NEXT: iselgt r5, r6, r5
; CHECK-PWR8-NEXT: cmpld r4, r3
@@ -616,12 +616,12 @@ define i64 @setb25(i64 %a, i64 %b) {
;
; CHECK-PWR8-LABEL: setb25:
; CHECK-PWR8: # %bb.0:
; CHECK-PWR8-NEXT: xor r6, r4, r3
; CHECK-PWR8-NEXT: li r5, -1
; CHECK-PWR8-NEXT: addic r7, r6, -1
; CHECK-PWR8-NEXT: xor r5, r4, r3
; CHECK-PWR8-NEXT: cmpd r4, r3
; CHECK-PWR8-NEXT: subfe r6, r7, r6
; CHECK-PWR8-NEXT: isellt r3, r5, r6
; CHECK-PWR8-NEXT: li r3, -1
; CHECK-PWR8-NEXT: addic r6, r5, -1
; CHECK-PWR8-NEXT: subfe r5, r6, r5
; CHECK-PWR8-NEXT: isellt r3, r3, r5
; CHECK-PWR8-NEXT: blr
%t1 = icmp slt i64 %b, %a
%t2 = icmp ne i64 %b, %a
@@ -640,12 +640,12 @@ define i64 @setb26(i64 %a, i64 %b) {
;
; CHECK-PWR8-LABEL: setb26:
; CHECK-PWR8: # %bb.0:
; CHECK-PWR8-NEXT: xor r6, r4, r3
; CHECK-PWR8-NEXT: li r5, -1
; CHECK-PWR8-NEXT: addic r7, r6, -1
; CHECK-PWR8-NEXT: xor r5, r4, r3
; CHECK-PWR8-NEXT: cmpd r3, r4
; CHECK-PWR8-NEXT: subfe r6, r7, r6
; CHECK-PWR8-NEXT: iselgt r3, r5, r6
; CHECK-PWR8-NEXT: li r3, -1
; CHECK-PWR8-NEXT: addic r6, r5, -1
; CHECK-PWR8-NEXT: subfe r5, r6, r5
; CHECK-PWR8-NEXT: iselgt r3, r3, r5
; CHECK-PWR8-NEXT: blr
%t1 = icmp sgt i64 %a, %b
%t2 = icmp ne i64 %b, %a
@@ -667,12 +667,12 @@ define i64 @setb27(i64 %a, i64 %b) {
;
; CHECK-PWR8-LABEL: setb27:
; CHECK-PWR8: # %bb.0:
; CHECK-PWR8-NEXT: xor r6, r4, r3
; CHECK-PWR8-NEXT: li r5, -1
; CHECK-PWR8-NEXT: addic r7, r6, -1
; CHECK-PWR8-NEXT: xor r5, r4, r3
; CHECK-PWR8-NEXT: cmpd r3, r4
; CHECK-PWR8-NEXT: subfe r6, r7, r6
; CHECK-PWR8-NEXT: isellt r3, r5, r6
; CHECK-PWR8-NEXT: li r3, -1
; CHECK-PWR8-NEXT: addic r6, r5, -1
; CHECK-PWR8-NEXT: subfe r5, r6, r5
; CHECK-PWR8-NEXT: isellt r3, r3, r5
; CHECK-PWR8-NEXT: extsw r3, r3
; CHECK-PWR8-NEXT: blr
%t1 = icmp slt i64 %a, %b
@@ -693,12 +693,12 @@ define i64 @setb28(i64 %a, i64 %b) {
;
; CHECK-PWR8-LABEL: setb28:
; CHECK-PWR8: # %bb.0:
; CHECK-PWR8-NEXT: xor r6, r4, r3
; CHECK-PWR8-NEXT: li r5, -1
; CHECK-PWR8-NEXT: addic r7, r6, -1
; CHECK-PWR8-NEXT: xor r5, r4, r3
; CHECK-PWR8-NEXT: cmpd r4, r3
; CHECK-PWR8-NEXT: subfe r6, r7, r6
; CHECK-PWR8-NEXT: iselgt r3, r5, r6
; CHECK-PWR8-NEXT: li r3, -1
; CHECK-PWR8-NEXT: addic r6, r5, -1
; CHECK-PWR8-NEXT: subfe r5, r6, r5
; CHECK-PWR8-NEXT: iselgt r3, r3, r5
; CHECK-PWR8-NEXT: extsw r3, r3
; CHECK-PWR8-NEXT: blr
%t1 = icmp sgt i64 %b, %a
@@ -720,14 +720,14 @@ define i64 @setb29(i64 %a, i64 %b) {
;
; CHECK-PWR8-LABEL: setb29:
; CHECK-PWR8: # %bb.0:
; CHECK-PWR8-NEXT: sradi r6, r4, 63
; CHECK-PWR8-NEXT: rldicl r7, r3, 1, 63
; CHECK-PWR8-NEXT: li r5, -1
; CHECK-PWR8-NEXT: subc r8, r4, r3
; CHECK-PWR8-NEXT: sradi r5, r4, 63
; CHECK-PWR8-NEXT: rldicl r6, r3, 1, 63
; CHECK-PWR8-NEXT: subc r7, r4, r3
; CHECK-PWR8-NEXT: adde r5, r6, r5
; CHECK-PWR8-NEXT: cmpd r3, r4
; CHECK-PWR8-NEXT: adde r6, r7, r6
; CHECK-PWR8-NEXT: xori r6, r6, 1
; CHECK-PWR8-NEXT: isellt r3, r5, r6
; CHECK-PWR8-NEXT: li r3, -1
; CHECK-PWR8-NEXT: xori r5, r5, 1
; CHECK-PWR8-NEXT: isellt r3, r3, r5
; CHECK-PWR8-NEXT: clrldi r3, r3, 56
; CHECK-PWR8-NEXT: blr
%t1 = icmp slt i64 %a, %b
@@ -751,13 +751,13 @@ define i64 @setbsw1(i32 %a, i32 %b) {
;
; CHECK-PWR8-LABEL: setbsw1:
; CHECK-PWR8: # %bb.0:
; CHECK-PWR8-NEXT: xor r6, r3, r4
; CHECK-PWR8-NEXT: li r5, -1
; CHECK-PWR8-NEXT: cntlzw r6, r6
; CHECK-PWR8-NEXT: xor r5, r3, r4
; CHECK-PWR8-NEXT: cmpw r3, r4
; CHECK-PWR8-NEXT: srwi r6, r6, 5
; CHECK-PWR8-NEXT: xori r3, r6, 1
; CHECK-PWR8-NEXT: isellt r3, r5, r3
; CHECK-PWR8-NEXT: li r3, -1
; CHECK-PWR8-NEXT: cntlzw r5, r5
; CHECK-PWR8-NEXT: srwi r5, r5, 5
; CHECK-PWR8-NEXT: xori r5, r5, 1
; CHECK-PWR8-NEXT: isellt r3, r3, r5
; CHECK-PWR8-NEXT: blr
%t1 = icmp slt i32 %a, %b
%t2 = icmp ne i32 %a, %b
@@ -776,13 +776,13 @@ define i64 @setbsw2(i32 %a, i32 %b) {
;
; CHECK-PWR8-LABEL: setbsw2:
; CHECK-PWR8: # %bb.0:
; CHECK-PWR8-NEXT: xor r6, r3, r4
; CHECK-PWR8-NEXT: li r5, -1
; CHECK-PWR8-NEXT: cntlzw r6, r6
; CHECK-PWR8-NEXT: xor r5, r3, r4
; CHECK-PWR8-NEXT: cmpw r4, r3
; CHECK-PWR8-NEXT: srwi r6, r6, 5
; CHECK-PWR8-NEXT: xori r3, r6, 1
; CHECK-PWR8-NEXT: iselgt r3, r5, r3
; CHECK-PWR8-NEXT: li r3, -1
; CHECK-PWR8-NEXT: cntlzw r5, r5
; CHECK-PWR8-NEXT: srwi r5, r5, 5
; CHECK-PWR8-NEXT: xori r5, r5, 1
; CHECK-PWR8-NEXT: iselgt r3, r3, r5
; CHECK-PWR8-NEXT: blr
%t1 = icmp sgt i32 %b, %a
%t2 = icmp ne i32 %a, %b
@@ -801,8 +801,8 @@ define i64 @setbsw3(i32 %a, i32 %b) {
;
; CHECK-PWR8-LABEL: setbsw3:
; CHECK-PWR8: # %bb.0:
; CHECK-PWR8-NEXT: li r5, 1
; CHECK-PWR8-NEXT: cmpw r4, r3
; CHECK-PWR8-NEXT: li r5, 1
; CHECK-PWR8-NEXT: li r6, -1
; CHECK-PWR8-NEXT: iselgt r5, r6, r5
; CHECK-PWR8-NEXT: cmplw r3, r4
@@ -825,13 +825,13 @@ define i64 @setbsh1(i16 signext %a, i16 signext %b) {
;
; CHECK-PWR8-LABEL: setbsh1:
; CHECK-PWR8: # %bb.0:
; CHECK-PWR8-NEXT: xor r6, r4, r3
; CHECK-PWR8-NEXT: li r5, -1
; CHECK-PWR8-NEXT: cntlzw r6, r6
; CHECK-PWR8-NEXT: xor r5, r4, r3
; CHECK-PWR8-NEXT: cmpw r3, r4
; CHECK-PWR8-NEXT: srwi r6, r6, 5
; CHECK-PWR8-NEXT: xori r3, r6, 1
; CHECK-PWR8-NEXT: isellt r3, r5, r3
; CHECK-PWR8-NEXT: li r3, -1
; CHECK-PWR8-NEXT: cntlzw r5, r5
; CHECK-PWR8-NEXT: srwi r5, r5, 5
; CHECK-PWR8-NEXT: xori r5, r5, 1
; CHECK-PWR8-NEXT: isellt r3, r3, r5
; CHECK-PWR8-NEXT: blr
%t1 = icmp slt i16 %a, %b
%t2 = icmp ne i16 %b, %a
@@ -850,13 +850,13 @@ define i64 @setbsh2(i16 signext %a, i16 signext %b) {
;
; CHECK-PWR8-LABEL: setbsh2:
; CHECK-PWR8: # %bb.0:
; CHECK-PWR8-NEXT: xor r6, r4, r3
; CHECK-PWR8-NEXT: li r5, -1
; CHECK-PWR8-NEXT: cntlzw r6, r6
; CHECK-PWR8-NEXT: xor r5, r4, r3
; CHECK-PWR8-NEXT: cmpw r4, r3
; CHECK-PWR8-NEXT: srwi r6, r6, 5
; CHECK-PWR8-NEXT: xori r3, r6, 1
; CHECK-PWR8-NEXT: iselgt r3, r5, r3
; CHECK-PWR8-NEXT: li r3, -1
; CHECK-PWR8-NEXT: cntlzw r5, r5
; CHECK-PWR8-NEXT: srwi r5, r5, 5
; CHECK-PWR8-NEXT: xori r5, r5, 1
; CHECK-PWR8-NEXT: iselgt r3, r3, r5
; CHECK-PWR8-NEXT: blr
%t1 = icmp sgt i16 %b, %a
%t2 = icmp ne i16 %b, %a
@@ -879,11 +879,11 @@ define i64 @setbsc1(i8 %a, i8 %b) {
; CHECK-PWR8: # %bb.0:
; CHECK-PWR8-NEXT: extsb r4, r4
; CHECK-PWR8-NEXT: extsb r3, r3
; CHECK-PWR8-NEXT: li r5, -1
; CHECK-PWR8-NEXT: sub r6, r4, r3
; CHECK-PWR8-NEXT: sub r5, r4, r3
; CHECK-PWR8-NEXT: cmpw r3, r4
; CHECK-PWR8-NEXT: rldicl r3, r6, 1, 63
; CHECK-PWR8-NEXT: isellt r3, r5, r3
; CHECK-PWR8-NEXT: li r3, -1
; CHECK-PWR8-NEXT: rldicl r5, r5, 1, 63
; CHECK-PWR8-NEXT: isellt r3, r3, r5
; CHECK-PWR8-NEXT: blr
%t1 = icmp slt i8 %a, %b
%t2 = icmp sgt i8 %a, %b
@@ -906,11 +906,11 @@ define i64 @setbsc2(i8 %a, i8 %b) {
; CHECK-PWR8: # %bb.0:
; CHECK-PWR8-NEXT: extsb r4, r4
; CHECK-PWR8-NEXT: extsb r3, r3
; CHECK-PWR8-NEXT: li r5, -1
; CHECK-PWR8-NEXT: sub r6, r4, r3
; CHECK-PWR8-NEXT: sub r5, r4, r3
; CHECK-PWR8-NEXT: cmpw r4, r3
; CHECK-PWR8-NEXT: rldicl r3, r6, 1, 63
; CHECK-PWR8-NEXT: iselgt r3, r5, r3
; CHECK-PWR8-NEXT: li r3, -1
; CHECK-PWR8-NEXT: rldicl r5, r5, 1, 63
; CHECK-PWR8-NEXT: iselgt r3, r3, r5
; CHECK-PWR8-NEXT: blr
%t1 = icmp sgt i8 %b, %a
%t2 = icmp sgt i8 %a, %b
@@ -935,13 +935,13 @@ define i64 @setbsc3(i4 %a, i4 %b) {
; CHECK-PWR8: # %bb.0:
; CHECK-PWR8-NEXT: slwi r4, r4, 28
; CHECK-PWR8-NEXT: slwi r3, r3, 28
; CHECK-PWR8-NEXT: li r5, -1
; CHECK-PWR8-NEXT: srawi r4, r4, 28
; CHECK-PWR8-NEXT: srawi r3, r3, 28
; CHECK-PWR8-NEXT: sub r6, r4, r3
; CHECK-PWR8-NEXT: cmpw r3, r4
; CHECK-PWR8-NEXT: rldicl r3, r6, 1, 63
; CHECK-PWR8-NEXT: isellt r3, r5, r3
; CHECK-PWR8-NEXT: sub r5, r4, r3
; CHECK-PWR8-NEXT: li r3, -1
; CHECK-PWR8-NEXT: rldicl r5, r5, 1, 63
; CHECK-PWR8-NEXT: isellt r3, r3, r5
; CHECK-PWR8-NEXT: blr
%t1 = icmp slt i4 %a, %b
%t2 = icmp slt i4 %b, %a
@@ -962,12 +962,12 @@ define i64 @setbud1(i64 %a, i64 %b) {
;
; CHECK-PWR8-LABEL: setbud1:
; CHECK-PWR8: # %bb.0:
; CHECK-PWR8-NEXT: subc r6, r4, r3
; CHECK-PWR8-NEXT: li r5, -1
; CHECK-PWR8-NEXT: subfe r6, r4, r4
; CHECK-PWR8-NEXT: subc r5, r4, r3
; CHECK-PWR8-NEXT: cmpld r4, r3
; CHECK-PWR8-NEXT: neg r3, r6
; CHECK-PWR8-NEXT: iselgt r3, r5, r3
; CHECK-PWR8-NEXT: li r3, -1
; CHECK-PWR8-NEXT: subfe r5, r4, r4
; CHECK-PWR8-NEXT: neg r5, r5
; CHECK-PWR8-NEXT: iselgt r3, r3, r5
; CHECK-PWR8-NEXT: blr
%t1 = icmp ugt i64 %b, %a
%t2 = icmp ult i64 %b, %a
@@ -986,12 +986,12 @@ define i64 @setbud2(i64 %a, i64 %b) {
;
; CHECK-PWR8-LABEL: setbud2:
; CHECK-PWR8: # %bb.0:
; CHECK-PWR8-NEXT: xor r6, r3, r4
; CHECK-PWR8-NEXT: li r5, 1
; CHECK-PWR8-NEXT: subfic r6, r6, 0
; CHECK-PWR8-NEXT: xor r5, r3, r4
; CHECK-PWR8-NEXT: cmpld r3, r4
; CHECK-PWR8-NEXT: subfe r3, r6, r6
; CHECK-PWR8-NEXT: iselgt r3, r5, r3
; CHECK-PWR8-NEXT: li r3, 1
; CHECK-PWR8-NEXT: subfic r5, r5, 0
; CHECK-PWR8-NEXT: subfe r5, r5, r5
; CHECK-PWR8-NEXT: iselgt r3, r3, r5
; CHECK-PWR8-NEXT: blr
%t1 = icmp ugt i64 %a, %b
%t2 = icmp ne i64 %a, %b
@@ -1010,10 +1010,10 @@ define i64 @setbud3(i64 %a, i64 %b) {
;
; CHECK-PWR8-LABEL: setbud3:
; CHECK-PWR8: # %bb.0:
; CHECK-PWR8-NEXT: li r5, 1
; CHECK-PWR8-NEXT: cmpld r4, r3
; CHECK-PWR8-NEXT: li r3, -1
; CHECK-PWR8-NEXT: iselgt r3, r3, r5
; CHECK-PWR8-NEXT: li r3, 1
; CHECK-PWR8-NEXT: li r4, -1
; CHECK-PWR8-NEXT: iselgt r3, r4, r3
; CHECK-PWR8-NEXT: iseleq r3, 0, r3
; CHECK-PWR8-NEXT: blr
%t1 = icmp eq i64 %b, %a
@@ -1033,14 +1033,14 @@ define i64 @setbuw1(i32 %a, i32 %b) {
;
; CHECK-PWR8-LABEL: setbuw1:
; CHECK-PWR8: # %bb.0:
; CHECK-PWR8-NEXT: xor r6, r3, r4
; CHECK-PWR8-NEXT: li r5, 1
; CHECK-PWR8-NEXT: cntlzw r6, r6
; CHECK-PWR8-NEXT: xor r5, r3, r4
; CHECK-PWR8-NEXT: cmplw r4, r3
; CHECK-PWR8-NEXT: srwi r6, r6, 5
; CHECK-PWR8-NEXT: xori r6, r6, 1
; CHECK-PWR8-NEXT: neg r3, r6
; CHECK-PWR8-NEXT: isellt r3, r5, r3
; CHECK-PWR8-NEXT: li r3, 1
; CHECK-PWR8-NEXT: cntlzw r5, r5
; CHECK-PWR8-NEXT: srwi r5, r5, 5
; CHECK-PWR8-NEXT: xori r5, r5, 1
; CHECK-PWR8-NEXT: neg r5, r5
; CHECK-PWR8-NEXT: isellt r3, r3, r5
; CHECK-PWR8-NEXT: blr
%t1 = icmp ult i32 %b, %a
%t2 = icmp ne i32 %a, %b
@@ -1059,14 +1059,14 @@ define i64 @setbuw2(i32 %a, i32 %b) {
;
; CHECK-PWR8-LABEL: setbuw2:
; CHECK-PWR8: # %bb.0:
; CHECK-PWR8-NEXT: xor r6, r4, r3
; CHECK-PWR8-NEXT: li r5, 1
; CHECK-PWR8-NEXT: cntlzw r6, r6
; CHECK-PWR8-NEXT: xor r5, r4, r3
; CHECK-PWR8-NEXT: cmplw r3, r4
; CHECK-PWR8-NEXT: srwi r6, r6, 5
; CHECK-PWR8-NEXT: xori r6, r6, 1
; CHECK-PWR8-NEXT: neg r3, r6
; CHECK-PWR8-NEXT: iselgt r3, r5, r3
; CHECK-PWR8-NEXT: li r3, 1
; CHECK-PWR8-NEXT: cntlzw r5, r5
; CHECK-PWR8-NEXT: srwi r5, r5, 5
; CHECK-PWR8-NEXT: xori r5, r5, 1
; CHECK-PWR8-NEXT: neg r5, r5
; CHECK-PWR8-NEXT: iselgt r3, r3, r5
; CHECK-PWR8-NEXT: blr
%t1 = icmp ugt i32 %a, %b
%t2 = icmp ne i32 %b, %a
@@ -1089,14 +1089,14 @@ define i64 @setbuh(i16 %a, i16 %b) {
; CHECK-PWR8: # %bb.0:
; CHECK-PWR8-NEXT: clrlwi r3, r3, 16
; CHECK-PWR8-NEXT: clrlwi r4, r4, 16
; CHECK-PWR8-NEXT: li r5, 1
; CHECK-PWR8-NEXT: xor r6, r4, r3
; CHECK-PWR8-NEXT: xor r5, r4, r3
; CHECK-PWR8-NEXT: cmplw r4, r3
; CHECK-PWR8-NEXT: cntlzw r6, r6
; CHECK-PWR8-NEXT: srwi r6, r6, 5
; CHECK-PWR8-NEXT: xori r6, r6, 1
; CHECK-PWR8-NEXT: neg r3, r6
; CHECK-PWR8-NEXT: isellt r3, r5, r3
; CHECK-PWR8-NEXT: li r3, 1
; CHECK-PWR8-NEXT: cntlzw r5, r5
; CHECK-PWR8-NEXT: srwi r5, r5, 5
; CHECK-PWR8-NEXT: xori r5, r5, 1
; CHECK-PWR8-NEXT: neg r5, r5
; CHECK-PWR8-NEXT: isellt r3, r3, r5
; CHECK-PWR8-NEXT: blr
%t1 = icmp ult i16 %b, %a
%t2 = icmp ne i16 %b, %a
@@ -1119,13 +1119,13 @@ define i64 @setbuc(i8 %a, i8 %b) {
; CHECK-PWR8: # %bb.0:
; CHECK-PWR8-NEXT: clrlwi r3, r3, 24
; CHECK-PWR8-NEXT: clrlwi r4, r4, 24
; CHECK-PWR8-NEXT: li r5, 1
; CHECK-PWR8-NEXT: clrldi r6, r3, 32
; CHECK-PWR8-NEXT: clrldi r7, r4, 32
; CHECK-PWR8-NEXT: sub r6, r6, r7
; CHECK-PWR8-NEXT: clrldi r5, r3, 32
; CHECK-PWR8-NEXT: clrldi r6, r4, 32
; CHECK-PWR8-NEXT: cmplw r3, r4
; CHECK-PWR8-NEXT: sradi r6, r6, 63
; CHECK-PWR8-NEXT: iselgt r3, r5, r6
; CHECK-PWR8-NEXT: li r3, 1
; CHECK-PWR8-NEXT: sub r5, r5, r6
; CHECK-PWR8-NEXT: sradi r5, r5, 63
; CHECK-PWR8-NEXT: iselgt r3, r3, r5
; CHECK-PWR8-NEXT: blr
%t1 = icmp ugt i8 %a, %b
%t2 = icmp ult i8 %a, %b
@@ -1147,12 +1147,12 @@ define i64 @setbf1(float %a, float %b) {
; CHECK-PWR8-LABEL: setbf1:
; CHECK-PWR8: # %bb.0:
; CHECK-PWR8-NEXT: fcmpu cr0, f2, f1
; CHECK-PWR8-NEXT: fcmpu cr1, f1, f2
; CHECK-PWR8-NEXT: li r3, 0
; CHECK-PWR8-NEXT: li r4, 1
; CHECK-PWR8-NEXT: isellt r3, r4, r3
; CHECK-PWR8-NEXT: fcmpu cr0, f1, f2
; CHECK-PWR8-NEXT: li r4, -1
; CHECK-PWR8-NEXT: isel r3, r4, r3, 4*cr1+lt
; CHECK-PWR8-NEXT: isellt r3, r4, r3
; CHECK-PWR8-NEXT: blr
%t1 = fcmp nnan olt float %a, %b
%t2 = fcmp nnan olt float %b, %a
@@ -1219,12 +1219,12 @@ define i64 @setbdf2(double %a, double %b) {
; CHECK-PWR8-LABEL: setbdf2:
; CHECK-PWR8: # %bb.0:
; CHECK-PWR8-NEXT: fcmpu cr0, f2, f1
; CHECK-PWR8-NEXT: xscmpudp cr1, f2, f1
; CHECK-PWR8-NEXT: li r3, 0
; CHECK-PWR8-NEXT: li r4, -1
; CHECK-PWR8-NEXT: iselgt r3, r4, r3
; CHECK-PWR8-NEXT: xscmpudp cr0, f2, f1
; CHECK-PWR8-NEXT: li r4, 1
; CHECK-PWR8-NEXT: isel r3, r4, r3, 4*cr1+lt
; CHECK-PWR8-NEXT: isellt r3, r4, r3
; CHECK-PWR8-NEXT: blr
%t1 = fcmp nnan olt double %b, %a
%t2 = fcmp nnan ogt double %b, %a
@@ -1260,18 +1260,18 @@ define i64 @setbf128(fp128 %a, fp128 %b) {
; CHECK-PWR8-NEXT: bl __ltkf2
; CHECK-PWR8-NEXT: nop
; CHECK-PWR8-NEXT: vmr v2, v30
; CHECK-PWR8-NEXT: srawi r30, r3, 31
; CHECK-PWR8-NEXT: vmr v3, v31
; CHECK-PWR8-NEXT: srawi r30, r3, 31
; CHECK-PWR8-NEXT: bl __gtkf2
; CHECK-PWR8-NEXT: nop
; CHECK-PWR8-NEXT: li r4, 1
; CHECK-PWR8-NEXT: cmpwi r3, 0
; CHECK-PWR8-NEXT: iselgt r3, r4, r30
; CHECK-PWR8-NEXT: li r4, 64
; CHECK-PWR8-NEXT: ld r30, 80(r1) # 8-byte Folded Reload
; CHECK-PWR8-NEXT: cmpwi r3, 0
; CHECK-PWR8-NEXT: li r3, 1
; CHECK-PWR8-NEXT: lvx v31, r1, r4 # 16-byte Folded Reload
; CHECK-PWR8-NEXT: li r4, 48
; CHECK-PWR8-NEXT: lvx v30, r1, r4 # 16-byte Folded Reload
; CHECK-PWR8-NEXT: iselgt r3, r3, r30
; CHECK-PWR8-NEXT: ld r30, 80(r1) # 8-byte Folded Reload
; CHECK-PWR8-NEXT: addi r1, r1, 96
; CHECK-PWR8-NEXT: ld r0, 16(r1)
; CHECK-PWR8-NEXT: mtlr r0
@@ -1298,12 +1298,12 @@ define i64 @setbn1(i64 %a, i64 %b) {
;
; CHECK-PWR8-LABEL: setbn1:
; CHECK-PWR8: # %bb.0:
; CHECK-PWR8-NEXT: xor r6, r3, r4
; CHECK-PWR8-NEXT: li r5, -1
; CHECK-PWR8-NEXT: cntlzd r6, r6
; CHECK-PWR8-NEXT: xor r5, r3, r4
; CHECK-PWR8-NEXT: cmpd r3, r4
; CHECK-PWR8-NEXT: rldicl r3, r6, 58, 63
; CHECK-PWR8-NEXT: isellt r3, r5, r3
; CHECK-PWR8-NEXT: li r3, -1
; CHECK-PWR8-NEXT: cntlzd r5, r5
; CHECK-PWR8-NEXT: rldicl r5, r5, 58, 63
; CHECK-PWR8-NEXT: isellt r3, r3, r5
; CHECK-PWR8-NEXT: blr
%t1 = icmp slt i64 %a, %b
%t2 = icmp eq i64 %a, %b
@@ -1327,12 +1327,12 @@ define i64 @setbn2(double %a, double %b) {
; CHECK-PWR8-LABEL: setbn2:
; CHECK-PWR8: # %bb.0:
; CHECK-PWR8-NEXT: fcmpu cr0, f1, f2
; CHECK-PWR8-NEXT: xscmpudp cr1, f1, f2
; CHECK-PWR8-NEXT: li r3, 1
; CHECK-PWR8-NEXT: li r4, -1
; CHECK-PWR8-NEXT: cror 4*cr5+lt, un, eq
; CHECK-PWR8-NEXT: xscmpudp cr0, f1, f2
; CHECK-PWR8-NEXT: isel r3, 0, r3, 4*cr5+lt
; CHECK-PWR8-NEXT: isel r3, r4, r3, 4*cr1+lt
; CHECK-PWR8-NEXT: isellt r3, r4, r3
; CHECK-PWR8-NEXT: blr
%t1 = fcmp olt double %a, %b
%t2 = fcmp one double %a, %b
@@ -1357,8 +1357,8 @@ define i64 @setbn3(float %a, float %b) {
; CHECK-PWR8-NEXT: fcmpu cr0, f1, f2
; CHECK-PWR8-NEXT: li r3, 1
; CHECK-PWR8-NEXT: li r4, -1
; CHECK-PWR8-NEXT: cror 4*cr5+lt, lt, un
; CHECK-PWR8-NEXT: iseleq r3, 0, r3
; CHECK-PWR8-NEXT: cror 4*cr5+lt, lt, un
; CHECK-PWR8-NEXT: isel r3, r4, r3, 4*cr5+lt
; CHECK-PWR8-NEXT: blr
%t1 = fcmp ult float %a, %b

View File

@@ -79,9 +79,9 @@ define <2 x i64> @sub_absv_64(<2 x i64> %a, <2 x i64> %b) local_unnamed_addr {
;
; CHECK-PWR8-LABEL: sub_absv_64:
; CHECK-PWR8: # %bb.0: # %entry
; CHECK-PWR8-NEXT: xxlxor v4, v4, v4
; CHECK-PWR8-NEXT: vsubudm v2, v2, v3
; CHECK-PWR8-NEXT: vsubudm v3, v4, v2
; CHECK-PWR8-NEXT: xxlxor v3, v3, v3
; CHECK-PWR8-NEXT: vsubudm v3, v3, v2
; CHECK-PWR8-NEXT: vmaxsd v2, v2, v3
; CHECK-PWR8-NEXT: blr
;
@@ -125,13 +125,21 @@ define <4 x i32> @sub_absv_32(<4 x i32> %a, <4 x i32> %b) local_unnamed_addr {
; CHECK-PWR9-NEXT: vabsduw v2, v2, v3
; CHECK-PWR9-NEXT: blr
;
; CHECK-PWR78-LABEL: sub_absv_32:
; CHECK-PWR78: # %bb.0: # %entry
; CHECK-PWR78-NEXT: xxlxor v4, v4, v4
; CHECK-PWR78-NEXT: vsubuwm v2, v2, v3
; CHECK-PWR78-NEXT: vsubuwm v3, v4, v2
; CHECK-PWR78-NEXT: vmaxsw v2, v2, v3
; CHECK-PWR78-NEXT: blr
; CHECK-PWR8-LABEL: sub_absv_32:
; CHECK-PWR8: # %bb.0: # %entry
; CHECK-PWR8-NEXT: vsubuwm v2, v2, v3
; CHECK-PWR8-NEXT: xxlxor v3, v3, v3
; CHECK-PWR8-NEXT: vsubuwm v3, v3, v2
; CHECK-PWR8-NEXT: vmaxsw v2, v2, v3
; CHECK-PWR8-NEXT: blr
;
; CHECK-PWR7-LABEL: sub_absv_32:
; CHECK-PWR7: # %bb.0: # %entry
; CHECK-PWR7-NEXT: xxlxor v4, v4, v4
; CHECK-PWR7-NEXT: vsubuwm v2, v2, v3
; CHECK-PWR7-NEXT: vsubuwm v3, v4, v2
; CHECK-PWR7-NEXT: vmaxsw v2, v2, v3
; CHECK-PWR7-NEXT: blr
entry:
%0 = sub nsw <4 x i32> %a, %b
%1 = icmp sgt <4 x i32> %0, <i32 -1, i32 -1, i32 -1, i32 -1>
@@ -149,13 +157,21 @@ define <8 x i16> @sub_absv_16(<8 x i16> %a, <8 x i16> %b) local_unnamed_addr {
; CHECK-PWR9-NEXT: vmaxsh v2, v2, v3
; CHECK-PWR9-NEXT: blr
;
; CHECK-PWR78-LABEL: sub_absv_16:
; CHECK-PWR78: # %bb.0: # %entry
; CHECK-PWR78-NEXT: xxlxor v4, v4, v4
; CHECK-PWR78-NEXT: vsubuhm v2, v2, v3
; CHECK-PWR78-NEXT: vsubuhm v3, v4, v2
; CHECK-PWR78-NEXT: vmaxsh v2, v2, v3
; CHECK-PWR78-NEXT: blr
; CHECK-PWR8-LABEL: sub_absv_16:
; CHECK-PWR8: # %bb.0: # %entry
; CHECK-PWR8-NEXT: vsubuhm v2, v2, v3
; CHECK-PWR8-NEXT: xxlxor v3, v3, v3
; CHECK-PWR8-NEXT: vsubuhm v3, v3, v2
; CHECK-PWR8-NEXT: vmaxsh v2, v2, v3
; CHECK-PWR8-NEXT: blr
;
; CHECK-PWR7-LABEL: sub_absv_16:
; CHECK-PWR7: # %bb.0: # %entry
; CHECK-PWR7-NEXT: xxlxor v4, v4, v4
; CHECK-PWR7-NEXT: vsubuhm v2, v2, v3
; CHECK-PWR7-NEXT: vsubuhm v3, v4, v2
; CHECK-PWR7-NEXT: vmaxsh v2, v2, v3
; CHECK-PWR7-NEXT: blr
entry:
%0 = sub nsw <8 x i16> %a, %b
%1 = icmp sgt <8 x i16> %0, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>
@@ -173,13 +189,21 @@ define <16 x i8> @sub_absv_8(<16 x i8> %a, <16 x i8> %b) local_unnamed_addr {
; CHECK-PWR9-NEXT: vmaxsb v2, v2, v3
; CHECK-PWR9-NEXT: blr
;
; CHECK-PWR78-LABEL: sub_absv_8:
; CHECK-PWR78: # %bb.0: # %entry
; CHECK-PWR78-NEXT: xxlxor v4, v4, v4
; CHECK-PWR78-NEXT: vsububm v2, v2, v3
; CHECK-PWR78-NEXT: vsububm v3, v4, v2
; CHECK-PWR78-NEXT: vmaxsb v2, v2, v3
; CHECK-PWR78-NEXT: blr
; CHECK-PWR8-LABEL: sub_absv_8:
; CHECK-PWR8: # %bb.0: # %entry
; CHECK-PWR8-NEXT: vsububm v2, v2, v3
; CHECK-PWR8-NEXT: xxlxor v3, v3, v3
; CHECK-PWR8-NEXT: vsububm v3, v3, v2
; CHECK-PWR8-NEXT: vmaxsb v2, v2, v3
; CHECK-PWR8-NEXT: blr
;
; CHECK-PWR7-LABEL: sub_absv_8:
; CHECK-PWR7: # %bb.0: # %entry
; CHECK-PWR7-NEXT: xxlxor v4, v4, v4
; CHECK-PWR7-NEXT: vsububm v2, v2, v3
; CHECK-PWR7-NEXT: vsububm v3, v4, v2
; CHECK-PWR7-NEXT: vmaxsb v2, v2, v3
; CHECK-PWR7-NEXT: blr
entry:
%0 = sub nsw <16 x i8> %a, %b
%1 = icmp sgt <16 x i8> %0, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>
@@ -215,12 +239,12 @@ define <8 x i16> @sub_absv_16_ext(<8 x i16> %a, <8 x i16> %b) local_unnamed_addr
;
; CHECK-PWR8-LABEL: sub_absv_16_ext:
; CHECK-PWR8: # %bb.0: # %entry
; CHECK-PWR8-NEXT: vmrglh v5, v2, v2
; CHECK-PWR8-NEXT: vspltisw v4, 8
; CHECK-PWR8-NEXT: vmrglh v5, v2, v2
; CHECK-PWR8-NEXT: vadduwm v4, v4, v4
; CHECK-PWR8-NEXT: vmrghh v2, v2, v2
; CHECK-PWR8-NEXT: vmrglh v0, v3, v3
; CHECK-PWR8-NEXT: vmrghh v3, v3, v3
; CHECK-PWR8-NEXT: vadduwm v4, v4, v4
; CHECK-PWR8-NEXT: vslw v5, v5, v4
; CHECK-PWR8-NEXT: vslw v2, v2, v4
; CHECK-PWR8-NEXT: vslw v0, v0, v4
@@ -230,11 +254,11 @@ define <8 x i16> @sub_absv_16_ext(<8 x i16> %a, <8 x i16> %b) local_unnamed_addr
; CHECK-PWR8-NEXT: vsraw v0, v0, v4
; CHECK-PWR8-NEXT: vsraw v3, v3, v4
; CHECK-PWR8-NEXT: xxlxor v4, v4, v4
; CHECK-PWR8-NEXT: vsubuwm v5, v5, v0
; CHECK-PWR8-NEXT: vsubuwm v2, v2, v3
; CHECK-PWR8-NEXT: vsubuwm v3, v4, v5
; CHECK-PWR8-NEXT: vsubuwm v3, v5, v0
; CHECK-PWR8-NEXT: vsubuwm v5, v4, v3
; CHECK-PWR8-NEXT: vsubuwm v4, v4, v2
; CHECK-PWR8-NEXT: vmaxsw v3, v5, v3
; CHECK-PWR8-NEXT: vmaxsw v3, v3, v5
; CHECK-PWR8-NEXT: vmaxsw v2, v2, v4
; CHECK-PWR8-NEXT: vpkuwum v2, v2, v3
; CHECK-PWR8-NEXT: blr
@@ -667,208 +691,182 @@ define <16 x i8> @sub_absv_8_ext(<16 x i8> %a, <16 x i8> %b) local_unnamed_addr
; CHECK-PWR8-LABEL: sub_absv_8_ext:
; CHECK-PWR8: # %bb.0: # %entry
; CHECK-PWR8-NEXT: xxswapd vs0, v2
; CHECK-PWR8-NEXT: mfvsrd r5, v2
; CHECK-PWR8-NEXT: std r26, -48(r1) # 8-byte Folded Spill
; CHECK-PWR8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-PWR8-NEXT: std r25, -56(r1) # 8-byte Folded Spill
; CHECK-PWR8-NEXT: std r27, -40(r1) # 8-byte Folded Spill
; CHECK-PWR8-NEXT: mfvsrd r6, v3
; CHECK-PWR8-NEXT: xxswapd vs1, v3
; CHECK-PWR8-NEXT: clrldi r3, r5, 56
; CHECK-PWR8-NEXT: rldicl r7, r5, 56, 56
; CHECK-PWR8-NEXT: clrldi r4, r6, 56
; CHECK-PWR8-NEXT: rldicl r8, r6, 56, 56
; CHECK-PWR8-NEXT: mffprd r26, f0
; CHECK-PWR8-NEXT: clrlwi r3, r3, 24
; CHECK-PWR8-NEXT: clrlwi r7, r7, 24
; CHECK-PWR8-NEXT: std r28, -32(r1) # 8-byte Folded Spill
; CHECK-PWR8-NEXT: std r29, -24(r1) # 8-byte Folded Spill
; CHECK-PWR8-NEXT: rldicl r11, r5, 40, 56
; CHECK-PWR8-NEXT: rldicl r12, r6, 40, 56
; CHECK-PWR8-NEXT: clrlwi r4, r4, 24
; CHECK-PWR8-NEXT: clrlwi r8, r8, 24
; CHECK-PWR8-NEXT: rldicl r9, r5, 48, 56
; CHECK-PWR8-NEXT: rldicl r10, r6, 48, 56
; CHECK-PWR8-NEXT: sub r4, r3, r4
; CHECK-PWR8-NEXT: clrlwi r11, r11, 24
; CHECK-PWR8-NEXT: rldicl r3, r26, 16, 56
; CHECK-PWR8-NEXT: clrlwi r12, r12, 24
; CHECK-PWR8-NEXT: sub r7, r7, r8
; CHECK-PWR8-NEXT: clrlwi r9, r9, 24
; CHECK-PWR8-NEXT: clrlwi r10, r10, 24
; CHECK-PWR8-NEXT: std r24, -64(r1) # 8-byte Folded Spill
; CHECK-PWR8-NEXT: mffprd r24, f1
; CHECK-PWR8-NEXT: rldicl r0, r5, 32, 56
; CHECK-PWR8-NEXT: rldicl r30, r6, 32, 56
; CHECK-PWR8-NEXT: std r3, -160(r1) # 8-byte Folded Spill
; CHECK-PWR8-NEXT: sub r11, r11, r12
; CHECK-PWR8-NEXT: sub r9, r9, r10
; CHECK-PWR8-NEXT: srawi r3, r4, 31
; CHECK-PWR8-NEXT: srawi r12, r7, 31
; CHECK-PWR8-NEXT: clrlwi r10, r0, 24
; CHECK-PWR8-NEXT: clrlwi r0, r30, 24
; CHECK-PWR8-NEXT: xor r4, r4, r3
; CHECK-PWR8-NEXT: xor r7, r7, r12
; CHECK-PWR8-NEXT: sub r10, r10, r0
; CHECK-PWR8-NEXT: std r20, -96(r1) # 8-byte Folded Spill
; CHECK-PWR8-NEXT: std r21, -88(r1) # 8-byte Folded Spill
; CHECK-PWR8-NEXT: sub r3, r4, r3
; CHECK-PWR8-NEXT: srawi r4, r9, 31
; CHECK-PWR8-NEXT: sub r7, r7, r12
; CHECK-PWR8-NEXT: std r22, -80(r1) # 8-byte Folded Spill
; CHECK-PWR8-NEXT: std r27, -40(r1) # 8-byte Folded Spill
; CHECK-PWR8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-PWR8-NEXT: mffprd r5, f0
; CHECK-PWR8-NEXT: mffprd r11, f1
; CHECK-PWR8-NEXT: std r25, -56(r1) # 8-byte Folded Spill
; CHECK-PWR8-NEXT: std r26, -48(r1) # 8-byte Folded Spill
; CHECK-PWR8-NEXT: clrldi r3, r5, 56
; CHECK-PWR8-NEXT: clrldi r4, r11, 56
; CHECK-PWR8-NEXT: rldicl r6, r5, 56, 56
; CHECK-PWR8-NEXT: rldicl r7, r11, 56, 56
; CHECK-PWR8-NEXT: rldicl r10, r5, 40, 56
; CHECK-PWR8-NEXT: rldicl r12, r11, 40, 56
; CHECK-PWR8-NEXT: rldicl r8, r5, 48, 56
; CHECK-PWR8-NEXT: rldicl r9, r11, 48, 56
; CHECK-PWR8-NEXT: rldicl r29, r5, 24, 56
; CHECK-PWR8-NEXT: rldicl r28, r6, 24, 56
; CHECK-PWR8-NEXT: xor r9, r9, r4
; CHECK-PWR8-NEXT: mtvsrd v3, r7
; CHECK-PWR8-NEXT: rldicl r28, r11, 24, 56
; CHECK-PWR8-NEXT: rldicl r27, r5, 16, 56
; CHECK-PWR8-NEXT: rldicl r25, r6, 16, 56
; CHECK-PWR8-NEXT: clrlwi r30, r29, 24
; CHECK-PWR8-NEXT: clrlwi r29, r28, 24
; CHECK-PWR8-NEXT: mtvsrd v2, r3
; CHECK-PWR8-NEXT: sub r4, r9, r4
; CHECK-PWR8-NEXT: srawi r7, r10, 31
; CHECK-PWR8-NEXT: srawi r3, r11, 31
; CHECK-PWR8-NEXT: clrlwi r9, r27, 24
; CHECK-PWR8-NEXT: clrlwi r12, r25, 24
; CHECK-PWR8-NEXT: sub r0, r30, r29
; CHECK-PWR8-NEXT: mtvsrd v4, r4
; CHECK-PWR8-NEXT: std r23, -72(r1) # 8-byte Folded Spill
; CHECK-PWR8-NEXT: xor r10, r10, r7
; CHECK-PWR8-NEXT: xor r11, r11, r3
; CHECK-PWR8-NEXT: sub r9, r9, r12
; CHECK-PWR8-NEXT: std r18, -112(r1) # 8-byte Folded Spill
; CHECK-PWR8-NEXT: std r19, -104(r1) # 8-byte Folded Spill
; CHECK-PWR8-NEXT: vmrghb v2, v3, v2
; CHECK-PWR8-NEXT: sub r7, r10, r7
; CHECK-PWR8-NEXT: rldicl r0, r5, 32, 56
; CHECK-PWR8-NEXT: rldicl r30, r11, 32, 56
; CHECK-PWR8-NEXT: rldicl r5, r5, 8, 56
; CHECK-PWR8-NEXT: sub r3, r11, r3
; CHECK-PWR8-NEXT: rldicl r6, r6, 8, 56
; CHECK-PWR8-NEXT: srawi r4, r0, 31
; CHECK-PWR8-NEXT: mtvsrd v0, r7
; CHECK-PWR8-NEXT: std r16, -128(r1) # 8-byte Folded Spill
; CHECK-PWR8-NEXT: std r17, -120(r1) # 8-byte Folded Spill
; CHECK-PWR8-NEXT: srawi r7, r9, 31
; CHECK-PWR8-NEXT: clrldi r23, r26, 56
; CHECK-PWR8-NEXT: mtvsrd v5, r3
; CHECK-PWR8-NEXT: clrlwi r3, r5, 24
; CHECK-PWR8-NEXT: clrlwi r5, r6, 24
; CHECK-PWR8-NEXT: clrldi r22, r24, 56
; CHECK-PWR8-NEXT: rldicl r21, r26, 56, 56
; CHECK-PWR8-NEXT: xor r10, r0, r4
; CHECK-PWR8-NEXT: xor r9, r9, r7
; CHECK-PWR8-NEXT: rldicl r20, r24, 56, 56
; CHECK-PWR8-NEXT: rldicl r19, r26, 48, 56
; CHECK-PWR8-NEXT: sub r3, r3, r5
; CHECK-PWR8-NEXT: sub r4, r10, r4
; CHECK-PWR8-NEXT: sub r7, r9, r7
; CHECK-PWR8-NEXT: clrlwi r9, r23, 24
; CHECK-PWR8-NEXT: rldicl r18, r24, 48, 56
; CHECK-PWR8-NEXT: clrlwi r10, r22, 24
; CHECK-PWR8-NEXT: clrlwi r11, r21, 24
; CHECK-PWR8-NEXT: clrlwi r12, r20, 24
; CHECK-PWR8-NEXT: mtvsrd v1, r4
; CHECK-PWR8-NEXT: std r14, -144(r1) # 8-byte Folded Spill
; CHECK-PWR8-NEXT: std r15, -136(r1) # 8-byte Folded Spill
; CHECK-PWR8-NEXT: rldicl r17, r26, 40, 56
; CHECK-PWR8-NEXT: rldicl r16, r24, 40, 56
; CHECK-PWR8-NEXT: sub r9, r9, r10
; CHECK-PWR8-NEXT: sub r10, r11, r12
; CHECK-PWR8-NEXT: mtvsrd v3, r7
; CHECK-PWR8-NEXT: srawi r4, r3, 31
; CHECK-PWR8-NEXT: clrlwi r11, r19, 24
; CHECK-PWR8-NEXT: clrlwi r12, r18, 24
; CHECK-PWR8-NEXT: vmrghb v4, v5, v4
; CHECK-PWR8-NEXT: std r31, -8(r1) # 8-byte Folded Spill
; CHECK-PWR8-NEXT: xor r3, r3, r4
; CHECK-PWR8-NEXT: sub r7, r11, r12
; CHECK-PWR8-NEXT: clrlwi r11, r17, 24
; CHECK-PWR8-NEXT: clrlwi r12, r16, 24
; CHECK-PWR8-NEXT: vmrghb v0, v1, v0
; CHECK-PWR8-NEXT: std r2, -152(r1) # 8-byte Folded Spill
; CHECK-PWR8-NEXT: rldicl r15, r26, 32, 56
; CHECK-PWR8-NEXT: rldicl r14, r24, 32, 56
; CHECK-PWR8-NEXT: sub r3, r3, r4
; CHECK-PWR8-NEXT: sub r11, r11, r12
; CHECK-PWR8-NEXT: srawi r4, r9, 31
; CHECK-PWR8-NEXT: srawi r12, r10, 31
; CHECK-PWR8-NEXT: clrlwi r0, r15, 24
; CHECK-PWR8-NEXT: clrlwi r30, r14, 24
; CHECK-PWR8-NEXT: mtvsrd v5, r3
; CHECK-PWR8-NEXT: ld r27, -40(r1) # 8-byte Folded Reload
; CHECK-PWR8-NEXT: xor r9, r9, r4
; CHECK-PWR8-NEXT: xor r10, r10, r12
; CHECK-PWR8-NEXT: sub r3, r0, r30
; CHECK-PWR8-NEXT: ld r25, -56(r1) # 8-byte Folded Reload
; CHECK-PWR8-NEXT: ld r23, -72(r1) # 8-byte Folded Reload
; CHECK-PWR8-NEXT: ld r22, -80(r1) # 8-byte Folded Reload
; CHECK-PWR8-NEXT: srawi r28, r11, 31
; CHECK-PWR8-NEXT: sub r4, r9, r4
; CHECK-PWR8-NEXT: sub r10, r10, r12
; CHECK-PWR8-NEXT: vmrghb v3, v5, v3
; CHECK-PWR8-NEXT: ld r21, -88(r1) # 8-byte Folded Reload
; CHECK-PWR8-NEXT: ld r20, -96(r1) # 8-byte Folded Reload
; CHECK-PWR8-NEXT: srawi r29, r7, 31
; CHECK-PWR8-NEXT: srawi r9, r3, 31
; CHECK-PWR8-NEXT: mtvsrd v5, r4
; CHECK-PWR8-NEXT: xor r4, r11, r28
; CHECK-PWR8-NEXT: ld r19, -104(r1) # 8-byte Folded Reload
; CHECK-PWR8-NEXT: ld r18, -112(r1) # 8-byte Folded Reload
; CHECK-PWR8-NEXT: mtvsrd v1, r10
; CHECK-PWR8-NEXT: ld r10, -160(r1) # 8-byte Folded Reload
; CHECK-PWR8-NEXT: rldicl r31, r26, 24, 56
; CHECK-PWR8-NEXT: rldicl r2, r24, 24, 56
; CHECK-PWR8-NEXT: xor r7, r7, r29
; CHECK-PWR8-NEXT: xor r3, r3, r9
; CHECK-PWR8-NEXT: rldicl r8, r24, 16, 56
; CHECK-PWR8-NEXT: rldicl r6, r26, 8, 56
; CHECK-PWR8-NEXT: sub r4, r4, r28
; CHECK-PWR8-NEXT: clrlwi r0, r31, 24
; CHECK-PWR8-NEXT: clrlwi r30, r2, 24
; CHECK-PWR8-NEXT: sub r7, r7, r29
; CHECK-PWR8-NEXT: rldicl r5, r24, 8, 56
; CHECK-PWR8-NEXT: std r24, -64(r1) # 8-byte Folded Spill
; CHECK-PWR8-NEXT: clrlwi r3, r3, 24
; CHECK-PWR8-NEXT: clrlwi r4, r4, 24
; CHECK-PWR8-NEXT: clrlwi r6, r6, 24
; CHECK-PWR8-NEXT: clrlwi r7, r7, 24
; CHECK-PWR8-NEXT: clrlwi r10, r10, 24
; CHECK-PWR8-NEXT: clrlwi r12, r12, 24
; CHECK-PWR8-NEXT: sub r3, r3, r4
; CHECK-PWR8-NEXT: sub r4, r6, r7
; CHECK-PWR8-NEXT: sub r7, r10, r12
; CHECK-PWR8-NEXT: clrlwi r8, r8, 24
; CHECK-PWR8-NEXT: sub r3, r3, r9
; CHECK-PWR8-NEXT: mtvsrd v7, r4
; CHECK-PWR8-NEXT: clrlwi r4, r6, 24
; CHECK-PWR8-NEXT: clrlwi r9, r9, 24
; CHECK-PWR8-NEXT: clrlwi r29, r29, 24
; CHECK-PWR8-NEXT: clrlwi r28, r28, 24
; CHECK-PWR8-NEXT: sub r6, r8, r9
; CHECK-PWR8-NEXT: sub r9, r29, r28
; CHECK-PWR8-NEXT: clrlwi r27, r27, 24
; CHECK-PWR8-NEXT: clrlwi r0, r0, 24
; CHECK-PWR8-NEXT: clrlwi r30, r30, 24
; CHECK-PWR8-NEXT: sub r8, r0, r30
; CHECK-PWR8-NEXT: clrlwi r5, r5, 24
; CHECK-PWR8-NEXT: sub r0, r0, r30
; CHECK-PWR8-NEXT: srawi r10, r3, 31
; CHECK-PWR8-NEXT: srawi r12, r4, 31
; CHECK-PWR8-NEXT: srawi r28, r9, 31
; CHECK-PWR8-NEXT: srawi r0, r6, 31
; CHECK-PWR8-NEXT: srawi r29, r8, 31
; CHECK-PWR8-NEXT: srawi r30, r7, 31
; CHECK-PWR8-NEXT: xor r3, r3, r10
; CHECK-PWR8-NEXT: sub r10, r3, r10
; CHECK-PWR8-NEXT: rldicl r3, r11, 16, 56
; CHECK-PWR8-NEXT: xor r4, r4, r12
; CHECK-PWR8-NEXT: rldicl r11, r11, 8, 56
; CHECK-PWR8-NEXT: xor r25, r9, r28
; CHECK-PWR8-NEXT: sub r9, r4, r12
; CHECK-PWR8-NEXT: sub r4, r25, r28
; CHECK-PWR8-NEXT: mtvsrd v1, r9
; CHECK-PWR8-NEXT: clrlwi r3, r3, 24
; CHECK-PWR8-NEXT: mtvsrd v7, r4
; CHECK-PWR8-NEXT: sub r3, r27, r3
; CHECK-PWR8-NEXT: clrlwi r11, r11, 24
; CHECK-PWR8-NEXT: xor r6, r6, r0
; CHECK-PWR8-NEXT: sub r5, r5, r11
; CHECK-PWR8-NEXT: xor r26, r8, r29
; CHECK-PWR8-NEXT: sub r8, r6, r0
; CHECK-PWR8-NEXT: mfvsrd r0, v3
; CHECK-PWR8-NEXT: xor r7, r7, r30
; CHECK-PWR8-NEXT: sub r7, r7, r30
; CHECK-PWR8-NEXT: sub r6, r26, r29
; CHECK-PWR8-NEXT: mtvsrd v6, r7
; CHECK-PWR8-NEXT: sub r7, r10, r8
; CHECK-PWR8-NEXT: ld r2, -152(r1) # 8-byte Folded Reload
; CHECK-PWR8-NEXT: ld r31, -8(r1) # 8-byte Folded Reload
; CHECK-PWR8-NEXT: mtvsrd v8, r3
; CHECK-PWR8-NEXT: sub r3, r4, r5
; CHECK-PWR8-NEXT: srawi r12, r0, 31
; CHECK-PWR8-NEXT: clrldi r30, r0, 56
; CHECK-PWR8-NEXT: rldicl r29, r0, 56, 56
; CHECK-PWR8-NEXT: rldicl r28, r0, 48, 56
; CHECK-PWR8-NEXT: rldicl r27, r0, 40, 56
; CHECK-PWR8-NEXT: rldicl r26, r0, 32, 56
; CHECK-PWR8-NEXT: rldicl r25, r0, 24, 56
; CHECK-PWR8-NEXT: rldicl r24, r0, 16, 56
; CHECK-PWR8-NEXT: rldicl r0, r0, 8, 56
; CHECK-PWR8-NEXT: srawi r12, r3, 31
; CHECK-PWR8-NEXT: srawi r11, r5, 31
; CHECK-PWR8-NEXT: clrlwi r30, r30, 24
; CHECK-PWR8-NEXT: clrlwi r29, r29, 24
; CHECK-PWR8-NEXT: clrlwi r28, r28, 24
; CHECK-PWR8-NEXT: clrlwi r27, r27, 24
; CHECK-PWR8-NEXT: clrlwi r26, r26, 24
; CHECK-PWR8-NEXT: clrlwi r25, r25, 24
; CHECK-PWR8-NEXT: clrlwi r24, r24, 24
; CHECK-PWR8-NEXT: clrlwi r0, r0, 24
; CHECK-PWR8-NEXT: xor r3, r3, r12
; CHECK-PWR8-NEXT: sub r3, r3, r12
; CHECK-PWR8-NEXT: mfvsrd r12, v2
; CHECK-PWR8-NEXT: xor r5, r5, r11
; CHECK-PWR8-NEXT: sub r5, r5, r11
; CHECK-PWR8-NEXT: mtvsrd v8, r5
; CHECK-PWR8-NEXT: clrldi r11, r12, 56
; CHECK-PWR8-NEXT: clrlwi r11, r11, 24
; CHECK-PWR8-NEXT: sub r11, r11, r30
; CHECK-PWR8-NEXT: srawi r30, r11, 31
; CHECK-PWR8-NEXT: xor r11, r11, r30
; CHECK-PWR8-NEXT: sub r11, r11, r30
; CHECK-PWR8-NEXT: rldicl r30, r12, 56, 56
; CHECK-PWR8-NEXT: clrlwi r30, r30, 24
; CHECK-PWR8-NEXT: mtvsrd v2, r11
; CHECK-PWR8-NEXT: sub r30, r30, r29
; CHECK-PWR8-NEXT: srawi r29, r30, 31
; CHECK-PWR8-NEXT: xor r30, r30, r29
; CHECK-PWR8-NEXT: sub r30, r30, r29
; CHECK-PWR8-NEXT: rldicl r29, r12, 48, 56
; CHECK-PWR8-NEXT: clrlwi r29, r29, 24
; CHECK-PWR8-NEXT: mtvsrd v3, r30
; CHECK-PWR8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
; CHECK-PWR8-NEXT: ld r29, -24(r1) # 8-byte Folded Reload
; CHECK-PWR8-NEXT: sub r29, r29, r28
; CHECK-PWR8-NEXT: srawi r28, r29, 31
; CHECK-PWR8-NEXT: xor r29, r29, r28
; CHECK-PWR8-NEXT: sub r29, r29, r28
; CHECK-PWR8-NEXT: rldicl r28, r12, 40, 56
; CHECK-PWR8-NEXT: clrlwi r28, r28, 24
; CHECK-PWR8-NEXT: sub r28, r28, r27
; CHECK-PWR8-NEXT: srawi r27, r28, 31
; CHECK-PWR8-NEXT: xor r28, r28, r27
; CHECK-PWR8-NEXT: sub r28, r28, r27
; CHECK-PWR8-NEXT: rldicl r27, r12, 32, 56
; CHECK-PWR8-NEXT: clrlwi r27, r27, 24
; CHECK-PWR8-NEXT: mtvsrd v4, r28
; CHECK-PWR8-NEXT: ld r28, -32(r1) # 8-byte Folded Reload
; CHECK-PWR8-NEXT: srawi r6, r7, 31
; CHECK-PWR8-NEXT: srawi r5, r3, 31
; CHECK-PWR8-NEXT: xor r8, r0, r12
; CHECK-PWR8-NEXT: vmrghb v5, v1, v5
; CHECK-PWR8-NEXT: sub r27, r27, r26
; CHECK-PWR8-NEXT: srawi r26, r27, 31
; CHECK-PWR8-NEXT: xor r27, r27, r26
; CHECK-PWR8-NEXT: sub r27, r27, r26
; CHECK-PWR8-NEXT: rldicl r26, r12, 24, 56
; CHECK-PWR8-NEXT: clrlwi r26, r26, 24
; CHECK-PWR8-NEXT: sub r26, r26, r25
; CHECK-PWR8-NEXT: srawi r25, r26, 31
; CHECK-PWR8-NEXT: xor r26, r26, r25
; CHECK-PWR8-NEXT: sub r26, r26, r25
; CHECK-PWR8-NEXT: rldicl r25, r12, 16, 56
; CHECK-PWR8-NEXT: rldicl r12, r12, 8, 56
; CHECK-PWR8-NEXT: clrlwi r25, r25, 24
; CHECK-PWR8-NEXT: clrlwi r12, r12, 24
; CHECK-PWR8-NEXT: mtvsrd v5, r26
; CHECK-PWR8-NEXT: ld r26, -48(r1) # 8-byte Folded Reload
; CHECK-PWR8-NEXT: sub r25, r25, r24
; CHECK-PWR8-NEXT: sub r12, r12, r0
; CHECK-PWR8-NEXT: srawi r24, r25, 31
; CHECK-PWR8-NEXT: srawi r0, r12, 31
; CHECK-PWR8-NEXT: xor r25, r25, r24
; CHECK-PWR8-NEXT: xor r12, r12, r0
; CHECK-PWR8-NEXT: sub r25, r25, r24
; CHECK-PWR8-NEXT: sub r12, r12, r0
; CHECK-PWR8-NEXT: ld r24, -64(r1) # 8-byte Folded Reload
; CHECK-PWR8-NEXT: xor r4, r7, r6
; CHECK-PWR8-NEXT: xor r3, r3, r5
; CHECK-PWR8-NEXT: sub r8, r8, r12
; CHECK-PWR8-NEXT: vmrghb v6, v7, v6
; CHECK-PWR8-NEXT: ld r17, -120(r1) # 8-byte Folded Reload
; CHECK-PWR8-NEXT: ld r16, -128(r1) # 8-byte Folded Reload
; CHECK-PWR8-NEXT: sub r4, r4, r6
; CHECK-PWR8-NEXT: sub r3, r3, r5
; CHECK-PWR8-NEXT: mtvsrd v9, r8
; CHECK-PWR8-NEXT: ld r15, -136(r1) # 8-byte Folded Reload
; CHECK-PWR8-NEXT: ld r14, -144(r1) # 8-byte Folded Reload
; CHECK-PWR8-NEXT: mtvsrd v1, r4
; CHECK-PWR8-NEXT: mtvsrd v7, r3
; CHECK-PWR8-NEXT: vmrghb v8, v9, v8
; CHECK-PWR8-NEXT: vmrghb v1, v7, v1
; CHECK-PWR8-NEXT: vmrglh v2, v4, v2
; CHECK-PWR8-NEXT: vmrglh v3, v3, v0
; CHECK-PWR8-NEXT: vmrglh v4, v6, v5
; CHECK-PWR8-NEXT: vmrglh v5, v1, v8
; CHECK-PWR8-NEXT: mtvsrd v0, r12
; CHECK-PWR8-NEXT: vmrghb v2, v3, v2
; CHECK-PWR8-NEXT: mtvsrd v3, r29
; CHECK-PWR8-NEXT: ld r29, -24(r1) # 8-byte Folded Reload
; CHECK-PWR8-NEXT: vmrghb v3, v4, v3
; CHECK-PWR8-NEXT: mtvsrd v4, r27
; CHECK-PWR8-NEXT: ld r27, -40(r1) # 8-byte Folded Reload
; CHECK-PWR8-NEXT: vmrglh v2, v3, v2
; CHECK-PWR8-NEXT: vmrghb v4, v5, v4
; CHECK-PWR8-NEXT: mtvsrd v5, r25
; CHECK-PWR8-NEXT: ld r25, -56(r1) # 8-byte Folded Reload
; CHECK-PWR8-NEXT: vmrghb v5, v0, v5
; CHECK-PWR8-NEXT: mtvsrd v0, r10
; CHECK-PWR8-NEXT: vmrglh v3, v5, v4
; CHECK-PWR8-NEXT: xxmrglw vs0, v3, v2
; CHECK-PWR8-NEXT: vmrghb v0, v1, v0
; CHECK-PWR8-NEXT: mtvsrd v1, r8
; CHECK-PWR8-NEXT: vmrghb v1, v6, v1
; CHECK-PWR8-NEXT: mtvsrd v6, r6
; CHECK-PWR8-NEXT: vmrglh v4, v1, v0
; CHECK-PWR8-NEXT: vmrghb v6, v7, v6
; CHECK-PWR8-NEXT: mtvsrd v7, r3
; CHECK-PWR8-NEXT: vmrghb v7, v8, v7
; CHECK-PWR8-NEXT: vmrglh v5, v7, v6
; CHECK-PWR8-NEXT: xxmrglw vs1, v5, v4
; CHECK-PWR8-NEXT: xxmrgld v2, vs0, vs1
; CHECK-PWR8-NEXT: blr
@@ -1238,13 +1236,21 @@ define <4 x i32> @sub_absv_vec_32(<4 x i32> %a, <4 x i32> %b) local_unnamed_addr
; CHECK-PWR9-NEXT: vabsduw v2, v2, v3
; CHECK-PWR9-NEXT: blr
;
; CHECK-PWR78-LABEL: sub_absv_vec_32:
; CHECK-PWR78: # %bb.0: # %entry
; CHECK-PWR78-NEXT: xxlxor v4, v4, v4
; CHECK-PWR78-NEXT: vsubuwm v2, v2, v3
; CHECK-PWR78-NEXT: vsubuwm v3, v4, v2
; CHECK-PWR78-NEXT: vmaxsw v2, v2, v3
; CHECK-PWR78-NEXT: blr
; CHECK-PWR8-LABEL: sub_absv_vec_32:
; CHECK-PWR8: # %bb.0: # %entry
; CHECK-PWR8-NEXT: vsubuwm v2, v2, v3
; CHECK-PWR8-NEXT: xxlxor v3, v3, v3
; CHECK-PWR8-NEXT: vsubuwm v3, v3, v2
; CHECK-PWR8-NEXT: vmaxsw v2, v2, v3
; CHECK-PWR8-NEXT: blr
;
; CHECK-PWR7-LABEL: sub_absv_vec_32:
; CHECK-PWR7: # %bb.0: # %entry
; CHECK-PWR7-NEXT: xxlxor v4, v4, v4
; CHECK-PWR7-NEXT: vsubuwm v2, v2, v3
; CHECK-PWR7-NEXT: vsubuwm v3, v4, v2
; CHECK-PWR7-NEXT: vmaxsw v2, v2, v3
; CHECK-PWR7-NEXT: blr
entry:
%sub = sub nsw <4 x i32> %a, %b
%sub.i = sub <4 x i32> zeroinitializer, %sub
@@ -1261,13 +1267,21 @@ define <8 x i16> @sub_absv_vec_16(<8 x i16> %a, <8 x i16> %b) local_unnamed_addr
; CHECK-PWR9-NEXT: vmaxsh v2, v2, v3
; CHECK-PWR9-NEXT: blr
;
; CHECK-PWR78-LABEL: sub_absv_vec_16:
; CHECK-PWR78: # %bb.0: # %entry
; CHECK-PWR78-NEXT: xxlxor v4, v4, v4
; CHECK-PWR78-NEXT: vsubuhm v2, v2, v3
; CHECK-PWR78-NEXT: vsubuhm v3, v4, v2
; CHECK-PWR78-NEXT: vmaxsh v2, v2, v3
; CHECK-PWR78-NEXT: blr
; CHECK-PWR8-LABEL: sub_absv_vec_16:
; CHECK-PWR8: # %bb.0: # %entry
; CHECK-PWR8-NEXT: vsubuhm v2, v2, v3
; CHECK-PWR8-NEXT: xxlxor v3, v3, v3
; CHECK-PWR8-NEXT: vsubuhm v3, v3, v2
; CHECK-PWR8-NEXT: vmaxsh v2, v2, v3
; CHECK-PWR8-NEXT: blr
;
; CHECK-PWR7-LABEL: sub_absv_vec_16:
; CHECK-PWR7: # %bb.0: # %entry
; CHECK-PWR7-NEXT: xxlxor v4, v4, v4
; CHECK-PWR7-NEXT: vsubuhm v2, v2, v3
; CHECK-PWR7-NEXT: vsubuhm v3, v4, v2
; CHECK-PWR7-NEXT: vmaxsh v2, v2, v3
; CHECK-PWR7-NEXT: blr
entry:
%sub = sub nsw <8 x i16> %a, %b
%sub.i = sub <8 x i16> zeroinitializer, %sub
@@ -1284,13 +1298,21 @@ define <16 x i8> @sub_absv_vec_8(<16 x i8> %a, <16 x i8> %b) local_unnamed_addr
; CHECK-PWR9-NEXT: vmaxsb v2, v2, v3
; CHECK-PWR9-NEXT: blr
;
; CHECK-PWR78-LABEL: sub_absv_vec_8:
; CHECK-PWR78: # %bb.0: # %entry
; CHECK-PWR78-NEXT: xxlxor v4, v4, v4
; CHECK-PWR78-NEXT: vsububm v2, v2, v3
; CHECK-PWR78-NEXT: vsububm v3, v4, v2
; CHECK-PWR78-NEXT: vmaxsb v2, v2, v3
; CHECK-PWR78-NEXT: blr
; CHECK-PWR8-LABEL: sub_absv_vec_8:
; CHECK-PWR8: # %bb.0: # %entry
; CHECK-PWR8-NEXT: vsububm v2, v2, v3
; CHECK-PWR8-NEXT: xxlxor v3, v3, v3
; CHECK-PWR8-NEXT: vsububm v3, v3, v2
; CHECK-PWR8-NEXT: vmaxsb v2, v2, v3
; CHECK-PWR8-NEXT: blr
;
; CHECK-PWR7-LABEL: sub_absv_vec_8:
; CHECK-PWR7: # %bb.0: # %entry
; CHECK-PWR7-NEXT: xxlxor v4, v4, v4
; CHECK-PWR7-NEXT: vsububm v2, v2, v3
; CHECK-PWR7-NEXT: vsububm v3, v4, v2
; CHECK-PWR7-NEXT: vmaxsb v2, v2, v3
; CHECK-PWR7-NEXT: blr
entry:
%sub = sub nsw <16 x i8> %a, %b
%sub.i = sub <16 x i8> zeroinitializer, %sub
@@ -1444,10 +1466,10 @@ define <4 x i32> @sext_sub_absd32(<4 x i16>, <4 x i16>) local_unnamed_addr {
;
; CHECK-PWR8-LABEL: sext_sub_absd32:
; CHECK-PWR8: # %bb.0:
; CHECK-PWR8-NEXT: vmrglh v2, v2, v2
; CHECK-PWR8-NEXT: vspltisw v4, 8
; CHECK-PWR8-NEXT: vmrglh v3, v3, v3
; CHECK-PWR8-NEXT: vmrglh v2, v2, v2
; CHECK-PWR8-NEXT: vadduwm v4, v4, v4
; CHECK-PWR8-NEXT: vmrglh v3, v3, v3
; CHECK-PWR8-NEXT: vslw v2, v2, v4
; CHECK-PWR8-NEXT: vslw v3, v3, v4
; CHECK-PWR8-NEXT: vsraw v2, v2, v4
@@ -1516,8 +1538,8 @@ define <8 x i16> @sext_sub_absd16(<8 x i8>, <8 x i8>) local_unnamed_addr {
; CHECK-PWR8: # %bb.0:
; CHECK-PWR8-NEXT: vmrglb v2, v2, v2
; CHECK-PWR8-NEXT: vspltish v4, 8
; CHECK-PWR8-NEXT: vmrglb v3, v3, v3
; CHECK-PWR8-NEXT: vslh v2, v2, v4
; CHECK-PWR8-NEXT: vmrglb v3, v3, v3
; CHECK-PWR8-NEXT: vslh v3, v3, v4
; CHECK-PWR8-NEXT: vsrah v2, v2, v4
; CHECK-PWR8-NEXT: vsrah v3, v3, v4

View File

@@ -19,12 +19,12 @@ define signext i8 @caller_9(ptr nocapture readonly byval([9 x i8]) %data) #0 {
; P8LE-NEXT: stdu r1, -80(r1)
; P8LE-NEXT: std r0, 96(r1)
; P8LE-NEXT: stb r4, 56(r1)
; P8LE-NEXT: addi r5, r1, 71
; P8LE-NEXT: addi r4, r1, 71
; P8LE-NEXT: lbz r5, 56(r1)
; P8LE-NEXT: std r3, 48(r1)
; P8LE-NEXT: lbz r4, 56(r1)
; P8LE-NEXT: stdx r3, 0, r5
; P8LE-NEXT: mr r3, r5
; P8LE-NEXT: stb r4, 79(r1)
; P8LE-NEXT: stdx r3, 0, r4
; P8LE-NEXT: mr r3, r4
; P8LE-NEXT: stb r5, 79(r1)
; P8LE-NEXT: bl callee
; P8LE-NEXT: nop
; P8LE-NEXT: li r3, 0
@@ -78,12 +78,12 @@ define signext i8 @caller_9(ptr nocapture readonly byval([9 x i8]) %data) #0 {
; P8BE-NEXT: stdu r1, -144(r1)
; P8BE-NEXT: std r0, 160(r1)
; P8BE-NEXT: stb r4, 200(r1)
; P8BE-NEXT: addi r5, r1, 135
; P8BE-NEXT: addi r4, r1, 135
; P8BE-NEXT: lbz r5, 200(r1)
; P8BE-NEXT: std r3, 192(r1)
; P8BE-NEXT: lbz r4, 200(r1)
; P8BE-NEXT: stdx r3, 0, r5
; P8BE-NEXT: mr r3, r5
; P8BE-NEXT: stb r4, 143(r1)
; P8BE-NEXT: stdx r3, 0, r4
; P8BE-NEXT: mr r3, r4
; P8BE-NEXT: stb r5, 143(r1)
; P8BE-NEXT: bl callee
; P8BE-NEXT: nop
; P8BE-NEXT: li r3, 0
@@ -179,8 +179,8 @@ define signext i8 @caller_9_callee_9(ptr nocapture readonly byval([9 x i8]) %dat
; P8LE-NEXT: std r0, 96(r1)
; P8LE-NEXT: stb r4, 56(r1)
; P8LE-NEXT: addi r5, r1, 71
; P8LE-NEXT: std r3, 48(r1)
; P8LE-NEXT: lbz r4, 56(r1)
; P8LE-NEXT: std r3, 48(r1)
; P8LE-NEXT: stdx r3, 0, r5
; P8LE-NEXT: stb r4, 79(r1)
; P8LE-NEXT: lbz r4, 56(r1)
@@ -238,8 +238,8 @@ define signext i8 @caller_9_callee_9(ptr nocapture readonly byval([9 x i8]) %dat
; P8BE-NEXT: std r0, 160(r1)
; P8BE-NEXT: stb r4, 200(r1)
; P8BE-NEXT: addi r5, r1, 135
; P8BE-NEXT: std r3, 192(r1)
; P8BE-NEXT: lbz r4, 200(r1)
; P8BE-NEXT: std r3, 192(r1)
; P8BE-NEXT: stdx r3, 0, r5
; P8BE-NEXT: stb r4, 143(r1)
; P8BE-NEXT: lbz r4, 200(r1)
@@ -337,12 +337,12 @@ define signext i8 @caller_10(ptr nocapture readonly byval([10 x i8]) %data) #0 {
; P8LE-NEXT: stdu r1, -80(r1)
; P8LE-NEXT: std r0, 96(r1)
; P8LE-NEXT: sth r4, 56(r1)
; P8LE-NEXT: addi r5, r1, 70
; P8LE-NEXT: addi r4, r1, 70
; P8LE-NEXT: lhz r5, 56(r1)
; P8LE-NEXT: std r3, 48(r1)
; P8LE-NEXT: lhz r4, 56(r1)
; P8LE-NEXT: stdx r3, 0, r5
; P8LE-NEXT: mr r3, r5
; P8LE-NEXT: sth r4, 78(r1)
; P8LE-NEXT: stdx r3, 0, r4
; P8LE-NEXT: mr r3, r4
; P8LE-NEXT: sth r5, 78(r1)
; P8LE-NEXT: bl callee
; P8LE-NEXT: nop
; P8LE-NEXT: li r3, 0
@@ -396,12 +396,12 @@ define signext i8 @caller_10(ptr nocapture readonly byval([10 x i8]) %data) #0 {
; P8BE-NEXT: stdu r1, -144(r1)
; P8BE-NEXT: std r0, 160(r1)
; P8BE-NEXT: sth r4, 200(r1)
; P8BE-NEXT: addi r5, r1, 134
; P8BE-NEXT: addi r4, r1, 134
; P8BE-NEXT: lhz r5, 200(r1)
; P8BE-NEXT: std r3, 192(r1)
; P8BE-NEXT: lhz r4, 200(r1)
; P8BE-NEXT: stdx r3, 0, r5
; P8BE-NEXT: mr r3, r5
; P8BE-NEXT: sth r4, 142(r1)
; P8BE-NEXT: stdx r3, 0, r4
; P8BE-NEXT: mr r3, r4
; P8BE-NEXT: sth r5, 142(r1)
; P8BE-NEXT: bl callee
; P8BE-NEXT: nop
; P8BE-NEXT: li r3, 0
@@ -500,12 +500,12 @@ define signext i8 @caller_12(ptr nocapture readonly byval([12 x i8]) %data) #0 {
; P8LE-NEXT: stdu r1, -80(r1)
; P8LE-NEXT: std r0, 96(r1)
; P8LE-NEXT: stw r4, 56(r1)
; P8LE-NEXT: addi r5, r1, 68
; P8LE-NEXT: addi r4, r1, 68
; P8LE-NEXT: lwz r5, 56(r1)
; P8LE-NEXT: std r3, 48(r1)
; P8LE-NEXT: lwz r4, 56(r1)
; P8LE-NEXT: std r3, 68(r1)
; P8LE-NEXT: mr r3, r5
; P8LE-NEXT: stw r4, 76(r1)
; P8LE-NEXT: mr r3, r4
; P8LE-NEXT: stw r5, 76(r1)
; P8LE-NEXT: bl callee
; P8LE-NEXT: nop
; P8LE-NEXT: li r3, 0
@@ -559,12 +559,12 @@ define signext i8 @caller_12(ptr nocapture readonly byval([12 x i8]) %data) #0 {
; P8BE-NEXT: stdu r1, -144(r1)
; P8BE-NEXT: std r0, 160(r1)
; P8BE-NEXT: stw r4, 200(r1)
; P8BE-NEXT: addi r5, r1, 132
; P8BE-NEXT: addi r4, r1, 132
; P8BE-NEXT: lwz r5, 200(r1)
; P8BE-NEXT: std r3, 192(r1)
; P8BE-NEXT: lwz r4, 200(r1)
; P8BE-NEXT: std r3, 132(r1)
; P8BE-NEXT: mr r3, r5
; P8BE-NEXT: stw r4, 140(r1)
; P8BE-NEXT: mr r3, r4
; P8BE-NEXT: stw r5, 140(r1)
; P8BE-NEXT: bl callee
; P8BE-NEXT: nop
; P8BE-NEXT: li r3, 0
@@ -671,14 +671,14 @@ define signext i8 @caller_14(ptr nocapture readonly byval([14 x i8]) %data) #0 {
; P8LE-NEXT: stdu r1, -80(r1)
; P8LE-NEXT: std r0, 96(r1)
; P8LE-NEXT: stw r4, 56(r1)
; P8LE-NEXT: addi r5, r1, 66
; P8LE-NEXT: rldicl r4, r4, 32, 32
; P8LE-NEXT: lwz r5, 56(r1)
; P8LE-NEXT: std r3, 48(r1)
; P8LE-NEXT: lwz r6, 56(r1)
; P8LE-NEXT: stdx r3, 0, r5
; P8LE-NEXT: mr r3, r5
; P8LE-NEXT: sth r4, 60(r1)
; P8LE-NEXT: stw r6, 74(r1)
; P8LE-NEXT: addi r4, r1, 66
; P8LE-NEXT: stdx r3, 0, r4
; P8LE-NEXT: mr r3, r4
; P8LE-NEXT: stw r5, 74(r1)
; P8LE-NEXT: bl callee
; P8LE-NEXT: nop
; P8LE-NEXT: li r3, 0
@@ -734,16 +734,16 @@ define signext i8 @caller_14(ptr nocapture readonly byval([14 x i8]) %data) #0 {
; P8BE: # %bb.0: # %entry
; P8BE-NEXT: mflr r0
; P8BE-NEXT: stdu r1, -144(r1)
; P8BE-NEXT: rldicl r6, r4, 48, 16
; P8BE-NEXT: rldicl r5, r4, 48, 16
; P8BE-NEXT: std r0, 160(r1)
; P8BE-NEXT: addi r5, r1, 130
; P8BE-NEXT: std r3, 192(r1)
; P8BE-NEXT: stdx r3, 0, r5
; P8BE-NEXT: mr r3, r5
; P8BE-NEXT: stw r6, 200(r1)
; P8BE-NEXT: lwz r6, 200(r1)
; P8BE-NEXT: sth r4, 204(r1)
; P8BE-NEXT: stw r6, 138(r1)
; P8BE-NEXT: addi r4, r1, 130
; P8BE-NEXT: std r3, 192(r1)
; P8BE-NEXT: stw r5, 200(r1)
; P8BE-NEXT: stdx r3, 0, r4
; P8BE-NEXT: mr r3, r4
; P8BE-NEXT: lwz r5, 200(r1)
; P8BE-NEXT: stw r5, 138(r1)
; P8BE-NEXT: bl callee
; P8BE-NEXT: nop
; P8BE-NEXT: li r3, 0
@@ -856,9 +856,9 @@ define signext i8 @caller_16(ptr nocapture readonly byval([16 x i8]) %data) #0 {
; P8LE-NEXT: std r0, 96(r1)
; P8LE-NEXT: std r3, 48(r1)
; P8LE-NEXT: std r4, 56(r1)
; P8LE-NEXT: stw r4, 72(r1)
; P8LE-NEXT: std r3, 64(r1)
; P8LE-NEXT: mr r3, r5
; P8LE-NEXT: stw r4, 72(r1)
; P8LE-NEXT: bl callee
; P8LE-NEXT: nop
; P8LE-NEXT: li r3, 0
@@ -908,14 +908,14 @@ define signext i8 @caller_16(ptr nocapture readonly byval([16 x i8]) %data) #0 {
; P8BE: # %bb.0: # %entry
; P8BE-NEXT: mflr r0
; P8BE-NEXT: stdu r1, -144(r1)
; P8BE-NEXT: addi r5, r1, 128
; P8BE-NEXT: std r0, 160(r1)
; P8BE-NEXT: rldicl r6, r4, 32, 32
; P8BE-NEXT: std r3, 192(r1)
; P8BE-NEXT: std r4, 200(r1)
; P8BE-NEXT: rldicl r5, r4, 32, 32
; P8BE-NEXT: addi r4, r1, 128
; P8BE-NEXT: std r3, 192(r1)
; P8BE-NEXT: std r3, 128(r1)
; P8BE-NEXT: mr r3, r5
; P8BE-NEXT: stw r6, 136(r1)
; P8BE-NEXT: mr r3, r4
; P8BE-NEXT: stw r5, 136(r1)
; P8BE-NEXT: bl callee
; P8BE-NEXT: nop
; P8BE-NEXT: li r3, 0
@@ -1020,14 +1020,14 @@ define signext i8 @caller_18(ptr nocapture readonly byval([18 x i8]) %data) #0 {
; P8LE: # %bb.0: # %entry
; P8LE-NEXT: mflr r0
; P8LE-NEXT: stdu r1, -96(r1)
; P8LE-NEXT: addi r6, r1, 78
; P8LE-NEXT: std r0, 112(r1)
; P8LE-NEXT: sth r5, 64(r1)
; P8LE-NEXT: addi r5, r1, 78
; P8LE-NEXT: std r3, 48(r1)
; P8LE-NEXT: std r4, 56(r1)
; P8LE-NEXT: stdx r3, 0, r6
; P8LE-NEXT: mr r3, r6
; P8LE-NEXT: sth r5, 64(r1)
; P8LE-NEXT: stw r4, 86(r1)
; P8LE-NEXT: stdx r3, 0, r5
; P8LE-NEXT: mr r3, r5
; P8LE-NEXT: bl callee
; P8LE-NEXT: nop
; P8LE-NEXT: li r3, 0
@@ -1079,14 +1079,14 @@ define signext i8 @caller_18(ptr nocapture readonly byval([18 x i8]) %data) #0 {
; P8BE: # %bb.0: # %entry
; P8BE-NEXT: mflr r0
; P8BE-NEXT: stdu r1, -144(r1)
; P8BE-NEXT: addi r6, r1, 126
; P8BE-NEXT: std r0, 160(r1)
; P8BE-NEXT: std r4, 200(r1)
; P8BE-NEXT: sth r5, 208(r1)
; P8BE-NEXT: rldicl r5, r4, 32, 32
; P8BE-NEXT: addi r4, r1, 126
; P8BE-NEXT: std r3, 192(r1)
; P8BE-NEXT: std r4, 200(r1)
; P8BE-NEXT: stdx r3, 0, r6
; P8BE-NEXT: mr r3, r6
; P8BE-NEXT: stdx r3, 0, r4
; P8BE-NEXT: mr r3, r4
; P8BE-NEXT: stw r5, 134(r1)
; P8BE-NEXT: bl callee
; P8BE-NEXT: nop

View File

@@ -240,9 +240,9 @@ define signext i8 @caller_3(ptr nocapture readonly byval([3 x i8]) %data) #0 {
; P8LE-NEXT: mflr r0
; P8LE-NEXT: stdu r1, -64(r1)
; P8LE-NEXT: std r0, 80(r1)
; P8LE-NEXT: rldicl r4, r3, 48, 16
; P8LE-NEXT: sth r3, 48(r1)
; P8LE-NEXT: stb r4, 50(r1)
; P8LE-NEXT: rldicl r3, r3, 48, 16
; P8LE-NEXT: stb r3, 50(r1)
; P8LE-NEXT: lhz r3, 48(r1)
; P8LE-NEXT: lbz r4, 50(r1)
; P8LE-NEXT: sth r3, 61(r1)
@@ -504,10 +504,10 @@ define signext i8 @caller_5(ptr nocapture readonly byval([5 x i8]) %data) #0 {
; P8LE-NEXT: rldicl r4, r3, 32, 32
; P8LE-NEXT: std r0, 80(r1)
; P8LE-NEXT: stw r3, 48(r1)
; P8LE-NEXT: stb r4, 52(r1)
; P8LE-NEXT: lbz r4, 52(r1)
; P8LE-NEXT: stw r3, 59(r1)
; P8LE-NEXT: addi r3, r1, 59
; P8LE-NEXT: stb r4, 52(r1)
; P8LE-NEXT: lbz r4, 52(r1)
; P8LE-NEXT: stb r4, 63(r1)
; P8LE-NEXT: bl callee
; P8LE-NEXT: nop
@@ -645,9 +645,9 @@ define signext i8 @caller_6(ptr nocapture readonly byval([6 x i8]) %data) #0 {
; P8LE-NEXT: mflr r0
; P8LE-NEXT: stdu r1, -64(r1)
; P8LE-NEXT: std r0, 80(r1)
; P8LE-NEXT: rldicl r4, r3, 32, 32
; P8LE-NEXT: stw r3, 48(r1)
; P8LE-NEXT: sth r4, 52(r1)
; P8LE-NEXT: rldicl r3, r3, 32, 32
; P8LE-NEXT: sth r3, 52(r1)
; P8LE-NEXT: lwz r3, 48(r1)
; P8LE-NEXT: lhz r4, 52(r1)
; P8LE-NEXT: stw r3, 58(r1)
@@ -798,17 +798,17 @@ define signext i8 @caller_7(ptr nocapture readonly byval([7 x i8]) %data) #0 {
; P8LE-NEXT: mflr r0
; P8LE-NEXT: stdu r1, -64(r1)
; P8LE-NEXT: rldicl r4, r3, 32, 32
; P8LE-NEXT: rldicl r5, r3, 16, 48
; P8LE-NEXT: std r0, 80(r1)
; P8LE-NEXT: stw r3, 48(r1)
; P8LE-NEXT: sth r4, 52(r1)
; P8LE-NEXT: stb r5, 54(r1)
; P8LE-NEXT: lhz r4, 52(r1)
; P8LE-NEXT: lbz r5, 54(r1)
; P8LE-NEXT: stw r3, 57(r1)
; P8LE-NEXT: addi r3, r1, 57
; P8LE-NEXT: sth r4, 52(r1)
; P8LE-NEXT: rldicl r4, r3, 16, 48
; P8LE-NEXT: stb r4, 54(r1)
; P8LE-NEXT: lhz r4, 52(r1)
; P8LE-NEXT: lbz r3, 54(r1)
; P8LE-NEXT: sth r4, 61(r1)
; P8LE-NEXT: stb r5, 63(r1)
; P8LE-NEXT: stb r3, 63(r1)
; P8LE-NEXT: addi r3, r1, 57
; P8LE-NEXT: bl callee
; P8LE-NEXT: nop
; P8LE-NEXT: li r3, 0
@@ -868,18 +868,18 @@ define signext i8 @caller_7(ptr nocapture readonly byval([7 x i8]) %data) #0 {
; P8BE: # %bb.0: # %entry
; P8BE-NEXT: mflr r0
; P8BE-NEXT: stdu r1, -128(r1)
; P8BE-NEXT: rldicl r4, r3, 56, 8
; P8BE-NEXT: std r0, 144(r1)
; P8BE-NEXT: rldicl r4, r3, 56, 8
; P8BE-NEXT: stb r3, 183(r1)
; P8BE-NEXT: rldicl r3, r3, 40, 24
; P8BE-NEXT: sth r4, 181(r1)
; P8BE-NEXT: lbz r5, 183(r1)
; P8BE-NEXT: lhz r4, 181(r1)
; P8BE-NEXT: stw r3, 177(r1)
; P8BE-NEXT: stw r3, 121(r1)
; P8BE-NEXT: lbz r3, 183(r1)
; P8BE-NEXT: sth r4, 181(r1)
; P8BE-NEXT: lhz r4, 181(r1)
; P8BE-NEXT: stb r3, 127(r1)
; P8BE-NEXT: addi r3, r1, 121
; P8BE-NEXT: sth r4, 125(r1)
; P8BE-NEXT: stb r5, 127(r1)
; P8BE-NEXT: bl callee
; P8BE-NEXT: nop
; P8BE-NEXT: li r3, 0

View File

@@ -97,8 +97,8 @@ define dso_local zeroext i32 @caller(i32 zeroext %in, i32 zeroext %add_after) #0
; BE-P8-NEXT: clrldi r3, r3, 32
; BE-P8-NEXT: addi r1, r1, 128
; BE-P8-NEXT: ld r0, 16(r1)
; BE-P8-NEXT: hashchk r0, -16(r1)
; BE-P8-NEXT: mtlr r0
; BE-P8-NEXT: hashchk r0, -16(r1)
; BE-P8-NEXT: blr
;
; BE-32BIT-P10-LABEL: caller:
@@ -151,8 +151,8 @@ define dso_local zeroext i32 @caller(i32 zeroext %in, i32 zeroext %add_after) #0
; BE-32BIT-P8-NEXT: lwz r31, 76(r1) # 4-byte Folded Reload
; BE-32BIT-P8-NEXT: addi r1, r1, 80
; BE-32BIT-P8-NEXT: lwz r0, 8(r1)
; BE-32BIT-P8-NEXT: hashchk r0, -16(r1)
; BE-32BIT-P8-NEXT: mtlr r0
; BE-32BIT-P8-NEXT: hashchk r0, -16(r1)
; BE-32BIT-P8-NEXT: blr
;
; BE-P10-PRIV-LABEL: caller:
@@ -208,8 +208,8 @@ define dso_local zeroext i32 @caller(i32 zeroext %in, i32 zeroext %add_after) #0
; BE-P8-PRIV-NEXT: clrldi r3, r3, 32
; BE-P8-PRIV-NEXT: addi r1, r1, 128
; BE-P8-PRIV-NEXT: ld r0, 16(r1)
; BE-P8-PRIV-NEXT: hashchkp r0, -16(r1)
; BE-P8-PRIV-NEXT: mtlr r0
; BE-P8-PRIV-NEXT: hashchkp r0, -16(r1)
; BE-P8-PRIV-NEXT: blr
;
; BE-32BIT-P10-PRIV-LABEL: caller:
@@ -262,8 +262,8 @@ define dso_local zeroext i32 @caller(i32 zeroext %in, i32 zeroext %add_after) #0
; BE-32BIT-P8-PRIV-NEXT: lwz r31, 76(r1) # 4-byte Folded Reload
; BE-32BIT-P8-PRIV-NEXT: addi r1, r1, 80
; BE-32BIT-P8-PRIV-NEXT: lwz r0, 8(r1)
; BE-32BIT-P8-PRIV-NEXT: hashchkp r0, -16(r1)
; BE-32BIT-P8-PRIV-NEXT: mtlr r0
; BE-32BIT-P8-PRIV-NEXT: hashchkp r0, -16(r1)
; BE-32BIT-P8-PRIV-NEXT: blr
entry:
%call = tail call zeroext i32 @callee(i32 zeroext %in)
@@ -534,8 +534,8 @@ define dso_local zeroext i32 @spill(ptr nocapture readonly %in) #0 {
; BE-P8-LABEL: spill:
; BE-P8: # %bb.0: # %entry
; BE-P8-NEXT: mfcr r12
; BE-P8-NEXT: mflr r0
; BE-P8-NEXT: stw r12, 8(r1)
; BE-P8-NEXT: mflr r0
; BE-P8-NEXT: stdu r1, -624(r1)
; BE-P8-NEXT: li r4, 144
; BE-P8-NEXT: std r0, 640(r1)
@@ -543,64 +543,64 @@ define dso_local zeroext i32 @spill(ptr nocapture readonly %in) #0 {
; BE-P8-NEXT: std r14, 336(r1) # 8-byte Folded Spill
; BE-P8-NEXT: std r15, 344(r1) # 8-byte Folded Spill
; BE-P8-NEXT: std r16, 352(r1) # 8-byte Folded Spill
; BE-P8-NEXT: stxvd2x v20, r1, r4 # 16-byte Folded Spill
; BE-P8-NEXT: li r4, 160
; BE-P8-NEXT: std r17, 360(r1) # 8-byte Folded Spill
; BE-P8-NEXT: std r18, 368(r1) # 8-byte Folded Spill
; BE-P8-NEXT: stxvd2x v20, r1, r4 # 16-byte Folded Spill
; BE-P8-NEXT: li r4, 160
; BE-P8-NEXT: std r19, 376(r1) # 8-byte Folded Spill
; BE-P8-NEXT: std r20, 384(r1) # 8-byte Folded Spill
; BE-P8-NEXT: stxvd2x v21, r1, r4 # 16-byte Folded Spill
; BE-P8-NEXT: li r4, 176
; BE-P8-NEXT: std r21, 392(r1) # 8-byte Folded Spill
; BE-P8-NEXT: std r22, 400(r1) # 8-byte Folded Spill
; BE-P8-NEXT: std r23, 408(r1) # 8-byte Folded Spill
; BE-P8-NEXT: std r24, 416(r1) # 8-byte Folded Spill
; BE-P8-NEXT: stxvd2x v21, r1, r4 # 16-byte Folded Spill
; BE-P8-NEXT: li r4, 176
; BE-P8-NEXT: std r25, 424(r1) # 8-byte Folded Spill
; BE-P8-NEXT: std r26, 432(r1) # 8-byte Folded Spill
; BE-P8-NEXT: std r27, 440(r1) # 8-byte Folded Spill
; BE-P8-NEXT: std r28, 448(r1) # 8-byte Folded Spill
; BE-P8-NEXT: std r29, 456(r1) # 8-byte Folded Spill
; BE-P8-NEXT: std r30, 464(r1) # 8-byte Folded Spill
; BE-P8-NEXT: std r31, 472(r1) # 8-byte Folded Spill
; BE-P8-NEXT: std r3, 120(r1) # 8-byte Folded Spill
; BE-P8-NEXT: stxvd2x v22, r1, r4 # 16-byte Folded Spill
; BE-P8-NEXT: li r4, 192
; BE-P8-NEXT: std r31, 472(r1) # 8-byte Folded Spill
; BE-P8-NEXT: stfd f14, 480(r1) # 8-byte Folded Spill
; BE-P8-NEXT: stfd f15, 488(r1) # 8-byte Folded Spill
; BE-P8-NEXT: stfd f16, 496(r1) # 8-byte Folded Spill
; BE-P8-NEXT: stfd f17, 504(r1) # 8-byte Folded Spill
; BE-P8-NEXT: stfd f18, 512(r1) # 8-byte Folded Spill
; BE-P8-NEXT: stxvd2x v23, r1, r4 # 16-byte Folded Spill
; BE-P8-NEXT: li r4, 208
; BE-P8-NEXT: stfd f15, 488(r1) # 8-byte Folded Spill
; BE-P8-NEXT: stxvd2x v24, r1, r4 # 16-byte Folded Spill
; BE-P8-NEXT: li r4, 224
; BE-P8-NEXT: stfd f16, 496(r1) # 8-byte Folded Spill
; BE-P8-NEXT: stxvd2x v25, r1, r4 # 16-byte Folded Spill
; BE-P8-NEXT: li r4, 240
; BE-P8-NEXT: stfd f17, 504(r1) # 8-byte Folded Spill
; BE-P8-NEXT: stxvd2x v26, r1, r4 # 16-byte Folded Spill
; BE-P8-NEXT: li r4, 256
; BE-P8-NEXT: stfd f18, 512(r1) # 8-byte Folded Spill
; BE-P8-NEXT: stxvd2x v27, r1, r4 # 16-byte Folded Spill
; BE-P8-NEXT: li r4, 272
; BE-P8-NEXT: stfd f19, 520(r1) # 8-byte Folded Spill
; BE-P8-NEXT: stxvd2x v28, r1, r4 # 16-byte Folded Spill
; BE-P8-NEXT: li r4, 288
; BE-P8-NEXT: stfd f20, 528(r1) # 8-byte Folded Spill
; BE-P8-NEXT: stxvd2x v29, r1, r4 # 16-byte Folded Spill
; BE-P8-NEXT: li r4, 304
; BE-P8-NEXT: stfd f21, 536(r1) # 8-byte Folded Spill
; BE-P8-NEXT: stxvd2x v30, r1, r4 # 16-byte Folded Spill
; BE-P8-NEXT: li r4, 320
; BE-P8-NEXT: stfd f22, 544(r1) # 8-byte Folded Spill
; BE-P8-NEXT: stxvd2x v31, r1, r4 # 16-byte Folded Spill
; BE-P8-NEXT: lwz r4, 12(r3)
; BE-P8-NEXT: stfd f23, 552(r1) # 8-byte Folded Spill
; BE-P8-NEXT: stfd f24, 560(r1) # 8-byte Folded Spill
; BE-P8-NEXT: stxvd2x v24, r1, r4 # 16-byte Folded Spill
; BE-P8-NEXT: li r4, 224
; BE-P8-NEXT: stfd f25, 568(r1) # 8-byte Folded Spill
; BE-P8-NEXT: stfd f26, 576(r1) # 8-byte Folded Spill
; BE-P8-NEXT: stfd f27, 584(r1) # 8-byte Folded Spill
; BE-P8-NEXT: stfd f28, 592(r1) # 8-byte Folded Spill
; BE-P8-NEXT: stfd f29, 600(r1) # 8-byte Folded Spill
; BE-P8-NEXT: stfd f30, 608(r1) # 8-byte Folded Spill
; BE-P8-NEXT: stxvd2x v25, r1, r4 # 16-byte Folded Spill
; BE-P8-NEXT: li r4, 240
; BE-P8-NEXT: stfd f31, 616(r1) # 8-byte Folded Spill
; BE-P8-NEXT: std r3, 120(r1) # 8-byte Folded Spill
; BE-P8-NEXT: stxvd2x v26, r1, r4 # 16-byte Folded Spill
; BE-P8-NEXT: li r4, 256
; BE-P8-NEXT: stxvd2x v27, r1, r4 # 16-byte Folded Spill
; BE-P8-NEXT: li r4, 272
; BE-P8-NEXT: stxvd2x v28, r1, r4 # 16-byte Folded Spill
; BE-P8-NEXT: li r4, 288
; BE-P8-NEXT: stxvd2x v29, r1, r4 # 16-byte Folded Spill
; BE-P8-NEXT: li r4, 304
; BE-P8-NEXT: stxvd2x v30, r1, r4 # 16-byte Folded Spill
; BE-P8-NEXT: li r4, 320
; BE-P8-NEXT: stxvd2x v31, r1, r4 # 16-byte Folded Spill
; BE-P8-NEXT: lwz r4, 12(r3)
; BE-P8-NEXT: stw r4, 132(r1)
; BE-P8-NEXT: #APP
; BE-P8-NEXT: nop
@@ -616,55 +616,55 @@ define dso_local zeroext i32 @spill(ptr nocapture readonly %in) #0 {
; BE-P8-NEXT: lfd f28, 592(r1) # 8-byte Folded Reload
; BE-P8-NEXT: ld r30, 464(r1) # 8-byte Folded Reload
; BE-P8-NEXT: ld r29, 456(r1) # 8-byte Folded Reload
; BE-P8-NEXT: lwz r4, 16(r4)
; BE-P8-NEXT: lfd f27, 584(r1) # 8-byte Folded Reload
; BE-P8-NEXT: lfd f26, 576(r1) # 8-byte Folded Reload
; BE-P8-NEXT: ld r28, 448(r1) # 8-byte Folded Reload
; BE-P8-NEXT: ld r27, 440(r1) # 8-byte Folded Reload
; BE-P8-NEXT: lwz r4, 16(r4)
; BE-P8-NEXT: lfd f25, 568(r1) # 8-byte Folded Reload
; BE-P8-NEXT: lfd f24, 560(r1) # 8-byte Folded Reload
; BE-P8-NEXT: ld r27, 440(r1) # 8-byte Folded Reload
; BE-P8-NEXT: ld r26, 432(r1) # 8-byte Folded Reload
; BE-P8-NEXT: add r3, r4, r3
; BE-P8-NEXT: li r4, 320
; BE-P8-NEXT: lfd f23, 552(r1) # 8-byte Folded Reload
; BE-P8-NEXT: lfd f22, 544(r1) # 8-byte Folded Reload
; BE-P8-NEXT: ld r25, 424(r1) # 8-byte Folded Reload
; BE-P8-NEXT: ld r24, 416(r1) # 8-byte Folded Reload
; BE-P8-NEXT: lxvd2x v31, r1, r4 # 16-byte Folded Reload
; BE-P8-NEXT: li r4, 304
; BE-P8-NEXT: lfd f21, 536(r1) # 8-byte Folded Reload
; BE-P8-NEXT: lfd f20, 528(r1) # 8-byte Folded Reload
; BE-P8-NEXT: ld r23, 408(r1) # 8-byte Folded Reload
; BE-P8-NEXT: ld r22, 400(r1) # 8-byte Folded Reload
; BE-P8-NEXT: clrldi r3, r3, 32
; BE-P8-NEXT: lxvd2x v30, r1, r4 # 16-byte Folded Reload
; BE-P8-NEXT: li r4, 288
; BE-P8-NEXT: lfd f20, 528(r1) # 8-byte Folded Reload
; BE-P8-NEXT: add r3, r4, r3
; BE-P8-NEXT: li r4, 320
; BE-P8-NEXT: lfd f19, 520(r1) # 8-byte Folded Reload
; BE-P8-NEXT: lfd f18, 512(r1) # 8-byte Folded Reload
; BE-P8-NEXT: lfd f17, 504(r1) # 8-byte Folded Reload
; BE-P8-NEXT: lfd f16, 496(r1) # 8-byte Folded Reload
; BE-P8-NEXT: ld r21, 392(r1) # 8-byte Folded Reload
; BE-P8-NEXT: ld r20, 384(r1) # 8-byte Folded Reload
; BE-P8-NEXT: lxvd2x v29, r1, r4 # 16-byte Folded Reload
; BE-P8-NEXT: li r4, 272
; BE-P8-NEXT: lfd f19, 520(r1) # 8-byte Folded Reload
; BE-P8-NEXT: lxvd2x v31, r1, r4 # 16-byte Folded Reload
; BE-P8-NEXT: li r4, 304
; BE-P8-NEXT: lfd f15, 488(r1) # 8-byte Folded Reload
; BE-P8-NEXT: ld r19, 376(r1) # 8-byte Folded Reload
; BE-P8-NEXT: lfd f14, 480(r1) # 8-byte Folded Reload
; BE-P8-NEXT: ld r18, 368(r1) # 8-byte Folded Reload
; BE-P8-NEXT: lxvd2x v28, r1, r4 # 16-byte Folded Reload
; BE-P8-NEXT: li r4, 256
; BE-P8-NEXT: lfd f18, 512(r1) # 8-byte Folded Reload
; BE-P8-NEXT: ld r17, 360(r1) # 8-byte Folded Reload
; BE-P8-NEXT: ld r16, 352(r1) # 8-byte Folded Reload
; BE-P8-NEXT: lxvd2x v27, r1, r4 # 16-byte Folded Reload
; BE-P8-NEXT: li r4, 240
; BE-P8-NEXT: lfd f17, 504(r1) # 8-byte Folded Reload
; BE-P8-NEXT: lxvd2x v30, r1, r4 # 16-byte Folded Reload
; BE-P8-NEXT: li r4, 288
; BE-P8-NEXT: ld r15, 344(r1) # 8-byte Folded Reload
; BE-P8-NEXT: ld r14, 336(r1) # 8-byte Folded Reload
; BE-P8-NEXT: clrldi r3, r3, 32
; BE-P8-NEXT: lxvd2x v29, r1, r4 # 16-byte Folded Reload
; BE-P8-NEXT: li r4, 272
; BE-P8-NEXT: lxvd2x v28, r1, r4 # 16-byte Folded Reload
; BE-P8-NEXT: li r4, 256
; BE-P8-NEXT: lxvd2x v27, r1, r4 # 16-byte Folded Reload
; BE-P8-NEXT: li r4, 240
; BE-P8-NEXT: lxvd2x v26, r1, r4 # 16-byte Folded Reload
; BE-P8-NEXT: li r4, 224
; BE-P8-NEXT: lfd f16, 496(r1) # 8-byte Folded Reload
; BE-P8-NEXT: lxvd2x v25, r1, r4 # 16-byte Folded Reload
; BE-P8-NEXT: li r4, 208
; BE-P8-NEXT: lfd f15, 488(r1) # 8-byte Folded Reload
; BE-P8-NEXT: lxvd2x v24, r1, r4 # 16-byte Folded Reload
; BE-P8-NEXT: li r4, 192
; BE-P8-NEXT: lfd f14, 480(r1) # 8-byte Folded Reload
; BE-P8-NEXT: lxvd2x v23, r1, r4 # 16-byte Folded Reload
; BE-P8-NEXT: li r4, 176
; BE-P8-NEXT: lxvd2x v22, r1, r4 # 16-byte Folded Reload
@@ -675,9 +675,9 @@ define dso_local zeroext i32 @spill(ptr nocapture readonly %in) #0 {
; BE-P8-NEXT: addi r1, r1, 624
; BE-P8-NEXT: ld r0, 16(r1)
; BE-P8-NEXT: lwz r12, 8(r1)
; BE-P8-NEXT: mtocrf 32, r12
; BE-P8-NEXT: hashchk r0, -488(r1)
; BE-P8-NEXT: mtlr r0
; BE-P8-NEXT: mtocrf 32, r12
; BE-P8-NEXT: mtocrf 16, r12
; BE-P8-NEXT: mtocrf 8, r12
; BE-P8-NEXT: blr
@@ -941,74 +941,74 @@ define dso_local zeroext i32 @spill(ptr nocapture readonly %in) #0 {
; BE-32BIT-P8-LABEL: spill:
; BE-32BIT-P8: # %bb.0: # %entry
; BE-32BIT-P8-NEXT: mfcr r12
; BE-32BIT-P8-NEXT: mflr r0
; BE-32BIT-P8-NEXT: stw r12, 4(r1)
; BE-32BIT-P8-NEXT: mflr r0
; BE-32BIT-P8-NEXT: stwu r1, -496(r1)
; BE-32BIT-P8-NEXT: li r4, 80
; BE-32BIT-P8-NEXT: stw r0, 504(r1)
; BE-32BIT-P8-NEXT: hashst r0, -424(r1)
; BE-32BIT-P8-NEXT: stw r13, 276(r1) # 4-byte Folded Spill
; BE-32BIT-P8-NEXT: stw r14, 280(r1) # 4-byte Folded Spill
; BE-32BIT-P8-NEXT: stw r15, 284(r1) # 4-byte Folded Spill
; BE-32BIT-P8-NEXT: stw r16, 288(r1) # 4-byte Folded Spill
; BE-32BIT-P8-NEXT: stw r17, 292(r1) # 4-byte Folded Spill
; BE-32BIT-P8-NEXT: stxvd2x v20, r1, r4 # 16-byte Folded Spill
; BE-32BIT-P8-NEXT: li r4, 96
; BE-32BIT-P8-NEXT: stw r14, 280(r1) # 4-byte Folded Spill
; BE-32BIT-P8-NEXT: stw r18, 296(r1) # 4-byte Folded Spill
; BE-32BIT-P8-NEXT: stw r19, 300(r1) # 4-byte Folded Spill
; BE-32BIT-P8-NEXT: stw r20, 304(r1) # 4-byte Folded Spill
; BE-32BIT-P8-NEXT: stw r21, 308(r1) # 4-byte Folded Spill
; BE-32BIT-P8-NEXT: stw r22, 312(r1) # 4-byte Folded Spill
; BE-32BIT-P8-NEXT: stw r23, 316(r1) # 4-byte Folded Spill
; BE-32BIT-P8-NEXT: stxvd2x v21, r1, r4 # 16-byte Folded Spill
; BE-32BIT-P8-NEXT: li r4, 112
; BE-32BIT-P8-NEXT: stw r15, 284(r1) # 4-byte Folded Spill
; BE-32BIT-P8-NEXT: stxvd2x v22, r1, r4 # 16-byte Folded Spill
; BE-32BIT-P8-NEXT: li r4, 128
; BE-32BIT-P8-NEXT: stw r16, 288(r1) # 4-byte Folded Spill
; BE-32BIT-P8-NEXT: stxvd2x v23, r1, r4 # 16-byte Folded Spill
; BE-32BIT-P8-NEXT: li r4, 144
; BE-32BIT-P8-NEXT: stw r17, 292(r1) # 4-byte Folded Spill
; BE-32BIT-P8-NEXT: stxvd2x v24, r1, r4 # 16-byte Folded Spill
; BE-32BIT-P8-NEXT: li r4, 160
; BE-32BIT-P8-NEXT: stw r18, 296(r1) # 4-byte Folded Spill
; BE-32BIT-P8-NEXT: stxvd2x v25, r1, r4 # 16-byte Folded Spill
; BE-32BIT-P8-NEXT: li r4, 176
; BE-32BIT-P8-NEXT: stw r19, 300(r1) # 4-byte Folded Spill
; BE-32BIT-P8-NEXT: stxvd2x v26, r1, r4 # 16-byte Folded Spill
; BE-32BIT-P8-NEXT: li r4, 192
; BE-32BIT-P8-NEXT: stw r20, 304(r1) # 4-byte Folded Spill
; BE-32BIT-P8-NEXT: stxvd2x v27, r1, r4 # 16-byte Folded Spill
; BE-32BIT-P8-NEXT: li r4, 208
; BE-32BIT-P8-NEXT: stw r21, 308(r1) # 4-byte Folded Spill
; BE-32BIT-P8-NEXT: stxvd2x v28, r1, r4 # 16-byte Folded Spill
; BE-32BIT-P8-NEXT: li r4, 224
; BE-32BIT-P8-NEXT: stw r22, 312(r1) # 4-byte Folded Spill
; BE-32BIT-P8-NEXT: stxvd2x v29, r1, r4 # 16-byte Folded Spill
; BE-32BIT-P8-NEXT: li r4, 240
; BE-32BIT-P8-NEXT: stw r23, 316(r1) # 4-byte Folded Spill
; BE-32BIT-P8-NEXT: stxvd2x v30, r1, r4 # 16-byte Folded Spill
; BE-32BIT-P8-NEXT: li r4, 256
; BE-32BIT-P8-NEXT: stw r24, 320(r1) # 4-byte Folded Spill
; BE-32BIT-P8-NEXT: stxvd2x v31, r1, r4 # 16-byte Folded Spill
; BE-32BIT-P8-NEXT: lwz r4, 12(r3)
; BE-32BIT-P8-NEXT: stw r25, 324(r1) # 4-byte Folded Spill
; BE-32BIT-P8-NEXT: stw r26, 328(r1) # 4-byte Folded Spill
; BE-32BIT-P8-NEXT: stw r27, 332(r1) # 4-byte Folded Spill
; BE-32BIT-P8-NEXT: stw r28, 336(r1) # 4-byte Folded Spill
; BE-32BIT-P8-NEXT: stw r29, 340(r1) # 4-byte Folded Spill
; BE-32BIT-P8-NEXT: stxvd2x v22, r1, r4 # 16-byte Folded Spill
; BE-32BIT-P8-NEXT: li r4, 128
; BE-32BIT-P8-NEXT: stw r30, 344(r1) # 4-byte Folded Spill
; BE-32BIT-P8-NEXT: stw r31, 348(r1) # 4-byte Folded Spill
; BE-32BIT-P8-NEXT: stfd f14, 352(r1) # 8-byte Folded Spill
; BE-32BIT-P8-NEXT: stfd f15, 360(r1) # 8-byte Folded Spill
; BE-32BIT-P8-NEXT: stfd f16, 368(r1) # 8-byte Folded Spill
; BE-32BIT-P8-NEXT: stfd f17, 376(r1) # 8-byte Folded Spill
; BE-32BIT-P8-NEXT: stxvd2x v23, r1, r4 # 16-byte Folded Spill
; BE-32BIT-P8-NEXT: li r4, 144
; BE-32BIT-P8-NEXT: stfd f18, 384(r1) # 8-byte Folded Spill
; BE-32BIT-P8-NEXT: stfd f19, 392(r1) # 8-byte Folded Spill
; BE-32BIT-P8-NEXT: stfd f20, 400(r1) # 8-byte Folded Spill
; BE-32BIT-P8-NEXT: stfd f21, 408(r1) # 8-byte Folded Spill
; BE-32BIT-P8-NEXT: stfd f22, 416(r1) # 8-byte Folded Spill
; BE-32BIT-P8-NEXT: stfd f23, 424(r1) # 8-byte Folded Spill
; BE-32BIT-P8-NEXT: stxvd2x v24, r1, r4 # 16-byte Folded Spill
; BE-32BIT-P8-NEXT: li r4, 160
; BE-32BIT-P8-NEXT: stfd f24, 432(r1) # 8-byte Folded Spill
; BE-32BIT-P8-NEXT: stfd f25, 440(r1) # 8-byte Folded Spill
; BE-32BIT-P8-NEXT: stfd f26, 448(r1) # 8-byte Folded Spill
; BE-32BIT-P8-NEXT: stfd f27, 456(r1) # 8-byte Folded Spill
; BE-32BIT-P8-NEXT: stfd f28, 464(r1) # 8-byte Folded Spill
; BE-32BIT-P8-NEXT: stfd f29, 472(r1) # 8-byte Folded Spill
; BE-32BIT-P8-NEXT: stxvd2x v25, r1, r4 # 16-byte Folded Spill
; BE-32BIT-P8-NEXT: li r4, 176
; BE-32BIT-P8-NEXT: stfd f30, 480(r1) # 8-byte Folded Spill
; BE-32BIT-P8-NEXT: stfd f31, 488(r1) # 8-byte Folded Spill
; BE-32BIT-P8-NEXT: stw r3, 64(r1) # 4-byte Folded Spill
; BE-32BIT-P8-NEXT: stxvd2x v26, r1, r4 # 16-byte Folded Spill
; BE-32BIT-P8-NEXT: li r4, 192
; BE-32BIT-P8-NEXT: stxvd2x v27, r1, r4 # 16-byte Folded Spill
; BE-32BIT-P8-NEXT: li r4, 208
; BE-32BIT-P8-NEXT: stxvd2x v28, r1, r4 # 16-byte Folded Spill
; BE-32BIT-P8-NEXT: li r4, 224
; BE-32BIT-P8-NEXT: stxvd2x v29, r1, r4 # 16-byte Folded Spill
; BE-32BIT-P8-NEXT: li r4, 240
; BE-32BIT-P8-NEXT: stxvd2x v30, r1, r4 # 16-byte Folded Spill
; BE-32BIT-P8-NEXT: li r4, 256
; BE-32BIT-P8-NEXT: stxvd2x v31, r1, r4 # 16-byte Folded Spill
; BE-32BIT-P8-NEXT: lwz r4, 12(r3)
; BE-32BIT-P8-NEXT: stw r4, 68(r1)
; BE-32BIT-P8-NEXT: #APP
; BE-32BIT-P8-NEXT: nop
@@ -1024,55 +1024,55 @@ define dso_local zeroext i32 @spill(ptr nocapture readonly %in) #0 {
; BE-32BIT-P8-NEXT: lfd f28, 464(r1) # 8-byte Folded Reload
; BE-32BIT-P8-NEXT: lwz r30, 344(r1) # 4-byte Folded Reload
; BE-32BIT-P8-NEXT: lwz r29, 340(r1) # 4-byte Folded Reload
; BE-32BIT-P8-NEXT: lwz r4, 16(r4)
; BE-32BIT-P8-NEXT: lfd f27, 456(r1) # 8-byte Folded Reload
; BE-32BIT-P8-NEXT: lfd f26, 448(r1) # 8-byte Folded Reload
; BE-32BIT-P8-NEXT: lwz r28, 336(r1) # 4-byte Folded Reload
; BE-32BIT-P8-NEXT: lwz r27, 332(r1) # 4-byte Folded Reload
; BE-32BIT-P8-NEXT: lwz r4, 16(r4)
; BE-32BIT-P8-NEXT: lfd f25, 440(r1) # 8-byte Folded Reload
; BE-32BIT-P8-NEXT: lfd f24, 432(r1) # 8-byte Folded Reload
; BE-32BIT-P8-NEXT: lwz r27, 332(r1) # 4-byte Folded Reload
; BE-32BIT-P8-NEXT: lwz r26, 328(r1) # 4-byte Folded Reload
; BE-32BIT-P8-NEXT: add r3, r4, r3
; BE-32BIT-P8-NEXT: li r4, 256
; BE-32BIT-P8-NEXT: lfd f23, 424(r1) # 8-byte Folded Reload
; BE-32BIT-P8-NEXT: lfd f22, 416(r1) # 8-byte Folded Reload
; BE-32BIT-P8-NEXT: lwz r25, 324(r1) # 4-byte Folded Reload
; BE-32BIT-P8-NEXT: lwz r24, 320(r1) # 4-byte Folded Reload
; BE-32BIT-P8-NEXT: lxvd2x v31, r1, r4 # 16-byte Folded Reload
; BE-32BIT-P8-NEXT: li r4, 240
; BE-32BIT-P8-NEXT: lfd f21, 408(r1) # 8-byte Folded Reload
; BE-32BIT-P8-NEXT: lfd f20, 400(r1) # 8-byte Folded Reload
; BE-32BIT-P8-NEXT: lwz r23, 316(r1) # 4-byte Folded Reload
; BE-32BIT-P8-NEXT: lwz r22, 312(r1) # 4-byte Folded Reload
; BE-32BIT-P8-NEXT: lxvd2x v30, r1, r4 # 16-byte Folded Reload
; BE-32BIT-P8-NEXT: li r4, 224
; BE-32BIT-P8-NEXT: lfd f20, 400(r1) # 8-byte Folded Reload
; BE-32BIT-P8-NEXT: add r3, r4, r3
; BE-32BIT-P8-NEXT: li r4, 256
; BE-32BIT-P8-NEXT: lfd f19, 392(r1) # 8-byte Folded Reload
; BE-32BIT-P8-NEXT: lfd f18, 384(r1) # 8-byte Folded Reload
; BE-32BIT-P8-NEXT: lfd f17, 376(r1) # 8-byte Folded Reload
; BE-32BIT-P8-NEXT: lfd f16, 368(r1) # 8-byte Folded Reload
; BE-32BIT-P8-NEXT: lwz r21, 308(r1) # 4-byte Folded Reload
; BE-32BIT-P8-NEXT: lwz r20, 304(r1) # 4-byte Folded Reload
; BE-32BIT-P8-NEXT: lxvd2x v29, r1, r4 # 16-byte Folded Reload
; BE-32BIT-P8-NEXT: li r4, 208
; BE-32BIT-P8-NEXT: lfd f19, 392(r1) # 8-byte Folded Reload
; BE-32BIT-P8-NEXT: lxvd2x v31, r1, r4 # 16-byte Folded Reload
; BE-32BIT-P8-NEXT: li r4, 240
; BE-32BIT-P8-NEXT: lfd f15, 360(r1) # 8-byte Folded Reload
; BE-32BIT-P8-NEXT: lwz r19, 300(r1) # 4-byte Folded Reload
; BE-32BIT-P8-NEXT: lfd f14, 352(r1) # 8-byte Folded Reload
; BE-32BIT-P8-NEXT: lwz r18, 296(r1) # 4-byte Folded Reload
; BE-32BIT-P8-NEXT: lxvd2x v28, r1, r4 # 16-byte Folded Reload
; BE-32BIT-P8-NEXT: li r4, 192
; BE-32BIT-P8-NEXT: lfd f18, 384(r1) # 8-byte Folded Reload
; BE-32BIT-P8-NEXT: lwz r17, 292(r1) # 4-byte Folded Reload
; BE-32BIT-P8-NEXT: lwz r16, 288(r1) # 4-byte Folded Reload
; BE-32BIT-P8-NEXT: lxvd2x v27, r1, r4 # 16-byte Folded Reload
; BE-32BIT-P8-NEXT: li r4, 176
; BE-32BIT-P8-NEXT: lfd f17, 376(r1) # 8-byte Folded Reload
; BE-32BIT-P8-NEXT: lxvd2x v30, r1, r4 # 16-byte Folded Reload
; BE-32BIT-P8-NEXT: li r4, 224
; BE-32BIT-P8-NEXT: lwz r15, 284(r1) # 4-byte Folded Reload
; BE-32BIT-P8-NEXT: lwz r14, 280(r1) # 4-byte Folded Reload
; BE-32BIT-P8-NEXT: lwz r13, 276(r1) # 4-byte Folded Reload
; BE-32BIT-P8-NEXT: lxvd2x v29, r1, r4 # 16-byte Folded Reload
; BE-32BIT-P8-NEXT: li r4, 208
; BE-32BIT-P8-NEXT: lxvd2x v28, r1, r4 # 16-byte Folded Reload
; BE-32BIT-P8-NEXT: li r4, 192
; BE-32BIT-P8-NEXT: lxvd2x v27, r1, r4 # 16-byte Folded Reload
; BE-32BIT-P8-NEXT: li r4, 176
; BE-32BIT-P8-NEXT: lxvd2x v26, r1, r4 # 16-byte Folded Reload
; BE-32BIT-P8-NEXT: li r4, 160
; BE-32BIT-P8-NEXT: lfd f16, 368(r1) # 8-byte Folded Reload
; BE-32BIT-P8-NEXT: lwz r13, 276(r1) # 4-byte Folded Reload
; BE-32BIT-P8-NEXT: lxvd2x v25, r1, r4 # 16-byte Folded Reload
; BE-32BIT-P8-NEXT: li r4, 144
; BE-32BIT-P8-NEXT: lfd f15, 360(r1) # 8-byte Folded Reload
; BE-32BIT-P8-NEXT: lxvd2x v24, r1, r4 # 16-byte Folded Reload
; BE-32BIT-P8-NEXT: li r4, 128
; BE-32BIT-P8-NEXT: lfd f14, 352(r1) # 8-byte Folded Reload
; BE-32BIT-P8-NEXT: lxvd2x v23, r1, r4 # 16-byte Folded Reload
; BE-32BIT-P8-NEXT: li r4, 112
; BE-32BIT-P8-NEXT: lxvd2x v22, r1, r4 # 16-byte Folded Reload
@@ -1083,9 +1083,9 @@ define dso_local zeroext i32 @spill(ptr nocapture readonly %in) #0 {
; BE-32BIT-P8-NEXT: addi r1, r1, 496
; BE-32BIT-P8-NEXT: lwz r0, 8(r1)
; BE-32BIT-P8-NEXT: lwz r12, 4(r1)
; BE-32BIT-P8-NEXT: mtocrf 32, r12
; BE-32BIT-P8-NEXT: hashchk r0, -424(r1)
; BE-32BIT-P8-NEXT: mtlr r0
; BE-32BIT-P8-NEXT: mtocrf 32, r12
; BE-32BIT-P8-NEXT: mtocrf 16, r12
; BE-32BIT-P8-NEXT: mtocrf 8, r12
; BE-32BIT-P8-NEXT: blr
@@ -1347,8 +1347,8 @@ define dso_local zeroext i32 @spill(ptr nocapture readonly %in) #0 {
; BE-P8-PRIV-LABEL: spill:
; BE-P8-PRIV: # %bb.0: # %entry
; BE-P8-PRIV-NEXT: mfcr r12
; BE-P8-PRIV-NEXT: mflr r0
; BE-P8-PRIV-NEXT: stw r12, 8(r1)
; BE-P8-PRIV-NEXT: mflr r0
; BE-P8-PRIV-NEXT: stdu r1, -624(r1)
; BE-P8-PRIV-NEXT: li r4, 144
; BE-P8-PRIV-NEXT: std r0, 640(r1)
@@ -1356,64 +1356,64 @@ define dso_local zeroext i32 @spill(ptr nocapture readonly %in) #0 {
; BE-P8-PRIV-NEXT: std r14, 336(r1) # 8-byte Folded Spill
; BE-P8-PRIV-NEXT: std r15, 344(r1) # 8-byte Folded Spill
; BE-P8-PRIV-NEXT: std r16, 352(r1) # 8-byte Folded Spill
; BE-P8-PRIV-NEXT: stxvd2x v20, r1, r4 # 16-byte Folded Spill
; BE-P8-PRIV-NEXT: li r4, 160
; BE-P8-PRIV-NEXT: std r17, 360(r1) # 8-byte Folded Spill
; BE-P8-PRIV-NEXT: std r18, 368(r1) # 8-byte Folded Spill
; BE-P8-PRIV-NEXT: stxvd2x v20, r1, r4 # 16-byte Folded Spill
; BE-P8-PRIV-NEXT: li r4, 160
; BE-P8-PRIV-NEXT: std r19, 376(r1) # 8-byte Folded Spill
; BE-P8-PRIV-NEXT: std r20, 384(r1) # 8-byte Folded Spill
; BE-P8-PRIV-NEXT: stxvd2x v21, r1, r4 # 16-byte Folded Spill
; BE-P8-PRIV-NEXT: li r4, 176
; BE-P8-PRIV-NEXT: std r21, 392(r1) # 8-byte Folded Spill
; BE-P8-PRIV-NEXT: std r22, 400(r1) # 8-byte Folded Spill
; BE-P8-PRIV-NEXT: std r23, 408(r1) # 8-byte Folded Spill
; BE-P8-PRIV-NEXT: std r24, 416(r1) # 8-byte Folded Spill
; BE-P8-PRIV-NEXT: stxvd2x v21, r1, r4 # 16-byte Folded Spill
; BE-P8-PRIV-NEXT: li r4, 176
; BE-P8-PRIV-NEXT: std r25, 424(r1) # 8-byte Folded Spill
; BE-P8-PRIV-NEXT: std r26, 432(r1) # 8-byte Folded Spill
; BE-P8-PRIV-NEXT: std r27, 440(r1) # 8-byte Folded Spill
; BE-P8-PRIV-NEXT: std r28, 448(r1) # 8-byte Folded Spill
; BE-P8-PRIV-NEXT: std r29, 456(r1) # 8-byte Folded Spill
; BE-P8-PRIV-NEXT: std r30, 464(r1) # 8-byte Folded Spill
; BE-P8-PRIV-NEXT: std r31, 472(r1) # 8-byte Folded Spill
; BE-P8-PRIV-NEXT: std r3, 120(r1) # 8-byte Folded Spill
; BE-P8-PRIV-NEXT: stxvd2x v22, r1, r4 # 16-byte Folded Spill
; BE-P8-PRIV-NEXT: li r4, 192
; BE-P8-PRIV-NEXT: std r31, 472(r1) # 8-byte Folded Spill
; BE-P8-PRIV-NEXT: stfd f14, 480(r1) # 8-byte Folded Spill
; BE-P8-PRIV-NEXT: stfd f15, 488(r1) # 8-byte Folded Spill
; BE-P8-PRIV-NEXT: stfd f16, 496(r1) # 8-byte Folded Spill
; BE-P8-PRIV-NEXT: stfd f17, 504(r1) # 8-byte Folded Spill
; BE-P8-PRIV-NEXT: stfd f18, 512(r1) # 8-byte Folded Spill
; BE-P8-PRIV-NEXT: stxvd2x v23, r1, r4 # 16-byte Folded Spill
; BE-P8-PRIV-NEXT: li r4, 208
; BE-P8-PRIV-NEXT: stfd f15, 488(r1) # 8-byte Folded Spill
; BE-P8-PRIV-NEXT: stxvd2x v24, r1, r4 # 16-byte Folded Spill
; BE-P8-PRIV-NEXT: li r4, 224
; BE-P8-PRIV-NEXT: stfd f16, 496(r1) # 8-byte Folded Spill
; BE-P8-PRIV-NEXT: stxvd2x v25, r1, r4 # 16-byte Folded Spill
; BE-P8-PRIV-NEXT: li r4, 240
; BE-P8-PRIV-NEXT: stfd f17, 504(r1) # 8-byte Folded Spill
; BE-P8-PRIV-NEXT: stxvd2x v26, r1, r4 # 16-byte Folded Spill
; BE-P8-PRIV-NEXT: li r4, 256
; BE-P8-PRIV-NEXT: stfd f18, 512(r1) # 8-byte Folded Spill
; BE-P8-PRIV-NEXT: stxvd2x v27, r1, r4 # 16-byte Folded Spill
; BE-P8-PRIV-NEXT: li r4, 272
; BE-P8-PRIV-NEXT: stfd f19, 520(r1) # 8-byte Folded Spill
; BE-P8-PRIV-NEXT: stxvd2x v28, r1, r4 # 16-byte Folded Spill
; BE-P8-PRIV-NEXT: li r4, 288
; BE-P8-PRIV-NEXT: stfd f20, 528(r1) # 8-byte Folded Spill
; BE-P8-PRIV-NEXT: stxvd2x v29, r1, r4 # 16-byte Folded Spill
; BE-P8-PRIV-NEXT: li r4, 304
; BE-P8-PRIV-NEXT: stfd f21, 536(r1) # 8-byte Folded Spill
; BE-P8-PRIV-NEXT: stxvd2x v30, r1, r4 # 16-byte Folded Spill
; BE-P8-PRIV-NEXT: li r4, 320
; BE-P8-PRIV-NEXT: stfd f22, 544(r1) # 8-byte Folded Spill
; BE-P8-PRIV-NEXT: stxvd2x v31, r1, r4 # 16-byte Folded Spill
; BE-P8-PRIV-NEXT: lwz r4, 12(r3)
; BE-P8-PRIV-NEXT: stfd f23, 552(r1) # 8-byte Folded Spill
; BE-P8-PRIV-NEXT: stfd f24, 560(r1) # 8-byte Folded Spill
; BE-P8-PRIV-NEXT: stxvd2x v24, r1, r4 # 16-byte Folded Spill
; BE-P8-PRIV-NEXT: li r4, 224
; BE-P8-PRIV-NEXT: stfd f25, 568(r1) # 8-byte Folded Spill
; BE-P8-PRIV-NEXT: stfd f26, 576(r1) # 8-byte Folded Spill
; BE-P8-PRIV-NEXT: stfd f27, 584(r1) # 8-byte Folded Spill
; BE-P8-PRIV-NEXT: stfd f28, 592(r1) # 8-byte Folded Spill
; BE-P8-PRIV-NEXT: stfd f29, 600(r1) # 8-byte Folded Spill
; BE-P8-PRIV-NEXT: stfd f30, 608(r1) # 8-byte Folded Spill
; BE-P8-PRIV-NEXT: stxvd2x v25, r1, r4 # 16-byte Folded Spill
; BE-P8-PRIV-NEXT: li r4, 240
; BE-P8-PRIV-NEXT: stfd f31, 616(r1) # 8-byte Folded Spill
; BE-P8-PRIV-NEXT: std r3, 120(r1) # 8-byte Folded Spill
; BE-P8-PRIV-NEXT: stxvd2x v26, r1, r4 # 16-byte Folded Spill
; BE-P8-PRIV-NEXT: li r4, 256
; BE-P8-PRIV-NEXT: stxvd2x v27, r1, r4 # 16-byte Folded Spill
; BE-P8-PRIV-NEXT: li r4, 272
; BE-P8-PRIV-NEXT: stxvd2x v28, r1, r4 # 16-byte Folded Spill
; BE-P8-PRIV-NEXT: li r4, 288
; BE-P8-PRIV-NEXT: stxvd2x v29, r1, r4 # 16-byte Folded Spill
; BE-P8-PRIV-NEXT: li r4, 304
; BE-P8-PRIV-NEXT: stxvd2x v30, r1, r4 # 16-byte Folded Spill
; BE-P8-PRIV-NEXT: li r4, 320
; BE-P8-PRIV-NEXT: stxvd2x v31, r1, r4 # 16-byte Folded Spill
; BE-P8-PRIV-NEXT: lwz r4, 12(r3)
; BE-P8-PRIV-NEXT: stw r4, 132(r1)
; BE-P8-PRIV-NEXT: #APP
; BE-P8-PRIV-NEXT: nop
@@ -1429,55 +1429,55 @@ define dso_local zeroext i32 @spill(ptr nocapture readonly %in) #0 {
; BE-P8-PRIV-NEXT: lfd f28, 592(r1) # 8-byte Folded Reload
; BE-P8-PRIV-NEXT: ld r30, 464(r1) # 8-byte Folded Reload
; BE-P8-PRIV-NEXT: ld r29, 456(r1) # 8-byte Folded Reload
; BE-P8-PRIV-NEXT: lwz r4, 16(r4)
; BE-P8-PRIV-NEXT: lfd f27, 584(r1) # 8-byte Folded Reload
; BE-P8-PRIV-NEXT: lfd f26, 576(r1) # 8-byte Folded Reload
; BE-P8-PRIV-NEXT: ld r28, 448(r1) # 8-byte Folded Reload
; BE-P8-PRIV-NEXT: ld r27, 440(r1) # 8-byte Folded Reload
; BE-P8-PRIV-NEXT: lwz r4, 16(r4)
; BE-P8-PRIV-NEXT: lfd f25, 568(r1) # 8-byte Folded Reload
; BE-P8-PRIV-NEXT: lfd f24, 560(r1) # 8-byte Folded Reload
; BE-P8-PRIV-NEXT: ld r27, 440(r1) # 8-byte Folded Reload
; BE-P8-PRIV-NEXT: ld r26, 432(r1) # 8-byte Folded Reload
; BE-P8-PRIV-NEXT: add r3, r4, r3
; BE-P8-PRIV-NEXT: li r4, 320
; BE-P8-PRIV-NEXT: lfd f23, 552(r1) # 8-byte Folded Reload
; BE-P8-PRIV-NEXT: lfd f22, 544(r1) # 8-byte Folded Reload
; BE-P8-PRIV-NEXT: ld r25, 424(r1) # 8-byte Folded Reload
; BE-P8-PRIV-NEXT: ld r24, 416(r1) # 8-byte Folded Reload
; BE-P8-PRIV-NEXT: lxvd2x v31, r1, r4 # 16-byte Folded Reload
; BE-P8-PRIV-NEXT: li r4, 304
; BE-P8-PRIV-NEXT: lfd f21, 536(r1) # 8-byte Folded Reload
; BE-P8-PRIV-NEXT: lfd f20, 528(r1) # 8-byte Folded Reload
; BE-P8-PRIV-NEXT: ld r23, 408(r1) # 8-byte Folded Reload
; BE-P8-PRIV-NEXT: ld r22, 400(r1) # 8-byte Folded Reload
; BE-P8-PRIV-NEXT: clrldi r3, r3, 32
; BE-P8-PRIV-NEXT: lxvd2x v30, r1, r4 # 16-byte Folded Reload
; BE-P8-PRIV-NEXT: li r4, 288
; BE-P8-PRIV-NEXT: lfd f20, 528(r1) # 8-byte Folded Reload
; BE-P8-PRIV-NEXT: add r3, r4, r3
; BE-P8-PRIV-NEXT: li r4, 320
; BE-P8-PRIV-NEXT: lfd f19, 520(r1) # 8-byte Folded Reload
; BE-P8-PRIV-NEXT: lfd f18, 512(r1) # 8-byte Folded Reload
; BE-P8-PRIV-NEXT: lfd f17, 504(r1) # 8-byte Folded Reload
; BE-P8-PRIV-NEXT: lfd f16, 496(r1) # 8-byte Folded Reload
; BE-P8-PRIV-NEXT: ld r21, 392(r1) # 8-byte Folded Reload
; BE-P8-PRIV-NEXT: ld r20, 384(r1) # 8-byte Folded Reload
; BE-P8-PRIV-NEXT: lxvd2x v29, r1, r4 # 16-byte Folded Reload
; BE-P8-PRIV-NEXT: li r4, 272
; BE-P8-PRIV-NEXT: lfd f19, 520(r1) # 8-byte Folded Reload
; BE-P8-PRIV-NEXT: lxvd2x v31, r1, r4 # 16-byte Folded Reload
; BE-P8-PRIV-NEXT: li r4, 304
; BE-P8-PRIV-NEXT: lfd f15, 488(r1) # 8-byte Folded Reload
; BE-P8-PRIV-NEXT: ld r19, 376(r1) # 8-byte Folded Reload
; BE-P8-PRIV-NEXT: lfd f14, 480(r1) # 8-byte Folded Reload
; BE-P8-PRIV-NEXT: ld r18, 368(r1) # 8-byte Folded Reload
; BE-P8-PRIV-NEXT: lxvd2x v28, r1, r4 # 16-byte Folded Reload
; BE-P8-PRIV-NEXT: li r4, 256
; BE-P8-PRIV-NEXT: lfd f18, 512(r1) # 8-byte Folded Reload
; BE-P8-PRIV-NEXT: ld r17, 360(r1) # 8-byte Folded Reload
; BE-P8-PRIV-NEXT: ld r16, 352(r1) # 8-byte Folded Reload
; BE-P8-PRIV-NEXT: lxvd2x v27, r1, r4 # 16-byte Folded Reload
; BE-P8-PRIV-NEXT: li r4, 240
; BE-P8-PRIV-NEXT: lfd f17, 504(r1) # 8-byte Folded Reload
; BE-P8-PRIV-NEXT: lxvd2x v30, r1, r4 # 16-byte Folded Reload
; BE-P8-PRIV-NEXT: li r4, 288
; BE-P8-PRIV-NEXT: ld r15, 344(r1) # 8-byte Folded Reload
; BE-P8-PRIV-NEXT: ld r14, 336(r1) # 8-byte Folded Reload
; BE-P8-PRIV-NEXT: clrldi r3, r3, 32
; BE-P8-PRIV-NEXT: lxvd2x v29, r1, r4 # 16-byte Folded Reload
; BE-P8-PRIV-NEXT: li r4, 272
; BE-P8-PRIV-NEXT: lxvd2x v28, r1, r4 # 16-byte Folded Reload
; BE-P8-PRIV-NEXT: li r4, 256
; BE-P8-PRIV-NEXT: lxvd2x v27, r1, r4 # 16-byte Folded Reload
; BE-P8-PRIV-NEXT: li r4, 240
; BE-P8-PRIV-NEXT: lxvd2x v26, r1, r4 # 16-byte Folded Reload
; BE-P8-PRIV-NEXT: li r4, 224
; BE-P8-PRIV-NEXT: lfd f16, 496(r1) # 8-byte Folded Reload
; BE-P8-PRIV-NEXT: lxvd2x v25, r1, r4 # 16-byte Folded Reload
; BE-P8-PRIV-NEXT: li r4, 208
; BE-P8-PRIV-NEXT: lfd f15, 488(r1) # 8-byte Folded Reload
; BE-P8-PRIV-NEXT: lxvd2x v24, r1, r4 # 16-byte Folded Reload
; BE-P8-PRIV-NEXT: li r4, 192
; BE-P8-PRIV-NEXT: lfd f14, 480(r1) # 8-byte Folded Reload
; BE-P8-PRIV-NEXT: lxvd2x v23, r1, r4 # 16-byte Folded Reload
; BE-P8-PRIV-NEXT: li r4, 176
; BE-P8-PRIV-NEXT: lxvd2x v22, r1, r4 # 16-byte Folded Reload
@@ -1488,9 +1488,9 @@ define dso_local zeroext i32 @spill(ptr nocapture readonly %in) #0 {
; BE-P8-PRIV-NEXT: addi r1, r1, 624
; BE-P8-PRIV-NEXT: ld r0, 16(r1)
; BE-P8-PRIV-NEXT: lwz r12, 8(r1)
; BE-P8-PRIV-NEXT: mtocrf 32, r12
; BE-P8-PRIV-NEXT: hashchkp r0, -488(r1)
; BE-P8-PRIV-NEXT: mtlr r0
; BE-P8-PRIV-NEXT: mtocrf 32, r12
; BE-P8-PRIV-NEXT: mtocrf 16, r12
; BE-P8-PRIV-NEXT: mtocrf 8, r12
; BE-P8-PRIV-NEXT: blr
@@ -1754,74 +1754,74 @@ define dso_local zeroext i32 @spill(ptr nocapture readonly %in) #0 {
; BE-32BIT-P8-PRIV-LABEL: spill:
; BE-32BIT-P8-PRIV: # %bb.0: # %entry
; BE-32BIT-P8-PRIV-NEXT: mfcr r12
; BE-32BIT-P8-PRIV-NEXT: mflr r0
; BE-32BIT-P8-PRIV-NEXT: stw r12, 4(r1)
; BE-32BIT-P8-PRIV-NEXT: mflr r0
; BE-32BIT-P8-PRIV-NEXT: stwu r1, -496(r1)
; BE-32BIT-P8-PRIV-NEXT: li r4, 80
; BE-32BIT-P8-PRIV-NEXT: stw r0, 504(r1)
; BE-32BIT-P8-PRIV-NEXT: hashstp r0, -424(r1)
; BE-32BIT-P8-PRIV-NEXT: stw r13, 276(r1) # 4-byte Folded Spill
; BE-32BIT-P8-PRIV-NEXT: stw r14, 280(r1) # 4-byte Folded Spill
; BE-32BIT-P8-PRIV-NEXT: stw r15, 284(r1) # 4-byte Folded Spill
; BE-32BIT-P8-PRIV-NEXT: stw r16, 288(r1) # 4-byte Folded Spill
; BE-32BIT-P8-PRIV-NEXT: stw r17, 292(r1) # 4-byte Folded Spill
; BE-32BIT-P8-PRIV-NEXT: stxvd2x v20, r1, r4 # 16-byte Folded Spill
; BE-32BIT-P8-PRIV-NEXT: li r4, 96
; BE-32BIT-P8-PRIV-NEXT: stw r14, 280(r1) # 4-byte Folded Spill
; BE-32BIT-P8-PRIV-NEXT: stw r18, 296(r1) # 4-byte Folded Spill
; BE-32BIT-P8-PRIV-NEXT: stw r19, 300(r1) # 4-byte Folded Spill
; BE-32BIT-P8-PRIV-NEXT: stw r20, 304(r1) # 4-byte Folded Spill
; BE-32BIT-P8-PRIV-NEXT: stw r21, 308(r1) # 4-byte Folded Spill
; BE-32BIT-P8-PRIV-NEXT: stw r22, 312(r1) # 4-byte Folded Spill
; BE-32BIT-P8-PRIV-NEXT: stw r23, 316(r1) # 4-byte Folded Spill
; BE-32BIT-P8-PRIV-NEXT: stxvd2x v21, r1, r4 # 16-byte Folded Spill
; BE-32BIT-P8-PRIV-NEXT: li r4, 112
; BE-32BIT-P8-PRIV-NEXT: stw r15, 284(r1) # 4-byte Folded Spill
; BE-32BIT-P8-PRIV-NEXT: stxvd2x v22, r1, r4 # 16-byte Folded Spill
; BE-32BIT-P8-PRIV-NEXT: li r4, 128
; BE-32BIT-P8-PRIV-NEXT: stw r16, 288(r1) # 4-byte Folded Spill
; BE-32BIT-P8-PRIV-NEXT: stxvd2x v23, r1, r4 # 16-byte Folded Spill
; BE-32BIT-P8-PRIV-NEXT: li r4, 144
; BE-32BIT-P8-PRIV-NEXT: stw r17, 292(r1) # 4-byte Folded Spill
; BE-32BIT-P8-PRIV-NEXT: stxvd2x v24, r1, r4 # 16-byte Folded Spill
; BE-32BIT-P8-PRIV-NEXT: li r4, 160
; BE-32BIT-P8-PRIV-NEXT: stw r18, 296(r1) # 4-byte Folded Spill
; BE-32BIT-P8-PRIV-NEXT: stxvd2x v25, r1, r4 # 16-byte Folded Spill
; BE-32BIT-P8-PRIV-NEXT: li r4, 176
; BE-32BIT-P8-PRIV-NEXT: stw r19, 300(r1) # 4-byte Folded Spill
; BE-32BIT-P8-PRIV-NEXT: stxvd2x v26, r1, r4 # 16-byte Folded Spill
; BE-32BIT-P8-PRIV-NEXT: li r4, 192
; BE-32BIT-P8-PRIV-NEXT: stw r20, 304(r1) # 4-byte Folded Spill
; BE-32BIT-P8-PRIV-NEXT: stxvd2x v27, r1, r4 # 16-byte Folded Spill
; BE-32BIT-P8-PRIV-NEXT: li r4, 208
; BE-32BIT-P8-PRIV-NEXT: stw r21, 308(r1) # 4-byte Folded Spill
; BE-32BIT-P8-PRIV-NEXT: stxvd2x v28, r1, r4 # 16-byte Folded Spill
; BE-32BIT-P8-PRIV-NEXT: li r4, 224
; BE-32BIT-P8-PRIV-NEXT: stw r22, 312(r1) # 4-byte Folded Spill
; BE-32BIT-P8-PRIV-NEXT: stxvd2x v29, r1, r4 # 16-byte Folded Spill
; BE-32BIT-P8-PRIV-NEXT: li r4, 240
; BE-32BIT-P8-PRIV-NEXT: stw r23, 316(r1) # 4-byte Folded Spill
; BE-32BIT-P8-PRIV-NEXT: stxvd2x v30, r1, r4 # 16-byte Folded Spill
; BE-32BIT-P8-PRIV-NEXT: li r4, 256
; BE-32BIT-P8-PRIV-NEXT: stw r24, 320(r1) # 4-byte Folded Spill
; BE-32BIT-P8-PRIV-NEXT: stxvd2x v31, r1, r4 # 16-byte Folded Spill
; BE-32BIT-P8-PRIV-NEXT: lwz r4, 12(r3)
; BE-32BIT-P8-PRIV-NEXT: stw r25, 324(r1) # 4-byte Folded Spill
; BE-32BIT-P8-PRIV-NEXT: stw r26, 328(r1) # 4-byte Folded Spill
; BE-32BIT-P8-PRIV-NEXT: stw r27, 332(r1) # 4-byte Folded Spill
; BE-32BIT-P8-PRIV-NEXT: stw r28, 336(r1) # 4-byte Folded Spill
; BE-32BIT-P8-PRIV-NEXT: stw r29, 340(r1) # 4-byte Folded Spill
; BE-32BIT-P8-PRIV-NEXT: stxvd2x v22, r1, r4 # 16-byte Folded Spill
; BE-32BIT-P8-PRIV-NEXT: li r4, 128
; BE-32BIT-P8-PRIV-NEXT: stw r30, 344(r1) # 4-byte Folded Spill
; BE-32BIT-P8-PRIV-NEXT: stw r31, 348(r1) # 4-byte Folded Spill
; BE-32BIT-P8-PRIV-NEXT: stfd f14, 352(r1) # 8-byte Folded Spill
; BE-32BIT-P8-PRIV-NEXT: stfd f15, 360(r1) # 8-byte Folded Spill
; BE-32BIT-P8-PRIV-NEXT: stfd f16, 368(r1) # 8-byte Folded Spill
; BE-32BIT-P8-PRIV-NEXT: stfd f17, 376(r1) # 8-byte Folded Spill
; BE-32BIT-P8-PRIV-NEXT: stxvd2x v23, r1, r4 # 16-byte Folded Spill
; BE-32BIT-P8-PRIV-NEXT: li r4, 144
; BE-32BIT-P8-PRIV-NEXT: stfd f18, 384(r1) # 8-byte Folded Spill
; BE-32BIT-P8-PRIV-NEXT: stfd f19, 392(r1) # 8-byte Folded Spill
; BE-32BIT-P8-PRIV-NEXT: stfd f20, 400(r1) # 8-byte Folded Spill
; BE-32BIT-P8-PRIV-NEXT: stfd f21, 408(r1) # 8-byte Folded Spill
; BE-32BIT-P8-PRIV-NEXT: stfd f22, 416(r1) # 8-byte Folded Spill
; BE-32BIT-P8-PRIV-NEXT: stfd f23, 424(r1) # 8-byte Folded Spill
; BE-32BIT-P8-PRIV-NEXT: stxvd2x v24, r1, r4 # 16-byte Folded Spill
; BE-32BIT-P8-PRIV-NEXT: li r4, 160
; BE-32BIT-P8-PRIV-NEXT: stfd f24, 432(r1) # 8-byte Folded Spill
; BE-32BIT-P8-PRIV-NEXT: stfd f25, 440(r1) # 8-byte Folded Spill
; BE-32BIT-P8-PRIV-NEXT: stfd f26, 448(r1) # 8-byte Folded Spill
; BE-32BIT-P8-PRIV-NEXT: stfd f27, 456(r1) # 8-byte Folded Spill
; BE-32BIT-P8-PRIV-NEXT: stfd f28, 464(r1) # 8-byte Folded Spill
; BE-32BIT-P8-PRIV-NEXT: stfd f29, 472(r1) # 8-byte Folded Spill
; BE-32BIT-P8-PRIV-NEXT: stxvd2x v25, r1, r4 # 16-byte Folded Spill
; BE-32BIT-P8-PRIV-NEXT: li r4, 176
; BE-32BIT-P8-PRIV-NEXT: stfd f30, 480(r1) # 8-byte Folded Spill
; BE-32BIT-P8-PRIV-NEXT: stfd f31, 488(r1) # 8-byte Folded Spill
; BE-32BIT-P8-PRIV-NEXT: stw r3, 64(r1) # 4-byte Folded Spill
; BE-32BIT-P8-PRIV-NEXT: stxvd2x v26, r1, r4 # 16-byte Folded Spill
; BE-32BIT-P8-PRIV-NEXT: li r4, 192
; BE-32BIT-P8-PRIV-NEXT: stxvd2x v27, r1, r4 # 16-byte Folded Spill
; BE-32BIT-P8-PRIV-NEXT: li r4, 208
; BE-32BIT-P8-PRIV-NEXT: stxvd2x v28, r1, r4 # 16-byte Folded Spill
; BE-32BIT-P8-PRIV-NEXT: li r4, 224
; BE-32BIT-P8-PRIV-NEXT: stxvd2x v29, r1, r4 # 16-byte Folded Spill
; BE-32BIT-P8-PRIV-NEXT: li r4, 240
; BE-32BIT-P8-PRIV-NEXT: stxvd2x v30, r1, r4 # 16-byte Folded Spill
; BE-32BIT-P8-PRIV-NEXT: li r4, 256
; BE-32BIT-P8-PRIV-NEXT: stxvd2x v31, r1, r4 # 16-byte Folded Spill
; BE-32BIT-P8-PRIV-NEXT: lwz r4, 12(r3)
; BE-32BIT-P8-PRIV-NEXT: stw r4, 68(r1)
; BE-32BIT-P8-PRIV-NEXT: #APP
; BE-32BIT-P8-PRIV-NEXT: nop
@@ -1837,55 +1837,55 @@ define dso_local zeroext i32 @spill(ptr nocapture readonly %in) #0 {
; BE-32BIT-P8-PRIV-NEXT: lfd f28, 464(r1) # 8-byte Folded Reload
; BE-32BIT-P8-PRIV-NEXT: lwz r30, 344(r1) # 4-byte Folded Reload
; BE-32BIT-P8-PRIV-NEXT: lwz r29, 340(r1) # 4-byte Folded Reload
; BE-32BIT-P8-PRIV-NEXT: lwz r4, 16(r4)
; BE-32BIT-P8-PRIV-NEXT: lfd f27, 456(r1) # 8-byte Folded Reload
; BE-32BIT-P8-PRIV-NEXT: lfd f26, 448(r1) # 8-byte Folded Reload
; BE-32BIT-P8-PRIV-NEXT: lwz r28, 336(r1) # 4-byte Folded Reload
; BE-32BIT-P8-PRIV-NEXT: lwz r27, 332(r1) # 4-byte Folded Reload
; BE-32BIT-P8-PRIV-NEXT: lwz r4, 16(r4)
; BE-32BIT-P8-PRIV-NEXT: lfd f25, 440(r1) # 8-byte Folded Reload
; BE-32BIT-P8-PRIV-NEXT: lfd f24, 432(r1) # 8-byte Folded Reload
; BE-32BIT-P8-PRIV-NEXT: lwz r27, 332(r1) # 4-byte Folded Reload
; BE-32BIT-P8-PRIV-NEXT: lwz r26, 328(r1) # 4-byte Folded Reload
; BE-32BIT-P8-PRIV-NEXT: add r3, r4, r3
; BE-32BIT-P8-PRIV-NEXT: li r4, 256
; BE-32BIT-P8-PRIV-NEXT: lfd f23, 424(r1) # 8-byte Folded Reload
; BE-32BIT-P8-PRIV-NEXT: lfd f22, 416(r1) # 8-byte Folded Reload
; BE-32BIT-P8-PRIV-NEXT: lwz r25, 324(r1) # 4-byte Folded Reload
; BE-32BIT-P8-PRIV-NEXT: lwz r24, 320(r1) # 4-byte Folded Reload
; BE-32BIT-P8-PRIV-NEXT: lxvd2x v31, r1, r4 # 16-byte Folded Reload
; BE-32BIT-P8-PRIV-NEXT: li r4, 240
; BE-32BIT-P8-PRIV-NEXT: lfd f21, 408(r1) # 8-byte Folded Reload
; BE-32BIT-P8-PRIV-NEXT: lfd f20, 400(r1) # 8-byte Folded Reload
; BE-32BIT-P8-PRIV-NEXT: lwz r23, 316(r1) # 4-byte Folded Reload
; BE-32BIT-P8-PRIV-NEXT: lwz r22, 312(r1) # 4-byte Folded Reload
; BE-32BIT-P8-PRIV-NEXT: lxvd2x v30, r1, r4 # 16-byte Folded Reload
; BE-32BIT-P8-PRIV-NEXT: li r4, 224
; BE-32BIT-P8-PRIV-NEXT: lfd f20, 400(r1) # 8-byte Folded Reload
; BE-32BIT-P8-PRIV-NEXT: add r3, r4, r3
; BE-32BIT-P8-PRIV-NEXT: li r4, 256
; BE-32BIT-P8-PRIV-NEXT: lfd f19, 392(r1) # 8-byte Folded Reload
; BE-32BIT-P8-PRIV-NEXT: lfd f18, 384(r1) # 8-byte Folded Reload
; BE-32BIT-P8-PRIV-NEXT: lfd f17, 376(r1) # 8-byte Folded Reload
; BE-32BIT-P8-PRIV-NEXT: lfd f16, 368(r1) # 8-byte Folded Reload
; BE-32BIT-P8-PRIV-NEXT: lwz r21, 308(r1) # 4-byte Folded Reload
; BE-32BIT-P8-PRIV-NEXT: lwz r20, 304(r1) # 4-byte Folded Reload
; BE-32BIT-P8-PRIV-NEXT: lxvd2x v29, r1, r4 # 16-byte Folded Reload
; BE-32BIT-P8-PRIV-NEXT: li r4, 208
; BE-32BIT-P8-PRIV-NEXT: lfd f19, 392(r1) # 8-byte Folded Reload
; BE-32BIT-P8-PRIV-NEXT: lxvd2x v31, r1, r4 # 16-byte Folded Reload
; BE-32BIT-P8-PRIV-NEXT: li r4, 240
; BE-32BIT-P8-PRIV-NEXT: lfd f15, 360(r1) # 8-byte Folded Reload
; BE-32BIT-P8-PRIV-NEXT: lwz r19, 300(r1) # 4-byte Folded Reload
; BE-32BIT-P8-PRIV-NEXT: lfd f14, 352(r1) # 8-byte Folded Reload
; BE-32BIT-P8-PRIV-NEXT: lwz r18, 296(r1) # 4-byte Folded Reload
; BE-32BIT-P8-PRIV-NEXT: lxvd2x v28, r1, r4 # 16-byte Folded Reload
; BE-32BIT-P8-PRIV-NEXT: li r4, 192
; BE-32BIT-P8-PRIV-NEXT: lfd f18, 384(r1) # 8-byte Folded Reload
; BE-32BIT-P8-PRIV-NEXT: lwz r17, 292(r1) # 4-byte Folded Reload
; BE-32BIT-P8-PRIV-NEXT: lwz r16, 288(r1) # 4-byte Folded Reload
; BE-32BIT-P8-PRIV-NEXT: lxvd2x v27, r1, r4 # 16-byte Folded Reload
; BE-32BIT-P8-PRIV-NEXT: li r4, 176
; BE-32BIT-P8-PRIV-NEXT: lfd f17, 376(r1) # 8-byte Folded Reload
; BE-32BIT-P8-PRIV-NEXT: lxvd2x v30, r1, r4 # 16-byte Folded Reload
; BE-32BIT-P8-PRIV-NEXT: li r4, 224
; BE-32BIT-P8-PRIV-NEXT: lwz r15, 284(r1) # 4-byte Folded Reload
; BE-32BIT-P8-PRIV-NEXT: lwz r14, 280(r1) # 4-byte Folded Reload
; BE-32BIT-P8-PRIV-NEXT: lwz r13, 276(r1) # 4-byte Folded Reload
; BE-32BIT-P8-PRIV-NEXT: lxvd2x v29, r1, r4 # 16-byte Folded Reload
; BE-32BIT-P8-PRIV-NEXT: li r4, 208
; BE-32BIT-P8-PRIV-NEXT: lxvd2x v28, r1, r4 # 16-byte Folded Reload
; BE-32BIT-P8-PRIV-NEXT: li r4, 192
; BE-32BIT-P8-PRIV-NEXT: lxvd2x v27, r1, r4 # 16-byte Folded Reload
; BE-32BIT-P8-PRIV-NEXT: li r4, 176
; BE-32BIT-P8-PRIV-NEXT: lxvd2x v26, r1, r4 # 16-byte Folded Reload
; BE-32BIT-P8-PRIV-NEXT: li r4, 160
; BE-32BIT-P8-PRIV-NEXT: lfd f16, 368(r1) # 8-byte Folded Reload
; BE-32BIT-P8-PRIV-NEXT: lwz r13, 276(r1) # 4-byte Folded Reload
; BE-32BIT-P8-PRIV-NEXT: lxvd2x v25, r1, r4 # 16-byte Folded Reload
; BE-32BIT-P8-PRIV-NEXT: li r4, 144
; BE-32BIT-P8-PRIV-NEXT: lfd f15, 360(r1) # 8-byte Folded Reload
; BE-32BIT-P8-PRIV-NEXT: lxvd2x v24, r1, r4 # 16-byte Folded Reload
; BE-32BIT-P8-PRIV-NEXT: li r4, 128
; BE-32BIT-P8-PRIV-NEXT: lfd f14, 352(r1) # 8-byte Folded Reload
; BE-32BIT-P8-PRIV-NEXT: lxvd2x v23, r1, r4 # 16-byte Folded Reload
; BE-32BIT-P8-PRIV-NEXT: li r4, 112
; BE-32BIT-P8-PRIV-NEXT: lxvd2x v22, r1, r4 # 16-byte Folded Reload
@@ -1896,9 +1896,9 @@ define dso_local zeroext i32 @spill(ptr nocapture readonly %in) #0 {
; BE-32BIT-P8-PRIV-NEXT: addi r1, r1, 496
; BE-32BIT-P8-PRIV-NEXT: lwz r0, 8(r1)
; BE-32BIT-P8-PRIV-NEXT: lwz r12, 4(r1)
; BE-32BIT-P8-PRIV-NEXT: mtocrf 32, r12
; BE-32BIT-P8-PRIV-NEXT: hashchkp r0, -424(r1)
; BE-32BIT-P8-PRIV-NEXT: mtlr r0
; BE-32BIT-P8-PRIV-NEXT: mtocrf 32, r12
; BE-32BIT-P8-PRIV-NEXT: mtocrf 16, r12
; BE-32BIT-P8-PRIV-NEXT: mtocrf 8, r12
; BE-32BIT-P8-PRIV-NEXT: blr
@@ -2082,8 +2082,8 @@ define dso_local zeroext i32 @shrinkwrap(ptr readonly %in) #0 {
; BE-32BIT-P8-NEXT: add r3, r4, r3
; BE-32BIT-P8-NEXT: addi r1, r1, 80
; BE-32BIT-P8-NEXT: lwz r0, 8(r1)
; BE-32BIT-P8-NEXT: hashchk r0, -16(r1)
; BE-32BIT-P8-NEXT: mtlr r0
; BE-32BIT-P8-NEXT: hashchk r0, -16(r1)
; BE-32BIT-P8-NEXT: blr
; BE-32BIT-P8-NEXT: L..BB2_2:
; BE-32BIT-P8-NEXT: li r3, 0
@@ -2253,8 +2253,8 @@ define dso_local zeroext i32 @shrinkwrap(ptr readonly %in) #0 {
; BE-32BIT-P8-PRIV-NEXT: add r3, r4, r3
; BE-32BIT-P8-PRIV-NEXT: addi r1, r1, 80
; BE-32BIT-P8-PRIV-NEXT: lwz r0, 8(r1)
; BE-32BIT-P8-PRIV-NEXT: hashchkp r0, -16(r1)
; BE-32BIT-P8-PRIV-NEXT: mtlr r0
; BE-32BIT-P8-PRIV-NEXT: hashchkp r0, -16(r1)
; BE-32BIT-P8-PRIV-NEXT: blr
; BE-32BIT-P8-PRIV-NEXT: L..BB2_2:
; BE-32BIT-P8-PRIV-NEXT: li r3, 0
@@ -2379,25 +2379,25 @@ define dso_local zeroext i32 @aligned(ptr nocapture readonly %in) #0 {
; BE-P8-NEXT: clrldi r0, r1, 49
; BE-P8-NEXT: subc r0, r12, r0
; BE-P8-NEXT: stdux r1, r1, r0
; BE-P8-NEXT: lis r4, 0
; BE-P8-NEXT: std r31, -8(r30) # 8-byte Folded Spill
; BE-P8-NEXT: mr r31, r3
; BE-P8-NEXT: lwz r3, 4(r3)
; BE-P8-NEXT: lis r6, 0
; BE-P8-NEXT: ori r6, r6, 65508
; BE-P8-NEXT: lwz r4, 12(r31)
; BE-P8-NEXT: lwz r5, 20(r31)
; BE-P8-NEXT: stwx r3, r1, r6
; BE-P8-NEXT: lis r3, 0
; BE-P8-NEXT: ori r3, r3, 32768
; BE-P8-NEXT: stw r5, 32764(r1)
; BE-P8-NEXT: addi r5, r1, 32764
; BE-P8-NEXT: stwx r4, r1, r3
; BE-P8-NEXT: lis r3, 0
; BE-P8-NEXT: lis r4, 0
; BE-P8-NEXT: ori r3, r3, 32768
; BE-P8-NEXT: ori r4, r4, 65508
; BE-P8-NEXT: add r3, r1, r3
; BE-P8-NEXT: stwx r3, r1, r4
; BE-P8-NEXT: lis r4, 0
; BE-P8-NEXT: lwz r3, 12(r31)
; BE-P8-NEXT: ori r4, r4, 32768
; BE-P8-NEXT: stwx r3, r1, r4
; BE-P8-NEXT: lwz r3, 20(r31)
; BE-P8-NEXT: lis r4, 0
; BE-P8-NEXT: ori r4, r4, 65508
; BE-P8-NEXT: stw r3, 32764(r1)
; BE-P8-NEXT: lis r3, 0
; BE-P8-NEXT: add r4, r1, r4
; BE-P8-NEXT: ori r3, r3, 32768
; BE-P8-NEXT: add r3, r1, r3
; BE-P8-NEXT: bl .callee3[PR]
; BE-P8-NEXT: nop
; BE-P8-NEXT: lwz r4, 16(r31)
@@ -2506,25 +2506,25 @@ define dso_local zeroext i32 @aligned(ptr nocapture readonly %in) #0 {
; BE-32BIT-P8-NEXT: clrlwi r0, r1, 17
; BE-32BIT-P8-NEXT: subc r0, r12, r0
; BE-32BIT-P8-NEXT: stwux r1, r1, r0
; BE-32BIT-P8-NEXT: lis r4, 0
; BE-32BIT-P8-NEXT: stw r31, -4(r30) # 4-byte Folded Spill
; BE-32BIT-P8-NEXT: mr r31, r3
; BE-32BIT-P8-NEXT: lwz r3, 4(r3)
; BE-32BIT-P8-NEXT: lis r6, 0
; BE-32BIT-P8-NEXT: ori r6, r6, 65516
; BE-32BIT-P8-NEXT: lwz r4, 12(r31)
; BE-32BIT-P8-NEXT: lwz r5, 20(r31)
; BE-32BIT-P8-NEXT: stwx r3, r1, r6
; BE-32BIT-P8-NEXT: lis r3, 0
; BE-32BIT-P8-NEXT: ori r3, r3, 32768
; BE-32BIT-P8-NEXT: stw r5, 32764(r1)
; BE-32BIT-P8-NEXT: addi r5, r1, 32764
; BE-32BIT-P8-NEXT: stwx r4, r1, r3
; BE-32BIT-P8-NEXT: lis r3, 0
; BE-32BIT-P8-NEXT: lis r4, 0
; BE-32BIT-P8-NEXT: ori r3, r3, 32768
; BE-32BIT-P8-NEXT: ori r4, r4, 65516
; BE-32BIT-P8-NEXT: add r3, r1, r3
; BE-32BIT-P8-NEXT: stwx r3, r1, r4
; BE-32BIT-P8-NEXT: lis r4, 0
; BE-32BIT-P8-NEXT: lwz r3, 12(r31)
; BE-32BIT-P8-NEXT: ori r4, r4, 32768
; BE-32BIT-P8-NEXT: stwx r3, r1, r4
; BE-32BIT-P8-NEXT: lwz r3, 20(r31)
; BE-32BIT-P8-NEXT: lis r4, 0
; BE-32BIT-P8-NEXT: ori r4, r4, 65516
; BE-32BIT-P8-NEXT: stw r3, 32764(r1)
; BE-32BIT-P8-NEXT: lis r3, 0
; BE-32BIT-P8-NEXT: add r4, r1, r4
; BE-32BIT-P8-NEXT: ori r3, r3, 32768
; BE-32BIT-P8-NEXT: add r3, r1, r3
; BE-32BIT-P8-NEXT: bl .callee3[PR]
; BE-32BIT-P8-NEXT: nop
; BE-32BIT-P8-NEXT: lwz r4, 16(r31)
@@ -2634,25 +2634,25 @@ define dso_local zeroext i32 @aligned(ptr nocapture readonly %in) #0 {
; BE-P8-PRIV-NEXT: clrldi r0, r1, 49
; BE-P8-PRIV-NEXT: subc r0, r12, r0
; BE-P8-PRIV-NEXT: stdux r1, r1, r0
; BE-P8-PRIV-NEXT: lis r4, 0
; BE-P8-PRIV-NEXT: std r31, -8(r30) # 8-byte Folded Spill
; BE-P8-PRIV-NEXT: mr r31, r3
; BE-P8-PRIV-NEXT: lwz r3, 4(r3)
; BE-P8-PRIV-NEXT: lis r6, 0
; BE-P8-PRIV-NEXT: ori r6, r6, 65508
; BE-P8-PRIV-NEXT: lwz r4, 12(r31)
; BE-P8-PRIV-NEXT: lwz r5, 20(r31)
; BE-P8-PRIV-NEXT: stwx r3, r1, r6
; BE-P8-PRIV-NEXT: lis r3, 0
; BE-P8-PRIV-NEXT: ori r3, r3, 32768
; BE-P8-PRIV-NEXT: stw r5, 32764(r1)
; BE-P8-PRIV-NEXT: addi r5, r1, 32764
; BE-P8-PRIV-NEXT: stwx r4, r1, r3
; BE-P8-PRIV-NEXT: lis r3, 0
; BE-P8-PRIV-NEXT: lis r4, 0
; BE-P8-PRIV-NEXT: ori r3, r3, 32768
; BE-P8-PRIV-NEXT: ori r4, r4, 65508
; BE-P8-PRIV-NEXT: add r3, r1, r3
; BE-P8-PRIV-NEXT: stwx r3, r1, r4
; BE-P8-PRIV-NEXT: lis r4, 0
; BE-P8-PRIV-NEXT: lwz r3, 12(r31)
; BE-P8-PRIV-NEXT: ori r4, r4, 32768
; BE-P8-PRIV-NEXT: stwx r3, r1, r4
; BE-P8-PRIV-NEXT: lwz r3, 20(r31)
; BE-P8-PRIV-NEXT: lis r4, 0
; BE-P8-PRIV-NEXT: ori r4, r4, 65508
; BE-P8-PRIV-NEXT: stw r3, 32764(r1)
; BE-P8-PRIV-NEXT: lis r3, 0
; BE-P8-PRIV-NEXT: add r4, r1, r4
; BE-P8-PRIV-NEXT: ori r3, r3, 32768
; BE-P8-PRIV-NEXT: add r3, r1, r3
; BE-P8-PRIV-NEXT: bl .callee3[PR]
; BE-P8-PRIV-NEXT: nop
; BE-P8-PRIV-NEXT: lwz r4, 16(r31)
@@ -2761,25 +2761,25 @@ define dso_local zeroext i32 @aligned(ptr nocapture readonly %in) #0 {
; BE-32BIT-P8-PRIV-NEXT: clrlwi r0, r1, 17
; BE-32BIT-P8-PRIV-NEXT: subc r0, r12, r0
; BE-32BIT-P8-PRIV-NEXT: stwux r1, r1, r0
; BE-32BIT-P8-PRIV-NEXT: lis r4, 0
; BE-32BIT-P8-PRIV-NEXT: stw r31, -4(r30) # 4-byte Folded Spill
; BE-32BIT-P8-PRIV-NEXT: mr r31, r3
; BE-32BIT-P8-PRIV-NEXT: lwz r3, 4(r3)
; BE-32BIT-P8-PRIV-NEXT: lis r6, 0
; BE-32BIT-P8-PRIV-NEXT: ori r6, r6, 65516
; BE-32BIT-P8-PRIV-NEXT: lwz r4, 12(r31)
; BE-32BIT-P8-PRIV-NEXT: lwz r5, 20(r31)
; BE-32BIT-P8-PRIV-NEXT: stwx r3, r1, r6
; BE-32BIT-P8-PRIV-NEXT: lis r3, 0
; BE-32BIT-P8-PRIV-NEXT: ori r3, r3, 32768
; BE-32BIT-P8-PRIV-NEXT: stw r5, 32764(r1)
; BE-32BIT-P8-PRIV-NEXT: addi r5, r1, 32764
; BE-32BIT-P8-PRIV-NEXT: stwx r4, r1, r3
; BE-32BIT-P8-PRIV-NEXT: lis r3, 0
; BE-32BIT-P8-PRIV-NEXT: lis r4, 0
; BE-32BIT-P8-PRIV-NEXT: ori r3, r3, 32768
; BE-32BIT-P8-PRIV-NEXT: ori r4, r4, 65516
; BE-32BIT-P8-PRIV-NEXT: add r3, r1, r3
; BE-32BIT-P8-PRIV-NEXT: stwx r3, r1, r4
; BE-32BIT-P8-PRIV-NEXT: lis r4, 0
; BE-32BIT-P8-PRIV-NEXT: lwz r3, 12(r31)
; BE-32BIT-P8-PRIV-NEXT: ori r4, r4, 32768
; BE-32BIT-P8-PRIV-NEXT: stwx r3, r1, r4
; BE-32BIT-P8-PRIV-NEXT: lwz r3, 20(r31)
; BE-32BIT-P8-PRIV-NEXT: lis r4, 0
; BE-32BIT-P8-PRIV-NEXT: ori r4, r4, 65516
; BE-32BIT-P8-PRIV-NEXT: stw r3, 32764(r1)
; BE-32BIT-P8-PRIV-NEXT: lis r3, 0
; BE-32BIT-P8-PRIV-NEXT: add r4, r1, r4
; BE-32BIT-P8-PRIV-NEXT: ori r3, r3, 32768
; BE-32BIT-P8-PRIV-NEXT: add r3, r1, r3
; BE-32BIT-P8-PRIV-NEXT: bl .callee3[PR]
; BE-32BIT-P8-PRIV-NEXT: nop
; BE-32BIT-P8-PRIV-NEXT: lwz r4, 16(r31)

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