Fix regression tests with bad FileCheck checks (#140373)
Fixes https://github.com/llvm/llvm-project/issues/140149
This commit is contained in:
@@ -22,7 +22,7 @@ using A = S<T>;
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// CHECK-NEXT: `-ElaboratedType {{.*}} 'S<T>' sugar dependent
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// CHECK-NEXT: `-TemplateSpecializationType {{.*}} 'S<T>' dependent
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// CHECK-NEXT: |-name: 'S':'ns::S' qualified
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// CHECk-NEXT: | |-UsingShadowDecl {{.+}} ClassTemplate {{.+}} 'S'
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// CHECK-NEXT: | |-UsingShadowDecl {{.+}} ClassTemplate {{.+}} 'S'
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// TemplateName in TemplateArgument.
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template <template <typename> class T> class X {};
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@@ -55,4 +55,4 @@ using D = decltype(DeducedTemplateSpecializationT2);
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// CHECK-NEXT: `-ElaboratedType {{.*}} 'S2<int>' sugar
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// CHECK-NEXT: `-DeducedTemplateSpecializationType {{.*}} 'S2<int>' sugar
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// CHECK-NEXT: |-name: 'S2':'ns::S2' qualified
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//CHECk-NEXT: | |-UsingShadowDecl {{.+}} ClassTemplate {{.+}} 'S2'
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// CHECK-NEXT: | |-UsingShadowDecl {{.+}} ClassTemplate {{.+}} 'S2'
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@@ -71,7 +71,7 @@ test_alignr() {
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// CHECK-BE: call <16 x i8> @vec_sld(unsigned char vector[16], unsigned char vector[16], unsigned int)
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// CHECK-LE: call <16 x i8> @vec_reve(unsigned char vector[16])
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// CHECK-LE: call <16 x i8> @vec_reve(unsigned char vector[16])
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// CHECk-LE: call <16 x i8> @vec_sld(unsigned char vector[16], unsigned char vector[16], unsigned int)
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// CHECK-LE: call <16 x i8> @vec_sld(unsigned char vector[16], unsigned char vector[16], unsigned int)
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// CHECK-LE: call <16 x i8> @vec_reve(unsigned char vector[16])
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// CHECK: store <16 x i8> zeroinitializer, ptr %{{[0-9a-zA-Z_.]+}}, align 16
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// CHECK: store <2 x i64> zeroinitializer, ptr %{{[0-9a-zA-Z_.]+}}, align 16
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@@ -1833,14 +1833,14 @@ void test_mm256_storeu_pd(double* A, __m256d B) {
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void test_mm256_storeu_ps(float* A, __m256 B) {
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// CHECK-LABEL: test_mm256_storeu_ps
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// CHECK: store <8 x float> %{{.*}}, ptr %{{.*}}, align 1{{$}}
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// CHECk-NEXT: ret void
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// CHECK-NEXT: ret void
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_mm256_storeu_ps(A, B);
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}
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void test_mm256_storeu_si256(__m256i* A, __m256i B) {
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// CHECK-LABEL: test_mm256_storeu_si256
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// CHECK: store <4 x i64> %{{.*}}, ptr %{{.*}}, align 1{{$}}
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// CHECk-NEXT: ret void
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// CHECK-NEXT: ret void
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_mm256_storeu_si256(A, B);
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}
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@@ -377,7 +377,7 @@ void foo18() {
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// CHECK-NEXT: [[A:%.*a.*]] = getelementptr inbounds nuw [[STRUCT_G]], ptr [[G]], i32 0, i32 0
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// CHECK-NEXT: store i32 2, ptr [[A]], align 4
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// CHECK-NEXT: [[F:%.*]] = getelementptr inbounds i8, ptr [[G]], i64 4
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// CHECk-NEXT: call void @{{.*F.*}}(ptr noundef nonnull align 1 dereferenceable(1)) [[F]], ie32 noundef 1)
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// CHECK-NEXT: call void @{{.*F.*}}(ptr noundef nonnull align 1 dereferenceable(1) [[F]], i32 noundef 1)
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// CHECK: ret void
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void foo19() {
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G g(2);
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@@ -14,7 +14,7 @@
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// CHECK-DAG: @"_TI5?AUY@@" = linkonce_odr unnamed_addr constant %eh.ThrowInfo { i32 0, ptr @"??_DY@@QAEXXZ", ptr null, ptr @"_CTA5?AUY@@" }, section ".xdata", comdat
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// CHECK-DAG: @"_CT??_R0?AUDefault@@@8??_ODefault@@QAEXAAU0@@Z1" = linkonce_odr unnamed_addr constant %eh.CatchableType { i32 0, ptr @"??_R0?AUDefault@@@8", i32 0, i32 -1, i32 0, i32 1, ptr @"??_ODefault@@QAEXAAU0@@Z" }, section ".xdata", comdat
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// CHECK-DAG: @"_CT??_R0?AUDeletedCopy@@@81" = linkonce_odr unnamed_addr constant %eh.CatchableType { i32 0, ptr @"??_R0?AUDeletedCopy@@@8", i32 0, i32 -1, i32 0, i32 1, ptr null }, section ".xdata", comdat
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// CHECk-DAG: @"_CT??_R0?AUMoveOnly@@@84" = linkonce_odr unnamed_addr constant %eh.CatchableType { i32 0, ptr @"??_R0?AUMoveOnly@@@8", i32 0, i321-1, i32 0, i32 4, ptr null }, section ".xdata", comda
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// CHECK-DAG: @"_CT??_R0?AUMoveOnly@@@84" = linkonce_odr unnamed_addr constant %eh.CatchableType { i32 0, ptr @"??_R0?AUMoveOnly@@@8", i32 0, i32 -1, i32 0, i32 4, ptr null }, section ".xdata", comdat
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// CHECK-DAG: @"_CT??_R0?AUVariadic@@@8??_OVariadic@@QAEXAAU0@@Z1" = linkonce_odr unnamed_addr constant %eh.CatchableType { i32 0, ptr @"??_R0?AUVariadic@@@8", i32 0, i32 -1, i32 0, i32 1, ptr @"??_OVariadic@@QAEXAAU0@@Z" }, section ".xdata", comdat
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// CHECK-DAG: @"_CT??_R0?AUTemplateWithDefault@@@8??$?_OH@TemplateWithDefault@@QAEXAAU0@@Z1" = linkonce_odr unnamed_addr constant %eh.CatchableType { i32 0, ptr @"??_R0?AUTemplateWithDefault@@@8", i32 0, i32 -1, i32 0, i32 1, ptr @"??$?_OH@TemplateWithDefault@@QAEXAAU0@@Z" }, section ".xdata", comdat
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// CHECK-DAG: @"_CTA2$$T" = linkonce_odr unnamed_addr constant %eh.CatchableTypeArray.2 { i32 2, [2 x ptr] [ptr @"_CT??_R0$$T@84", ptr @"_CT??_R0PAX@84"] }, section ".xdata", comdat
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@@ -169,7 +169,7 @@ void test_update_dpp_int(global int* out, int arg1, int arg2)
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// CHECK-LABEL: @test_update_dpp_long
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// CHECK: %0 = tail call{{.*}} i64 @llvm.amdgcn.update.dpp.i64(i64 %x, i64 %x, i32 257, i32 15, i32 15, i1 false)
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// CHECk-NEXT: store i64 %0,
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// CHECK-NEXT: store i64 %0,
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void test_update_dpp_long(long x, global long *p) {
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*p = __builtin_amdgcn_update_dpp(x, x, 0x101, 0xf, 0xf, 0);
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}
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@@ -14,7 +14,7 @@
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// RUN: | FileCheck --check-prefix=CHECK-V6M-C %s
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// CHECK-V6M-C: "{{.*}}clang{{.*}}" "-cc1" "-triple" "thumbv6m-unknown-none-eabi"
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// CHECK-V6M-C-SAME: "-internal-isystem" "{{.*}}/baremetal_default_sysroot{{[/\\]+}}bin{{[/\\]+}}..{{[/\\]+}}lib{{[/\\]+}}clang-runtimes{{[/\\]+}}armv6m-none-eabi{{[/\\]+}}include{{[/\\]+}}c++{{[/\\]+}}v1"
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// CHECk-V6M-C-SAME: "-internal-isystem" "{{.*}}/baremetal_default_sysroot{{[/\\]+}}bin{{[/\\]+}}..{{[/\\]+}}lib{{[/\\]+}}clang-runtimes{{[/\\]+}}armv6m-none-eabi{{[/\\]+}}include"
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// CHECK-V6M-C-SAME: "-internal-isystem" "{{.*}}/baremetal_default_sysroot{{[/\\]+}}bin{{[/\\]+}}..{{[/\\]+}}lib{{[/\\]+}}clang-runtimes{{[/\\]+}}armv6m-none-eabi{{[/\\]+}}include"
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// CHECK-V6M-C-SAME: "-x" "c++" "{{.*}}baremetal-sysroot.cpp"
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// CHECK-V6M-C-NEXT: "{{[^"]*}}ld{{(\.(lld|bfd|gold))?}}{{(\.exe)?}}" "{{.*}}.o" "-Bstatic"
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// CHECK-V6M-C-SAME: "-L{{.*}}/baremetal_default_sysroot{{[/\\]+}}bin{{[/\\]+}}..{{[/\\]+}}lib{{[/\\]+}}clang-runtimes{{[/\\]+}}armv6m-none-eabi{{[/\\]+}}lib"
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@@ -203,7 +203,7 @@
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// CHECK-RV64-SAME: "-resource-dir" "[[RESOURCE_DIR:[^"]+]]"
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// CHECK-RV64-SAME: "-isysroot" "[[SYSROOT:[^"]*]]"
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// CHECK-RV64-SAME: "-internal-isystem" "[[SYSROOT]]{{[/\\]+}}include{{[/\\]+}}c++{{[/\\]+}}v1"
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// CHECk-RV64-SAME: "-internal-isystem" "[[SYSROOT]]{{[/\\]+}}include"
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// CHECK-RV64-SAME: "-internal-isystem" "[[SYSROOT]]{{[/\\]+}}include"
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// CHECK-RV64-SAME: "-x" "c++" "{{.*}}baremetal.cpp"
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// CHECK-RV64-NEXT: ld{{(.exe)?}}" "{{.*}}.o" "-Bstatic"
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// CHECK-RV64-SAME: "-Lsome{{[/\\]+}}directory{{[/\\]+}}user{{[/\\]+}}asked{{[/\\]+}}for"
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@@ -337,7 +337,7 @@
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// CHECK-RV64FD-SAME: "-resource-dir" "[[RESOURCE_DIR:[^"]+]]"
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// CHECK-RV64FD-SAME: "-isysroot" "[[SYSROOT:[^"]*]]"
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// CHECK-RV64FD-SAME: "-internal-isystem" "[[SYSROOT]]{{[/\\]+}}rv64imafdc{{[/\\]+}}lp64d{{[/\\]+}}include{{[/\\]+}}c++{{[/\\]+}}v1"
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// CHECk-RV64FD-SAME: "-internal-isystem" "[[SYSROOT]]{{[/\\]+}}rv64imafdc{{[/\\]+}}lp64d{{[/\\]+}}include"
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// CHECK-RV64FD-SAME: "-internal-isystem" "[[SYSROOT]]{{[/\\]+}}rv64imafdc{{[/\\]+}}lp64d{{[/\\]+}}include"
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// CHECK-RV64FD-SAME: "-x" "c++" "{{.*}}baremetal.cpp"
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// CHECK-RV64FD-NEXT: ld{{(.exe)?}}" "{{.*}}.o" "-Bstatic"
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// CHECK-RV64FD-SAME: "-L[[SYSROOT:[^"]+]]{{[/\\]+}}rv64imafdc{{[/\\]+}}lp64d{{[/\\]+}}lib"
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@@ -11,7 +11,7 @@
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@interface Interface
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@property(class) int myInterfaceTypeProp;
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// CHECk-DAG: "!testRelLabel": "memberOf $ c:objc(cs)Interface(cpy)myInterfaceTypeProp $ c:objc(cs)Interface"
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// CHECK-DAG: "!testRelLabel": "memberOf $ c:objc(cs)Interface(cpy)myInterfaceTypeProp $ c:objc(cs)Interface"
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@property int myInterfaceInstanceProp;
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// CHECK-DAG: "!testRelLabel": "memberOf $ c:objc(cs)Interface(py)myInterfaceInstanceProp $ c:objc(cs)Interface"
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@end
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@@ -84,7 +84,7 @@ void TemplFunc(T t) {
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// CHECK-NEXT: ImplicitCastExpr {{.*}}'unsigned int'
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// CHECK-NEXT: CXXMemberCallExpr{{.*}}'unsigned int'
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// CHECK-NEXT: MemberExpr{{.*}}.operator unsigned int
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// CHECk-NEXT: DeclRefExpr{{.*}}'t' 'SomeStruct'
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// CHECK-NEXT: DeclRefExpr{{.*}}'t' 'SomeStruct'
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}
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struct SomeStruct{
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@@ -176,7 +176,7 @@ pacibsp_target:
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pacibsp
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ret
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// CHECk-PADS-LABEL: <bti_c_target>:
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// CHECK-PADS-LABEL: <bti_c_target>:
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// CHECK-PADS: 18001000: bti c
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// CHECK-PADS-NEXT: ret
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@@ -52,7 +52,7 @@ define i128 @fun3_cmp64(i64 %val1, i64 %val2,
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; CHECK-LABEL: 'fun3_cmp64'
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; CHECK: Cost Model: Found an estimated cost of 1 for instruction: %cmp = icmp slt i64 %val1, %val2
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; CHECK: Cost Model: Found an estimated cost of 1 for instruction: %add = add i128 %val3, %val4
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; CHECk: Cost Model: Found an estimated cost of 4 for instruction: %sel = select i1 %cmp, i128 %val3, i128 %add
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; CHECK: Cost Model: Found an estimated cost of 4 for instruction: %sel = select i1 %cmp, i128 %val3, i128 %add
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%cmp = icmp slt i64 %val1, %val2
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%add = add i128 %val3, %val4
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%sel = select i1 %cmp, i128 %val3, i128 %add
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@@ -38,7 +38,7 @@ define void @check_double() {
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; 64-bit ORR followed by MOVK.
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; CHECK-DAG: mov [[XFP0:x[0-9]+]], #1082331758844
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; CHECK-DAG: movk [[XFP0]], #64764, lsl #16
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; CHECk-DAG: fmov {{d[0-9]+}}, [[XFP0]]
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; CHECK-DAG: fmov {{d[0-9]+}}, [[XFP0]]
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%newval3 = fadd double %val, 0xFCFCFC00FC
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store volatile double %newval3, ptr @varf64
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@@ -121,7 +121,6 @@ define i32 @test_orr_extract_from_mul_1(i32 %x, i32 %y) {
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; CHECK-THUMB-NEXT: orrs r0, r1
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; CHECK-THUMB-NEXT: bx lr
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entry:
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; CHECk-THUMB: orrs r0, r1
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%mul = mul i32 %y, 63767
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%or = or i32 %mul, %x
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ret i32 %or
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@@ -22,7 +22,6 @@ define signext i8 @test1(i32 %A) {
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; CHECK-V7: @ %bb.0:
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; CHECK-V7-NEXT: sbfx r0, r0, #8, #8
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; CHECK-V7-NEXT: bx lr
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; CHECk-V7: sbfx r0, r0, #8, #8
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%B = lshr i32 %A, 8
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%C = shl i32 %A, 24
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%D = or i32 %B, %C
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@@ -406,7 +406,7 @@ for.cond.cleanup:
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; CHECK-MID: tB %bb.1
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; CHECK-MID: bb.1.while.body:
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; CHECK-MID: renamable $lr = t2LoopEndDec killed renamable $lr, %bb.1
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; CHECk-MID: tB %bb.2
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; CHECK-MID: tB %bb.2
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; CHECK-MID: bb.2.while.end:
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define void @check_negated_xor_wls(ptr nocapture %a, ptr nocapture readonly %b, i32 %N) {
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entry:
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@@ -440,7 +440,7 @@ while.end:
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; CHECK-MID: tB %bb.1
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; CHECK-MID: bb.1.while.body:
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; CHECK-MID: renamable $lr = t2LoopEndDec killed renamable $lr, %bb.1
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; CHECk-MID: tB %bb.2
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; CHECK-MID: tB %bb.2
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; CHECK-MID: bb.2.while.end:
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define void @check_negated_cmp_wls(ptr nocapture %a, ptr nocapture readonly %b, i32 %N) {
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entry:
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@@ -474,7 +474,7 @@ while.end:
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; CHECK-MID: tB %bb.1
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; CHECK-MID: bb.1.while.body:
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; CHECK-MID: renamable $lr = t2LoopEndDec killed renamable $lr, %bb.1
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; CHECk-MID: tB %bb.2
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; CHECK-MID: tB %bb.2
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; CHECK-MID: bb.2.while.end:
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define void @check_negated_reordered_wls(ptr nocapture %a, ptr nocapture readonly %b, i32 %N) {
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entry:
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@@ -72,7 +72,7 @@ declare void @dummy1(ptr, ptr, ptr, ptr, ptr, ptr)
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;CHECK: call void @dummy4()
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;CHECK-LABEL: NextCond.split:
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;CHECK: call void @dummy3()
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;CheCK-LABEL: CallSiteBB:
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;CHECK-LABEL: CallSiteBB:
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;CHECK: call void @foo(i1 %tobool1)
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define void @caller2(i1 %c, ptr %a_elt, ptr %b_elt, ptr %c_elt) {
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entry:
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@@ -37,7 +37,7 @@
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; CHECK-DAG: ![[UNALIGNED_UNKNOWN]] = !DIDerivedType(tag: DW_TAG_member, name: "_6",{{.*}}baseType: ![[UNALIGNED_UNKNOWN_BASE:[0-9]+]], size: 9
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; CHECK-DAG: ![[UNALIGNED_UNKNOWN_BASE]] = !DICompositeType(tag: DW_TAG_array_type, baseType: ![[UNKNOWN_TYPE_BASE]], size: 16,{{.*}} elements: ![[UNALIGNED_UNKNOWN_ELEMENTS:[0-9]+]])
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; CHECK-DAG: ![[UNALIGNED_UNKNOWN_ELEMENTS]] = !{![[UNALIGNED_UNKNOWN_SUBRANGE:[0-9]+]]}
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; CHECk-DAG: ![[UNALIGNED_UNKNOWN_SUBRANGE]] = !DISubrange(count: 2, lowerBound: 0)
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; CHECK-DAG: ![[UNALIGNED_UNKNOWN_SUBRANGE]] = !DISubrange(count: 2, lowerBound: 0)
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; CHECK-DAG: ![[STRUCT]] = !DIDerivedType(tag: DW_TAG_member, name: "struct_big_structure_7", scope: ![[FRAME_TYPE]], file: ![[FILE]], line: [[CORO_FRAME_LINE]], baseType: ![[STRUCT_BASE:[0-9]+]]
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; CHECK-DAG: ![[STRUCT_BASE]] = !DICompositeType(tag: DW_TAG_structure_type, name: "struct_big_structure"{{.*}}, align: 64, flags: DIFlagArtificial, elements: ![[STRUCT_ELEMENTS:[0-9]+]]
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; CHECK-DAG: ![[STRUCT_ELEMENTS]] = !{![[MEM_TYPE:[0-9]+]]}
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@@ -259,7 +259,7 @@ for.cond.cleanup: ; preds = %for.body
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define i4 @test_i4_load(ptr %ddst) {
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; CHECK-LABEL: define i4 @test_i4_load
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; CHECK-NOT: vector.body:
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; CHECk: ret i4 %{{.*}}
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; CHECK: ret i4 %{{.*}}
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;
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entry:
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br label %for.body
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@@ -282,7 +282,7 @@ define i8 @test_load_i8(ptr %ddst) {
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; CHECK-LABEL: @test_load_i8(
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; CHECK: vector.body:
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; CHECK: load <4 x i8>, ptr {{.*}}, align 1, !nontemporal !0
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; CHECk: ret i8 %{{.*}}
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; CHECK: ret i8 %{{.*}}
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;
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entry:
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br label %for.body
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@@ -305,7 +305,7 @@ define half @test_half_load(ptr %ddst) {
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; CHECK-LABEL: @test_half_load
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; CHECK-LABEL: vector.body:
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; CHECK: load <4 x half>, ptr {{.*}}, align 2, !nontemporal !0
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; CHECk: ret half %{{.*}}
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; CHECK: ret half %{{.*}}
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;
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entry:
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br label %for.body
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@@ -328,7 +328,7 @@ define i16 @test_i16_load(ptr %ddst) {
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; CHECK-LABEL: @test_i16_load
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; CHECK-LABEL: vector.body:
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; CHECK: load <4 x i16>, ptr {{.*}}, align 2, !nontemporal !0
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; CHECk: ret i16 %{{.*}}
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; CHECK: ret i16 %{{.*}}
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;
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entry:
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br label %for.body
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@@ -351,7 +351,7 @@ define i32 @test_i32_load(ptr %ddst) {
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; CHECK-LABEL: @test_i32_load
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; CHECK-LABEL: vector.body:
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; CHECK: load <4 x i32>, ptr {{.*}}, align 4, !nontemporal !0
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; CHECk: ret i32 %{{.*}}
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; CHECK: ret i32 %{{.*}}
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;
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entry:
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br label %for.body
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@@ -373,7 +373,7 @@ for.cond.cleanup: ; preds = %for.body
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define i33 @test_i33_load(ptr %ddst) {
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; CHECK-LABEL: @test_i33_load
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; CHECK-NOT: vector.body:
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; CHECk: ret i33 %{{.*}}
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; CHECK: ret i33 %{{.*}}
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;
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entry:
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br label %for.body
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@@ -395,7 +395,7 @@ for.cond.cleanup: ; preds = %for.body
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define i40 @test_i40_load(ptr %ddst) {
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; CHECK-LABEL: @test_i40_load
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; CHECK-NOT: vector.body:
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; CHECk: ret i40 %{{.*}}
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; CHECK: ret i40 %{{.*}}
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;
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entry:
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br label %for.body
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@@ -418,7 +418,7 @@ define i64 @test_i64_load(ptr %ddst) {
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; CHECK-LABEL: @test_i64_load
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||||
; CHECK-LABEL: vector.body:
|
||||
; CHECK: load <4 x i64>, ptr {{.*}}, align 4, !nontemporal !0
|
||||
; CHECk: ret i64 %{{.*}}
|
||||
; CHECK: ret i64 %{{.*}}
|
||||
;
|
||||
entry:
|
||||
br label %for.body
|
||||
@@ -441,7 +441,7 @@ define double @test_double_load(ptr %ddst) {
|
||||
; CHECK-LABEL: @test_double_load
|
||||
; CHECK-LABEL: vector.body:
|
||||
; CHECK: load <4 x double>, ptr {{.*}}, align 4, !nontemporal !0
|
||||
; CHECk: ret double %{{.*}}
|
||||
; CHECK: ret double %{{.*}}
|
||||
;
|
||||
entry:
|
||||
br label %for.body
|
||||
@@ -464,7 +464,7 @@ define i128 @test_i128_load(ptr %ddst) {
|
||||
; CHECK-LABEL: @test_i128_load
|
||||
; CHECK-LABEL: vector.body:
|
||||
; CHECK: load <4 x i128>, ptr {{.*}}, align 4, !nontemporal !0
|
||||
; CHECk: ret i128 %{{.*}}
|
||||
; CHECK: ret i128 %{{.*}}
|
||||
;
|
||||
entry:
|
||||
br label %for.body
|
||||
@@ -486,7 +486,7 @@ for.cond.cleanup: ; preds = %for.body
|
||||
define i256 @test_256_load(ptr %ddst) {
|
||||
; CHECK-LABEL: @test_256_load
|
||||
; CHECK-NOT: vector.body:
|
||||
; CHECk: ret i256 %{{.*}}
|
||||
; CHECK: ret i256 %{{.*}}
|
||||
;
|
||||
entry:
|
||||
br label %for.body
|
||||
|
||||
@@ -29,7 +29,7 @@ CHECK-SAME: {"branches":{"count":0,"covered":0,"notcovered":0,"percent":0},
|
||||
CHECK-SAME: "functions":{"count":1,"covered":1,"percent":100},
|
||||
CHECK-SAME: "instantiations":{"count":1,"covered":1,"percent":100},
|
||||
CHECK-SAME: "lines":{"count":1,"covered":1,"percent":100},
|
||||
CHECk-SAME: "mcdc":{"count":0,"covered":0,"notcovered":0,"percent":0},
|
||||
CHECK-SAME: "mcdc":{"count":0,"covered":0,"notcovered":0,"percent":0},
|
||||
CHECK-SAME: "regions":{"count":1,"covered":1,"notcovered":0,"percent":100}}}
|
||||
CHECK-SAME: ],
|
||||
CHECK-SAME: "type":"llvm.coverage.json.export"
|
||||
|
||||
@@ -3,7 +3,7 @@
|
||||
; Test the code generation in the presence of a scalar out-of-scop value being
|
||||
; used from within the SCoP.
|
||||
|
||||
; CHECH-LABEL: @scalar-function-argument
|
||||
; CHECK-LABEL: @scalar-function-argument
|
||||
; CHECK: polly.split_new_and_old
|
||||
|
||||
|
||||
@@ -26,7 +26,7 @@ for.end:
|
||||
ret void
|
||||
}
|
||||
|
||||
; CHECH-LABEL: @scalar-outside-of-scop
|
||||
; CHECK-LABEL: @scalar-outside-of-scop
|
||||
; CHECK: polly.split_new_and_old
|
||||
|
||||
define void @scalar-outside-of-scop(ptr %A) {
|
||||
|
||||
Reference in New Issue
Block a user