[LLVM][AArch64]Use load/store with consecutive registers in SME2 or S… (#77665)
…VE2.1 for spill/fill When possible the spill/fill register in Frame Lowering uses the ld/st consecutive pairs available in sme or sve2.1.
This commit is contained in:
CarolineConcatto
@@ -1508,6 +1508,9 @@ static bool IsSVECalleeSave(MachineBasicBlock::iterator I) {
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switch (I->getOpcode()) {
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default:
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return false;
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case AArch64::PTRUE_C_B:
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case AArch64::LD1B_2Z_IMM:
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case AArch64::ST1B_2Z_IMM:
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case AArch64::STR_ZXI:
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case AArch64::STR_PXI:
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case AArch64::LDR_ZXI:
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@@ -2781,6 +2784,16 @@ struct RegPairInfo {
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} // end anonymous namespace
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unsigned findFreePredicateReg(BitVector &SavedRegs) {
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for (unsigned PReg = AArch64::P8; PReg <= AArch64::P15; ++PReg) {
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if (SavedRegs.test(PReg)) {
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unsigned PNReg = PReg - AArch64::P0 + AArch64::PN0;
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return PNReg;
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}
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}
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return AArch64::NoRegister;
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}
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static void computeCalleeSaveRegisterPairs(
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MachineFunction &MF, ArrayRef<CalleeSavedInfo> CSI,
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const TargetRegisterInfo *TRI, SmallVectorImpl<RegPairInfo> &RegPairs,
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@@ -2859,7 +2872,11 @@ static void computeCalleeSaveRegisterPairs(
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RPI.Reg2 = NextReg;
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break;
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case RegPairInfo::PPR:
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break;
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case RegPairInfo::ZPR:
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if (AFI->getPredicateRegForFillSpill() != 0)
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if (((RPI.Reg1 - AArch64::Z0) & 1) == 0 && (NextReg == RPI.Reg1 + 1))
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RPI.Reg2 = NextReg;
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break;
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}
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}
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@@ -2897,14 +2914,13 @@ static void computeCalleeSaveRegisterPairs(
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if (NeedsWinCFI &&
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RPI.isPaired()) // RPI.FrameIdx must be the lower index of the pair
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RPI.FrameIdx = CSI[i + RegInc].getFrameIdx();
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int Scale = RPI.getScale();
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int OffsetPre = RPI.isScalable() ? ScalableByteOffset : ByteOffset;
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assert(OffsetPre % Scale == 0);
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if (RPI.isScalable())
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ScalableByteOffset += StackFillDir * Scale;
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ScalableByteOffset += StackFillDir * (RPI.isPaired() ? 2 * Scale : Scale);
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else
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ByteOffset += StackFillDir * (RPI.isPaired() ? 2 * Scale : Scale);
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@@ -2915,9 +2931,6 @@ static void computeCalleeSaveRegisterPairs(
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(IsWindows && RPI.Reg2 == AArch64::LR)))
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ByteOffset += StackFillDir * 8;
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assert(!(RPI.isScalable() && RPI.isPaired()) &&
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"Paired spill/fill instructions don't exist for SVE vectors");
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// Round up size of non-pair to pair size if we need to pad the
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// callee-save area to ensure 16-byte alignment.
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if (NeedGapToAlignStack && !NeedsWinCFI &&
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@@ -3004,6 +3017,7 @@ bool AArch64FrameLowering::spillCalleeSavedRegisters(
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}
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return true;
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}
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bool PTrueCreated = false;
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for (const RegPairInfo &RPI : llvm::reverse(RegPairs)) {
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unsigned Reg1 = RPI.Reg1;
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unsigned Reg2 = RPI.Reg2;
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@@ -3038,10 +3052,10 @@ bool AArch64FrameLowering::spillCalleeSavedRegisters(
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Alignment = Align(16);
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break;
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case RegPairInfo::ZPR:
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StrOpc = AArch64::STR_ZXI;
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Size = 16;
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Alignment = Align(16);
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break;
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StrOpc = RPI.isPaired() ? AArch64::ST1B_2Z_IMM : AArch64::STR_ZXI;
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Size = 16;
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Alignment = Align(16);
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break;
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case RegPairInfo::PPR:
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StrOpc = AArch64::STR_PXI;
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Size = 2;
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@@ -3065,33 +3079,79 @@ bool AArch64FrameLowering::spillCalleeSavedRegisters(
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std::swap(Reg1, Reg2);
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std::swap(FrameIdxReg1, FrameIdxReg2);
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}
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MachineInstrBuilder MIB = BuildMI(MBB, MI, DL, TII.get(StrOpc));
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if (!MRI.isReserved(Reg1))
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MBB.addLiveIn(Reg1);
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if (RPI.isPaired()) {
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if (RPI.isPaired() && RPI.isScalable()) {
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const AArch64Subtarget &Subtarget = MF.getSubtarget<AArch64Subtarget>();
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AArch64FunctionInfo *AFI = MF.getInfo<AArch64FunctionInfo>();
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unsigned PnReg = AFI->getPredicateRegForFillSpill();
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assert(((Subtarget.hasSVE2p1() || Subtarget.hasSME2()) && PnReg != 0) &&
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"Expects SVE2.1 or SME2 target and a predicate register");
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#ifdef EXPENSIVE_CHECKS
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auto IsPPR = [](const RegPairInfo &c) {
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return c.Reg1 == RegPairInfo::PPR;
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};
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auto PPRBegin = std::find_if(RegPairs.begin(), RegPairs.end(), IsPPR);
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auto IsZPR = [](const RegPairInfo &c) {
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return c.Type == RegPairInfo::ZPR;
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};
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auto ZPRBegin = std::find_if(RegPairs.begin(), RegPairs.end(), IsZPR);
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assert(!(PPRBegin < ZPRBegin) &&
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"Expected callee save predicate to be handled first");
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#endif
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if (!PTrueCreated) {
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PTrueCreated = true;
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BuildMI(MBB, MI, DL, TII.get(AArch64::PTRUE_C_B), PnReg)
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.setMIFlags(MachineInstr::FrameSetup);
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}
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MachineInstrBuilder MIB = BuildMI(MBB, MI, DL, TII.get(StrOpc));
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if (!MRI.isReserved(Reg1))
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MBB.addLiveIn(Reg1);
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if (!MRI.isReserved(Reg2))
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MBB.addLiveIn(Reg2);
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MIB.addReg(Reg2, getPrologueDeath(MF, Reg2));
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MIB.addReg(/*PairRegs*/ AArch64::Z0_Z1 + (RPI.Reg1 - AArch64::Z0));
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MIB.addMemOperand(MF.getMachineMemOperand(
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MachinePointerInfo::getFixedStack(MF, FrameIdxReg2),
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MachineMemOperand::MOStore, Size, Alignment));
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MIB.addReg(PnReg);
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MIB.addReg(AArch64::SP)
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.addImm(RPI.Offset) // [sp, #offset*scale],
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// where factor*scale is implicit
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.setMIFlag(MachineInstr::FrameSetup);
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MIB.addMemOperand(MF.getMachineMemOperand(
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MachinePointerInfo::getFixedStack(MF, FrameIdxReg1),
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MachineMemOperand::MOStore, Size, Alignment));
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if (NeedsWinCFI)
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InsertSEH(MIB, TII, MachineInstr::FrameSetup);
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} else { // The code when the pair of ZReg is not present
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MachineInstrBuilder MIB = BuildMI(MBB, MI, DL, TII.get(StrOpc));
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if (!MRI.isReserved(Reg1))
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MBB.addLiveIn(Reg1);
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if (RPI.isPaired()) {
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if (!MRI.isReserved(Reg2))
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MBB.addLiveIn(Reg2);
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MIB.addReg(Reg2, getPrologueDeath(MF, Reg2));
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MIB.addMemOperand(MF.getMachineMemOperand(
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MachinePointerInfo::getFixedStack(MF, FrameIdxReg2),
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MachineMemOperand::MOStore, Size, Alignment));
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}
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MIB.addReg(Reg1, getPrologueDeath(MF, Reg1))
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.addReg(AArch64::SP)
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.addImm(RPI.Offset) // [sp, #offset*scale],
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// where factor*scale is implicit
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.setMIFlag(MachineInstr::FrameSetup);
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MIB.addMemOperand(MF.getMachineMemOperand(
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MachinePointerInfo::getFixedStack(MF, FrameIdxReg1),
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MachineMemOperand::MOStore, Size, Alignment));
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if (NeedsWinCFI)
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InsertSEH(MIB, TII, MachineInstr::FrameSetup);
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}
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MIB.addReg(Reg1, getPrologueDeath(MF, Reg1))
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.addReg(AArch64::SP)
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.addImm(RPI.Offset) // [sp, #offset*scale],
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// where factor*scale is implicit
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.setMIFlag(MachineInstr::FrameSetup);
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MIB.addMemOperand(MF.getMachineMemOperand(
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MachinePointerInfo::getFixedStack(MF, FrameIdxReg1),
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MachineMemOperand::MOStore, Size, Alignment));
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if (NeedsWinCFI)
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InsertSEH(MIB, TII, MachineInstr::FrameSetup);
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// Update the StackIDs of the SVE stack slots.
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MachineFrameInfo &MFI = MF.getFrameInfo();
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if (RPI.Type == RegPairInfo::ZPR || RPI.Type == RegPairInfo::PPR)
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MFI.setStackID(RPI.FrameIdx, TargetStackID::ScalableVector);
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if (RPI.Type == RegPairInfo::ZPR || RPI.Type == RegPairInfo::PPR) {
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MFI.setStackID(FrameIdxReg1, TargetStackID::ScalableVector);
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if (RPI.isPaired())
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MFI.setStackID(FrameIdxReg2, TargetStackID::ScalableVector);
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}
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}
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return true;
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}
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@@ -3109,7 +3169,6 @@ bool AArch64FrameLowering::restoreCalleeSavedRegisters(
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DL = MBBI->getDebugLoc();
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computeCalleeSaveRegisterPairs(MF, CSI, TRI, RegPairs, hasFP(MF));
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if (homogeneousPrologEpilog(MF, &MBB)) {
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auto MIB = BuildMI(MBB, MBBI, DL, TII.get(AArch64::HOM_Epilog))
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.setMIFlag(MachineInstr::FrameDestroy);
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@@ -3130,6 +3189,7 @@ bool AArch64FrameLowering::restoreCalleeSavedRegisters(
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auto ZPREnd = std::find_if_not(ZPRBegin, RegPairs.end(), IsZPR);
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std::reverse(ZPRBegin, ZPREnd);
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bool PTrueCreated = false;
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for (const RegPairInfo &RPI : RegPairs) {
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unsigned Reg1 = RPI.Reg1;
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unsigned Reg2 = RPI.Reg2;
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@@ -3162,7 +3222,7 @@ bool AArch64FrameLowering::restoreCalleeSavedRegisters(
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Alignment = Align(16);
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break;
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case RegPairInfo::ZPR:
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LdrOpc = AArch64::LDR_ZXI;
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LdrOpc = RPI.isPaired() ? AArch64::LD1B_2Z_IMM : AArch64::LDR_ZXI;
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Size = 16;
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Alignment = Align(16);
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break;
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@@ -3187,25 +3247,58 @@ bool AArch64FrameLowering::restoreCalleeSavedRegisters(
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std::swap(Reg1, Reg2);
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std::swap(FrameIdxReg1, FrameIdxReg2);
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}
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MachineInstrBuilder MIB = BuildMI(MBB, MBBI, DL, TII.get(LdrOpc));
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if (RPI.isPaired()) {
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MIB.addReg(Reg2, getDefRegState(true));
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AArch64FunctionInfo *AFI = MF.getInfo<AArch64FunctionInfo>();
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if (RPI.isPaired() && RPI.isScalable()) {
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const AArch64Subtarget &Subtarget = MF.getSubtarget<AArch64Subtarget>();
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unsigned PnReg = AFI->getPredicateRegForFillSpill();
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assert(((Subtarget.hasSVE2p1() || Subtarget.hasSME2()) && PnReg != 0) &&
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"Expects SVE2.1 or SME2 target and a predicate register");
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#ifdef EXPENSIVE_CHECKS
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assert(!(PPRBegin < ZPRBegin) &&
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"Expected callee save predicate to be handled first");
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#endif
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if (!PTrueCreated) {
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PTrueCreated = true;
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BuildMI(MBB, MBBI, DL, TII.get(AArch64::PTRUE_C_B), PnReg)
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.setMIFlags(MachineInstr::FrameDestroy);
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}
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MachineInstrBuilder MIB = BuildMI(MBB, MBBI, DL, TII.get(LdrOpc));
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MIB.addReg(/*PairRegs*/ AArch64::Z0_Z1 + (RPI.Reg1 - AArch64::Z0),
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getDefRegState(true));
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MIB.addMemOperand(MF.getMachineMemOperand(
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MachinePointerInfo::getFixedStack(MF, FrameIdxReg2),
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MachineMemOperand::MOLoad, Size, Alignment));
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MIB.addReg(PnReg);
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MIB.addReg(AArch64::SP)
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.addImm(RPI.Offset) // [sp, #offset*scale]
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// where factor*scale is implicit
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.setMIFlag(MachineInstr::FrameDestroy);
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MIB.addMemOperand(MF.getMachineMemOperand(
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MachinePointerInfo::getFixedStack(MF, FrameIdxReg1),
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MachineMemOperand::MOLoad, Size, Alignment));
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if (NeedsWinCFI)
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InsertSEH(MIB, TII, MachineInstr::FrameDestroy);
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} else {
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MachineInstrBuilder MIB = BuildMI(MBB, MBBI, DL, TII.get(LdrOpc));
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if (RPI.isPaired()) {
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MIB.addReg(Reg2, getDefRegState(true));
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MIB.addMemOperand(MF.getMachineMemOperand(
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MachinePointerInfo::getFixedStack(MF, FrameIdxReg2),
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MachineMemOperand::MOLoad, Size, Alignment));
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}
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MIB.addReg(Reg1, getDefRegState(true));
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MIB.addReg(AArch64::SP)
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.addImm(RPI.Offset) // [sp, #offset*scale]
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// where factor*scale is implicit
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.setMIFlag(MachineInstr::FrameDestroy);
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MIB.addMemOperand(MF.getMachineMemOperand(
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MachinePointerInfo::getFixedStack(MF, FrameIdxReg1),
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MachineMemOperand::MOLoad, Size, Alignment));
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if (NeedsWinCFI)
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InsertSEH(MIB, TII, MachineInstr::FrameDestroy);
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}
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MIB.addReg(Reg1, getDefRegState(true))
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.addReg(AArch64::SP)
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.addImm(RPI.Offset) // [sp, #offset*scale]
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// where factor*scale is implicit
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.setMIFlag(MachineInstr::FrameDestroy);
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MIB.addMemOperand(MF.getMachineMemOperand(
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MachinePointerInfo::getFixedStack(MF, FrameIdxReg1),
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MachineMemOperand::MOLoad, Size, Alignment));
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if (NeedsWinCFI)
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InsertSEH(MIB, TII, MachineInstr::FrameDestroy);
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}
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return true;
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}
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@@ -3234,6 +3327,7 @@ void AArch64FrameLowering::determineCalleeSaves(MachineFunction &MF,
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unsigned ExtraCSSpill = 0;
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bool HasUnpairedGPR64 = false;
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bool HasPairZReg = false;
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// Figure out which callee-saved registers to save/restore.
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for (unsigned i = 0; CSRegs[i]; ++i) {
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const unsigned Reg = CSRegs[i];
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@@ -3287,6 +3381,28 @@ void AArch64FrameLowering::determineCalleeSaves(MachineFunction &MF,
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!RegInfo->isReservedReg(MF, PairedReg))
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ExtraCSSpill = PairedReg;
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}
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// Check if there is a pair of ZRegs, so it can select PReg for spill/fill
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HasPairZReg |= (AArch64::ZPRRegClass.contains(Reg, CSRegs[i ^ 1]) &&
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SavedRegs.test(CSRegs[i ^ 1]));
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}
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if (HasPairZReg && (Subtarget.hasSVE2p1() || Subtarget.hasSME2())) {
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AArch64FunctionInfo *AFI = MF.getInfo<AArch64FunctionInfo>();
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// Find a suitable predicate register for the multi-vector spill/fill
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// instructions.
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unsigned PnReg = findFreePredicateReg(SavedRegs);
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if (PnReg != AArch64::NoRegister)
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AFI->setPredicateRegForFillSpill(PnReg);
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// If no free callee-save has been found assign one.
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if (!AFI->getPredicateRegForFillSpill() &&
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MF.getFunction().getCallingConv() ==
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CallingConv::AArch64_SVE_VectorCall) {
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SavedRegs.set(AArch64::P8);
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AFI->setPredicateRegForFillSpill(AArch64::PN8);
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}
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assert(!RegInfo->isReservedReg(MF, AFI->getPredicateRegForFillSpill()) &&
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"Predicate cannot be a reserved register");
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}
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if (MF.getFunction().getCallingConv() == CallingConv::Win64 &&
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@@ -212,6 +212,10 @@ class AArch64FunctionInfo final : public MachineFunctionInfo {
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// on function entry to record the initial pstate of a function.
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Register PStateSMReg = MCRegister::NoRegister;
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// Has the PNReg used to build PTRUE instruction.
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// The PTRUE is used for the LD/ST of ZReg pairs in save and restore.
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unsigned PredicateRegForFillSpill = 0;
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public:
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AArch64FunctionInfo(const Function &F, const AArch64Subtarget *STI);
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@@ -220,6 +224,13 @@ public:
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const DenseMap<MachineBasicBlock *, MachineBasicBlock *> &Src2DstMBB)
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const override;
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void setPredicateRegForFillSpill(unsigned Reg) {
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PredicateRegForFillSpill = Reg;
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}
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unsigned getPredicateRegForFillSpill() const {
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return PredicateRegForFillSpill;
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}
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Register getPStateSMReg() const { return PStateSMReg; };
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void setPStateSMReg(Register Reg) { PStateSMReg = Reg; };
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File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
556
llvm/test/CodeGen/AArch64/sve-callee-save-restore-pairs.ll
Normal file
556
llvm/test/CodeGen/AArch64/sve-callee-save-restore-pairs.ll
Normal file
@@ -0,0 +1,556 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sme -verify-machineinstrs < %s | FileCheck %s --check-prefixes=NOPAIR
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; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve2 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=NOPAIR
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; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sme2 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=PAIR
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; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve2p1 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=PAIR
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declare void @my_func()
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define void @fbyte(<vscale x 16 x i8> %v) {
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; NOPAIR-LABEL: fbyte:
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; NOPAIR: // %bb.0:
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; NOPAIR-NEXT: stp x29, x30, [sp, #-16]! // 16-byte Folded Spill
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; NOPAIR-NEXT: addvl sp, sp, #-18
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; NOPAIR-NEXT: str p15, [sp, #4, mul vl] // 2-byte Folded Spill
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; NOPAIR-NEXT: str p14, [sp, #5, mul vl] // 2-byte Folded Spill
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; NOPAIR-NEXT: str p13, [sp, #6, mul vl] // 2-byte Folded Spill
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; NOPAIR-NEXT: str p12, [sp, #7, mul vl] // 2-byte Folded Spill
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; NOPAIR-NEXT: str p11, [sp, #8, mul vl] // 2-byte Folded Spill
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; NOPAIR-NEXT: str p10, [sp, #9, mul vl] // 2-byte Folded Spill
|
||||
; NOPAIR-NEXT: str p9, [sp, #10, mul vl] // 2-byte Folded Spill
|
||||
; NOPAIR-NEXT: str p8, [sp, #11, mul vl] // 2-byte Folded Spill
|
||||
; NOPAIR-NEXT: str p7, [sp, #12, mul vl] // 2-byte Folded Spill
|
||||
; NOPAIR-NEXT: str p6, [sp, #13, mul vl] // 2-byte Folded Spill
|
||||
; NOPAIR-NEXT: str p5, [sp, #14, mul vl] // 2-byte Folded Spill
|
||||
; NOPAIR-NEXT: str p4, [sp, #15, mul vl] // 2-byte Folded Spill
|
||||
; NOPAIR-NEXT: str z23, [sp, #2, mul vl] // 16-byte Folded Spill
|
||||
; NOPAIR-NEXT: str z22, [sp, #3, mul vl] // 16-byte Folded Spill
|
||||
; NOPAIR-NEXT: str z21, [sp, #4, mul vl] // 16-byte Folded Spill
|
||||
; NOPAIR-NEXT: str z20, [sp, #5, mul vl] // 16-byte Folded Spill
|
||||
; NOPAIR-NEXT: str z19, [sp, #6, mul vl] // 16-byte Folded Spill
|
||||
; NOPAIR-NEXT: str z18, [sp, #7, mul vl] // 16-byte Folded Spill
|
||||
; NOPAIR-NEXT: str z17, [sp, #8, mul vl] // 16-byte Folded Spill
|
||||
; NOPAIR-NEXT: str z16, [sp, #9, mul vl] // 16-byte Folded Spill
|
||||
; NOPAIR-NEXT: str z15, [sp, #10, mul vl] // 16-byte Folded Spill
|
||||
; NOPAIR-NEXT: str z14, [sp, #11, mul vl] // 16-byte Folded Spill
|
||||
; NOPAIR-NEXT: str z13, [sp, #12, mul vl] // 16-byte Folded Spill
|
||||
; NOPAIR-NEXT: str z12, [sp, #13, mul vl] // 16-byte Folded Spill
|
||||
; NOPAIR-NEXT: str z11, [sp, #14, mul vl] // 16-byte Folded Spill
|
||||
; NOPAIR-NEXT: str z10, [sp, #15, mul vl] // 16-byte Folded Spill
|
||||
; NOPAIR-NEXT: str z9, [sp, #16, mul vl] // 16-byte Folded Spill
|
||||
; NOPAIR-NEXT: str z8, [sp, #17, mul vl] // 16-byte Folded Spill
|
||||
; NOPAIR-NEXT: .cfi_escape 0x0f, 0x0d, 0x8f, 0x00, 0x11, 0x10, 0x22, 0x11, 0x90, 0x01, 0x92, 0x2e, 0x00, 0x1e, 0x22 // sp + 16 + 144 * VG
|
||||
; NOPAIR-NEXT: .cfi_offset w30, -8
|
||||
; NOPAIR-NEXT: .cfi_offset w29, -16
|
||||
; NOPAIR-NEXT: .cfi_escape 0x10, 0x48, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x78, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d8 @ cfa - 16 - 8 * VG
|
||||
; NOPAIR-NEXT: .cfi_escape 0x10, 0x49, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x70, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d9 @ cfa - 16 - 16 * VG
|
||||
; NOPAIR-NEXT: .cfi_escape 0x10, 0x4a, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x68, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d10 @ cfa - 16 - 24 * VG
|
||||
; NOPAIR-NEXT: .cfi_escape 0x10, 0x4b, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x60, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d11 @ cfa - 16 - 32 * VG
|
||||
; NOPAIR-NEXT: .cfi_escape 0x10, 0x4c, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x58, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d12 @ cfa - 16 - 40 * VG
|
||||
; NOPAIR-NEXT: .cfi_escape 0x10, 0x4d, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x50, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d13 @ cfa - 16 - 48 * VG
|
||||
; NOPAIR-NEXT: .cfi_escape 0x10, 0x4e, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x48, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d14 @ cfa - 16 - 56 * VG
|
||||
; NOPAIR-NEXT: .cfi_escape 0x10, 0x4f, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x40, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d15 @ cfa - 16 - 64 * VG
|
||||
; NOPAIR-NEXT: bl my_func
|
||||
; NOPAIR-NEXT: ldr z23, [sp, #2, mul vl] // 16-byte Folded Reload
|
||||
; NOPAIR-NEXT: ldr z22, [sp, #3, mul vl] // 16-byte Folded Reload
|
||||
; NOPAIR-NEXT: ldr z21, [sp, #4, mul vl] // 16-byte Folded Reload
|
||||
; NOPAIR-NEXT: ldr z20, [sp, #5, mul vl] // 16-byte Folded Reload
|
||||
; NOPAIR-NEXT: ldr z19, [sp, #6, mul vl] // 16-byte Folded Reload
|
||||
; NOPAIR-NEXT: ldr z18, [sp, #7, mul vl] // 16-byte Folded Reload
|
||||
; NOPAIR-NEXT: ldr z17, [sp, #8, mul vl] // 16-byte Folded Reload
|
||||
; NOPAIR-NEXT: ldr z16, [sp, #9, mul vl] // 16-byte Folded Reload
|
||||
; NOPAIR-NEXT: ldr z15, [sp, #10, mul vl] // 16-byte Folded Reload
|
||||
; NOPAIR-NEXT: ldr z14, [sp, #11, mul vl] // 16-byte Folded Reload
|
||||
; NOPAIR-NEXT: ldr z13, [sp, #12, mul vl] // 16-byte Folded Reload
|
||||
; NOPAIR-NEXT: ldr z12, [sp, #13, mul vl] // 16-byte Folded Reload
|
||||
; NOPAIR-NEXT: ldr z11, [sp, #14, mul vl] // 16-byte Folded Reload
|
||||
; NOPAIR-NEXT: ldr z10, [sp, #15, mul vl] // 16-byte Folded Reload
|
||||
; NOPAIR-NEXT: ldr z9, [sp, #16, mul vl] // 16-byte Folded Reload
|
||||
; NOPAIR-NEXT: ldr z8, [sp, #17, mul vl] // 16-byte Folded Reload
|
||||
; NOPAIR-NEXT: ldr p15, [sp, #4, mul vl] // 2-byte Folded Reload
|
||||
; NOPAIR-NEXT: ldr p14, [sp, #5, mul vl] // 2-byte Folded Reload
|
||||
; NOPAIR-NEXT: ldr p13, [sp, #6, mul vl] // 2-byte Folded Reload
|
||||
; NOPAIR-NEXT: ldr p12, [sp, #7, mul vl] // 2-byte Folded Reload
|
||||
; NOPAIR-NEXT: ldr p11, [sp, #8, mul vl] // 2-byte Folded Reload
|
||||
; NOPAIR-NEXT: ldr p10, [sp, #9, mul vl] // 2-byte Folded Reload
|
||||
; NOPAIR-NEXT: ldr p9, [sp, #10, mul vl] // 2-byte Folded Reload
|
||||
; NOPAIR-NEXT: ldr p8, [sp, #11, mul vl] // 2-byte Folded Reload
|
||||
; NOPAIR-NEXT: ldr p7, [sp, #12, mul vl] // 2-byte Folded Reload
|
||||
; NOPAIR-NEXT: ldr p6, [sp, #13, mul vl] // 2-byte Folded Reload
|
||||
; NOPAIR-NEXT: ldr p5, [sp, #14, mul vl] // 2-byte Folded Reload
|
||||
; NOPAIR-NEXT: ldr p4, [sp, #15, mul vl] // 2-byte Folded Reload
|
||||
; NOPAIR-NEXT: addvl sp, sp, #18
|
||||
; NOPAIR-NEXT: ldp x29, x30, [sp], #16 // 16-byte Folded Reload
|
||||
; NOPAIR-NEXT: ret
|
||||
;
|
||||
; PAIR-LABEL: fbyte:
|
||||
; PAIR: // %bb.0:
|
||||
; PAIR-NEXT: stp x29, x30, [sp, #-16]! // 16-byte Folded Spill
|
||||
; PAIR-NEXT: addvl sp, sp, #-18
|
||||
; PAIR-NEXT: str p8, [sp, #11, mul vl] // 2-byte Folded Spill
|
||||
; PAIR-NEXT: ptrue pn8.b
|
||||
; PAIR-NEXT: str p15, [sp, #4, mul vl] // 2-byte Folded Spill
|
||||
; PAIR-NEXT: st1b { z22.b, z23.b }, pn8, [sp, #4, mul vl] // 32-byte Folded Spill
|
||||
; PAIR-NEXT: st1b { z20.b, z21.b }, pn8, [sp, #8, mul vl] // 32-byte Folded Spill
|
||||
; PAIR-NEXT: str p14, [sp, #5, mul vl] // 2-byte Folded Spill
|
||||
; PAIR-NEXT: st1b { z18.b, z19.b }, pn8, [sp, #12, mul vl] // 32-byte Folded Spill
|
||||
; PAIR-NEXT: st1b { z16.b, z17.b }, pn8, [sp, #16, mul vl] // 32-byte Folded Spill
|
||||
; PAIR-NEXT: str p13, [sp, #6, mul vl] // 2-byte Folded Spill
|
||||
; PAIR-NEXT: st1b { z14.b, z15.b }, pn8, [sp, #20, mul vl] // 32-byte Folded Spill
|
||||
; PAIR-NEXT: st1b { z12.b, z13.b }, pn8, [sp, #24, mul vl] // 32-byte Folded Spill
|
||||
; PAIR-NEXT: str p12, [sp, #7, mul vl] // 2-byte Folded Spill
|
||||
; PAIR-NEXT: st1b { z10.b, z11.b }, pn8, [sp, #28, mul vl] // 32-byte Folded Spill
|
||||
; PAIR-NEXT: str p11, [sp, #8, mul vl] // 2-byte Folded Spill
|
||||
; PAIR-NEXT: str p10, [sp, #9, mul vl] // 2-byte Folded Spill
|
||||
; PAIR-NEXT: str p9, [sp, #10, mul vl] // 2-byte Folded Spill
|
||||
; PAIR-NEXT: str p7, [sp, #12, mul vl] // 2-byte Folded Spill
|
||||
; PAIR-NEXT: str p6, [sp, #13, mul vl] // 2-byte Folded Spill
|
||||
; PAIR-NEXT: str p5, [sp, #14, mul vl] // 2-byte Folded Spill
|
||||
; PAIR-NEXT: str p4, [sp, #15, mul vl] // 2-byte Folded Spill
|
||||
; PAIR-NEXT: st1b { z8.b, z9.b }, pn8, [sp, #32, mul vl] // 32-byte Folded Spill
|
||||
; PAIR-NEXT: .cfi_escape 0x0f, 0x0d, 0x8f, 0x00, 0x11, 0x10, 0x22, 0x11, 0x90, 0x01, 0x92, 0x2e, 0x00, 0x1e, 0x22 // sp + 16 + 144 * VG
|
||||
; PAIR-NEXT: .cfi_offset w30, -8
|
||||
; PAIR-NEXT: .cfi_offset w29, -16
|
||||
; PAIR-NEXT: .cfi_escape 0x10, 0x48, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x78, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d8 @ cfa - 16 - 8 * VG
|
||||
; PAIR-NEXT: .cfi_escape 0x10, 0x49, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x70, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d9 @ cfa - 16 - 16 * VG
|
||||
; PAIR-NEXT: .cfi_escape 0x10, 0x4a, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x68, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d10 @ cfa - 16 - 24 * VG
|
||||
; PAIR-NEXT: .cfi_escape 0x10, 0x4b, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x60, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d11 @ cfa - 16 - 32 * VG
|
||||
; PAIR-NEXT: .cfi_escape 0x10, 0x4c, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x58, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d12 @ cfa - 16 - 40 * VG
|
||||
; PAIR-NEXT: .cfi_escape 0x10, 0x4d, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x50, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d13 @ cfa - 16 - 48 * VG
|
||||
; PAIR-NEXT: .cfi_escape 0x10, 0x4e, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x48, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d14 @ cfa - 16 - 56 * VG
|
||||
; PAIR-NEXT: .cfi_escape 0x10, 0x4f, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x40, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d15 @ cfa - 16 - 64 * VG
|
||||
; PAIR-NEXT: bl my_func
|
||||
; PAIR-NEXT: ptrue pn8.b
|
||||
; PAIR-NEXT: ldr p15, [sp, #4, mul vl] // 2-byte Folded Reload
|
||||
; PAIR-NEXT: ld1b { z22.b, z23.b }, pn8/z, [sp, #4, mul vl] // 32-byte Folded Reload
|
||||
; PAIR-NEXT: ld1b { z20.b, z21.b }, pn8/z, [sp, #8, mul vl] // 32-byte Folded Reload
|
||||
; PAIR-NEXT: ld1b { z18.b, z19.b }, pn8/z, [sp, #12, mul vl] // 32-byte Folded Reload
|
||||
; PAIR-NEXT: ld1b { z16.b, z17.b }, pn8/z, [sp, #16, mul vl] // 32-byte Folded Reload
|
||||
; PAIR-NEXT: ld1b { z14.b, z15.b }, pn8/z, [sp, #20, mul vl] // 32-byte Folded Reload
|
||||
; PAIR-NEXT: ld1b { z12.b, z13.b }, pn8/z, [sp, #24, mul vl] // 32-byte Folded Reload
|
||||
; PAIR-NEXT: ld1b { z10.b, z11.b }, pn8/z, [sp, #28, mul vl] // 32-byte Folded Reload
|
||||
; PAIR-NEXT: ld1b { z8.b, z9.b }, pn8/z, [sp, #32, mul vl] // 32-byte Folded Reload
|
||||
; PAIR-NEXT: ldr p14, [sp, #5, mul vl] // 2-byte Folded Reload
|
||||
; PAIR-NEXT: ldr p13, [sp, #6, mul vl] // 2-byte Folded Reload
|
||||
; PAIR-NEXT: ldr p12, [sp, #7, mul vl] // 2-byte Folded Reload
|
||||
; PAIR-NEXT: ldr p11, [sp, #8, mul vl] // 2-byte Folded Reload
|
||||
; PAIR-NEXT: ldr p10, [sp, #9, mul vl] // 2-byte Folded Reload
|
||||
; PAIR-NEXT: ldr p9, [sp, #10, mul vl] // 2-byte Folded Reload
|
||||
; PAIR-NEXT: ldr p8, [sp, #11, mul vl] // 2-byte Folded Reload
|
||||
; PAIR-NEXT: ldr p7, [sp, #12, mul vl] // 2-byte Folded Reload
|
||||
; PAIR-NEXT: ldr p6, [sp, #13, mul vl] // 2-byte Folded Reload
|
||||
; PAIR-NEXT: ldr p5, [sp, #14, mul vl] // 2-byte Folded Reload
|
||||
; PAIR-NEXT: ldr p4, [sp, #15, mul vl] // 2-byte Folded Reload
|
||||
; PAIR-NEXT: addvl sp, sp, #18
|
||||
; PAIR-NEXT: ldp x29, x30, [sp], #16 // 16-byte Folded Reload
|
||||
; PAIR-NEXT: ret
|
||||
call void @my_func()
|
||||
ret void
|
||||
}
|
||||
|
||||
define void @fhalf(<vscale x 8 x half> %v) {
|
||||
; NOPAIR-LABEL: fhalf:
|
||||
; NOPAIR: // %bb.0:
|
||||
; NOPAIR-NEXT: stp x29, x30, [sp, #-16]! // 16-byte Folded Spill
|
||||
; NOPAIR-NEXT: addvl sp, sp, #-18
|
||||
; NOPAIR-NEXT: str p15, [sp, #4, mul vl] // 2-byte Folded Spill
|
||||
; NOPAIR-NEXT: str p14, [sp, #5, mul vl] // 2-byte Folded Spill
|
||||
; NOPAIR-NEXT: str p13, [sp, #6, mul vl] // 2-byte Folded Spill
|
||||
; NOPAIR-NEXT: str p12, [sp, #7, mul vl] // 2-byte Folded Spill
|
||||
; NOPAIR-NEXT: str p11, [sp, #8, mul vl] // 2-byte Folded Spill
|
||||
; NOPAIR-NEXT: str p10, [sp, #9, mul vl] // 2-byte Folded Spill
|
||||
; NOPAIR-NEXT: str p9, [sp, #10, mul vl] // 2-byte Folded Spill
|
||||
; NOPAIR-NEXT: str p8, [sp, #11, mul vl] // 2-byte Folded Spill
|
||||
; NOPAIR-NEXT: str p7, [sp, #12, mul vl] // 2-byte Folded Spill
|
||||
; NOPAIR-NEXT: str p6, [sp, #13, mul vl] // 2-byte Folded Spill
|
||||
; NOPAIR-NEXT: str p5, [sp, #14, mul vl] // 2-byte Folded Spill
|
||||
; NOPAIR-NEXT: str p4, [sp, #15, mul vl] // 2-byte Folded Spill
|
||||
; NOPAIR-NEXT: str z23, [sp, #2, mul vl] // 16-byte Folded Spill
|
||||
; NOPAIR-NEXT: str z22, [sp, #3, mul vl] // 16-byte Folded Spill
|
||||
; NOPAIR-NEXT: str z21, [sp, #4, mul vl] // 16-byte Folded Spill
|
||||
; NOPAIR-NEXT: str z20, [sp, #5, mul vl] // 16-byte Folded Spill
|
||||
; NOPAIR-NEXT: str z19, [sp, #6, mul vl] // 16-byte Folded Spill
|
||||
; NOPAIR-NEXT: str z18, [sp, #7, mul vl] // 16-byte Folded Spill
|
||||
; NOPAIR-NEXT: str z17, [sp, #8, mul vl] // 16-byte Folded Spill
|
||||
; NOPAIR-NEXT: str z16, [sp, #9, mul vl] // 16-byte Folded Spill
|
||||
; NOPAIR-NEXT: str z15, [sp, #10, mul vl] // 16-byte Folded Spill
|
||||
; NOPAIR-NEXT: str z14, [sp, #11, mul vl] // 16-byte Folded Spill
|
||||
; NOPAIR-NEXT: str z13, [sp, #12, mul vl] // 16-byte Folded Spill
|
||||
; NOPAIR-NEXT: str z12, [sp, #13, mul vl] // 16-byte Folded Spill
|
||||
; NOPAIR-NEXT: str z11, [sp, #14, mul vl] // 16-byte Folded Spill
|
||||
; NOPAIR-NEXT: str z10, [sp, #15, mul vl] // 16-byte Folded Spill
|
||||
; NOPAIR-NEXT: str z9, [sp, #16, mul vl] // 16-byte Folded Spill
|
||||
; NOPAIR-NEXT: str z8, [sp, #17, mul vl] // 16-byte Folded Spill
|
||||
; NOPAIR-NEXT: .cfi_escape 0x0f, 0x0d, 0x8f, 0x00, 0x11, 0x10, 0x22, 0x11, 0x90, 0x01, 0x92, 0x2e, 0x00, 0x1e, 0x22 // sp + 16 + 144 * VG
|
||||
; NOPAIR-NEXT: .cfi_offset w30, -8
|
||||
; NOPAIR-NEXT: .cfi_offset w29, -16
|
||||
; NOPAIR-NEXT: .cfi_escape 0x10, 0x48, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x78, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d8 @ cfa - 16 - 8 * VG
|
||||
; NOPAIR-NEXT: .cfi_escape 0x10, 0x49, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x70, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d9 @ cfa - 16 - 16 * VG
|
||||
; NOPAIR-NEXT: .cfi_escape 0x10, 0x4a, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x68, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d10 @ cfa - 16 - 24 * VG
|
||||
; NOPAIR-NEXT: .cfi_escape 0x10, 0x4b, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x60, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d11 @ cfa - 16 - 32 * VG
|
||||
; NOPAIR-NEXT: .cfi_escape 0x10, 0x4c, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x58, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d12 @ cfa - 16 - 40 * VG
|
||||
; NOPAIR-NEXT: .cfi_escape 0x10, 0x4d, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x50, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d13 @ cfa - 16 - 48 * VG
|
||||
; NOPAIR-NEXT: .cfi_escape 0x10, 0x4e, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x48, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d14 @ cfa - 16 - 56 * VG
|
||||
; NOPAIR-NEXT: .cfi_escape 0x10, 0x4f, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x40, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d15 @ cfa - 16 - 64 * VG
|
||||
; NOPAIR-NEXT: bl my_func
|
||||
; NOPAIR-NEXT: ldr z23, [sp, #2, mul vl] // 16-byte Folded Reload
|
||||
; NOPAIR-NEXT: ldr z22, [sp, #3, mul vl] // 16-byte Folded Reload
|
||||
; NOPAIR-NEXT: ldr z21, [sp, #4, mul vl] // 16-byte Folded Reload
|
||||
; NOPAIR-NEXT: ldr z20, [sp, #5, mul vl] // 16-byte Folded Reload
|
||||
; NOPAIR-NEXT: ldr z19, [sp, #6, mul vl] // 16-byte Folded Reload
|
||||
; NOPAIR-NEXT: ldr z18, [sp, #7, mul vl] // 16-byte Folded Reload
|
||||
; NOPAIR-NEXT: ldr z17, [sp, #8, mul vl] // 16-byte Folded Reload
|
||||
; NOPAIR-NEXT: ldr z16, [sp, #9, mul vl] // 16-byte Folded Reload
|
||||
; NOPAIR-NEXT: ldr z15, [sp, #10, mul vl] // 16-byte Folded Reload
|
||||
; NOPAIR-NEXT: ldr z14, [sp, #11, mul vl] // 16-byte Folded Reload
|
||||
; NOPAIR-NEXT: ldr z13, [sp, #12, mul vl] // 16-byte Folded Reload
|
||||
; NOPAIR-NEXT: ldr z12, [sp, #13, mul vl] // 16-byte Folded Reload
|
||||
; NOPAIR-NEXT: ldr z11, [sp, #14, mul vl] // 16-byte Folded Reload
|
||||
; NOPAIR-NEXT: ldr z10, [sp, #15, mul vl] // 16-byte Folded Reload
|
||||
; NOPAIR-NEXT: ldr z9, [sp, #16, mul vl] // 16-byte Folded Reload
|
||||
; NOPAIR-NEXT: ldr z8, [sp, #17, mul vl] // 16-byte Folded Reload
|
||||
; NOPAIR-NEXT: ldr p15, [sp, #4, mul vl] // 2-byte Folded Reload
|
||||
; NOPAIR-NEXT: ldr p14, [sp, #5, mul vl] // 2-byte Folded Reload
|
||||
; NOPAIR-NEXT: ldr p13, [sp, #6, mul vl] // 2-byte Folded Reload
|
||||
; NOPAIR-NEXT: ldr p12, [sp, #7, mul vl] // 2-byte Folded Reload
|
||||
; NOPAIR-NEXT: ldr p11, [sp, #8, mul vl] // 2-byte Folded Reload
|
||||
; NOPAIR-NEXT: ldr p10, [sp, #9, mul vl] // 2-byte Folded Reload
|
||||
; NOPAIR-NEXT: ldr p9, [sp, #10, mul vl] // 2-byte Folded Reload
|
||||
; NOPAIR-NEXT: ldr p8, [sp, #11, mul vl] // 2-byte Folded Reload
|
||||
; NOPAIR-NEXT: ldr p7, [sp, #12, mul vl] // 2-byte Folded Reload
|
||||
; NOPAIR-NEXT: ldr p6, [sp, #13, mul vl] // 2-byte Folded Reload
|
||||
; NOPAIR-NEXT: ldr p5, [sp, #14, mul vl] // 2-byte Folded Reload
|
||||
; NOPAIR-NEXT: ldr p4, [sp, #15, mul vl] // 2-byte Folded Reload
|
||||
; NOPAIR-NEXT: addvl sp, sp, #18
|
||||
; NOPAIR-NEXT: ldp x29, x30, [sp], #16 // 16-byte Folded Reload
|
||||
; NOPAIR-NEXT: ret
|
||||
;
|
||||
; PAIR-LABEL: fhalf:
|
||||
; PAIR: // %bb.0:
|
||||
; PAIR-NEXT: stp x29, x30, [sp, #-16]! // 16-byte Folded Spill
|
||||
; PAIR-NEXT: addvl sp, sp, #-18
|
||||
; PAIR-NEXT: str p8, [sp, #11, mul vl] // 2-byte Folded Spill
|
||||
; PAIR-NEXT: ptrue pn8.b
|
||||
; PAIR-NEXT: str p15, [sp, #4, mul vl] // 2-byte Folded Spill
|
||||
; PAIR-NEXT: st1b { z22.b, z23.b }, pn8, [sp, #4, mul vl] // 32-byte Folded Spill
|
||||
; PAIR-NEXT: st1b { z20.b, z21.b }, pn8, [sp, #8, mul vl] // 32-byte Folded Spill
|
||||
; PAIR-NEXT: str p14, [sp, #5, mul vl] // 2-byte Folded Spill
|
||||
; PAIR-NEXT: st1b { z18.b, z19.b }, pn8, [sp, #12, mul vl] // 32-byte Folded Spill
|
||||
; PAIR-NEXT: st1b { z16.b, z17.b }, pn8, [sp, #16, mul vl] // 32-byte Folded Spill
|
||||
; PAIR-NEXT: str p13, [sp, #6, mul vl] // 2-byte Folded Spill
|
||||
; PAIR-NEXT: st1b { z14.b, z15.b }, pn8, [sp, #20, mul vl] // 32-byte Folded Spill
|
||||
; PAIR-NEXT: st1b { z12.b, z13.b }, pn8, [sp, #24, mul vl] // 32-byte Folded Spill
|
||||
; PAIR-NEXT: str p12, [sp, #7, mul vl] // 2-byte Folded Spill
|
||||
; PAIR-NEXT: st1b { z10.b, z11.b }, pn8, [sp, #28, mul vl] // 32-byte Folded Spill
|
||||
; PAIR-NEXT: str p11, [sp, #8, mul vl] // 2-byte Folded Spill
|
||||
; PAIR-NEXT: str p10, [sp, #9, mul vl] // 2-byte Folded Spill
|
||||
; PAIR-NEXT: str p9, [sp, #10, mul vl] // 2-byte Folded Spill
|
||||
; PAIR-NEXT: str p7, [sp, #12, mul vl] // 2-byte Folded Spill
|
||||
; PAIR-NEXT: str p6, [sp, #13, mul vl] // 2-byte Folded Spill
|
||||
; PAIR-NEXT: str p5, [sp, #14, mul vl] // 2-byte Folded Spill
|
||||
; PAIR-NEXT: str p4, [sp, #15, mul vl] // 2-byte Folded Spill
|
||||
; PAIR-NEXT: st1b { z8.b, z9.b }, pn8, [sp, #32, mul vl] // 32-byte Folded Spill
|
||||
; PAIR-NEXT: .cfi_escape 0x0f, 0x0d, 0x8f, 0x00, 0x11, 0x10, 0x22, 0x11, 0x90, 0x01, 0x92, 0x2e, 0x00, 0x1e, 0x22 // sp + 16 + 144 * VG
|
||||
; PAIR-NEXT: .cfi_offset w30, -8
|
||||
; PAIR-NEXT: .cfi_offset w29, -16
|
||||
; PAIR-NEXT: .cfi_escape 0x10, 0x48, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x78, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d8 @ cfa - 16 - 8 * VG
|
||||
; PAIR-NEXT: .cfi_escape 0x10, 0x49, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x70, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d9 @ cfa - 16 - 16 * VG
|
||||
; PAIR-NEXT: .cfi_escape 0x10, 0x4a, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x68, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d10 @ cfa - 16 - 24 * VG
|
||||
; PAIR-NEXT: .cfi_escape 0x10, 0x4b, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x60, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d11 @ cfa - 16 - 32 * VG
|
||||
; PAIR-NEXT: .cfi_escape 0x10, 0x4c, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x58, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d12 @ cfa - 16 - 40 * VG
|
||||
; PAIR-NEXT: .cfi_escape 0x10, 0x4d, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x50, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d13 @ cfa - 16 - 48 * VG
|
||||
; PAIR-NEXT: .cfi_escape 0x10, 0x4e, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x48, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d14 @ cfa - 16 - 56 * VG
|
||||
; PAIR-NEXT: .cfi_escape 0x10, 0x4f, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x40, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d15 @ cfa - 16 - 64 * VG
|
||||
; PAIR-NEXT: bl my_func
|
||||
; PAIR-NEXT: ptrue pn8.b
|
||||
; PAIR-NEXT: ldr p15, [sp, #4, mul vl] // 2-byte Folded Reload
|
||||
; PAIR-NEXT: ld1b { z22.b, z23.b }, pn8/z, [sp, #4, mul vl] // 32-byte Folded Reload
|
||||
; PAIR-NEXT: ld1b { z20.b, z21.b }, pn8/z, [sp, #8, mul vl] // 32-byte Folded Reload
|
||||
; PAIR-NEXT: ld1b { z18.b, z19.b }, pn8/z, [sp, #12, mul vl] // 32-byte Folded Reload
|
||||
; PAIR-NEXT: ld1b { z16.b, z17.b }, pn8/z, [sp, #16, mul vl] // 32-byte Folded Reload
|
||||
; PAIR-NEXT: ld1b { z14.b, z15.b }, pn8/z, [sp, #20, mul vl] // 32-byte Folded Reload
|
||||
; PAIR-NEXT: ld1b { z12.b, z13.b }, pn8/z, [sp, #24, mul vl] // 32-byte Folded Reload
|
||||
; PAIR-NEXT: ld1b { z10.b, z11.b }, pn8/z, [sp, #28, mul vl] // 32-byte Folded Reload
|
||||
; PAIR-NEXT: ld1b { z8.b, z9.b }, pn8/z, [sp, #32, mul vl] // 32-byte Folded Reload
|
||||
; PAIR-NEXT: ldr p14, [sp, #5, mul vl] // 2-byte Folded Reload
|
||||
; PAIR-NEXT: ldr p13, [sp, #6, mul vl] // 2-byte Folded Reload
|
||||
; PAIR-NEXT: ldr p12, [sp, #7, mul vl] // 2-byte Folded Reload
|
||||
; PAIR-NEXT: ldr p11, [sp, #8, mul vl] // 2-byte Folded Reload
|
||||
; PAIR-NEXT: ldr p10, [sp, #9, mul vl] // 2-byte Folded Reload
|
||||
; PAIR-NEXT: ldr p9, [sp, #10, mul vl] // 2-byte Folded Reload
|
||||
; PAIR-NEXT: ldr p8, [sp, #11, mul vl] // 2-byte Folded Reload
|
||||
; PAIR-NEXT: ldr p7, [sp, #12, mul vl] // 2-byte Folded Reload
|
||||
; PAIR-NEXT: ldr p6, [sp, #13, mul vl] // 2-byte Folded Reload
|
||||
; PAIR-NEXT: ldr p5, [sp, #14, mul vl] // 2-byte Folded Reload
|
||||
; PAIR-NEXT: ldr p4, [sp, #15, mul vl] // 2-byte Folded Reload
|
||||
; PAIR-NEXT: addvl sp, sp, #18
|
||||
; PAIR-NEXT: ldp x29, x30, [sp], #16 // 16-byte Folded Reload
|
||||
; PAIR-NEXT: ret
|
||||
call void @my_func()
|
||||
ret void
|
||||
}
|
||||
|
||||
;; Do NOT group Z10
|
||||
;; DO group Z8 and Z9 and save P8
|
||||
define aarch64_sve_vector_pcs void @test_clobbers_z_p_regs() {
|
||||
; NOPAIR-LABEL: test_clobbers_z_p_regs:
|
||||
; NOPAIR: // %bb.0:
|
||||
; NOPAIR-NEXT: str x29, [sp, #-16]! // 8-byte Folded Spill
|
||||
; NOPAIR-NEXT: addvl sp, sp, #-4
|
||||
; NOPAIR-NEXT: str p5, [sp, #6, mul vl] // 2-byte Folded Spill
|
||||
; NOPAIR-NEXT: str p4, [sp, #7, mul vl] // 2-byte Folded Spill
|
||||
; NOPAIR-NEXT: str z10, [sp, #1, mul vl] // 16-byte Folded Spill
|
||||
; NOPAIR-NEXT: str z9, [sp, #2, mul vl] // 16-byte Folded Spill
|
||||
; NOPAIR-NEXT: str z8, [sp, #3, mul vl] // 16-byte Folded Spill
|
||||
; NOPAIR-NEXT: .cfi_escape 0x0f, 0x0c, 0x8f, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0x2e, 0x00, 0x1e, 0x22 // sp + 16 + 32 * VG
|
||||
; NOPAIR-NEXT: .cfi_offset w29, -16
|
||||
; NOPAIR-NEXT: .cfi_escape 0x10, 0x48, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x78, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d8 @ cfa - 16 - 8 * VG
|
||||
; NOPAIR-NEXT: .cfi_escape 0x10, 0x49, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x70, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d9 @ cfa - 16 - 16 * VG
|
||||
; NOPAIR-NEXT: .cfi_escape 0x10, 0x4a, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x68, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d10 @ cfa - 16 - 24 * VG
|
||||
; NOPAIR-NEXT: //APP
|
||||
; NOPAIR-NEXT: //NO_APP
|
||||
; NOPAIR-NEXT: ldr z10, [sp, #1, mul vl] // 16-byte Folded Reload
|
||||
; NOPAIR-NEXT: ldr z9, [sp, #2, mul vl] // 16-byte Folded Reload
|
||||
; NOPAIR-NEXT: ldr z8, [sp, #3, mul vl] // 16-byte Folded Reload
|
||||
; NOPAIR-NEXT: ldr p5, [sp, #6, mul vl] // 2-byte Folded Reload
|
||||
; NOPAIR-NEXT: ldr p4, [sp, #7, mul vl] // 2-byte Folded Reload
|
||||
; NOPAIR-NEXT: addvl sp, sp, #4
|
||||
; NOPAIR-NEXT: ldr x29, [sp], #16 // 8-byte Folded Reload
|
||||
; NOPAIR-NEXT: ret
|
||||
;
|
||||
; PAIR-LABEL: test_clobbers_z_p_regs:
|
||||
; PAIR: // %bb.0:
|
||||
; PAIR-NEXT: str x29, [sp, #-16]! // 8-byte Folded Spill
|
||||
; PAIR-NEXT: addvl sp, sp, #-4
|
||||
; PAIR-NEXT: str p8, [sp, #5, mul vl] // 2-byte Folded Spill
|
||||
; PAIR-NEXT: ptrue pn8.b
|
||||
; PAIR-NEXT: str p5, [sp, #6, mul vl] // 2-byte Folded Spill
|
||||
; PAIR-NEXT: str p4, [sp, #7, mul vl] // 2-byte Folded Spill
|
||||
; PAIR-NEXT: str z10, [sp, #1, mul vl] // 16-byte Folded Spill
|
||||
; PAIR-NEXT: st1b { z8.b, z9.b }, pn8, [sp, #4, mul vl] // 32-byte Folded Spill
|
||||
; PAIR-NEXT: .cfi_escape 0x0f, 0x0c, 0x8f, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0x2e, 0x00, 0x1e, 0x22 // sp + 16 + 32 * VG
|
||||
; PAIR-NEXT: .cfi_offset w29, -16
|
||||
; PAIR-NEXT: .cfi_escape 0x10, 0x48, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x78, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d8 @ cfa - 16 - 8 * VG
|
||||
; PAIR-NEXT: .cfi_escape 0x10, 0x49, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x70, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d9 @ cfa - 16 - 16 * VG
|
||||
; PAIR-NEXT: .cfi_escape 0x10, 0x4a, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x68, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d10 @ cfa - 16 - 24 * VG
|
||||
; PAIR-NEXT: //APP
|
||||
; PAIR-NEXT: //NO_APP
|
||||
; PAIR-NEXT: ptrue pn8.b
|
||||
; PAIR-NEXT: ldr z10, [sp, #1, mul vl] // 16-byte Folded Reload
|
||||
; PAIR-NEXT: ld1b { z8.b, z9.b }, pn8/z, [sp, #4, mul vl] // 32-byte Folded Reload
|
||||
; PAIR-NEXT: ldr p8, [sp, #5, mul vl] // 2-byte Folded Reload
|
||||
; PAIR-NEXT: ldr p5, [sp, #6, mul vl] // 2-byte Folded Reload
|
||||
; PAIR-NEXT: ldr p4, [sp, #7, mul vl] // 2-byte Folded Reload
|
||||
; PAIR-NEXT: addvl sp, sp, #4
|
||||
; PAIR-NEXT: ldr x29, [sp], #16 // 8-byte Folded Reload
|
||||
; PAIR-NEXT: ret
|
||||
call void asm sideeffect "", "~{p4},~{p5},~{z8},~{z9},~{z10}"()
|
||||
ret void
|
||||
}
|
||||
|
||||
;; Do NOT group Z10
|
||||
;; DO group Z8 and Z9 and use P9
|
||||
define aarch64_sve_vector_pcs void @test_clobbers_z_p_regs2() {
|
||||
; NOPAIR-LABEL: test_clobbers_z_p_regs2:
|
||||
; NOPAIR: // %bb.0:
|
||||
; NOPAIR-NEXT: str x29, [sp, #-16]! // 8-byte Folded Spill
|
||||
; NOPAIR-NEXT: addvl sp, sp, #-4
|
||||
; NOPAIR-NEXT: str p10, [sp, #6, mul vl] // 2-byte Folded Spill
|
||||
; NOPAIR-NEXT: str p9, [sp, #7, mul vl] // 2-byte Folded Spill
|
||||
; NOPAIR-NEXT: str z10, [sp, #1, mul vl] // 16-byte Folded Spill
|
||||
; NOPAIR-NEXT: str z9, [sp, #2, mul vl] // 16-byte Folded Spill
|
||||
; NOPAIR-NEXT: str z8, [sp, #3, mul vl] // 16-byte Folded Spill
|
||||
; NOPAIR-NEXT: .cfi_escape 0x0f, 0x0c, 0x8f, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0x2e, 0x00, 0x1e, 0x22 // sp + 16 + 32 * VG
|
||||
; NOPAIR-NEXT: .cfi_offset w29, -16
|
||||
; NOPAIR-NEXT: .cfi_escape 0x10, 0x48, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x78, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d8 @ cfa - 16 - 8 * VG
|
||||
; NOPAIR-NEXT: .cfi_escape 0x10, 0x49, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x70, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d9 @ cfa - 16 - 16 * VG
|
||||
; NOPAIR-NEXT: .cfi_escape 0x10, 0x4a, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x68, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d10 @ cfa - 16 - 24 * VG
|
||||
; NOPAIR-NEXT: //APP
|
||||
; NOPAIR-NEXT: //NO_APP
|
||||
; NOPAIR-NEXT: ldr z10, [sp, #1, mul vl] // 16-byte Folded Reload
|
||||
; NOPAIR-NEXT: ldr z9, [sp, #2, mul vl] // 16-byte Folded Reload
|
||||
; NOPAIR-NEXT: ldr z8, [sp, #3, mul vl] // 16-byte Folded Reload
|
||||
; NOPAIR-NEXT: ldr p10, [sp, #6, mul vl] // 2-byte Folded Reload
|
||||
; NOPAIR-NEXT: ldr p9, [sp, #7, mul vl] // 2-byte Folded Reload
|
||||
; NOPAIR-NEXT: addvl sp, sp, #4
|
||||
; NOPAIR-NEXT: ldr x29, [sp], #16 // 8-byte Folded Reload
|
||||
; NOPAIR-NEXT: ret
|
||||
;
|
||||
; PAIR-LABEL: test_clobbers_z_p_regs2:
|
||||
; PAIR: // %bb.0:
|
||||
; PAIR-NEXT: str x29, [sp, #-16]! // 8-byte Folded Spill
|
||||
; PAIR-NEXT: addvl sp, sp, #-4
|
||||
; PAIR-NEXT: str p9, [sp, #7, mul vl] // 2-byte Folded Spill
|
||||
; PAIR-NEXT: ptrue pn9.b
|
||||
; PAIR-NEXT: str p10, [sp, #6, mul vl] // 2-byte Folded Spill
|
||||
; PAIR-NEXT: str z10, [sp, #1, mul vl] // 16-byte Folded Spill
|
||||
; PAIR-NEXT: st1b { z8.b, z9.b }, pn9, [sp, #4, mul vl] // 32-byte Folded Spill
|
||||
; PAIR-NEXT: .cfi_escape 0x0f, 0x0c, 0x8f, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0x2e, 0x00, 0x1e, 0x22 // sp + 16 + 32 * VG
|
||||
; PAIR-NEXT: .cfi_offset w29, -16
|
||||
; PAIR-NEXT: .cfi_escape 0x10, 0x48, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x78, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d8 @ cfa - 16 - 8 * VG
|
||||
; PAIR-NEXT: .cfi_escape 0x10, 0x49, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x70, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d9 @ cfa - 16 - 16 * VG
|
||||
; PAIR-NEXT: .cfi_escape 0x10, 0x4a, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x68, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d10 @ cfa - 16 - 24 * VG
|
||||
; PAIR-NEXT: //APP
|
||||
; PAIR-NEXT: //NO_APP
|
||||
; PAIR-NEXT: ptrue pn9.b
|
||||
; PAIR-NEXT: ldr z10, [sp, #1, mul vl] // 16-byte Folded Reload
|
||||
; PAIR-NEXT: ldr p10, [sp, #6, mul vl] // 2-byte Folded Reload
|
||||
; PAIR-NEXT: ld1b { z8.b, z9.b }, pn9/z, [sp, #4, mul vl] // 32-byte Folded Reload
|
||||
; PAIR-NEXT: ldr p9, [sp, #7, mul vl] // 2-byte Folded Reload
|
||||
; PAIR-NEXT: addvl sp, sp, #4
|
||||
; PAIR-NEXT: ldr x29, [sp], #16 // 8-byte Folded Reload
|
||||
; PAIR-NEXT: ret
|
||||
call void asm sideeffect "", "~{p9},~{p10},~{z8},~{z9},~{z10}"()
|
||||
ret void
|
||||
}
|
||||
|
||||
|
||||
;; Test order of PRegs and ZRegs when there is no PReg being clobbered
|
||||
define aarch64_sve_vector_pcs void @test_clobbers_z_regs() {
|
||||
; NOPAIR-LABEL: test_clobbers_z_regs:
|
||||
; NOPAIR: // %bb.0:
|
||||
; NOPAIR-NEXT: str x29, [sp, #-16]! // 8-byte Folded Spill
|
||||
; NOPAIR-NEXT: addvl sp, sp, #-2
|
||||
; NOPAIR-NEXT: str z9, [sp] // 16-byte Folded Spill
|
||||
; NOPAIR-NEXT: str z8, [sp, #1, mul vl] // 16-byte Folded Spill
|
||||
; NOPAIR-NEXT: .cfi_escape 0x0f, 0x0c, 0x8f, 0x00, 0x11, 0x10, 0x22, 0x11, 0x10, 0x92, 0x2e, 0x00, 0x1e, 0x22 // sp + 16 + 16 * VG
|
||||
; NOPAIR-NEXT: .cfi_offset w29, -16
|
||||
; NOPAIR-NEXT: .cfi_escape 0x10, 0x48, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x78, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d8 @ cfa - 16 - 8 * VG
|
||||
; NOPAIR-NEXT: .cfi_escape 0x10, 0x49, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x70, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d9 @ cfa - 16 - 16 * VG
|
||||
; NOPAIR-NEXT: //APP
|
||||
; NOPAIR-NEXT: //NO_APP
|
||||
; NOPAIR-NEXT: ldr z9, [sp] // 16-byte Folded Reload
|
||||
; NOPAIR-NEXT: ldr z8, [sp, #1, mul vl] // 16-byte Folded Reload
|
||||
; NOPAIR-NEXT: addvl sp, sp, #2
|
||||
; NOPAIR-NEXT: ldr x29, [sp], #16 // 8-byte Folded Reload
|
||||
; NOPAIR-NEXT: ret
|
||||
;
|
||||
; PAIR-LABEL: test_clobbers_z_regs:
|
||||
; PAIR: // %bb.0:
|
||||
; PAIR-NEXT: str x29, [sp, #-16]! // 8-byte Folded Spill
|
||||
; PAIR-NEXT: addvl sp, sp, #-3
|
||||
; PAIR-NEXT: str p8, [sp, #7, mul vl] // 2-byte Folded Spill
|
||||
; PAIR-NEXT: ptrue pn8.b
|
||||
; PAIR-NEXT: st1b { z8.b, z9.b }, pn8, [sp, #2, mul vl] // 32-byte Folded Spill
|
||||
; PAIR-NEXT: .cfi_escape 0x0f, 0x0c, 0x8f, 0x00, 0x11, 0x10, 0x22, 0x11, 0x18, 0x92, 0x2e, 0x00, 0x1e, 0x22 // sp + 16 + 24 * VG
|
||||
; PAIR-NEXT: .cfi_offset w29, -16
|
||||
; PAIR-NEXT: .cfi_escape 0x10, 0x48, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x78, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d8 @ cfa - 16 - 8 * VG
|
||||
; PAIR-NEXT: .cfi_escape 0x10, 0x49, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x70, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d9 @ cfa - 16 - 16 * VG
|
||||
; PAIR-NEXT: //APP
|
||||
; PAIR-NEXT: //NO_APP
|
||||
; PAIR-NEXT: ptrue pn8.b
|
||||
; PAIR-NEXT: ld1b { z8.b, z9.b }, pn8/z, [sp, #2, mul vl] // 32-byte Folded Reload
|
||||
; PAIR-NEXT: ldr p8, [sp, #7, mul vl] // 2-byte Folded Reload
|
||||
; PAIR-NEXT: addvl sp, sp, #3
|
||||
; PAIR-NEXT: ldr x29, [sp], #16 // 8-byte Folded Reload
|
||||
; PAIR-NEXT: ret
|
||||
call void asm sideeffect "", "~{z8},~{z9}"()
|
||||
ret void
|
||||
}
|
||||
|
||||
;; DO NOT group Z8 and Z9 and
|
||||
;; DO NOT save P8
|
||||
;; It does not belong to the allowed calling conventions
|
||||
;; NOPAIR and PAIR should have the same assembly
|
||||
define void @test_clobbers_z_regs_negative() {
|
||||
; NOPAIR-LABEL: test_clobbers_z_regs_negative:
|
||||
; NOPAIR: // %bb.0:
|
||||
; NOPAIR-NEXT: stp d9, d8, [sp, #-16]! // 16-byte Folded Spill
|
||||
; NOPAIR-NEXT: .cfi_def_cfa_offset 16
|
||||
; NOPAIR-NEXT: .cfi_offset b8, -8
|
||||
; NOPAIR-NEXT: .cfi_offset b9, -16
|
||||
; NOPAIR-NEXT: //APP
|
||||
; NOPAIR-NEXT: //NO_APP
|
||||
; NOPAIR-NEXT: ldp d9, d8, [sp], #16 // 16-byte Folded Reload
|
||||
; NOPAIR-NEXT: ret
|
||||
;
|
||||
; PAIR-LABEL: test_clobbers_z_regs_negative:
|
||||
; PAIR: // %bb.0:
|
||||
; PAIR-NEXT: stp d9, d8, [sp, #-16]! // 16-byte Folded Spill
|
||||
; PAIR-NEXT: .cfi_def_cfa_offset 16
|
||||
; PAIR-NEXT: .cfi_offset b8, -8
|
||||
; PAIR-NEXT: .cfi_offset b9, -16
|
||||
; PAIR-NEXT: //APP
|
||||
; PAIR-NEXT: //NO_APP
|
||||
; PAIR-NEXT: ldp d9, d8, [sp], #16 // 16-byte Folded Reload
|
||||
; PAIR-NEXT: ret
|
||||
call void asm sideeffect "", "~{z8},~{z9}"()
|
||||
ret void
|
||||
}
|
||||
|
||||
;; Do NOT save P8 and NOT group any Z8 and Z10 register
|
||||
define aarch64_sve_vector_pcs void @test_clobbers_2_z_regs_negative() {
|
||||
; NOPAIR-LABEL: test_clobbers_2_z_regs_negative:
|
||||
; NOPAIR: // %bb.0:
|
||||
; NOPAIR-NEXT: str x29, [sp, #-16]! // 8-byte Folded Spill
|
||||
; NOPAIR-NEXT: addvl sp, sp, #-2
|
||||
; NOPAIR-NEXT: str z10, [sp] // 16-byte Folded Spill
|
||||
; NOPAIR-NEXT: str z8, [sp, #1, mul vl] // 16-byte Folded Spill
|
||||
; NOPAIR-NEXT: .cfi_escape 0x0f, 0x0c, 0x8f, 0x00, 0x11, 0x10, 0x22, 0x11, 0x10, 0x92, 0x2e, 0x00, 0x1e, 0x22 // sp + 16 + 16 * VG
|
||||
; NOPAIR-NEXT: .cfi_offset w29, -16
|
||||
; NOPAIR-NEXT: .cfi_escape 0x10, 0x48, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x78, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d8 @ cfa - 16 - 8 * VG
|
||||
; NOPAIR-NEXT: .cfi_escape 0x10, 0x4a, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x70, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d10 @ cfa - 16 - 16 * VG
|
||||
; NOPAIR-NEXT: //APP
|
||||
; NOPAIR-NEXT: //NO_APP
|
||||
; NOPAIR-NEXT: ldr z10, [sp] // 16-byte Folded Reload
|
||||
; NOPAIR-NEXT: ldr z8, [sp, #1, mul vl] // 16-byte Folded Reload
|
||||
; NOPAIR-NEXT: addvl sp, sp, #2
|
||||
; NOPAIR-NEXT: ldr x29, [sp], #16 // 8-byte Folded Reload
|
||||
; NOPAIR-NEXT: ret
|
||||
;
|
||||
; PAIR-LABEL: test_clobbers_2_z_regs_negative:
|
||||
; PAIR: // %bb.0:
|
||||
; PAIR-NEXT: str x29, [sp, #-16]! // 8-byte Folded Spill
|
||||
; PAIR-NEXT: addvl sp, sp, #-2
|
||||
; PAIR-NEXT: str z10, [sp] // 16-byte Folded Spill
|
||||
; PAIR-NEXT: str z8, [sp, #1, mul vl] // 16-byte Folded Spill
|
||||
; PAIR-NEXT: .cfi_escape 0x0f, 0x0c, 0x8f, 0x00, 0x11, 0x10, 0x22, 0x11, 0x10, 0x92, 0x2e, 0x00, 0x1e, 0x22 // sp + 16 + 16 * VG
|
||||
; PAIR-NEXT: .cfi_offset w29, -16
|
||||
; PAIR-NEXT: .cfi_escape 0x10, 0x48, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x78, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d8 @ cfa - 16 - 8 * VG
|
||||
; PAIR-NEXT: .cfi_escape 0x10, 0x4a, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x70, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d10 @ cfa - 16 - 16 * VG
|
||||
; PAIR-NEXT: //APP
|
||||
; PAIR-NEXT: //NO_APP
|
||||
; PAIR-NEXT: ldr z10, [sp] // 16-byte Folded Reload
|
||||
; PAIR-NEXT: ldr z8, [sp, #1, mul vl] // 16-byte Folded Reload
|
||||
; PAIR-NEXT: addvl sp, sp, #2
|
||||
; PAIR-NEXT: ldr x29, [sp], #16 // 8-byte Folded Reload
|
||||
; PAIR-NEXT: ret
|
||||
call void asm sideeffect "", "~{z8},~{z10}"()
|
||||
ret void
|
||||
}
|
||||
|
||||
|
||||
;; NOTHING TO DO HERE
|
||||
;; There is no ZReg pairs to save
|
||||
define aarch64_sve_vector_pcs void @test_clobbers_p_reg_negative() {
|
||||
; NOPAIR-LABEL: test_clobbers_p_reg_negative:
|
||||
; NOPAIR: // %bb.0:
|
||||
; NOPAIR-NEXT: str x29, [sp, #-16]! // 8-byte Folded Spill
|
||||
; NOPAIR-NEXT: addvl sp, sp, #-1
|
||||
; NOPAIR-NEXT: str p10, [sp, #7, mul vl] // 2-byte Folded Spill
|
||||
; NOPAIR-NEXT: .cfi_escape 0x0f, 0x0c, 0x8f, 0x00, 0x11, 0x10, 0x22, 0x11, 0x08, 0x92, 0x2e, 0x00, 0x1e, 0x22 // sp + 16 + 8 * VG
|
||||
; NOPAIR-NEXT: .cfi_offset w29, -16
|
||||
; NOPAIR-NEXT: //APP
|
||||
; NOPAIR-NEXT: //NO_APP
|
||||
; NOPAIR-NEXT: ldr p10, [sp, #7, mul vl] // 2-byte Folded Reload
|
||||
; NOPAIR-NEXT: addvl sp, sp, #1
|
||||
; NOPAIR-NEXT: ldr x29, [sp], #16 // 8-byte Folded Reload
|
||||
; NOPAIR-NEXT: ret
|
||||
;
|
||||
; PAIR-LABEL: test_clobbers_p_reg_negative:
|
||||
; PAIR: // %bb.0:
|
||||
; PAIR-NEXT: str x29, [sp, #-16]! // 8-byte Folded Spill
|
||||
; PAIR-NEXT: addvl sp, sp, #-1
|
||||
; PAIR-NEXT: str p10, [sp, #7, mul vl] // 2-byte Folded Spill
|
||||
; PAIR-NEXT: .cfi_escape 0x0f, 0x0c, 0x8f, 0x00, 0x11, 0x10, 0x22, 0x11, 0x08, 0x92, 0x2e, 0x00, 0x1e, 0x22 // sp + 16 + 8 * VG
|
||||
; PAIR-NEXT: .cfi_offset w29, -16
|
||||
; PAIR-NEXT: //APP
|
||||
; PAIR-NEXT: //NO_APP
|
||||
; PAIR-NEXT: ldr p10, [sp, #7, mul vl] // 2-byte Folded Reload
|
||||
; PAIR-NEXT: addvl sp, sp, #1
|
||||
; PAIR-NEXT: ldr x29, [sp], #16 // 8-byte Folded Reload
|
||||
; PAIR-NEXT: ret
|
||||
call void asm sideeffect "", "~{p10}"()
|
||||
ret void
|
||||
}
|
||||
Reference in New Issue
Block a user