[X86] Add x, t and g modifiers for inline asm
This patch adds the x, t and g modifiers for inline asm from GCC. These will print a vector register as xmm*, ymm* or zmm* respectively. I also fixed register names with modifiers with inteldialect so they are no longer printed with a leading %. Patch by Amanieu d'Antras Differential Revision: https://reviews.llvm.org/D78977
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@@ -407,7 +407,7 @@ void X86AsmPrinter::PrintIntelMemReference(const MachineInstr *MI,
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static bool printAsmMRegister(X86AsmPrinter &P, const MachineOperand &MO,
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char Mode, raw_ostream &O) {
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Register Reg = MO.getReg();
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bool EmitPercent = true;
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bool EmitPercent = MO.getParent()->getInlineAsmDialect() == InlineAsm::AD_ATT;
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if (!X86::GR8RegClass.contains(Reg) &&
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!X86::GR16RegClass.contains(Reg) &&
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@@ -446,6 +446,42 @@ static bool printAsmMRegister(X86AsmPrinter &P, const MachineOperand &MO,
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return false;
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}
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static bool printAsmVRegister(X86AsmPrinter &P, const MachineOperand &MO,
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char Mode, raw_ostream &O) {
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unsigned Reg = MO.getReg();
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bool EmitPercent = MO.getParent()->getInlineAsmDialect() == InlineAsm::AD_ATT;
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unsigned Index;
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if (X86::VR128XRegClass.contains(Reg))
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Index = Reg - X86::XMM0;
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else if (X86::VR256XRegClass.contains(Reg))
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Index = Reg - X86::YMM0;
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else if (X86::VR512RegClass.contains(Reg))
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Index = Reg - X86::ZMM0;
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else
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return true;
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switch (Mode) {
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default: // Unknown mode.
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return true;
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case 'x': // Print V4SFmode register
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Reg = X86::XMM0 + Index;
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break;
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case 't': // Print V8SFmode register
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Reg = X86::YMM0 + Index;
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break;
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case 'g': // Print V16SFmode register
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Reg = X86::ZMM0 + Index;
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break;
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}
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if (EmitPercent)
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O << '%';
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O << X86ATTInstPrinter::getRegisterName(Reg);
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return false;
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}
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/// PrintAsmOperand - Print out an operand for an inline asm expression.
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///
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bool X86AsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
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@@ -520,6 +556,14 @@ bool X86AsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
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PrintOperand(MI, OpNo, O);
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return false;
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case 'x': // Print V4SFmode register
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case 't': // Print V8SFmode register
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case 'g': // Print V16SFmode register
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if (MO.isReg())
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return printAsmVRegister(*this, MO, ExtraCode[0], O);
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PrintOperand(MI, OpNo, O);
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return false;
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case 'P': // This is the operand of a call, treat specially.
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PrintPCRelImm(MI, OpNo, O);
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return false;
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53
llvm/test/CodeGen/X86/asm-modifier2.ll
Normal file
53
llvm/test/CodeGen/X86/asm-modifier2.ll
Normal file
@@ -0,0 +1,53 @@
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; RUN: llc < %s | FileCheck %s
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define void @test1() {
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; CHECK-LABEL: test1:
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; CHECK: vmovaps %xmm0, %xmm0
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; CHECK: vmovaps %ymm0, %ymm0
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; CHECK: vmovaps %zmm0, %zmm0
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tail call void asm sideeffect "vmovaps ${0:x}, ${0:x}", "{xmm0},~{dirflag},~{fpsr},~{flags}"(i32 0)
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tail call void asm sideeffect "vmovaps ${0:t}, ${0:t}", "{xmm0},~{dirflag},~{fpsr},~{flags}"(i32 0)
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tail call void asm sideeffect "vmovaps ${0:g}, ${0:g}", "{xmm0},~{dirflag},~{fpsr},~{flags}"(i32 0)
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ret void
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}
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define void @test2() {
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; CHECK-LABEL: test2:
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; CHECK: vmovaps %xmm0, %xmm0
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; CHECK: vmovaps %ymm0, %ymm0
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; CHECK: vmovaps %zmm0, %zmm0
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tail call void asm sideeffect inteldialect "vmovaps ${0:x}, ${0:x}", "{xmm0},~{dirflag},~{fpsr},~{flags}"(i32 0)
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tail call void asm sideeffect inteldialect "vmovaps ${0:t}, ${0:t}", "{xmm0},~{dirflag},~{fpsr},~{flags}"(i32 0)
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tail call void asm sideeffect inteldialect "vmovaps ${0:g}, ${0:g}", "{xmm0},~{dirflag},~{fpsr},~{flags}"(i32 0)
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ret void
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}
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define void @test3() {
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; CHECK-LABEL: test3:
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; CHECK: movb %al, %al
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; CHECK: movb %ah, %ah
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; CHECK: movw %ax, %ax
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; CHECK: movl %eax, %eax
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; CHECK: movq %rax, %rax
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tail call void asm sideeffect "mov ${0:b}, ${0:b}", "{eax},~{dirflag},~{fpsr},~{flags}"(i32 0)
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tail call void asm sideeffect "mov ${0:h}, ${0:h}", "{eax},~{dirflag},~{fpsr},~{flags}"(i32 0)
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tail call void asm sideeffect "mov ${0:w}, ${0:w}", "{eax},~{dirflag},~{fpsr},~{flags}"(i32 0)
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tail call void asm sideeffect "mov ${0:k}, ${0:k}", "{eax},~{dirflag},~{fpsr},~{flags}"(i32 0)
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tail call void asm sideeffect "mov ${0:q}, ${0:q}", "{eax},~{dirflag},~{fpsr},~{flags}"(i32 0)
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ret void
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}
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define void @test4() {
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; CHECK-LABEL: test4:
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; CHECK: movb %al, %al
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; CHECK: movb %ah, %ah
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; CHECK: movw %ax, %ax
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; CHECK: movl %eax, %eax
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; CHECK: movq %rax, %rax
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tail call void asm sideeffect inteldialect "mov ${0:b}, ${0:b}", "{eax},~{dirflag},~{fpsr},~{flags}"(i32 0)
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tail call void asm sideeffect inteldialect "mov ${0:h}, ${0:h}", "{eax},~{dirflag},~{fpsr},~{flags}"(i32 0)
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tail call void asm sideeffect inteldialect "mov ${0:w}, ${0:w}", "{eax},~{dirflag},~{fpsr},~{flags}"(i32 0)
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tail call void asm sideeffect inteldialect "mov ${0:k}, ${0:k}", "{eax},~{dirflag},~{fpsr},~{flags}"(i32 0)
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tail call void asm sideeffect inteldialect "mov ${0:q}, ${0:q}", "{eax},~{dirflag},~{fpsr},~{flags}"(i32 0)
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ret void
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}
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@@ -1,8 +1,8 @@
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; RUN: not llc -mtriple=x86_64-- < %s 2>&1 | FileCheck %s
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;CHECK: error: invalid operand in inline asm: 'vmovd ${1:x}, $0'
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;CHECK: error: invalid operand in inline asm: 'vmovd ${1:k}, $0'
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define i32 @foo() {
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entry:
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%0 = tail call i32 asm sideeffect "vmovd ${1:x}, $0", "=r,x,~{dirflag},~{fpsr},~{flags}"(<2 x i64> <i64 240518168632, i64 240518168632>)
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%0 = tail call i32 asm sideeffect "vmovd ${1:k}, $0", "=r,x,~{dirflag},~{fpsr},~{flags}"(<2 x i64> <i64 240518168632, i64 240518168632>)
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ret i32 %0
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}
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