[LLDB] Add LoongArch register definitions and operations
Use the same register layout as Linux kernel, implement the related read and write operations. Reviewed By: SixWeining, xen0n, DavidSpickett Differential Revision: https://reviews.llvm.org/D138407
This commit is contained in:
Tiezhu Yang
@@ -18,6 +18,15 @@
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#include "Plugins/Process/Linux/NativeProcessLinux.h"
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#include "Plugins/Process/Linux/Procfs.h"
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#include "Plugins/Process/Utility/RegisterInfoPOSIX_loongarch64.h"
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#include "Plugins/Process/Utility/lldb-loongarch-register-enums.h"
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// NT_PRSTATUS and NT_FPREGSET definition
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#include <elf.h>
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// struct iovec definition
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#include <sys/uio.h>
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#define REG_CONTEXT_SIZE (GetGPRSize() + GetFPRSize())
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using namespace lldb;
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using namespace lldb_private;
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@@ -52,6 +61,9 @@ NativeRegisterContextLinux_loongarch64::NativeRegisterContextLinux_loongarch64(
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NativeRegisterContextLinux(native_thread) {
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::memset(&m_fpr, 0, sizeof(m_fpr));
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::memset(&m_gpr, 0, sizeof(m_gpr));
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m_gpr_is_valid = false;
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m_fpu_is_valid = false;
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}
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const RegisterInfoPOSIX_loongarch64 &
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@@ -69,24 +81,258 @@ const RegisterSet *NativeRegisterContextLinux_loongarch64::GetRegisterSet(
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return GetRegisterInfo().GetRegisterSet(set_index);
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}
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uint32_t NativeRegisterContextLinux_loongarch64::GetUserRegisterCount() const {
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uint32_t count = 0;
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for (uint32_t set_index = 0; set_index < GetRegisterSetCount(); ++set_index)
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count += GetRegisterSet(set_index)->num_registers;
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return count;
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}
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Status NativeRegisterContextLinux_loongarch64::ReadRegister(
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const RegisterInfo *reg_info, RegisterValue ®_value) {
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return Status("Failed to read register value");
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Status error;
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if (!reg_info) {
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error.SetErrorString("reg_info NULL");
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return error;
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}
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const uint32_t reg = reg_info->kinds[lldb::eRegisterKindLLDB];
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if (reg == LLDB_INVALID_REGNUM)
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return Status("no lldb regnum for %s", reg_info && reg_info->name
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? reg_info->name
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: "<unknown register>");
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uint8_t *src = nullptr;
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uint32_t offset = LLDB_INVALID_INDEX32;
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if (IsGPR(reg)) {
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error = ReadGPR();
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if (error.Fail())
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return error;
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offset = reg_info->byte_offset;
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assert(offset < GetGPRSize());
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src = (uint8_t *)GetGPRBuffer() + offset;
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} else if (IsFPR(reg)) {
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error = ReadFPR();
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if (error.Fail())
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return error;
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offset = CalculateFprOffset(reg_info);
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assert(offset < GetFPRSize());
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src = (uint8_t *)GetFPRBuffer() + offset;
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} else
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return Status("failed - register wasn't recognized to be a GPR or an FPR, "
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"write strategy unknown");
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reg_value.SetFromMemoryData(*reg_info, src, reg_info->byte_size,
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eByteOrderLittle, error);
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return error;
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}
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Status NativeRegisterContextLinux_loongarch64::WriteRegister(
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const RegisterInfo *reg_info, const RegisterValue ®_value) {
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Status error;
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if (!reg_info)
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return Status("reg_info NULL");
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const uint32_t reg = reg_info->kinds[lldb::eRegisterKindLLDB];
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if (reg == LLDB_INVALID_REGNUM)
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return Status("no lldb regnum for %s", reg_info->name != nullptr
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? reg_info->name
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: "<unknown register>");
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uint8_t *dst = nullptr;
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uint32_t offset = LLDB_INVALID_INDEX32;
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if (IsGPR(reg)) {
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error = ReadGPR();
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if (error.Fail())
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return error;
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assert(reg_info->byte_offset < GetGPRSize());
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dst = (uint8_t *)GetGPRBuffer() + reg_info->byte_offset;
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::memcpy(dst, reg_value.GetBytes(), reg_info->byte_size);
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return WriteGPR();
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} else if (IsFPR(reg)) {
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error = ReadFPR();
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if (error.Fail())
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return error;
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offset = CalculateFprOffset(reg_info);
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assert(offset < GetFPRSize());
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dst = (uint8_t *)GetFPRBuffer() + offset;
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::memcpy(dst, reg_value.GetBytes(), reg_info->byte_size);
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return WriteFPR();
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}
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return Status("Failed to write register value");
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}
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Status NativeRegisterContextLinux_loongarch64::ReadAllRegisterValues(
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lldb::WritableDataBufferSP &data_sp) {
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return Status("Failed to read all register values");
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Status error;
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data_sp.reset(new DataBufferHeap(REG_CONTEXT_SIZE, 0));
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error = ReadGPR();
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if (error.Fail())
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return error;
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error = ReadFPR();
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if (error.Fail())
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return error;
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uint8_t *dst = data_sp->GetBytes();
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::memcpy(dst, GetGPRBuffer(), GetGPRSize());
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dst += GetGPRSize();
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::memcpy(dst, GetFPRBuffer(), GetFPRSize());
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return error;
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}
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Status NativeRegisterContextLinux_loongarch64::WriteAllRegisterValues(
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const lldb::DataBufferSP &data_sp) {
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return Status("Failed to write all register values");
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Status error;
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if (!data_sp) {
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error.SetErrorStringWithFormat(
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"NativeRegisterContextLinux_loongarch64::%s invalid data_sp provided",
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__FUNCTION__);
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return error;
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}
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if (data_sp->GetByteSize() != REG_CONTEXT_SIZE) {
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error.SetErrorStringWithFormat(
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"NativeRegisterContextLinux_loongarch64::%s data_sp contained "
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"mismatched data size, expected %" PRIu64 ", actual %" PRIu64,
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__FUNCTION__, REG_CONTEXT_SIZE, data_sp->GetByteSize());
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return error;
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}
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const uint8_t *src = data_sp->GetBytes();
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if (src == nullptr) {
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error.SetErrorStringWithFormat("NativeRegisterContextLinux_loongarch64::%s "
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"DataBuffer::GetBytes() returned a null "
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"pointer",
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__FUNCTION__);
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return error;
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}
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::memcpy(GetGPRBuffer(), src, GetRegisterInfoInterface().GetGPRSize());
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error = WriteGPR();
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if (error.Fail())
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return error;
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src += GetRegisterInfoInterface().GetGPRSize();
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::memcpy(GetFPRBuffer(), src, GetFPRSize());
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error = WriteFPR();
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if (error.Fail())
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return error;
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return error;
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}
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bool NativeRegisterContextLinux_loongarch64::IsGPR(unsigned reg) const {
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return GetRegisterInfo().GetRegisterSetFromRegisterIndex(reg) ==
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RegisterInfoPOSIX_loongarch64::GPRegSet;
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}
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bool NativeRegisterContextLinux_loongarch64::IsFPR(unsigned reg) const {
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return GetRegisterInfo().GetRegisterSetFromRegisterIndex(reg) ==
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RegisterInfoPOSIX_loongarch64::FPRegSet;
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}
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Status NativeRegisterContextLinux_loongarch64::ReadGPR() {
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Status error;
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if (m_gpr_is_valid)
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return error;
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struct iovec ioVec;
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ioVec.iov_base = GetGPRBuffer();
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ioVec.iov_len = GetGPRSize();
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error = ReadRegisterSet(&ioVec, GetGPRSize(), NT_PRSTATUS);
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if (error.Success())
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m_gpr_is_valid = true;
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return error;
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}
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Status NativeRegisterContextLinux_loongarch64::WriteGPR() {
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Status error = ReadGPR();
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if (error.Fail())
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return error;
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struct iovec ioVec;
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ioVec.iov_base = GetGPRBuffer();
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ioVec.iov_len = GetGPRSize();
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m_gpr_is_valid = false;
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return WriteRegisterSet(&ioVec, GetGPRSize(), NT_PRSTATUS);
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}
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Status NativeRegisterContextLinux_loongarch64::ReadFPR() {
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Status error;
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if (m_fpu_is_valid)
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return error;
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struct iovec ioVec;
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ioVec.iov_base = GetFPRBuffer();
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ioVec.iov_len = GetFPRSize();
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error = ReadRegisterSet(&ioVec, GetFPRSize(), NT_FPREGSET);
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if (error.Success())
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m_fpu_is_valid = true;
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return error;
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}
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Status NativeRegisterContextLinux_loongarch64::WriteFPR() {
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Status error = ReadFPR();
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if (error.Fail())
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return error;
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struct iovec ioVec;
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ioVec.iov_base = GetFPRBuffer();
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ioVec.iov_len = GetFPRSize();
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m_fpu_is_valid = false;
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return WriteRegisterSet(&ioVec, GetFPRSize(), NT_FPREGSET);
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}
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void NativeRegisterContextLinux_loongarch64::InvalidateAllRegisters() {
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m_gpr_is_valid = false;
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m_fpu_is_valid = false;
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}
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uint32_t NativeRegisterContextLinux_loongarch64::CalculateFprOffset(
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const RegisterInfo *reg_info) const {
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return reg_info->byte_offset - GetGPRSize();
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}
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std::vector<uint32_t>
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NativeRegisterContextLinux_loongarch64::GetExpeditedRegisters(
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ExpeditedRegs expType) const {
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std::vector<uint32_t> expedited_reg_nums =
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NativeRegisterContext::GetExpeditedRegisters(expType);
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return expedited_reg_nums;
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}
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#endif // defined(__loongarch__) && __loongarch_grlen == 64
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@@ -30,6 +30,8 @@ public:
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uint32_t GetRegisterSetCount() const override;
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uint32_t GetUserRegisterCount() const override;
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const RegisterSet *GetRegisterSet(uint32_t set_index) const override;
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Status ReadRegister(const RegisterInfo *reg_info,
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@@ -42,7 +44,22 @@ public:
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Status WriteAllRegisterValues(const lldb::DataBufferSP &data_sp) override;
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void InvalidateAllRegisters() override;
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std::vector<uint32_t>
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GetExpeditedRegisters(ExpeditedRegs expType) const override;
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bool RegisterOffsetIsDynamic() const override { return true; }
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protected:
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Status ReadGPR() override;
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Status WriteGPR() override;
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Status ReadFPR() override;
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Status WriteFPR() override;
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void *GetGPRBuffer() override { return &m_gpr; }
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void *GetFPRBuffer() override { return &m_fpr; }
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@@ -52,10 +69,19 @@ protected:
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size_t GetFPRSize() override { return GetRegisterInfo().GetFPRSize(); }
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private:
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bool m_gpr_is_valid;
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bool m_fpu_is_valid;
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RegisterInfoPOSIX_loongarch64::GPR m_gpr;
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RegisterInfoPOSIX_loongarch64::FPR m_fpr;
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bool IsGPR(unsigned reg) const;
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bool IsFPR(unsigned reg) const;
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uint32_t CalculateFprOffset(const RegisterInfo *reg_info) const;
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const RegisterInfoPOSIX_loongarch64 &GetRegisterInfo() const;
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};
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@@ -38,6 +38,7 @@ add_lldb_library(lldbPluginProcessUtility
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RegisterContextOpenBSD_x86_64.cpp
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RegisterContextPOSIX_arm.cpp
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RegisterContextPOSIX_arm64.cpp
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RegisterContextPOSIX_loongarch64.cpp
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RegisterContextPOSIX_mips64.cpp
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RegisterContextPOSIX_powerpc.cpp
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RegisterContextPOSIX_ppc64le.cpp
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@@ -0,0 +1,82 @@
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//===-- RegisterContextPOSIX_loongarch64.cpp --------------------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include "lldb/Target/Process.h"
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#include "lldb/Target/Target.h"
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#include "lldb/Target/Thread.h"
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#include "lldb/Utility/DataBufferHeap.h"
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#include "lldb/Utility/DataExtractor.h"
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#include "lldb/Utility/Endian.h"
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#include "lldb/Utility/RegisterValue.h"
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#include "lldb/Utility/Scalar.h"
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#include "llvm/Support/Compiler.h"
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#include "RegisterContextPOSIX_loongarch64.h"
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using namespace lldb;
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using namespace lldb_private;
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RegisterContextPOSIX_loongarch64::RegisterContextPOSIX_loongarch64(
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lldb_private::Thread &thread,
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std::unique_ptr<RegisterInfoPOSIX_loongarch64> register_info)
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: lldb_private::RegisterContext(thread, 0),
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m_register_info_up(std::move(register_info)) {}
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RegisterContextPOSIX_loongarch64::~RegisterContextPOSIX_loongarch64() = default;
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void RegisterContextPOSIX_loongarch64::invalidate() {}
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void RegisterContextPOSIX_loongarch64::InvalidateAllRegisters() {}
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size_t RegisterContextPOSIX_loongarch64::GetRegisterCount() {
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return m_register_info_up->GetRegisterCount();
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}
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size_t RegisterContextPOSIX_loongarch64::GetGPRSize() {
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return m_register_info_up->GetGPRSize();
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}
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unsigned RegisterContextPOSIX_loongarch64::GetRegisterSize(unsigned int reg) {
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return m_register_info_up->GetRegisterInfo()[reg].byte_size;
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}
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unsigned RegisterContextPOSIX_loongarch64::GetRegisterOffset(unsigned int reg) {
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return m_register_info_up->GetRegisterInfo()[reg].byte_offset;
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}
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const lldb_private::RegisterInfo *
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RegisterContextPOSIX_loongarch64::GetRegisterInfoAtIndex(size_t reg) {
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if (reg < GetRegisterCount())
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return &GetRegisterInfo()[reg];
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return nullptr;
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}
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size_t RegisterContextPOSIX_loongarch64::GetRegisterSetCount() {
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return m_register_info_up->GetRegisterCount();
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}
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const lldb_private::RegisterSet *
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RegisterContextPOSIX_loongarch64::GetRegisterSet(size_t set) {
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return m_register_info_up->GetRegisterSet(set);
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}
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const lldb_private::RegisterInfo *
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RegisterContextPOSIX_loongarch64::GetRegisterInfo() {
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return m_register_info_up->GetRegisterInfo();
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}
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bool RegisterContextPOSIX_loongarch64::IsGPR(unsigned int reg) {
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return m_register_info_up->GetRegisterSetFromRegisterIndex(reg) ==
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RegisterInfoPOSIX_loongarch64::GPRegSet;
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}
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bool RegisterContextPOSIX_loongarch64::IsFPR(unsigned int reg) {
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return m_register_info_up->GetRegisterSetFromRegisterIndex(reg) ==
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RegisterInfoPOSIX_loongarch64::FPRegSet;
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}
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@@ -0,0 +1,63 @@
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//===-- RegisterContextPOSIX_loongarch64.h ----------------------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLDB_SOURCE_PLUGINS_PROCESS_UTILITY_REGISTERCONTEXTPOSIX_LOONGARCH64_H
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#define LLDB_SOURCE_PLUGINS_PROCESS_UTILITY_REGISTERCONTEXTPOSIX_LOONGARCH64_H
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#include "RegisterInfoInterface.h"
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#include "RegisterInfoPOSIX_loongarch64.h"
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#include "lldb-loongarch-register-enums.h"
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#include "lldb/Target/RegisterContext.h"
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#include "lldb/Utility/Log.h"
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class RegisterContextPOSIX_loongarch64 : public lldb_private::RegisterContext {
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public:
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RegisterContextPOSIX_loongarch64(
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lldb_private::Thread &thread,
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std::unique_ptr<RegisterInfoPOSIX_loongarch64> register_info);
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~RegisterContextPOSIX_loongarch64() override;
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void invalidate();
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void InvalidateAllRegisters() override;
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size_t GetRegisterCount() override;
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virtual size_t GetGPRSize();
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virtual unsigned GetRegisterSize(unsigned reg);
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virtual unsigned GetRegisterOffset(unsigned reg);
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const lldb_private::RegisterInfo *GetRegisterInfoAtIndex(size_t reg) override;
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size_t GetRegisterSetCount() override;
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const lldb_private::RegisterSet *GetRegisterSet(size_t set) override;
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protected:
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std::unique_ptr<RegisterInfoPOSIX_loongarch64> m_register_info_up;
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virtual const lldb_private::RegisterInfo *GetRegisterInfo();
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bool IsGPR(unsigned reg);
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bool IsFPR(unsigned reg);
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size_t GetFPRSize() { return sizeof(RegisterInfoPOSIX_loongarch64::FPR); }
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|
||||
uint32_t GetRegNumFCSR() const { return fpr_fcsr_loongarch; }
|
||||
|
||||
virtual bool ReadGPR() = 0;
|
||||
virtual bool ReadFPR() = 0;
|
||||
virtual bool WriteGPR() = 0;
|
||||
virtual bool WriteFPR() = 0;
|
||||
};
|
||||
|
||||
#endif // LLDB_SOURCE_PLUGINS_PROCESS_UTILITY_REGISTERCONTEXTPOSIX_LOONGARCH64_H
|
||||
@@ -15,10 +15,25 @@
|
||||
|
||||
#include "RegisterInfoPOSIX_loongarch64.h"
|
||||
|
||||
#define GPR_OFFSET(idx) ((idx)*8 + 0)
|
||||
#define FPR_OFFSET(idx) ((idx)*8 + sizeof(RegisterInfoPOSIX_loongarch64::GPR))
|
||||
#define FCC_OFFSET(idx) ((idx)*1 + 32 * 8 + sizeof(RegisterInfoPOSIX_loongarch64::GPR))
|
||||
#define FCSR_OFFSET (8 * 1 + 32 * 8 + sizeof(RegisterInfoPOSIX_loongarch64::GPR))
|
||||
|
||||
#define REG_CONTEXT_SIZE \
|
||||
(sizeof(RegisterInfoPOSIX_loongarch64::GPR) + \
|
||||
sizeof(RegisterInfoPOSIX_loongarch64::FPR))
|
||||
|
||||
#define DECLARE_REGISTER_INFOS_LOONGARCH64_STRUCT
|
||||
#include "RegisterInfos_loongarch64.h"
|
||||
#undef DECLARE_REGISTER_INFOS_LOONGARCH64_STRUCT
|
||||
|
||||
const lldb_private::RegisterInfo *
|
||||
RegisterInfoPOSIX_loongarch64::GetRegisterInfoPtr(
|
||||
const lldb_private::ArchSpec &target_arch) {
|
||||
switch (target_arch.GetMachine()) {
|
||||
case llvm::Triple::loongarch64:
|
||||
return g_register_infos_loongarch64;
|
||||
default:
|
||||
assert(false && "Unhandled target architecture.");
|
||||
return nullptr;
|
||||
@@ -28,19 +43,85 @@ RegisterInfoPOSIX_loongarch64::GetRegisterInfoPtr(
|
||||
uint32_t RegisterInfoPOSIX_loongarch64::GetRegisterInfoCount(
|
||||
const lldb_private::ArchSpec &target_arch) {
|
||||
switch (target_arch.GetMachine()) {
|
||||
case llvm::Triple::loongarch64:
|
||||
return static_cast<uint32_t>(sizeof(g_register_infos_loongarch64) /
|
||||
sizeof(g_register_infos_loongarch64[0]));
|
||||
default:
|
||||
assert(false && "Unhandled target architecture.");
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
||||
// Number of register sets provided by this context.
|
||||
enum {
|
||||
k_num_gpr_registers = gpr_last_loongarch - gpr_first_loongarch + 1,
|
||||
k_num_fpr_registers = fpr_last_loongarch - fpr_first_loongarch + 1,
|
||||
k_num_register_sets = 2
|
||||
};
|
||||
|
||||
// LoongArch64 general purpose registers.
|
||||
static const uint32_t g_gpr_regnums_loongarch64[] = {
|
||||
gpr_r0_loongarch, gpr_r1_loongarch, gpr_r2_loongarch,
|
||||
gpr_r3_loongarch, gpr_r4_loongarch, gpr_r5_loongarch,
|
||||
gpr_r6_loongarch, gpr_r7_loongarch, gpr_r8_loongarch,
|
||||
gpr_r9_loongarch, gpr_r10_loongarch, gpr_r11_loongarch,
|
||||
gpr_r12_loongarch, gpr_r13_loongarch, gpr_r14_loongarch,
|
||||
gpr_r15_loongarch, gpr_r16_loongarch, gpr_r17_loongarch,
|
||||
gpr_r18_loongarch, gpr_r19_loongarch, gpr_r20_loongarch,
|
||||
gpr_r21_loongarch, gpr_r22_loongarch, gpr_r23_loongarch,
|
||||
gpr_r24_loongarch, gpr_r25_loongarch, gpr_r26_loongarch,
|
||||
gpr_r27_loongarch, gpr_r28_loongarch, gpr_r29_loongarch,
|
||||
gpr_r30_loongarch, gpr_r31_loongarch, gpr_orig_a0_loongarch,
|
||||
gpr_pc_loongarch, gpr_badv_loongarch, gpr_reserved0_loongarch,
|
||||
gpr_reserved1_loongarch, gpr_reserved2_loongarch, gpr_reserved3_loongarch,
|
||||
gpr_reserved4_loongarch, gpr_reserved5_loongarch, gpr_reserved6_loongarch,
|
||||
gpr_reserved7_loongarch, gpr_reserved8_loongarch, gpr_reserved9_loongarch,
|
||||
LLDB_INVALID_REGNUM};
|
||||
|
||||
static_assert(((sizeof g_gpr_regnums_loongarch64 /
|
||||
sizeof g_gpr_regnums_loongarch64[0]) -
|
||||
1) == k_num_gpr_registers,
|
||||
"g_gpr_regnums_loongarch64 has wrong number of register infos");
|
||||
|
||||
// LoongArch64 floating point registers.
|
||||
static const uint32_t g_fpr_regnums_loongarch64[] = {
|
||||
fpr_f0_loongarch, fpr_f1_loongarch, fpr_f2_loongarch,
|
||||
fpr_f3_loongarch, fpr_f4_loongarch, fpr_f5_loongarch,
|
||||
fpr_f6_loongarch, fpr_f7_loongarch, fpr_f8_loongarch,
|
||||
fpr_f9_loongarch, fpr_f10_loongarch, fpr_f11_loongarch,
|
||||
fpr_f12_loongarch, fpr_f13_loongarch, fpr_f14_loongarch,
|
||||
fpr_f15_loongarch, fpr_f16_loongarch, fpr_f17_loongarch,
|
||||
fpr_f18_loongarch, fpr_f19_loongarch, fpr_f20_loongarch,
|
||||
fpr_f21_loongarch, fpr_f22_loongarch, fpr_f23_loongarch,
|
||||
fpr_f24_loongarch, fpr_f25_loongarch, fpr_f26_loongarch,
|
||||
fpr_f27_loongarch, fpr_f28_loongarch, fpr_f29_loongarch,
|
||||
fpr_f30_loongarch, fpr_f31_loongarch, fpr_fcc0_loongarch,
|
||||
fpr_fcc1_loongarch, fpr_fcc2_loongarch, fpr_fcc3_loongarch,
|
||||
fpr_fcc4_loongarch, fpr_fcc5_loongarch, fpr_fcc6_loongarch,
|
||||
fpr_fcc7_loongarch, fpr_fcsr_loongarch, LLDB_INVALID_REGNUM};
|
||||
|
||||
static_assert(((sizeof g_fpr_regnums_loongarch64 /
|
||||
sizeof g_fpr_regnums_loongarch64[0]) -
|
||||
1) == k_num_fpr_registers,
|
||||
"g_fpr_regnums_loongarch64 has wrong number of register infos");
|
||||
|
||||
// Register sets for LoongArch64.
|
||||
static const lldb_private::RegisterSet
|
||||
g_reg_sets_loongarch64[k_num_register_sets] = {
|
||||
{"General Purpose Registers", "gpr", k_num_gpr_registers,
|
||||
g_gpr_regnums_loongarch64},
|
||||
{"Floating Point Registers", "fpr", k_num_fpr_registers,
|
||||
g_fpr_regnums_loongarch64}};
|
||||
|
||||
RegisterInfoPOSIX_loongarch64::RegisterInfoPOSIX_loongarch64(
|
||||
const lldb_private::ArchSpec &target_arch, lldb_private::Flags flags)
|
||||
: lldb_private::RegisterInfoAndSetInterface(target_arch),
|
||||
m_register_info_p(GetRegisterInfoPtr(target_arch)),
|
||||
m_register_info_count(GetRegisterInfoCount(target_arch)) {}
|
||||
|
||||
uint32_t RegisterInfoPOSIX_loongarch64::GetRegisterCount() const { return 0; }
|
||||
uint32_t RegisterInfoPOSIX_loongarch64::GetRegisterCount() const {
|
||||
return m_register_info_count;
|
||||
}
|
||||
|
||||
size_t RegisterInfoPOSIX_loongarch64::GetGPRSize() const {
|
||||
return sizeof(struct RegisterInfoPOSIX_loongarch64::GPR);
|
||||
@@ -55,14 +136,23 @@ RegisterInfoPOSIX_loongarch64::GetRegisterInfo() const {
|
||||
return m_register_info_p;
|
||||
}
|
||||
|
||||
size_t RegisterInfoPOSIX_loongarch64::GetRegisterSetCount() const { return 0; }
|
||||
size_t RegisterInfoPOSIX_loongarch64::GetRegisterSetCount() const {
|
||||
return k_num_register_sets;
|
||||
}
|
||||
|
||||
size_t RegisterInfoPOSIX_loongarch64::GetRegisterSetFromRegisterIndex(
|
||||
uint32_t reg_index) const {
|
||||
// coverity[unsigned_compare]
|
||||
if (reg_index >= gpr_first_loongarch && reg_index <= gpr_last_loongarch)
|
||||
return GPRegSet;
|
||||
if (reg_index >= fpr_first_loongarch && reg_index <= fpr_last_loongarch)
|
||||
return FPRegSet;
|
||||
return LLDB_INVALID_REGNUM;
|
||||
}
|
||||
|
||||
const lldb_private::RegisterSet *
|
||||
RegisterInfoPOSIX_loongarch64::GetRegisterSet(size_t set_index) const {
|
||||
if (set_index < GetRegisterSetCount())
|
||||
return &g_reg_sets_loongarch64[set_index];
|
||||
return nullptr;
|
||||
}
|
||||
|
||||
@@ -23,6 +23,11 @@ public:
|
||||
GetRegisterInfoCount(const lldb_private::ArchSpec &target_arch);
|
||||
|
||||
public:
|
||||
enum RegSetKind {
|
||||
GPRegSet,
|
||||
FPRegSet,
|
||||
};
|
||||
|
||||
struct GPR {
|
||||
uint64_t gpr[32];
|
||||
|
||||
|
||||
172
lldb/source/Plugins/Process/Utility/RegisterInfos_loongarch64.h
Normal file
172
lldb/source/Plugins/Process/Utility/RegisterInfos_loongarch64.h
Normal file
@@ -0,0 +1,172 @@
|
||||
//===-- RegisterInfos_loongarch64.h -----------------------------*- C++ -*-===//
|
||||
//
|
||||
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
|
||||
// See https://llvm.org/LICENSE.txt for license information.
|
||||
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
|
||||
//
|
||||
//===----------------------------------------------------------------------===//
|
||||
|
||||
#ifdef DECLARE_REGISTER_INFOS_LOONGARCH64_STRUCT
|
||||
|
||||
#include <stddef.h>
|
||||
|
||||
#include "lldb/lldb-defines.h"
|
||||
#include "lldb/lldb-enumerations.h"
|
||||
#include "lldb/lldb-private.h"
|
||||
|
||||
#include "Utility/LoongArch_DWARF_Registers.h"
|
||||
#include "lldb-loongarch-register-enums.h"
|
||||
|
||||
#ifndef GPR_OFFSET
|
||||
#error GPR_OFFSET must be defined before including this header file
|
||||
#endif
|
||||
|
||||
#ifndef FPR_OFFSET
|
||||
#error FPR_OFFSET must be defined before including this header file
|
||||
#endif
|
||||
|
||||
using namespace loongarch_dwarf;
|
||||
|
||||
// clang-format off
|
||||
|
||||
// I suppose EHFrame and DWARF are the same.
|
||||
#define KIND_HELPER(reg, generic_kind) \
|
||||
{ \
|
||||
loongarch_dwarf::dwarf_##reg, loongarch_dwarf::dwarf_##reg, generic_kind, \
|
||||
LLDB_INVALID_REGNUM, reg##_loongarch \
|
||||
}
|
||||
|
||||
// Generates register kinds array for generic purpose registers
|
||||
#define GPR64_KIND(reg, generic_kind) KIND_HELPER(reg, generic_kind)
|
||||
|
||||
// Generates register kinds array for floating point registers
|
||||
#define FPR64_KIND(reg, generic_kind) KIND_HELPER(reg, generic_kind)
|
||||
|
||||
// Defines a 64-bit general purpose register
|
||||
#define DEFINE_GPR64(reg, generic_kind) DEFINE_GPR64_ALT(reg, reg, generic_kind)
|
||||
#define DEFINE_GPR64_ALT(reg, alt, generic_kind) \
|
||||
{ \
|
||||
#reg, #alt, 8, GPR_OFFSET(gpr_##reg##_loongarch - gpr_first_loongarch), \
|
||||
lldb::eEncodingUint, lldb::eFormatHex, \
|
||||
GPR64_KIND(gpr_##reg, generic_kind), nullptr, nullptr \
|
||||
}
|
||||
|
||||
// Defines a 64-bit floating point register
|
||||
#define DEFINE_FPR64(reg, generic_kind) DEFINE_FPR64_ALT(reg, reg, generic_kind)
|
||||
#define DEFINE_FPR64_ALT(reg, alt, generic_kind) \
|
||||
{ \
|
||||
#reg, #alt, 8, FPR_OFFSET(fpr_##reg##_loongarch - fpr_first_loongarch), \
|
||||
lldb::eEncodingUint, lldb::eFormatHex, \
|
||||
FPR64_KIND(fpr_##reg, generic_kind), nullptr, nullptr \
|
||||
}
|
||||
|
||||
#define DEFINE_FCC(reg, generic_kind) \
|
||||
{ \
|
||||
#reg, nullptr, 1, FCC_OFFSET(fpr_##reg##_loongarch - fpr_fcc0_loongarch), \
|
||||
lldb::eEncodingUint, lldb::eFormatHex, \
|
||||
FPR64_KIND(fpr_##reg, generic_kind), nullptr, nullptr \
|
||||
}
|
||||
|
||||
#define DEFINE_FCSR(reg, generic_kind) \
|
||||
{ \
|
||||
#reg, nullptr, 4, FCSR_OFFSET, \
|
||||
lldb::eEncodingUint, lldb::eFormatHex, \
|
||||
FPR64_KIND(fpr_##reg, generic_kind), nullptr, nullptr \
|
||||
}
|
||||
|
||||
// clang-format on
|
||||
|
||||
static lldb_private::RegisterInfo g_register_infos_loongarch64[] = {
|
||||
DEFINE_GPR64_ALT(r0, zero, LLDB_INVALID_REGNUM),
|
||||
DEFINE_GPR64_ALT(r1, ra, LLDB_REGNUM_GENERIC_RA),
|
||||
DEFINE_GPR64_ALT(r2, tp, LLDB_INVALID_REGNUM),
|
||||
DEFINE_GPR64_ALT(r3, sp, LLDB_REGNUM_GENERIC_SP),
|
||||
DEFINE_GPR64_ALT(r4, a0, LLDB_REGNUM_GENERIC_ARG1),
|
||||
DEFINE_GPR64_ALT(r5, a1, LLDB_REGNUM_GENERIC_ARG2),
|
||||
DEFINE_GPR64_ALT(r6, a2, LLDB_REGNUM_GENERIC_ARG3),
|
||||
DEFINE_GPR64_ALT(r7, a3, LLDB_REGNUM_GENERIC_ARG4),
|
||||
DEFINE_GPR64_ALT(r8, a4, LLDB_REGNUM_GENERIC_ARG5),
|
||||
DEFINE_GPR64_ALT(r9, a5, LLDB_REGNUM_GENERIC_ARG6),
|
||||
DEFINE_GPR64_ALT(r10, a6, LLDB_REGNUM_GENERIC_ARG7),
|
||||
DEFINE_GPR64_ALT(r11, a7, LLDB_REGNUM_GENERIC_ARG8),
|
||||
DEFINE_GPR64_ALT(r12, t0, LLDB_INVALID_REGNUM),
|
||||
DEFINE_GPR64_ALT(r13, t1, LLDB_INVALID_REGNUM),
|
||||
DEFINE_GPR64_ALT(r14, t2, LLDB_INVALID_REGNUM),
|
||||
DEFINE_GPR64_ALT(r15, t3, LLDB_INVALID_REGNUM),
|
||||
DEFINE_GPR64_ALT(r16, t4, LLDB_INVALID_REGNUM),
|
||||
DEFINE_GPR64_ALT(r17, t5, LLDB_INVALID_REGNUM),
|
||||
DEFINE_GPR64_ALT(r18, t6, LLDB_INVALID_REGNUM),
|
||||
DEFINE_GPR64_ALT(r19, t7, LLDB_INVALID_REGNUM),
|
||||
DEFINE_GPR64_ALT(r20, t8, LLDB_INVALID_REGNUM),
|
||||
DEFINE_GPR64(r21, LLDB_INVALID_REGNUM),
|
||||
DEFINE_GPR64_ALT(r22, fp, LLDB_REGNUM_GENERIC_FP),
|
||||
DEFINE_GPR64_ALT(r22, s9, LLDB_REGNUM_GENERIC_FP),
|
||||
DEFINE_GPR64_ALT(r23, s0, LLDB_INVALID_REGNUM),
|
||||
DEFINE_GPR64_ALT(r24, s1, LLDB_INVALID_REGNUM),
|
||||
DEFINE_GPR64_ALT(r25, s2, LLDB_INVALID_REGNUM),
|
||||
DEFINE_GPR64_ALT(r26, s3, LLDB_INVALID_REGNUM),
|
||||
DEFINE_GPR64_ALT(r27, s4, LLDB_INVALID_REGNUM),
|
||||
DEFINE_GPR64_ALT(r28, s5, LLDB_INVALID_REGNUM),
|
||||
DEFINE_GPR64_ALT(r29, s6, LLDB_INVALID_REGNUM),
|
||||
DEFINE_GPR64_ALT(r30, s7, LLDB_INVALID_REGNUM),
|
||||
DEFINE_GPR64_ALT(r31, s8, LLDB_INVALID_REGNUM),
|
||||
|
||||
DEFINE_GPR64(orig_a0, LLDB_INVALID_REGNUM),
|
||||
DEFINE_GPR64(pc, LLDB_REGNUM_GENERIC_PC),
|
||||
DEFINE_GPR64(badv, LLDB_INVALID_REGNUM),
|
||||
DEFINE_GPR64(reserved0, LLDB_INVALID_REGNUM),
|
||||
DEFINE_GPR64(reserved1, LLDB_INVALID_REGNUM),
|
||||
DEFINE_GPR64(reserved2, LLDB_INVALID_REGNUM),
|
||||
DEFINE_GPR64(reserved3, LLDB_INVALID_REGNUM),
|
||||
DEFINE_GPR64(reserved4, LLDB_INVALID_REGNUM),
|
||||
DEFINE_GPR64(reserved5, LLDB_INVALID_REGNUM),
|
||||
DEFINE_GPR64(reserved6, LLDB_INVALID_REGNUM),
|
||||
DEFINE_GPR64(reserved7, LLDB_INVALID_REGNUM),
|
||||
DEFINE_GPR64(reserved8, LLDB_INVALID_REGNUM),
|
||||
DEFINE_GPR64(reserved9, LLDB_INVALID_REGNUM),
|
||||
|
||||
DEFINE_FPR64_ALT(f0, fa0, LLDB_INVALID_REGNUM),
|
||||
DEFINE_FPR64_ALT(f1, fa1, LLDB_INVALID_REGNUM),
|
||||
DEFINE_FPR64_ALT(f2, fa2, LLDB_INVALID_REGNUM),
|
||||
DEFINE_FPR64_ALT(f3, fa3, LLDB_INVALID_REGNUM),
|
||||
DEFINE_FPR64_ALT(f4, fa4, LLDB_INVALID_REGNUM),
|
||||
DEFINE_FPR64_ALT(f5, fa5, LLDB_INVALID_REGNUM),
|
||||
DEFINE_FPR64_ALT(f6, fa6, LLDB_INVALID_REGNUM),
|
||||
DEFINE_FPR64_ALT(f7, fa7, LLDB_INVALID_REGNUM),
|
||||
DEFINE_FPR64_ALT(f8, ft0, LLDB_INVALID_REGNUM),
|
||||
DEFINE_FPR64_ALT(f9, ft1, LLDB_INVALID_REGNUM),
|
||||
DEFINE_FPR64_ALT(f10, ft2, LLDB_INVALID_REGNUM),
|
||||
DEFINE_FPR64_ALT(f11, ft3, LLDB_INVALID_REGNUM),
|
||||
DEFINE_FPR64_ALT(f12, ft4, LLDB_INVALID_REGNUM),
|
||||
DEFINE_FPR64_ALT(f13, ft5, LLDB_INVALID_REGNUM),
|
||||
DEFINE_FPR64_ALT(f14, ft6, LLDB_INVALID_REGNUM),
|
||||
DEFINE_FPR64_ALT(f15, ft7, LLDB_INVALID_REGNUM),
|
||||
DEFINE_FPR64_ALT(f16, ft8, LLDB_INVALID_REGNUM),
|
||||
DEFINE_FPR64_ALT(f17, ft9, LLDB_INVALID_REGNUM),
|
||||
DEFINE_FPR64_ALT(f18, ft10, LLDB_INVALID_REGNUM),
|
||||
DEFINE_FPR64_ALT(f19, ft11, LLDB_INVALID_REGNUM),
|
||||
DEFINE_FPR64_ALT(f20, ft12, LLDB_INVALID_REGNUM),
|
||||
DEFINE_FPR64_ALT(f21, ft13, LLDB_INVALID_REGNUM),
|
||||
DEFINE_FPR64_ALT(f22, ft14, LLDB_INVALID_REGNUM),
|
||||
DEFINE_FPR64_ALT(f23, ft15, LLDB_INVALID_REGNUM),
|
||||
DEFINE_FPR64_ALT(f24, fs0, LLDB_INVALID_REGNUM),
|
||||
DEFINE_FPR64_ALT(f25, fs1, LLDB_INVALID_REGNUM),
|
||||
DEFINE_FPR64_ALT(f26, fs2, LLDB_INVALID_REGNUM),
|
||||
DEFINE_FPR64_ALT(f27, fs3, LLDB_INVALID_REGNUM),
|
||||
DEFINE_FPR64_ALT(f28, fs4, LLDB_INVALID_REGNUM),
|
||||
DEFINE_FPR64_ALT(f29, fs5, LLDB_INVALID_REGNUM),
|
||||
DEFINE_FPR64_ALT(f30, fs6, LLDB_INVALID_REGNUM),
|
||||
DEFINE_FPR64_ALT(f31, fs7, LLDB_INVALID_REGNUM),
|
||||
|
||||
DEFINE_FCC(fcc0, LLDB_INVALID_REGNUM),
|
||||
DEFINE_FCC(fcc1, LLDB_INVALID_REGNUM),
|
||||
DEFINE_FCC(fcc2, LLDB_INVALID_REGNUM),
|
||||
DEFINE_FCC(fcc3, LLDB_INVALID_REGNUM),
|
||||
DEFINE_FCC(fcc4, LLDB_INVALID_REGNUM),
|
||||
DEFINE_FCC(fcc5, LLDB_INVALID_REGNUM),
|
||||
DEFINE_FCC(fcc6, LLDB_INVALID_REGNUM),
|
||||
DEFINE_FCC(fcc7, LLDB_INVALID_REGNUM),
|
||||
DEFINE_FCSR(fcsr, LLDB_INVALID_REGNUM),
|
||||
};
|
||||
|
||||
#endif // DECLARE_REGISTER_INFOS_LOONGARCH64_STRUCT
|
||||
@@ -0,0 +1,179 @@
|
||||
//===-- lldb-loongarch-register-enums.h -------------------------*- C++ -*-===//
|
||||
//
|
||||
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
|
||||
// See https://llvm.org/LICENSE.txt for license information.
|
||||
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
|
||||
//
|
||||
//===----------------------------------------------------------------------===//
|
||||
|
||||
#ifndef LLDB_SOURCE_PLUGINS_PROCESS_UTILITY_LLDB_LOONGARCH_REGISTER_ENUMS_H
|
||||
#define LLDB_SOURCE_PLUGINS_PROCESS_UTILITY_LLDB_LOONGARCH_REGISTER_ENUMS_H
|
||||
|
||||
// LLDB register codes (e.g. RegisterKind == eRegisterKindLLDB)
|
||||
|
||||
// Internal codes for all loongarch registers.
|
||||
enum {
|
||||
// The same order as user_regs_struct in <asm/ptrace.h>
|
||||
// note: these enum values are used as byte_offset
|
||||
gpr_first_loongarch = 0,
|
||||
gpr_r0_loongarch = gpr_first_loongarch,
|
||||
gpr_r1_loongarch,
|
||||
gpr_r2_loongarch,
|
||||
gpr_r3_loongarch,
|
||||
gpr_r4_loongarch,
|
||||
gpr_r5_loongarch,
|
||||
gpr_r6_loongarch,
|
||||
gpr_r7_loongarch,
|
||||
gpr_r8_loongarch,
|
||||
gpr_r9_loongarch,
|
||||
gpr_r10_loongarch,
|
||||
gpr_r11_loongarch,
|
||||
gpr_r12_loongarch,
|
||||
gpr_r13_loongarch,
|
||||
gpr_r14_loongarch,
|
||||
gpr_r15_loongarch,
|
||||
gpr_r16_loongarch,
|
||||
gpr_r17_loongarch,
|
||||
gpr_r18_loongarch,
|
||||
gpr_r19_loongarch,
|
||||
gpr_r20_loongarch,
|
||||
gpr_r21_loongarch,
|
||||
gpr_r22_loongarch,
|
||||
gpr_r23_loongarch,
|
||||
gpr_r24_loongarch,
|
||||
gpr_r25_loongarch,
|
||||
gpr_r26_loongarch,
|
||||
gpr_r27_loongarch,
|
||||
gpr_r28_loongarch,
|
||||
gpr_r29_loongarch,
|
||||
gpr_r30_loongarch,
|
||||
gpr_r31_loongarch,
|
||||
gpr_orig_a0_loongarch,
|
||||
gpr_pc_loongarch,
|
||||
gpr_badv_loongarch,
|
||||
gpr_reserved0_loongarch,
|
||||
gpr_reserved1_loongarch,
|
||||
gpr_reserved2_loongarch,
|
||||
gpr_reserved3_loongarch,
|
||||
gpr_reserved4_loongarch,
|
||||
gpr_reserved5_loongarch,
|
||||
gpr_reserved6_loongarch,
|
||||
gpr_reserved7_loongarch,
|
||||
gpr_reserved8_loongarch,
|
||||
gpr_reserved9_loongarch,
|
||||
gpr_last_loongarch = 44,
|
||||
|
||||
gpr_zero_loongarch = gpr_r0_loongarch,
|
||||
gpr_ra_loongarch = gpr_r1_loongarch,
|
||||
gpr_tp_loongarch = gpr_r2_loongarch,
|
||||
gpr_sp_loongarch = gpr_r3_loongarch,
|
||||
gpr_a0_loongarch = gpr_r4_loongarch,
|
||||
gpr_a1_loongarch = gpr_r5_loongarch,
|
||||
gpr_a2_loongarch = gpr_r6_loongarch,
|
||||
gpr_a3_loongarch = gpr_r7_loongarch,
|
||||
gpr_a4_loongarch = gpr_r8_loongarch,
|
||||
gpr_a5_loongarch = gpr_r9_loongarch,
|
||||
gpr_a6_loongarch = gpr_r10_loongarch,
|
||||
gpr_a7_loongarch = gpr_r11_loongarch,
|
||||
gpr_t0_loongarch = gpr_r12_loongarch,
|
||||
gpr_t1_loongarch = gpr_r13_loongarch,
|
||||
gpr_t2_loongarch = gpr_r14_loongarch,
|
||||
gpr_t3_loongarch = gpr_r15_loongarch,
|
||||
gpr_t4_loongarch = gpr_r16_loongarch,
|
||||
gpr_t5_loongarch = gpr_r17_loongarch,
|
||||
gpr_t6_loongarch = gpr_r18_loongarch,
|
||||
gpr_t7_loongarch = gpr_r19_loongarch,
|
||||
gpr_t8_loongarch = gpr_r20_loongarch,
|
||||
gpr_fp_loongarch = gpr_r22_loongarch,
|
||||
gpr_s9_loongarch = gpr_r22_loongarch,
|
||||
gpr_s0_loongarch = gpr_r23_loongarch,
|
||||
gpr_s1_loongarch = gpr_r24_loongarch,
|
||||
gpr_s2_loongarch = gpr_r25_loongarch,
|
||||
gpr_s3_loongarch = gpr_r26_loongarch,
|
||||
gpr_s4_loongarch = gpr_r27_loongarch,
|
||||
gpr_s5_loongarch = gpr_r28_loongarch,
|
||||
gpr_s6_loongarch = gpr_r29_loongarch,
|
||||
gpr_s7_loongarch = gpr_r30_loongarch,
|
||||
gpr_s8_loongarch = gpr_r31_loongarch,
|
||||
|
||||
fpr_first_loongarch = 45,
|
||||
fpr_f0_loongarch = fpr_first_loongarch,
|
||||
fpr_f1_loongarch,
|
||||
fpr_f2_loongarch,
|
||||
fpr_f3_loongarch,
|
||||
fpr_f4_loongarch,
|
||||
fpr_f5_loongarch,
|
||||
fpr_f6_loongarch,
|
||||
fpr_f7_loongarch,
|
||||
fpr_f8_loongarch,
|
||||
fpr_f9_loongarch,
|
||||
fpr_f10_loongarch,
|
||||
fpr_f11_loongarch,
|
||||
fpr_f12_loongarch,
|
||||
fpr_f13_loongarch,
|
||||
fpr_f14_loongarch,
|
||||
fpr_f15_loongarch,
|
||||
fpr_f16_loongarch,
|
||||
fpr_f17_loongarch,
|
||||
fpr_f18_loongarch,
|
||||
fpr_f19_loongarch,
|
||||
fpr_f20_loongarch,
|
||||
fpr_f21_loongarch,
|
||||
fpr_f22_loongarch,
|
||||
fpr_f23_loongarch,
|
||||
fpr_f24_loongarch,
|
||||
fpr_f25_loongarch,
|
||||
fpr_f26_loongarch,
|
||||
fpr_f27_loongarch,
|
||||
fpr_f28_loongarch,
|
||||
fpr_f29_loongarch,
|
||||
fpr_f30_loongarch,
|
||||
fpr_f31_loongarch,
|
||||
fpr_fcc0_loongarch,
|
||||
fpr_fcc1_loongarch,
|
||||
fpr_fcc2_loongarch,
|
||||
fpr_fcc3_loongarch,
|
||||
fpr_fcc4_loongarch,
|
||||
fpr_fcc5_loongarch,
|
||||
fpr_fcc6_loongarch,
|
||||
fpr_fcc7_loongarch,
|
||||
fpr_fcsr_loongarch,
|
||||
fpr_last_loongarch = fpr_fcsr_loongarch,
|
||||
|
||||
fpr_fa0_loongarch = fpr_f0_loongarch,
|
||||
fpr_fa1_loongarch = fpr_f1_loongarch,
|
||||
fpr_fa2_loongarch = fpr_f2_loongarch,
|
||||
fpr_fa3_loongarch = fpr_f3_loongarch,
|
||||
fpr_fa4_loongarch = fpr_f4_loongarch,
|
||||
fpr_fa5_loongarch = fpr_f5_loongarch,
|
||||
fpr_fa6_loongarch = fpr_f6_loongarch,
|
||||
fpr_fa7_loongarch = fpr_f7_loongarch,
|
||||
fpr_ft0_loongarch = fpr_f8_loongarch,
|
||||
fpr_ft1_loongarch = fpr_f9_loongarch,
|
||||
fpr_ft2_loongarch = fpr_f10_loongarch,
|
||||
fpr_ft3_loongarch = fpr_f11_loongarch,
|
||||
fpr_ft4_loongarch = fpr_f12_loongarch,
|
||||
fpr_ft5_loongarch = fpr_f13_loongarch,
|
||||
fpr_ft6_loongarch = fpr_f14_loongarch,
|
||||
fpr_ft7_loongarch = fpr_f15_loongarch,
|
||||
fpr_ft8_loongarch = fpr_f16_loongarch,
|
||||
fpr_ft9_loongarch = fpr_f17_loongarch,
|
||||
fpr_ft10_loongarch = fpr_f18_loongarch,
|
||||
fpr_ft11_loongarch = fpr_f19_loongarch,
|
||||
fpr_ft12_loongarch = fpr_f20_loongarch,
|
||||
fpr_ft13_loongarch = fpr_f21_loongarch,
|
||||
fpr_ft14_loongarch = fpr_f22_loongarch,
|
||||
fpr_ft15_loongarch = fpr_f23_loongarch,
|
||||
fpr_fs0_loongarch = fpr_f24_loongarch,
|
||||
fpr_fs1_loongarch = fpr_f25_loongarch,
|
||||
fpr_fs2_loongarch = fpr_f26_loongarch,
|
||||
fpr_fs3_loongarch = fpr_f27_loongarch,
|
||||
fpr_fs4_loongarch = fpr_f28_loongarch,
|
||||
fpr_fs5_loongarch = fpr_f29_loongarch,
|
||||
fpr_fs6_loongarch = fpr_f30_loongarch,
|
||||
fpr_fs7_loongarch = fpr_f31_loongarch,
|
||||
|
||||
k_num_registers_loongarch
|
||||
};
|
||||
|
||||
#endif // LLDB_SOURCE_PLUGINS_PROCESS_UTILITY_LLDB_LOONGARCH_REGISTER_ENUMS_H
|
||||
178
lldb/source/Utility/LoongArch_DWARF_Registers.h
Normal file
178
lldb/source/Utility/LoongArch_DWARF_Registers.h
Normal file
@@ -0,0 +1,178 @@
|
||||
//===-- LoongArch_DWARF_Registers.h -----------------------------*- C++ -*-===//
|
||||
//
|
||||
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
|
||||
// See https://llvm.org/LICENSE.txt for license information.
|
||||
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
|
||||
//
|
||||
//===----------------------------------------------------------------------===//
|
||||
|
||||
#ifndef LLDB_SOURCE_UTILITY_LOONGARCH_DWARF_REGISTERS_H
|
||||
#define LLDB_SOURCE_UTILITY_LOONGARCH_DWARF_REGISTERS_H
|
||||
|
||||
#include "lldb/lldb-private.h"
|
||||
|
||||
namespace loongarch_dwarf {
|
||||
|
||||
enum {
|
||||
dwarf_gpr_r0 = 0,
|
||||
dwarf_gpr_r1,
|
||||
dwarf_gpr_r2,
|
||||
dwarf_gpr_r3,
|
||||
dwarf_gpr_r4,
|
||||
dwarf_gpr_r5,
|
||||
dwarf_gpr_r6,
|
||||
dwarf_gpr_r7,
|
||||
dwarf_gpr_r8,
|
||||
dwarf_gpr_r9,
|
||||
dwarf_gpr_r10,
|
||||
dwarf_gpr_r11,
|
||||
dwarf_gpr_r12,
|
||||
dwarf_gpr_r13,
|
||||
dwarf_gpr_r14,
|
||||
dwarf_gpr_r15,
|
||||
dwarf_gpr_r16,
|
||||
dwarf_gpr_r17,
|
||||
dwarf_gpr_r18,
|
||||
dwarf_gpr_r19,
|
||||
dwarf_gpr_r20,
|
||||
dwarf_gpr_r21,
|
||||
dwarf_gpr_r22,
|
||||
dwarf_gpr_r23,
|
||||
dwarf_gpr_r24,
|
||||
dwarf_gpr_r25,
|
||||
dwarf_gpr_r26,
|
||||
dwarf_gpr_r27,
|
||||
dwarf_gpr_r28,
|
||||
dwarf_gpr_r29,
|
||||
dwarf_gpr_r30,
|
||||
dwarf_gpr_r31 = 31,
|
||||
|
||||
dwarf_gpr_orig_a0,
|
||||
dwarf_gpr_pc,
|
||||
dwarf_gpr_badv,
|
||||
|
||||
dwarf_gpr_reserved0 = 35,
|
||||
dwarf_gpr_reserved1,
|
||||
dwarf_gpr_reserved2,
|
||||
dwarf_gpr_reserved3,
|
||||
dwarf_gpr_reserved4,
|
||||
dwarf_gpr_reserved5,
|
||||
dwarf_gpr_reserved6,
|
||||
dwarf_gpr_reserved7,
|
||||
dwarf_gpr_reserved8,
|
||||
dwarf_gpr_reserved9,
|
||||
|
||||
dwarf_fpr_f0 = 45,
|
||||
dwarf_fpr_f1,
|
||||
dwarf_fpr_f2,
|
||||
dwarf_fpr_f3,
|
||||
dwarf_fpr_f4,
|
||||
dwarf_fpr_f5,
|
||||
dwarf_fpr_f6,
|
||||
dwarf_fpr_f7,
|
||||
dwarf_fpr_f8,
|
||||
dwarf_fpr_f9,
|
||||
dwarf_fpr_f10,
|
||||
dwarf_fpr_f11,
|
||||
dwarf_fpr_f12,
|
||||
dwarf_fpr_f13,
|
||||
dwarf_fpr_f14,
|
||||
dwarf_fpr_f15,
|
||||
dwarf_fpr_f16,
|
||||
dwarf_fpr_f17,
|
||||
dwarf_fpr_f18,
|
||||
dwarf_fpr_f19,
|
||||
dwarf_fpr_f20,
|
||||
dwarf_fpr_f21,
|
||||
dwarf_fpr_f22,
|
||||
dwarf_fpr_f23,
|
||||
dwarf_fpr_f24,
|
||||
dwarf_fpr_f25,
|
||||
dwarf_fpr_f26,
|
||||
dwarf_fpr_f27,
|
||||
dwarf_fpr_f28,
|
||||
dwarf_fpr_f29,
|
||||
dwarf_fpr_f30,
|
||||
dwarf_fpr_f31 = 76,
|
||||
|
||||
dwarf_fpr_fcc0,
|
||||
dwarf_fpr_fcc1,
|
||||
dwarf_fpr_fcc2,
|
||||
dwarf_fpr_fcc3,
|
||||
dwarf_fpr_fcc4,
|
||||
dwarf_fpr_fcc5,
|
||||
dwarf_fpr_fcc6,
|
||||
dwarf_fpr_fcc7,
|
||||
dwarf_fpr_fcsr,
|
||||
|
||||
// register name alias
|
||||
dwarf_gpr_zero = dwarf_gpr_r0,
|
||||
dwarf_gpr_ra = dwarf_gpr_r1,
|
||||
dwarf_gpr_tp = dwarf_gpr_r2,
|
||||
dwarf_gpr_sp = dwarf_gpr_r3,
|
||||
dwarf_gpr_a0 = dwarf_gpr_r4,
|
||||
dwarf_gpr_a1 = dwarf_gpr_r5,
|
||||
dwarf_gpr_a2 = dwarf_gpr_r6,
|
||||
dwarf_gpr_a3 = dwarf_gpr_r7,
|
||||
dwarf_gpr_a4 = dwarf_gpr_r8,
|
||||
dwarf_gpr_a5 = dwarf_gpr_r9,
|
||||
dwarf_gpr_a6 = dwarf_gpr_r10,
|
||||
dwarf_gpr_a7 = dwarf_gpr_r11,
|
||||
dwarf_gpr_t0 = dwarf_gpr_r12,
|
||||
dwarf_gpr_t1 = dwarf_gpr_r13,
|
||||
dwarf_gpr_t2 = dwarf_gpr_r14,
|
||||
dwarf_gpr_t3 = dwarf_gpr_r15,
|
||||
dwarf_gpr_t4 = dwarf_gpr_r16,
|
||||
dwarf_gpr_t5 = dwarf_gpr_r17,
|
||||
dwarf_gpr_t6 = dwarf_gpr_r18,
|
||||
dwarf_gpr_t7 = dwarf_gpr_r19,
|
||||
dwarf_gpr_t8 = dwarf_gpr_r20,
|
||||
dwarf_gpr_fp = dwarf_gpr_r22,
|
||||
dwarf_gpr_s9 = dwarf_gpr_r22,
|
||||
dwarf_gpr_s0 = dwarf_gpr_r23,
|
||||
dwarf_gpr_s1 = dwarf_gpr_r24,
|
||||
dwarf_gpr_s2 = dwarf_gpr_r25,
|
||||
dwarf_gpr_s3 = dwarf_gpr_r26,
|
||||
dwarf_gpr_s4 = dwarf_gpr_r27,
|
||||
dwarf_gpr_s5 = dwarf_gpr_r28,
|
||||
dwarf_gpr_s6 = dwarf_gpr_r29,
|
||||
dwarf_gpr_s7 = dwarf_gpr_r30,
|
||||
dwarf_gpr_s8 = dwarf_gpr_r31,
|
||||
|
||||
dwarf_fpr_fa0 = dwarf_fpr_f0,
|
||||
dwarf_fpr_fa1 = dwarf_fpr_f1,
|
||||
dwarf_fpr_fa2 = dwarf_fpr_f2,
|
||||
dwarf_fpr_fa3 = dwarf_fpr_f3,
|
||||
dwarf_fpr_fa4 = dwarf_fpr_f4,
|
||||
dwarf_fpr_fa5 = dwarf_fpr_f5,
|
||||
dwarf_fpr_fa6 = dwarf_fpr_f6,
|
||||
dwarf_fpr_fa7 = dwarf_fpr_f7,
|
||||
dwarf_fpr_ft0 = dwarf_fpr_f8,
|
||||
dwarf_fpr_ft1 = dwarf_fpr_f9,
|
||||
dwarf_fpr_ft2 = dwarf_fpr_f10,
|
||||
dwarf_fpr_ft3 = dwarf_fpr_f11,
|
||||
dwarf_fpr_ft4 = dwarf_fpr_f12,
|
||||
dwarf_fpr_ft5 = dwarf_fpr_f13,
|
||||
dwarf_fpr_ft6 = dwarf_fpr_f14,
|
||||
dwarf_fpr_ft7 = dwarf_fpr_f15,
|
||||
dwarf_fpr_ft8 = dwarf_fpr_f16,
|
||||
dwarf_fpr_ft9 = dwarf_fpr_f17,
|
||||
dwarf_fpr_ft10 = dwarf_fpr_f18,
|
||||
dwarf_fpr_ft11 = dwarf_fpr_f19,
|
||||
dwarf_fpr_ft12 = dwarf_fpr_f20,
|
||||
dwarf_fpr_ft13 = dwarf_fpr_f21,
|
||||
dwarf_fpr_ft14 = dwarf_fpr_f22,
|
||||
dwarf_fpr_ft15 = dwarf_fpr_f23,
|
||||
dwarf_fpr_fs0 = dwarf_fpr_f24,
|
||||
dwarf_fpr_fs1 = dwarf_fpr_f25,
|
||||
dwarf_fpr_fs2 = dwarf_fpr_f26,
|
||||
dwarf_fpr_fs3 = dwarf_fpr_f27,
|
||||
dwarf_fpr_fs4 = dwarf_fpr_f28,
|
||||
dwarf_fpr_fs5 = dwarf_fpr_f29,
|
||||
dwarf_fpr_fs6 = dwarf_fpr_f30,
|
||||
dwarf_fpr_fs7 = dwarf_fpr_f31,
|
||||
};
|
||||
|
||||
} // namespace loongarch_dwarf
|
||||
|
||||
#endif // LLDB_SOURCE_UTILITY_LOONGARCH_DWARF_REGISTERS_H
|
||||
Reference in New Issue
Block a user