Commit Graph

7948 Commits

Author SHA1 Message Date
Eduard Zingerman
58bdf8f9a8 [BPF] preserve btf_decl_tag for parameters of extern functions
Generate DILocalVariable entries for parameters of extern functions,
the "annotations" field of DILocalVariable is used to link
"btf_decl_tag" annotation with the parameter.

Do this only for BPF backend as there are no other users for this
information. Final DWARF is valid as "Appendix A" is very much lax in
what is allowed as attributes for "DW_TAG_formal_parameter":

    DWARF does not in general require that a given debugging information
    entry contain a particular attribute or set of attributes. Instead,
    a DWARF producer is free to generate any, all, or none of the
    attributes ... other attributes ... may also appear in a given
    debugging information entry.

DWARF Debugging Information Format Version 5,
Appendix A: Attributes by Tag Value (Informative)
Page 251, Line 3.

Differential Revision: https://reviews.llvm.org/D140970
2023-01-06 22:48:52 -08:00
Xiaodong Liu
9e06d18c80 [LoongArch] Add intrinsics for CACOP instruction
The CACOP instruction is mainly used for cache initialization
and cache-consistency maintenance.

Depends on D140872

Reviewed By: SixWeining

Differential Revision: https://reviews.llvm.org/D140527
2023-01-06 11:41:35 +08:00
Fangrui Song
cf8fd210a3 [C] Make (c ? e1 : e2) noreturn only if both e1 and e2 are noreturn
In C mode, if e1 has __attribute__((noreturn)) but e2 doesn't, `(c ? e1 : e2)`
is incorrectly noreturn and Clang codegen produces `unreachable`
which may lead to miscompiles (see [1] `gawk/support/dfa.c`).
This problem has been known since
8c6b56f39d (2010) or earlier.

Fix this by making the result type noreturn only if both e1 and e2 are
noreturn, matching GCC.

`_Noreturn` and `[[noreturn]]` do not have the aforementioned problem.

Fix https://github.com/llvm/llvm-project/issues/59792 [1]

Reviewed By: aaron.ballman

Differential Revision: https://reviews.llvm.org/D140868
2023-01-05 14:36:36 -08:00
Fangrui Song
b58927ec0c [test] Test __attribute__((noreturn)), _Noreturn, and [[return]] with conditional operator 2023-01-05 11:18:17 -08:00
Zahira Ammarguellat
85d049a089 Implement support for option 'fexcess-precision'.
Differential revision: https://reviews.llvm.org/D136176
2023-01-05 09:35:28 -05:00
Freddy Ye
27b8f54f51 [X86] Support -march=emeraldrapids
Reviewed By: pengfei, skan

Differential Revision: https://reviews.llvm.org/D140950
2023-01-05 20:27:32 +08:00
Alan Zhao
4e02ff2303 [clang] Revert parentesized aggregate initalization patches
This feature causes clang to crash when compiling Chrome - see
https://crbug.com/1405031 and
https://github.com/llvm/llvm-project/issues/59675

Revert "[clang] Fix a clang crash on invalid code in C++20 mode."

This reverts commit 32d7aae04f.

Revert "[clang] Remove overly restrictive aggregate paren init logic"

This reverts commit c77a91bb7b.

Revert "[clang][C++20] P0960R3 and P1975R0: Allow initializing aggregates from a parenthesized list of values"

This reverts commit 40c52159d3.
2023-01-04 15:09:36 -08:00
David Green
997852920d [AArch64] Alter arm_neon_sve_bridge.h to be target-based, not preprocessor based.
Similar to D131064, this alters the arm_neon_sve_bridge.h header to use
target-based intrinsics that give an error if used in a function that
does not have the sve features, but are not preprocessed out. This
header is simpler than the arm_sve.h and other headers, not including
any tablegen'd content. The main change is altering the builtin
definitions from using BUILTIN to TARGET_BUILTIN.

Differential Revision: https://reviews.llvm.org/D132639
2023-01-04 13:09:26 +00:00
Xiaodong Liu
63d46869ea [LoongArch] Add intrinsics for MOVFCSR2GR and MOVGR2FCSR instructions
Instruction formats:
`movgr2fcsr fcsr, rj`
`movfcsr2gr rd, fcsr`
MOVGR2FCSR modifies the value of the software writable field
corresponding to the FCSR (floating-point control and status
register) `fcsr` according to the value of the lower 32 bits of
the GR (general purpose register) `rj`.
MOVFCSR2GR sign extends the 32-bit value of the FCSR `fcsr`
and writes it into the GR `rd`.

Add "i32 @llvm.loongarch.movfcsr2gr(i32)" intrinsic for MOVFCSR2GR
instruction. The argument is FCSR register number. The return value
is the value in the FCSR.
Add "void @llvm.loongarch.movgr2fcsr(i32, i32)" intrinsic for MOVGR2FCSR
instruction. The first argument is the FCSR number, the second argument
is the value in GR.

Reviewed By: SixWeining, xen0n

Differential Revision: https://reviews.llvm.org/D140685
2023-01-04 14:11:30 +08:00
Matt Arsenault
ce6ae0b2a2 clang: Don't emit "frame-pointer"="none"
This is the default behavior and cuts down on attribute spam.
Probably should also do something to consolidate the option spellings;
printing and parsing it is repeated in at least 3 different places.

In the OpenMP tests, I had to manually delete some metadata check
lines update_cc_test_checks was inserting that included the local
build revision.
2023-01-03 19:42:46 -05:00
Fangrui Song
83cec143c7 [clang] Change CodeGenOptions::RelaxELFRelocations/assembler defaults to match MC default
MC default was flipped in 2016.
CMake ENABLE_X86_RELAX_RELOCATIONS defaults to on in 2020 (c41a18cf61).
It makes sense for the CodeGenOptions::RelaxELFRelocations to match, so
that most -cc1/-cc1as command lines won't have this option.

This also fixes a minor issue: -fno-plt -S will now use GOT for
__tls_get_addr calls, matching -fno-plt -c.
2022-12-31 22:24:37 -08:00
eopXD
1972fb23cb [Clang][RISCV] Use poison instead of undef
Reviewed By: khchen

Differential Revision: https://reviews.llvm.org/D140687
2022-12-28 23:15:31 -08:00
Freddy Ye
9816c1912d [X86] Rename CMPCCXADD intrinsics.
"__cmpccxadd_epi*" -> "_cmpccxadd_epi*"
This is to align with other intrinsics to follow single leading "_" style. Gcc
and intrinsic guide website will also apply this change.

Reviewed By: LuoYuanke, skan

Differential Revision: https://reviews.llvm.org/D140281
2022-12-28 16:45:50 +08:00
Pavel Iliin
fe5cf480ee Reland "[AArch64] FMV support and necessary target features dependencies."
This relands commits e43924a751,
a43f36142c,
bf94eac6a3 with MSan buildbot
https://lab.llvm.org/buildbot/#/builders/5/builds/30139
use-of-uninitialized-value errors fixed.

Differential Revision: https://reviews.llvm.org/D127812
2022-12-27 19:18:07 +00:00
Chen Zheng
b1d7010caa [DebugInfo] make DW_LANG_C11 respect -gstrict-dwarf
Reviewed By: dblaikie

Differential Revision: https://reviews.llvm.org/D140544
2022-12-25 21:01:02 -05:00
Phoebe Wang
073cc29e04 [X86][Reduce] Preserve fast math flags when change it. NFCI
@arsenm raised a good question that we should use a flag guard.
But I found it is not a problem as long as user uses intrinsics only: https://godbolt.org/z/WoYsqqjh3
Anyway, it is still nice to have.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D140467
2022-12-24 11:41:17 +08:00
Freddy Ye
68a888012b [X86] Add reduce_*_ep[i|u]8/16 series intrinsics.
Reviewed By: pengfei, skan

Differential Revision: https://reviews.llvm.org/D140531
2022-12-23 14:54:53 +08:00
Fangrui Song
69243cdb92 Remove incorrectly implemented -mibt-seal
The option from D116070 does not work as intended and will not be needed when
hidden visibility is used. A function needs ENDBR if it may be reached
indirectly. If we make ThinLTO combine the address-taken property (close to
`!GV.use_empty() && !GV.hasAtLeastLocalUnnamedAddr()`), then the condition can
be expressed with:

`AddressTaken || (!F.hasLocalLinkage() && (VisibleToRegularObj || !F.hasHiddenVisibility()))`

The current `F.hasAddressTaken()` condition does not take into acount of
address-significance in another bitcode file or ELF relocatable file.

For the Linux kernel, it uses relocatable linking. lld/ELF uses a
conservative approach by setting all `VisibleToRegularObj` to true.
Using the non-relocatable semantics may under-estimate
`VisibleToRegularObj`. As @pcc mentioned on
https://github.com/ClangBuiltLinux/linux/issues/1737#issuecomment-1343414686
, we probably need a symbol list to supply additional
`VisibleToRegularObj` symbols (not part of the relocatable LTO link).

Reviewed By: samitolvanen

Differential Revision: https://reviews.llvm.org/D140363
2022-12-22 12:32:59 -08:00
gonglingqin
e726703c27 [Clang][LoongArch] Add intrinsic for rdtime_d, rdtimeh_w and rdtimel_w
Add these intrinsics to keep consistent with GCC [1].

[1]: https://github.com/gcc-mirror/gcc/blob/master/gcc/config/loongarch/larchintrin.h#L33

Differential Revision: https://reviews.llvm.org/D139987
2022-12-22 19:21:22 +08:00
gonglingqin
aeb8f911b1 [Clang][LoongArch] Add intrinsic for asrtle, asrtgt, lddir, ldpte and cpucfg
`__cpucfg` is required by Linux [1].

[1]: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/loongarch/include/asm/loongarch.h#n59

Differential Revision: https://reviews.llvm.org/D139915
2022-12-22 18:56:34 +08:00
Matt Arsenault
437346abe1 clang: Add __builtin_elementwise canonicalize and copysign
Just copy paste from the other functions. I also need fma, but
the current code seems to assume 1 or 2 arguments.
2022-12-21 18:01:42 -05:00
Mingming Liu
c847e22db3 [AArch64] Guard {vmull_p64, vmull_high_p64} with 'aes' target guard.
The 'aes' target guard includes both FEAT_AES and FEAT_PMULL currently.

In this way, cpp code that uses these intrinsics without specifying the required extension gets better hint.
- Before, compile crashes with LLVM ISel internal message (see issue [[ https://github.com/llvm/llvm-project/issues/59599 | 59599 ]]).
- After, clang hints that target 'aes' is required in the command.

Reviewed By: dmgreen

Differential Revision: https://reviews.llvm.org/D140432
2022-12-21 11:02:27 -08:00
Alan Zhao
c77a91bb7b [clang] Remove overly restrictive aggregate paren init logic
Previously, we would only attempt to perform a parenthesized aggregate
initialization if constructor initialization failed for only the default
constructor, default copy constructor, and default move constructor. The
original intent of this logic was to reject initializing objects that
have failed resolving a user-defined constructor. However, this check is
redundant because we check for isAggregate() before attempting to
perform a parenthesized aggregate initialization, and classes that have
user-defined or user-declared constructors are not aggregates.
Furthermore, this check is too restrictive - the following valid
examples fail:
* Aggregate class with user-defined destructor - fails because default
  move constructors are not generated for classes with user-defined
  destructors
  (https://github.com/llvm/llvm-project/issues/54040#issuecomment-1356926048)
* Concept-guarded conversion operator on an aggregate's member:
  (https://github.com/llvm/llvm-project/issues/54040#issuecomment-1356931745)

The solution therefore is to remove this logic; existing tests still
pass, and the previously failing examples now compile.

Reviewed By: ilya-biryukov

Differential Revision: https://reviews.llvm.org/D140327
2022-12-21 08:21:05 -08:00
Matt Arsenault
2bb59549e1 clang: Respect function address space for __builtin_function_start
Fixes assertion.
2022-12-21 08:27:24 -05:00
Matt Arsenault
7191232305 clang: Fix another assert from not respecting function address spaces 2022-12-21 08:27:24 -05:00
Matt Arsenault
947905a1c5 clang: Use correct address space for redeclared functions
Fixes assert/verifier error with AVR.
2022-12-21 08:27:24 -05:00
Ben Shi
b2638a7a34 [clang] Do not extend i8 return values to i16 on AVR.
Reviewed By: Miss_Grape, aykevl

Differential Revision: https://reviews.llvm.org/D139908
2022-12-21 20:33:49 +08:00
Phoebe Wang
e746a9a600 [Clang] Emit "min-legal-vector-width" attribute for X86 only
This is an alternative way of D139627 suggested by Craig. Creently only X86 backend uses this attribute. Let's just emit for X86 only.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D139701
2022-12-21 11:54:05 +08:00
Mitch Phillips
744486ec21 Revert "[AArch64] FMV support and necessary target features dependencies."
This reverts commit e43924a751.

Reason: Patch broke the MSan buildbots. More information is available on
the original phabricator review: https://reviews.llvm.org/D127812
2022-12-20 17:16:32 -08:00
Pavel Iliin
e43924a751 [AArch64] FMV support and necessary target features dependencies.
This is Function Multi Versioning (FMV) implementation for AArch64 target in
accordance with Beta Arm C Language Extensions specification
https://github.com/ARM-software/acle/blob/main/main/acle.md#function-multi-versioning
It supports new "target_version" function attribute and extends existing
"target_clones" one. Also missing dependencies for target features were added.

Differential Revision: https://reviews.llvm.org/D127812
2022-12-20 15:42:25 +00:00
yronglin
ebe530ef7a [CodeGen][AArch64] Fix AArch64ABIInfo::EmitAAPCSVAArg crash with empty record type in variadic arg
Fix AArch64ABIInfo::EmitAAPCSVAArg crash with empty record type in variadic arg

Open issue: https://github.com/llvm/llvm-project/issues/59034

Reviewed By: rjmccall

Differential Revision: https://reviews.llvm.org/D138511
2022-12-20 22:06:01 +08:00
Muhammad Omair Javaid
301f3da516 [CLANG] Fix typo in test/CodeGen/c-strings.c
This patch fixes a typo in test/CodeGen/c-strings.c. Test was failing
on AArch64/Windows.
2022-12-20 13:59:16 +05:00
Muhammad Omair Javaid
8e029d9e35 [CLANG] XFAIL c-strings.c & volatile-1.c AArch64/Windows
c-strings.c was marked XFAIL for msvc ABI on AArch64/Windows platform.
But it is failing due to alignment issue on WoA for both msvc and gnu
gnu ABIs. I am going to mark them as XFAIL for both.
2022-12-19 14:03:30 +05:00
Qiu Chaofan
a40ef656d8 [Intrinsic] Rename flt.rounds intrinsic to get.rounding
Address the inconsistency between FLT_ROUNDS_ and SET_ROUNDING SDAG
node. Rename FLT_ROUNDS_ to GET_ROUNDING and add llvm.get.rounding
intrinsic to replace flt.rounds.

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D139507
2022-12-19 15:22:39 +08:00
Ganesh Gopalasubramanian
1f057e365f [X86] AMD Zen 4 Initial enablement
Reviewed By: RKSimon
Differential Revision: https://reviews.llvm.org/D139073
2022-12-17 16:15:22 +05:30
Sprite
a9f9f3dff4 Correct typos (NFC)
Just found some typos while reading the llvm/circt project.

compliment -> complement
emitsd -> emits
2022-12-16 10:51:26 -08:00
Archibald Elliott
82b51a1428 [AArch64] Support SLC in ACLE prefetch intrinsics
This change:
- Modifies the ACLE code to allow the new SLC value (3) for the prefetch
  target.

- Introduces a new intrinsic, @llvm.aarch64.prefetch which matches the
  PRFM family instructions much more closely, and can represent all
  values for the PRFM immediate.

  The target-independent @llvm.prefetch intrinsic does not have enough
  information for us to be able to lower to it from the ACLE intrinsics
  correctly.

- Lowers the acle calls to the new intrinsic on aarch64 (the ARM
  lowering is unchanged).

- Implements code generation for the new intrinsic in both SelectionDAG
  and GlobalISel. We specifically choose to continue to support lowering
  the target-independent @llvm.prefetch intrinsic so that other
  frontends can continue to use it.

Differential Revision: https://reviews.llvm.org/D139443
2022-12-16 14:42:27 +00:00
Paul Robinson
e0f2150e99 [clang] Convert tests to check 'target=...'
Part of the project to eliminate special handling for triples in lit
expressions.
2022-12-15 12:26:33 -08:00
Paul Robinson
948bb35d74 [PPC] Convert tests to check 'target=<triple>'
Two tests checked 'ppc64be' which appears not to exist; the tests
pass on clang-ppc64be-linux-multistage so I assume they are fine
and just removed those UNSUPPORTED lines. All others were converted
to the new target= format, and get the same results on ppc bots as
before.

Part of the project to eliminate special handling for triples in lit
expressions.

Differential Revision: https://reviews.llvm.org/D138954
2022-12-15 07:01:14 -08:00
Manuel Brito
84b4ff24e9 [Clang][CodeGen] Use poison instead of undef in CodeGen for ARM Builtins [NFC]
Differential Revision: https://reviews.llvm.org/D140090
2022-12-15 12:00:53 +00:00
Nikita Popov
e20cc31ae4 [Clang] Convert test to opaque pointers (NFC)
Required a lot of manual, but uninteresting, fixup.
2022-12-14 17:03:27 +01:00
Alan Zhao
40c52159d3 [clang][C++20] P0960R3 and P1975R0: Allow initializing aggregates from a parenthesized list of values
This patch implements P0960R3, which allows initialization of aggregates
via parentheses.

As an example:

```
struct S { int i, j; };
S s1(1, 1);

int arr1[2](1, 2);
```

This patch also implements P1975R0, which fixes the wording of P0960R3
for single-argument parenthesized lists so that statements like the
following are allowed:

```
S s2(1);
S s3 = static_cast<S>(1);
S s4 = (S)1;

int (&&arr2)[] = static_cast<int[]>(1);
int (&&arr3)[2] = static_cast<int[2]>(1);
```

This patch was originally authored by @0x59616e and completed by
@ayzhao.

Fixes #54040, Fixes #54041

Co-authored-by: Sheng <ox59616e@gmail.com>

Full write up : https://discourse.llvm.org/t/c-20-rfc-suggestion-desired-regarding-the-implementation-of-p0960r3/63744

Reviewed By: ilya-biryukov

Differential Revision: https://reviews.llvm.org/D129531
2022-12-14 07:54:15 -08:00
David Blaikie
c73876db4f Reapply "DebugInfo: Add/support new DW_LANG codes for recent C and C++ versions""
This may be a breaking change for consumers if they're trying to detect
if code is C or C++, since it'll start using new codes that they may not
be ready to recognize, in which case they may fall back to non-C
handling.

This caused regressions due to PS4 having a different default for C
language version than other targets. Those tests were adapted to be
relaxed about which C version is used.

This reapplies commit 3c312e48f3
Which was reverted by commit 6ab6085c77.

Differential Revision: https://reviews.llvm.org/D138597
2022-12-12 22:36:23 +00:00
Paul Robinson
7793e67651 [ZOS] Convert tests to check 'target={{.*}}-zos{{.*}}'
Also add 'system-zos' as a lit feature and use it where needed.

Part of the project to eliminate special handling for triples in lit
expressions.

Differential Revision: https://reviews.llvm.org/D139444
2022-12-12 11:25:19 -08:00
Paul Robinson
b7ada67f1c [lit] Use 'target=' in a few more places
Missed these on the first pass.

Part of the project to eliminate special handling for triples in lit
expressions.
2022-12-12 09:58:38 -08:00
Nikita Popov
945ed9e419 [Clang] Convert some tests to opaque pointers (NFC)
These were tests where update_cc_test_checks.py was rerun after
the conversion.
2022-12-12 17:24:40 +01:00
Nikita Popov
9466b49171 [Clang] Convert various tests to opaque pointers (NFC)
These were all tests where no manual fixup was required.
2022-12-12 17:11:46 +01:00
Nikita Popov
2c69e1d19a [Clang] Convert PowerPC tests to opaque pointers (NFC) 2022-12-12 15:32:44 +01:00
gonglingqin
9853c0263e [LoongArch] Test CodeGen/LoongArch/intrinsic-la32.c with -O2. NFC.
To avoid excessive redundancy in test cases, use -O2 instead of -O0
for testing.
2022-12-12 17:22:07 +08:00
Zakk Chen
4ca9c6a84f [NFC][Clang] Add missing test cases for segment load
This patch fixed the missing test cases from: 010f329803

Reviewed By: kito-cheng, craig.topper

Differential Revision: https://reviews.llvm.org/D139387
2022-12-11 19:02:47 -08:00