Commit Graph

764 Commits

Author SHA1 Message Date
Lang Hames
3b2f879509 [ORC] Use dyn_cast to check input type in StaticLibraryDefinitionGenerator.
Replaces an llvm::cast that assumed that all Binary instances were either
Archive or MachOUniversalBinary instances with a dyn_cast. The cast was
triggering an assert in StaticLibraryDefinitionGenerator::Load if that method
was given a path or MemoryBuffer containing a relocatable object file.
Switching to dyn_cast causes the operation to error out with a bad-format
error as expected.

Fixes rdar://119262300
2023-12-06 14:01:55 -08:00
Lang Hames
b4e1915517 Re-apply "[llvm-jitlink] Add Process and Platform JITDylibs, ..." with fixes.
This reapplies 3d0dd1a7d6, which was reverted in df2485b215 due to bot
failures. This patch addresses the issues seen on the bots by disabling two
Linux atexit tests in the ORC runtime whose behavior could not be maintained
now that the ORC runtime is being loaded into a separate Platform JITDylib.
https://github.com/llvm/llvm-project/issues/74641 has been filed to fix the
issue with atexit.
2023-12-06 12:35:56 -08:00
Lang Hames
df2485b215 Revert "[llvm-jitlink] Add Process and Platform JITDylibs, generalize alias..."
This reverts commit 3d0dd1a7d6 while I investigate bot failures (e.g.
https://lab.llvm.org/buildbot/#/builders/272/builds/2573)
2023-12-05 10:23:31 -08:00
Lang Hames
3d0dd1a7d6 [llvm-jitlink] Add Process and Platform JITDylibs, generalize alias option.
The Process JITDylib holds reflected process symbols. The Platform JITDylib
holds ORC runtime symbols if the ORC runtime is loaded. The Platform and
Process JITDylibs are appended to the link order of all other JITDylibs,
including the main JITDylib, after any explicitly specified libraries. This
scheme is similar to the one introduced in LLJIT in 371cb1af61, and makes
it easier to introduce aliases for process and platform symbols in a way that
affects all JITDylibs uniformly.

Since the Process and Platform JITDylibs are created implicitly the -alias
option is generalized to allow source and destination JITDylibs to be explicitly
specified, i.e. the -alias option now supports general re-exports.

Testcases are updated to account for the change.
2023-12-05 09:48:58 -08:00
Arthur Eubanks
d8a04398f9 Reland [X86] With large code model, put functions into .ltext with large section flag (#73037)
So that when mixing small and large text, large text stays out of the
way of the rest of the binary.

This is useful for mixing precompiled small code model object files and
built-from-source large code model binaries so that the the text
sections don't get merged.

The reland fixes an issue where a function in the large code model would reference small data without GOTOFF.

This was incorrectly reverted in 76f78ecc78.
2023-12-01 14:23:44 -08:00
Dmitri Gribenko
76f78ecc78 Revert "Reland [X86] With large code model, put functions into .ltext with large section flag (#73037)"
This reverts commit 4bf8a68895.

This commit seems to be breaking the semantics of the
ObjectFile::isSectionText method, which breaks numba/llvmlite bindings.
2023-12-01 17:18:14 +01:00
Arthur Eubanks
4bf8a68895 Reland [X86] With large code model, put functions into .ltext with large section flag (#73037)
So that when mixing small and large text, large text stays out of the
way of the rest of the binary.

This is useful for mixing precompiled small code model object files and
built-from-source large code model binaries so that the the text
sections don't get merged.

The reland fixes an issue where a function in the large code model would reference small data without GOTOFF.
2023-11-30 15:17:17 -08:00
Arthur Eubanks
d8d9394cb0 Revert "[X86] With large code model, put functions into .ltext with large section flag (#73037)"
This reverts commit 38e4358957.

May be culprit for https://lab.llvm.org/buildbot/#/builders/37/builds/28079/steps/9/logs/stdio.
2023-11-28 14:14:40 -08:00
Arthur Eubanks
38e4358957 [X86] With large code model, put functions into .ltext with large section flag (#73037)
So that when mixing small and large text, large text stays out of the
way of the rest of the binary.

This is useful for mixing precompiled small code model object files and
built-from-source large code model binaries so that the the text
sections don't get merged.
2023-11-28 12:55:17 -08:00
Stefan Gränitz
95dcb8b49d [llvm-jitlink] Support plain AArch32 stubs in jitlink-check's stub_addr() expressions (#73268)
We want to use regular `stub_addr()` expressions in `jitlink-check` lines to test the generation of stubs in AArch32, but we don't want this to require a standardized GOT-based PLT implementation. In terms of performance and binary size it doesn't seem beneficial. And in terms of patching branch targets, we should be able to handle range-extension- and interworking-stubs without a lot of extra logic.

In order to allow such AArch32 stubs we add a separate path for `stub_addr()` expressions in `llvm-jitlink-elf`. The relocations in our stubs are not pointing to the GOT, but to the external symbol directly. Thus, we have to avoid access to the block of the edge target. Instead we only return the symbol name, which is enough to use `stub_addr()` expressions in tests.

The name of the AArch32 stubs section differs from the conventional `$__STUBS` on purpose. It allows to add a regular PLT/GOT implementation as an orthogonal feature in the future. In order to also allow decoding of stub target addresses in the future, we mention the stub flavor in the section name as well.
2023-11-24 21:41:00 +01:00
Stefan Gränitz
3bf6cbd51a [JITLink][AArch32] Add tests for BLX interworking calls
Exercise transformation of BL into BLX instructions, if
instruction set mode differs between origin and target.
2023-11-23 22:01:41 +01:00
Eymen Ünay
87081f1c18 [JITLink][AArch32] Add support for ELF::R_ARM_THM_MOV{W_PREL_NC,T_PREL} (#70364)
Support for ELF::R_ARM_THM_MOVW_PREL_NC and ELF::R_ARM_THM_MOVT_PREL
is added. Move instructions with PC-relative immediates can be handled
in Thumb mode with this addition.
2023-11-09 11:51:02 +03:00
Eymen Ünay
6a451ea5b4 [JITLink][AArch32] Add test for ELF::R_ARM_THM_MOV{W_ABS_NC,T_ABS} (#70346)
Support for ELF::R_ARM_THM_MOVW_ABS_NC and ELF::R_ARM_THM_MOVT_ABS
was present but lacked tests. Test cases are similar to the ARM
versions of the relocations in ELF_static_arm_reloc.s.
2023-11-07 21:00:45 +03:00
Eymen Ünay
1e46bc73a4 [JITLink][AArch32] Tests for ELF::R_ARM_ABS32 and ELF::R_ARM_REL32
Testing for Static Data relocations for both ARM and Thumb targets.

Reviewed By: lhames, Eymay

Differential Revision: https://reviews.llvm.org/D157519
2023-11-07 12:31:37 +01:00
Jonas Hahnfeld
4f6757ce4b [JITLink][RISCV] Implement eh_frame handling (#68253)
This requires adding a `NegDelta32` edge kind that cannot be mapped to
existing relocations.

Co-authored-by: Job Noorman <jnoorman@igalia.com>
2023-10-28 11:30:43 +02:00
Dudeldu
75d6f508f8 [Interpreter] Add initialization of array members (#66172)
Currently, the interpreter does not initialize `undef` constants of
aggregate types correctly (with respect to arrays).
The initialization of the array elements is skipped although it is valid
to directly write to them. Instructions like
`insertvalue {i32, [4 x i32]} undef, i32 1, 1, 2` therefore lead to a
crash.
This is fixed by initializing array values just as fixed-size vectors or
structs.
2023-10-20 15:27:11 +02:00
Kai Luo
18dc8dcd76 [PowerPC][JITLink] Support R_PPC64_GOT_TLSGD_PCREL34 (#68660)
`R_PPC64_GOT_TLSGD_PCREL34` is generated for pwr10+.
2023-10-14 10:57:03 +08:00
Kai Luo
a712244f3b [PowerPC][JITLink] Support R_PPC64_GOT_PCREL34 (#68658)
`R_PPC64_GOT_PCREL34` is generated for pwr10+.
2023-10-13 08:51:11 +08:00
Leonard Chan
2ae3a71230 Fix minimal-throw-catch.ll on x86 mac
It looks like this broke after https://reviews.llvm.org/D86310 and the
data layout just needs to be updated for this test.
2023-10-12 20:34:31 +00:00
Jonas Hahnfeld
b9383a86b8 [JITLink] Some cleanups to EHFrameSupport (#66707)
* Remove unused variable.
 * Error on existing edge at CIE pointer field.
 * Simplify CFI processing in `EHFrameEdgeFixer`: The code expects
`DWARFRecordSectionSplitter` to split each CFI record into its own
block, so remove loop over possibly multiple entries in one block.
2023-10-05 18:16:48 +02:00
kda
c7294486f3 Disable MSAN test: ELF_perf.s
This should be repaired.  Fixes build bots quickly.

Introduced:
https://reviews.llvm.org/D146169
2023-09-18 13:17:33 -07:00
Prem Chintalapudi
88e3358f33 [ORC][JITLink] Non-debuginfo JITLink perf jitdump support.
This patch ports PerfJITEventListener to a JITLink plugin, but adds unwind
record support and drops debuginfo support temporarily. Debuginfo can be
enabled in the future by providing a way to obtain a DWARFContext from a
LinkGraph.

Reviewed By: lhames

Differential Revision: https://reviews.llvm.org/D146169
2023-09-18 04:10:29 +00:00
Eymen Ünay
e575b7cb7a [JITlink][AArch32] Implement ELF::R_ARM_MOVT_ABS and R_ARM_MOVW_ABS_NC (#66219)
Add support for static Arm relocations of R_ARM_MOVT_ABS and R_ARM_MOVW_ABS_NC
which are emitted by movt and movw instructions. The implementation contains
relocation fixup and its testing as well as its encode/decode functions for
reading and writing immediate values together with its unittests.
2023-09-14 17:50:53 -07:00
Kai Luo
1dae4dd0d8 [JITLink][PowerPC] Fix incorrect assertion of addend for R_PPC64_REL24
There is case that R_PPC64_REL24 with non-zero addend. The assertion is incorrectly triggered in such situation.

Reviewed By: lhames

Differential Revision: https://reviews.llvm.org/D158708
2023-09-14 02:40:45 +00:00
Eymen Ünay
62f793ec9c [JITLink][AArch32] Implement ELF::R_ARM_JUMP24 relocation
Added support and test for ELF::R_ARM_JUMP24

Reviewed By: sgraenitz

Differential Revision: https://reviews.llvm.org/D157541
2023-09-13 17:16:29 +02:00
Eymen Ünay
142c89c381 [JITLink][AArch32] Implement ELF::R_ARM_CALL relocation
- Added WritableArmRelocation and ArmRelocation Structs
- Encode/Decode funcs for B/BL A1 and BLX A2 encodings
- Add ARM helper functions, consistent with the existing Thumb helper functions
- Add Test for ELF::R_ARM_CALL

Reviewed By: sgraenitz

Differential Revision: https://reviews.llvm.org/D157533
2023-09-13 17:16:29 +02:00
Eymen Ünay
9c017a99d5 [jitlink][rtdyld][checker] Re-apply 4b17c81d5a with fixes.
This re-applies 4b17c81d5a, "[jitlink/rtdydl][checker] Add TargetFlag
dependent disassembler switching support", which was reverted in
4871a9ca54 due to bot failures.

The patch has been updated to add missing plumbing for Subtarget Features and
a CPU string, which should fix the failing tests.

https://reviews.llvm.org/D158280
2023-09-09 13:10:38 -07:00
bzEq
0eeca5739a [JITLink][PowerPC] Port rtdyld's tests to jitlink. NFC. (#65739) 2023-09-09 05:52:58 +08:00
Tom Weaver
4871a9ca54 Revert "[jitlink/rtdydl][checker] Add TargetFlag dependent disassembler switching support"
This reverts commit 4b17c81d5a.

Caused buildbot failures:
https://lab.llvm.org/buildbot/#/builders/230/builds/18341
https://lab.llvm.org/buildbot/#/builders/109/builds/73169
https://lab.llvm.org/buildbot/#/builders/67/builds/12597
2023-09-08 13:41:11 +01:00
Eymen Ünay
4b17c81d5a [jitlink/rtdydl][checker] Add TargetFlag dependent disassembler switching support
Some targets such as AArch32 make use of TargetFlags to indicate ISA mode. Depending
on the TargetFlag, MCDisassembler and similar target specific objects should be
reinitialized with the correct Target Triple. Backends with similar needs can
easily extend this implementation for their usecase.

The drivers llvm-rtdyld and llvm-jitlink have their SymbolInfo's extended to take
TargetFlag into account. RuntimeDyldChecker can now create necessary TargetInfo
to reinitialize MCDisassembler and MCInstPrinter. The required triple is obtained
from the new getTripleFromTargetFlag function by checking the TargetFlag.

In addition, breaking changes for RuntimeDyld COFF Thumb tests are fixed by making
the backend emit a TargetFlag.

Reviewed By: lhames, sgraenitz

Differential Revision: https://reviews.llvm.org/D158280
2023-09-08 09:06:15 +02:00
Stefan Gränitz
24f8822876 [JITLink][AArch32] Add initial test for R_ARM_THM_CALL and R_ARM_THM_JUMP24
This test still fails since RuntimeDyldChecker needs a few fixes before it works with Thumb. We can remove the XFAIL once the patch in D158280 landed.
2023-09-06 17:49:51 +02:00
Kai Luo
bed9081896 Reland [JITLink][PowerPC] Pre-commit test for D158708. NFC. 2023-08-28 14:06:02 +08:00
Alex Lorenz
41db543807 Revert "[JITLink][PowerPC] Pre-commit test for D158708. NFC."
This reverts commit 4468103bf6.

This added testcase is failing on Darwin:
https://green.lab.llvm.org/green/job/clang-stage1-cmake-RA-incremental/37181/testReport/junit/LLVM/ExecutionEngine_JITLink_ppc64/ppc64_rel24_non_zero_addend_test/

More info in: https://reviews.llvm.org/D158708
2023-08-24 09:03:05 -07:00
Kai Luo
4468103bf6 [JITLink][PowerPC] Pre-commit test for D158708. NFC. 2023-08-24 07:41:33 +00:00
Kai Luo
b6e2eac293 [JITLink][PowerPC] Add relocations included in rtdyld but missing from jitlink
RuntimeDyld has implemented more relocations than JITLink for ppc64. This patch adds relocations missing from JITLink for ppc64.

Reviewed By: lhames

Differential Revision: https://reviews.llvm.org/D157366
2023-08-13 09:44:18 +08:00
Kai Luo
beb937e8dd [JITLink][PowerPC] Correct size and align in assembly directives. NFC. 2023-08-09 05:24:47 +00:00
Kai Luo
d6791fb774 [JITLink][PowerPC] Fix relocations in stubs for ppc64 big-endian target
Offset and addend are fixed for big-endian stubs.

Reviewed By: lhames

Differential Revision: https://reviews.llvm.org/D157257
2023-08-09 02:04:01 +00:00
Kai Luo
af07ec316f [JITLink][PowerPC] Enable more tests for ppc64 big-endian target. NFC. 2023-08-07 15:52:58 +08:00
Kai Luo
0c1f318646 [JITLink][PowerPC] Rename test files by removing 'le' suffix. NFC. 2023-08-07 11:21:05 +08:00
Kai Luo
be7a54655c [JITLink][ELF] Fix reading target architecture when the ELF object is big-endian
Reviewed By: lhames

Differential Revision: https://reviews.llvm.org/D156982
2023-08-04 10:55:38 +08:00
Kai Luo
68c98f3550 [JITLink][PowerPC] Add run lines for powerpc64. NFC. 2023-08-03 09:55:03 +00:00
Kai Luo
ca6d86f6bf [JITLink][PowerPC] Support R_PPC64_PCREL34
PC-relative instructions are added in ISA-3.1 implemented by pwr10. This patch adds basic pc-relative relocation.

Reviewed By: lhames

Differential Revision: https://reviews.llvm.org/D155771
2023-08-02 02:00:38 +00:00
Cullen Rhodes
ce6303f0e6 [lli] Fix crash on empty entry-function
Empty entry-function triggers the following assertion:

  llvm/lib/IR/Mangler.cpp:38: void getNameWithPrefixImpl(llvm::raw_ostream
  &, const llvm::Twine &, (anonymous namespace)::ManglerPrefixTy, const
  llvm::DataLayout &, char):

  Assertion `!Name.empty() && "getNameWithPrefix requires non-empty name"' failed.

Throw an error if entry-function is empty.

Reviewed By: lhames

Differential Revision: https://reviews.llvm.org/D156516
2023-07-31 09:29:54 +00:00
Martin Storsjö
ca18b4a0c1 [test] [MCJIT] Don't overwrite config.unsupported to False
An outer directory may have set config.unsupported to True for
a different reason, separate from architecture concerns - we
shouldn't force it back to False just because one criterion is
fulfilled.

Differential Revision: https://reviews.llvm.org/D149995
2023-07-28 23:37:09 +03:00
Job Noorman
ec4d061671 [JITLink][RISCV] Fix tests after D154958 2023-07-28 11:13:03 +02:00
Saleem Abdulrasool
d4a5bef170 ExecutionEngine: support IMAGE_REL_AMD64_SECTION relocations
This relocation type is often used for debug information on Windows.  We
would previously abort due to the unreachable for the unhandled
relocation type.  Add support for this to prevent LLDB from aborting if
it encounters this relocation type.
2023-07-27 12:40:42 -07:00
Kai Luo
11a02de782 [JITLink][PowerPC] Change method to check if a symbol is external to current object
After PrePrunePass `claimOrExternalizeWeakAndCommonSymbols`, a defined symbol might become external. So determine a function call is external or not when building the linkgraph is not accurate. This largely affects updating TOC pointer on PowerPC. TOC pointer is supposed to be the same in one object file(if no mulitple TOC appears) and is updated when control flow transferred to another object file.

This patch defers checking a function call is external or not, in `buildTables_ELF_ppc64` which is a PostPrunePass.

This patch fixes failures when `jitlink -orc-runtime=/path/to/libort_rt.a` is used.

Reviewed By: lhames

Differential Revision: https://reviews.llvm.org/D155925
2023-07-26 03:20:56 +00:00
Kai Luo
cee4494c14 [JITLink][PowerPC] Pre-commit test for D155925. NFC. 2023-07-25 08:27:03 +00:00
Kai Luo
995f199f0a [JITLink][PowerPC] Correct handling of R_PPC64_REL24_NOTOC
According to the ELFv2 ABI

> This relocation type is used to specify a function call where the TOC pointer is not initialized. It is similar to R_PPC64_REL24 in that it specifies a symbol to be resolved. If the symbol resolves to a function that requires a TOC pointer (as determined by st_other bits) then a link editor must arrange for the call to be via the global entry point of the called function. Any stub code must not rely on a valid TOC base address in r2.

This patch fixes handling of `R_PPC64_REL24_NOTOC` by using the same stub code sequence as lld.

Reviewed By: lhames

Differential Revision: https://reviews.llvm.org/D155672
2023-07-24 14:00:53 +08:00
Fangrui Song
f6cce566b3 [Support] Change StringMap hash function from xxHash64 to xxh3_64bits
Similar to D142862.

xxh3 is significantly faster than xxh64. Switch to xxh3, as we did for
for lld and llvm-dwarfutil to increase performance (D154813 D155675).
While I think StringMap is not a bottleneck for most applications, it
seems good to eliminate the slower xxh64.
In addition, according to Erik Desjardins, an artificial benchmark of
Rust with very large constant strings improves by ~3% locally.

I have fixed all found issues (~20) separately, but one is remaining:

* ExecutionEngine/RuntimeDyld/ARM/MachO_ARM_PIC_relocations.s has a
  failure due to StringMap iteration order. It now passes
  with LLVM_ENABLE_REVERSE_ITERATION=on while failing with
  LLVM_ENABLE_REVERSE_ITERATION=off.

Reviewed By: erikdesjardins

Differential Revision: https://reviews.llvm.org/D155781
2023-07-22 16:50:47 -07:00