Commit Graph

2655 Commits

Author SHA1 Message Date
Alexey Samsonov
8e1162c71d Implement nonnull-attribute sanitizer
Summary:
This patch implements a new UBSan check, which verifies
that function arguments declared to be nonnull with __attribute__((nonnull))
are actually nonnull in runtime.

To implement this check, we pass FunctionDecl to CodeGenFunction::EmitCallArgs
(where applicable) and if function declaration has nonnull attribute specified
for a certain formal parameter, we compare the corresponding RValue to null as
soon as it's calculated.

Test Plan: regression test suite

Reviewers: rsmith

Reviewed By: rsmith

Subscribers: cfe-commits, rnk

Differential Revision: http://reviews.llvm.org/D5082

llvm-svn: 217389
2014-09-08 17:22:45 +00:00
NAKAMURA Takumi
4b04c11d00 clang/test/CodeGen/builtin-assume*.c: Fixup for -Asserts.
llvm-svn: 217352
2014-09-08 01:12:55 +00:00
Hal Finkel
bcc06085a8 Add __builtin_assume and __builtin_assume_aligned using @llvm.assume.
This makes use of the recently-added @llvm.assume intrinsic to implement a
__builtin_assume(bool) intrinsic (to provide additional information to the
optimizer). This hooks up __assume in MS-compatibility mode to mirror
__builtin_assume (the semantics have been intentionally kept compatible), and
implements GCC's __builtin_assume_aligned as assume((p - o) & mask == 0). LLVM
now contains special logic to deal with assumptions of this form.

llvm-svn: 217349
2014-09-07 22:58:14 +00:00
Chandler Carruth
2949e548f4 [x86] Clean up the x86 builtin specs to reflect r217310 in LLVM which
made the 8-bit masks actually 8-bit arguments to these intrinsics.

These builtins are a mess. Many were missing the I qualifier which
I added where obviously correct. Most aren't tested, but I've updated
the relevant tests. I've tried to catch all the things that should
become 'c' in this round.

It's also frustrating because the set of these is really ad-hoc and
doesn't really map that cleanly to the set supported by either GCC or
LLVM. Oh well...

llvm-svn: 217311
2014-09-06 10:30:51 +00:00
James Molloy
163b1ba471 [ARMv8] Add support for 32-bit MIN/MAXNM and directed rounding.
This patch adds support for the 32bit numeric max/min and directed round-to-integral NEON intrinsics that were added as part of v8, along with unit tests.

Patch by Graham Hunter!

llvm-svn: 217242
2014-09-05 13:50:34 +00:00
Hans Wennborg
d71907dd07 Don't emit prologues or epilogues for naked functions (PR18791, PR20028)
For naked functions with parameters, Clang would still emit stores in the prologue
that would clobber the stack, because LLVM doesn't set up a stack frame. (This
shows up in -O0 compiles, because the stores are optimized away otherwise.)

For example:

  __attribute__((naked)) int f(int x) {
    asm("movl $42, %eax");
    asm("retl");
  }

Would result in:

  _Z1fi:
  movl    12(%esp), %eax
  movl    %eax, (%esp)    <--- Oops.
  movl    $42, %eax
  retl

Differential Revision: http://reviews.llvm.org/D5183

llvm-svn: 217198
2014-09-04 22:16:33 +00:00
Reid Kleckner
9b3e3dfc54 MS inline asm: Allow __asm blocks to set a return value
If control falls off the end of a function after an __asm block, MSVC
assumes that the inline assembly filled the EAX and possibly EDX
registers with an appropriate return value. This functionality is used
in inline functions returning 64-bit integers in system headers, so we
need some amount of compatibility.

This is implemented in Clang by adding extra output constraints to every
inline asm block, and storing the resulting output registers into the
return value slot. If we see an asm block somewhere in the function
body, we emit a normal epilogue instead of marking the end of the
function with a return type unreachable.

Normal returns in functions not using this functionality will overwrite
the return value slot, and in most cases LLVM should be able to
eliminate the dead stores.

Fixes PR17201.

Reviewed By: majnemer

Differential Revision: http://reviews.llvm.org/D5177

llvm-svn: 217187
2014-09-04 20:04:38 +00:00
Reid Kleckner
a4ab03ec21 MS inline asm: Add a test for xgetbv clobbers
llvm-svn: 217174
2014-09-04 16:58:47 +00:00
Daniel Sanders
e5018b6c00 [mips] Mark aggregates returned in registers with the 'inreg' attribute.
Summary:
This allows us to easily find them in the backend after the aggregates have
been lowered to other types. This is important on big-endian targets using
the N32/N64 ABI's since these ABI's must shift small structures into the
upper bits of the register.

Reviewers: atanasyan

Reviewed By: atanasyan

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D5005

llvm-svn: 217160
2014-09-04 15:05:39 +00:00
Daniel Sanders
ed39f58390 [mips] Zero-sized structs cannot be ignored in MipsABIInfo::classifyReturnType() for O32
Summary:
They are returned indirectly which causes the other arguments to move to
the next argument slot.

With this, utils/ABITest does not discover any failing cases in the first
500 attempts on big/little endian for O32. Previously some of these failed.
Also tested N32/N64 little endian (big endian has other known issues) with
no issues.

Reviewers: atanasyan

Reviewed By: atanasyan

Subscribers: atanasyan, cfe-commits

Differential Revision: http://reviews.llvm.org/D4811

llvm-svn: 217147
2014-09-04 13:28:14 +00:00
Tom Stellard
c4e0c1075b CGBuiltin: Use @llvm.fabs rather than fabs libcall when emitting builtins
Using the intrinsic allows the SelectionDAGBuilder to turn this call
into the FABS Node and also the intrinsic is something the vectorizer knows
how to vectorize.

This patch also sets the readnone attribute on this call, which should
enable additional optmizations.

llvm-svn: 217042
2014-09-03 15:24:29 +00:00
Hans Wennborg
2029991d74 Check in a test case for the problem with late-dropped dllimport (PR20803)
llvm-svn: 216749
2014-08-29 17:36:11 +00:00
James Molloy
90d6101410 Use store size instead of alloc size when coercing.
Previously, EnterStructPointerForCoercedAccess used Alloc size when determining how to convert. This was problematic, because there were situations were the alloc size was larger than the store size. For example, if the first element of a structure were i24 and the destination type were i32, the old code would generate a GEP and a load i24. The code should compare store sizes to ensure the whole object is loaded. I have attached a test case.

This patch modifies the output of arm64-be-bitfield.c test case, but the new IR seems to be equivalent, and after -O3, the compiler generates identical ARM assembly. (asr x0, x0, #54)

Patch by Thomas Jablin!

llvm-svn: 216722
2014-08-29 10:17:52 +00:00
David Majnemer
0392cf892f CodeGen: Don't completely mess-up optimized atomic libcalls
Summary:
We did a great job getting this wrong:
- We messed up which LLVM IR types to use for arguments and return values.
  The optimized libcalls use integer types for values.

  Clang attempted to use the IR type which corresponds to the value
  passed in instead of using an appropriately sized integer type.  This
  would result in violations of the ABI for, as an example, floating
  point types.
- We didn't bother recording the result of the atomic libcall in the
  destination memory.

Instead, call the functions with arguments matching the type of the
libcall prototype's parameters.

This fixes PR20780.

Differential Revision: http://reviews.llvm.org/D5098

llvm-svn: 216714
2014-08-29 07:27:49 +00:00
Kostya Serebryany
4a9187a810 call __asan_load_cxx_array_cookie when loading array cookie in asan mode.
Summary:
The current implementation of asan cookie is incorrect:
we add nosanitize metadata to the cookie load, but the metadata may be lost
and we will instrument the load from poisoned memory.
This change replaces the load with a call to __asan_load_cxx_array_cookie (r216692)

Reviewers: rsmith

Reviewed By: rsmith

Subscribers: cfe-commits

Differential Revision: http://reviews.llvm.org/D5111

llvm-svn: 216702
2014-08-29 01:01:32 +00:00
Hans Wennborg
0a20f5417c Better codegen support for DLL attributes being dropped after the first declaration (PR20792)
For the following code:

  __declspec(dllimport) int f(int x);
  int user(int x) {
    return f(x);
  }
  int f(int x) { return 1; }

Clang will drop the dllimport attribute in the AST, but CodeGen would have
already put it on the LLVM::Function, and that would never get updated.
(The same thing happens for global variables.)

This makes Clang check dropped DLL attribute case each time the LLVM object
is referenced.

This isn't perfect, because we will still get it wrong if the function is
never referenced by codegen after the attribute is dropped, but this handles
the common cases and makes us not fail in the verifier.

llvm-svn: 216699
2014-08-29 00:16:06 +00:00
Yi Kong
623393f31e arm_acle: Implement data processing intrinsics
Summary:
ACLE 2.0 section 9.2 defines the following "miscellaneous data processing intrinsics": `__clz`, `__cls`, `__ror`, `__rev`, `__rev16`, `__revsh` and `__rbit`.

`__clz` has already been implemented in the arm_acle.h header file. The rest are not supported yet. This patch completes ACLE data processing intrinsics.

Reviewers: t.p.northover, rengolin

Reviewed By: rengolin

Subscribers: aemerson, mroth, llvm-commits

Differential Revision: http://reviews.llvm.org/D4983

llvm-svn: 216658
2014-08-28 09:44:07 +00:00
Alexey Samsonov
9fc9bf83a8 Properly handle multiple nonnull attributes in CodeGen
llvm-svn: 216638
2014-08-28 00:53:20 +00:00
Richard Smith
00cc1c09c3 Fix regression in r216520: don't apply nonnull to non-pointer function
parameters in the IR.

llvm-svn: 216574
2014-08-27 18:56:18 +00:00
Oliver Stannard
ed8ecc8429 Allow __fp16 as a function arg or return type for AArch64
ACLE 2.0 allows __fp16 to be used as a function argument or return
type. This enables this for AArch64.

This also fixes an existing bug that causes clang to not allow
homogeneous floating-point aggregates with a base type of __fp16. This
is valid for AAPCS64, but not for AAPCS-VFP.

llvm-svn: 216558
2014-08-27 16:31:57 +00:00
NAKAMURA Takumi
6107a8f4db Quick fix to test/CodeGen/2007-06-18-SextAttrAggregate.c for x86_64-mingw32, corresponding to r216507.
FIXME: Explicit triplets might be given here.
llvm-svn: 216557
2014-08-27 16:22:26 +00:00
Oliver Stannard
2bfdc5b517 Move some ARM-specific code from CGCall.cpp to TargetInfo.cpp
This tidies up some ARM-specific code added by r208417 to move it out
of the target-independent parts of clang into TargetInfo.cpp. This
also has the advantage that we can now flatten struct arguments to
variadic AAPCS functions.

llvm-svn: 216535
2014-08-27 10:43:15 +00:00
Julien Lerouge
10dcff81be Re-apply r216491 (Win64 ABI shouldn't extend integer type arguments.)
This time though, preserve the extension for bool types since that's compatible
with what MSVC expects.

See http://reviews.llvm.org/D4380

llvm-svn: 216507
2014-08-27 00:36:55 +00:00
Julien Lerouge
e8d34fa172 Revert 216491, it breaks CodeGenCXX/microsoft-abi-member-pointers.cpp
llvm-svn: 216496
2014-08-26 22:11:53 +00:00
Julien Lerouge
0056256b55 Win64 ABI shouldn't extend integer type arguments.
Summary:
MSVC doesn't extend integer types smaller than 64bit, so to preserve
binary compatibility, clang shouldn't either.

For example, the following C code built with MSVC:

unsigned test(unsigned v);
unsigned foobar(unsigned short);
int main() { return test(0xffffffff) + foobar(28); }

Produces the following:

  0000000000000004: B9 FF FF FF FF     mov         ecx,0FFFFFFFFh
  0000000000000009: E8 00 00 00 00     call        test
  000000000000000E: 89 44 24 20        mov         dword ptr [rsp+20h],eax
  0000000000000012: 66 B9 1C 00        mov         cx,1Ch
  0000000000000016: E8 00 00 00 00     call        foobar

And as you can see, when setting up the call to foobar, only cx is overwritten.

If foobar is compiled with clang, then the zero extension added by clang means
the rest of the register, which contains garbage, could be used.

For example if foobar is:

unsigned foobar(unsigned short v) {
    return v;
}

Compiled with clang -fomit-frame-pointer -O3 gives the following assembly:

foobar:
  0000000000000000: 89 C8              mov         eax,ecx
  0000000000000002: C3                 ret

And that function would return garbage because the 16 most significant bits of
ecx still contain garbage from the first call.

With this change, the code for that function is now:

foobar:
  0000000000000000: 0F B7 C1           movzx       eax,cx
  0000000000000003: C3                 ret

Reviewers: chapuni, rnk

Reviewed By: rnk

Subscribers: majnemer, cfe-commits

Differential Revision: http://reviews.llvm.org/D4380

llvm-svn: 216491
2014-08-26 21:52:27 +00:00
Fariborz Jahanian
ffc120a900 revert patch r216469.
llvm-svn: 216485
2014-08-26 21:10:47 +00:00
Quentin Colombet
bb9a858b25 [test/CodeGen/ARM] Update arm_neon_intrinsics test case to actually test the
lowering of the intrinsics.
Prior to this commit, most of the copy-related intrinsics could be optimized
away. The situation is still not ideal as there are several possibilities to
lower a given intrinsic. Currently, we match LLVM behavior.

llvm-svn: 216474
2014-08-26 18:43:31 +00:00
Fariborz Jahanian
840438bb06 c11- Check for c11 language option as documentation says
feature is c11 about nested struct declarations must have
struct-declarator-list. Without this change, code
which was meant for c99 breaks. rdar://18125536

llvm-svn: 216469
2014-08-26 18:13:47 +00:00
Yi Kong
6891746cd8 arm_acle: Add mappings for dbg intrinsic
This completes all ACLE hint intrinsics.

llvm-svn: 216453
2014-08-26 12:48:11 +00:00
Yi Kong
1d268af094 ARM: Add dbg builtin intrinsic
llvm-svn: 216452
2014-08-26 12:48:06 +00:00
Yi Kong
0705e0065e arm_acle: Implement swap intrinsic
Insert the LDREX/STREX instruction sequence specified in ARM ACLE 2.0,
as SWP instruction is deprecated since ARMv6.

llvm-svn: 216446
2014-08-26 09:50:54 +00:00
Kostya Serebryany
4ee6904288 [clang/asan] call __asan_poison_cxx_array_cookie after operator new[]
Summary:
PR19838
When operator new[] is called and an array cookie is created
we want asan to detect buffer overflow bugs that touch the cookie.
For that we need to
  a) poison the shadow for the array cookie (call __asan_poison_cxx_array_cookie).
  b) ignore the legal accesses to the cookie generated by clang (add 'nosanitize' metadata)

Reviewers: timurrrr, samsonov, rsmith

Reviewed By: rsmith

Subscribers: cfe-commits

Differential Revision: http://reviews.llvm.org/D4774

llvm-svn: 216434
2014-08-26 02:29:59 +00:00
Hal Finkel
6208251923 Implement __builtin_signbitl for PowerPC
PowerPC uses the special PPC_FP128 type for long double on Linux, which is
composed of two 64-bit doubles. The higher-order double (which contains the
overall sign) comes first, and so the __builtin_signbitl implementation
requires special handling to extract the sign bit.

Fixes PR20691.

llvm-svn: 216341
2014-08-24 03:47:06 +00:00
David Majnemer
58e4ea904b CodeGen: Skip unnamed bitfields when handling designated initializers
We would accidently initialize unnamed bitfields instead of the
following field.

llvm-svn: 216313
2014-08-23 01:48:50 +00:00
Quentin Colombet
a1c34d3560 [test/CodeGen/ARM] Adpat test to match new codegen after r216274.
Moreover, rework some patterns to actually check the emitted instructions
instead of matching unrelated string!

E.g.,
some of the "// CHECK: vmov" were matching stuff like ".globl
funcname_with_vmov" instead of actual instructions.

llvm-svn: 216275
2014-08-22 18:08:37 +00:00
Quentin Colombet
ffe5e5a42d [test/CodeGen/ARM] Adpat test to match new codegen after r216236.
llvm-svn: 216249
2014-08-22 00:27:52 +00:00
Fariborz Jahanian
91b2fa2a9a ext_vector IRGen. Patch to allow indexing into
ext_vector_type's 'hi/lo' components when
used as lvalue. rdar://18031917 pr20697

llvm-svn: 215991
2014-08-19 17:17:40 +00:00
Adam Nemet
2278fcbf0c [AVX512] Add FMA intrinsics
Part of <rdar://problem/17688758>

llvm-svn: 215666
2014-08-14 17:17:57 +00:00
Justin Bogner
085c4b294b Revert "CodeGen: When bitfields fall on natural boundaries, split them up"
It fits better with LLVM's memory model to try to do this in the
backend. Specifically, narrowing wide loads in the backends should be
relatively straightforward and is generally valuable, whereas widening
loads tends to be very constrained.

Discussion here:

  http://lists.cs.uiuc.edu/pipermail/cfe-commits/Week-of-Mon-20140811/112581.html

This reverts commit r215614.

llvm-svn: 215648
2014-08-14 15:44:29 +00:00
Rafael Espindola
764837431a Delete support for AuroraUX.
auroraux.org is not resolving.

llvm-svn: 215644
2014-08-14 15:14:51 +00:00
Pekka Jaaskelainen
ab751a8f71 Fix a crash when compiling blocks in OpenCL with multiple
address spaces.

llvm-svn: 215629
2014-08-14 09:37:50 +00:00
Justin Bogner
caf1c6e3dd CodeGen: When bitfields fall on natural boundaries, split them up
Currently when laying out bitfields that don't need any padding, we
represent them as a wide enough int to contain all of the bits. This
can be hard on the backend since we'll do things like represent stores
to a few bits as loading an i144, masking it with a large constant,
and storing it back.

This turns up in less pathological cases where we load and mask 64 bit
word on a 32 bit platform when we actually only need to access 32 bits.
This leads to bad code being generated in most of our 32 bit backends.

In practice, there are often natural breaks in bitfields, and it's a
fairly simple and effective heuristic to split these fields into legal
integer sized chunks when it will be equivalent (ie, it won't force us
to add any extra padding).

llvm-svn: 215614
2014-08-14 02:42:10 +00:00
Yi Kong
45a09319bf ARM: Add mappings for ACLE prefetch intrinsics
Implement __pld, __pldx, __pli and __plix builtin intrinsics as specified in
ARM ACLE 2.0.

llvm-svn: 215599
2014-08-13 23:20:15 +00:00
Justin Bogner
5ea05aed15 test/CodeGen: Don't rely on a value's number in check lines
The tests in r215568 hard code a value as %0 in their checks. This
isn't correct in asserts builds.

llvm-svn: 215585
2014-08-13 21:54:06 +00:00
Yi Kong
a5548431a5 AArch64: Prefetch intrinsic
llvm-svn: 215569
2014-08-13 19:18:20 +00:00
Yi Kong
26d104a9ec ARM: Prefetch intrinsics
llvm-svn: 215568
2014-08-13 19:18:14 +00:00
Adam Nemet
4abc07cb75 [AVX512] Add intrinsics for FP scalar broadcasts
Similar approach to the set1 intrinsics is used: implement in terms of vector
initializers and then ensure with an LLVM test that a broadcast is generated
at the end.

Part of <rdar://problem/17688758>

llvm-svn: 215486
2014-08-13 00:29:01 +00:00
Alexey Samsonov
de443c5002 [UBSan] Add returns-nonnull sanitizer.
Summary:
This patch adds a runtime check verifying that functions
annotated with "returns_nonnull" attribute do in fact return nonnull pointers.
It is based on suggestion by Jakub Jelinek:
http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20140623/223693.html.

Test Plan: regression test suite

Reviewers: rsmith

Reviewed By: rsmith

Subscribers: cfe-commits

Differential Revision: http://reviews.llvm.org/D4849

llvm-svn: 215485
2014-08-13 00:26:40 +00:00
David Blaikie
77bbb5fd0b DebugInfo: Blocks: Do not depend on LLVM argument numbering when choosing the debug info argument numbering.
Due to the possible presence of return-by-out parameters, using the LLVM
argument number count when numbering debug info arguments can end up
off-by-one. This could produce two arguments with the same number, which
would in turn cause LLVM to emit only one of those arguments (whichever
it found last) or assert (r215157).

llvm-svn: 215227
2014-08-08 17:10:14 +00:00
Adam Nemet
5bf7baa938 [AVX512] Add intrinsic for valignd/q
Note that similar to palingr, we could further optimize these to emit
shufflevector when the shift count is <=64.  This however does not
change the overall design that unlike palignr we would still need the LLVM
intrinsic corresponding to this intruction to handle the >64 cases.  (palignr
uses the psrldq intrinsic in this case.)

llvm-svn: 214891
2014-08-05 17:28:23 +00:00