Commit Graph

146 Commits

Author SHA1 Message Date
Dale Johannesen
4646aa3e33 Make labels work in asm blocks; allow labels as
parameters.  Rename ValueRefList to ParamList
in AsmParser, since its only use is for parameters.

llvm-svn: 43734
2007-11-05 21:20:28 +00:00
Duncan Sands
44b8721de8 Executive summary: getTypeSize -> getTypeStoreSize / getABITypeSize.
The meaning of getTypeSize was not clear - clarifying it is important
now that we have x86 long double and arbitrary precision integers.
The issue with long double is that it requires 80 bits, and this is
not a multiple of its alignment.  This gives a primitive type for
which getTypeSize differed from getABITypeSize.  For arbitrary precision
integers it is even worse: there is the minimum number of bits needed to
hold the type (eg: 36 for an i36), the maximum number of bits that will
be overwriten when storing the type (40 bits for i36) and the ABI size
(i.e. the storage size rounded up to a multiple of the alignment; 64 bits
for i36).

This patch removes getTypeSize (not really - it is still there but
deprecated to allow for a gradual transition).  Instead there is:

(1) getTypeSizeInBits - a number of bits that suffices to hold all
values of the type.  For a primitive type, this is the minimum number
of bits.  For an i36 this is 36 bits.  For x86 long double it is 80.
This corresponds to gcc's TYPE_PRECISION.

(2) getTypeStoreSizeInBits - the maximum number of bits that is
written when storing the type (or read when reading it).  For an
i36 this is 40 bits, for an x86 long double it is 80 bits.  This
is the size alias analysis is interested in (getTypeStoreSize
returns the number of bytes).  There doesn't seem to be anything
corresponding to this in gcc.

(3) getABITypeSizeInBits - this is getTypeStoreSizeInBits rounded
up to a multiple of the alignment.  For an i36 this is 64, for an
x86 long double this is 96 or 128 depending on the OS.  This is the
spacing between consecutive elements when you form an array out of
this type (getABITypeSize returns the number of bytes).  This is
TYPE_SIZE in gcc.

Since successive elements in a SequentialType (arrays, pointers
and vectors) need to be aligned, the spacing between them will be
given by getABITypeSize.  This means that the size of an array
is the length times the getABITypeSize.  It also means that GEP
computations need to use getABITypeSize when computing offsets.
Furthermore, if an alloca allocates several elements at once then
these too need to be aligned, so the size of the alloca has to be
the number of elements multiplied by getABITypeSize.  Logically
speaking this doesn't have to be the case when allocating just
one element, but it is simpler to also use getABITypeSize in this
case.  So alloca's and mallocs should use getABITypeSize.  Finally,
since gcc's only notion of size is that given by getABITypeSize, if
you want to output assembler etc the same as gcc then getABITypeSize
is the size you want.

Since a store will overwrite no more than getTypeStoreSize bytes,
and a read will read no more than that many bytes, this is the
notion of size appropriate for alias analysis calculations.

In this patch I have corrected all type size uses except some of
those in ScalarReplAggregates, lib/Codegen, lib/Target (the hard
cases).  I will get around to auditing these too at some point,
but I could do with some help.

Finally, I made one change which I think wise but others might
consider pointless and suboptimal: in an unpacked struct the
amount of space allocated for a field is now given by the ABI
size rather than getTypeStoreSize.  I did this because every
other place that reserves memory for a type (eg: alloca) now
uses getABITypeSize, and I didn't want to make an exception
for unpacked structs, i.e. I did it to make things more uniform.
This only effects structs containing long doubles and arbitrary
precision integers.  If someone wants to pack these types more
tightly they can always use a packed struct.

llvm-svn: 43620
2007-11-01 20:53:16 +00:00
Evan Cheng
aa2d6ef81d EXTRACT_SUBREG coalescing support. The coalescer now treats EXTRACT_SUBREG like
(almost) a register copy. However, it always coalesced to the register of the
RHS (the super-register). All uses of the result of a EXTRACT_SUBREG are sub-
register uses which adds subtle complications to load folding, spiller rewrite,
etc.

llvm-svn: 42899
2007-10-12 08:50:34 +00:00
Evan Cheng
79e9713b11 If a node that defines a physical register that is expensive to copy. The
scheduler will try a number of tricks in order to avoid generating the
copies. This may not be possible in case the node produces a chain value
that prevent movement. Try unfolding the load from the node before to allow
it to be moved / cloned.

llvm-svn: 42625
2007-10-05 01:39:18 +00:00
Dan Gohman
c731c97fac Use empty() member functions when that's what's being tested for instead
of comparing begin() and end().

llvm-svn: 42585
2007-10-03 19:26:29 +00:00
Evan Cheng
a5e595d23a If two instructions are both two-address code, favors (schedule closer to
terminator) the one that has a CopyToReg use. This fixes
2006-05-11-InstrSched.ll with -new-cc-modeling-scheme.

llvm-svn: 42453
2007-09-28 22:32:30 +00:00
Evan Cheng
038dcc5136 Trim some unneeded fields.
llvm-svn: 42442
2007-09-28 19:24:24 +00:00
Evan Cheng
8e136a9dc4 - Move getPhysicalRegisterRegClass() from ScheduleDAG to MRegisterInfo.
- Added ability to emit cross class register copies to the BBRU scheduler.
- More aggressive backtracking.

llvm-svn: 42375
2007-09-26 21:36:17 +00:00
Evan Cheng
c1e4e3743b Allow copyRegToReg to emit cross register classes copies.
Tested with "make check"!

llvm-svn: 42346
2007-09-26 06:25:56 +00:00
Evan Cheng
5924bf7d3b Added major new capabilities to scheduler (only BURR for now) to support physical register dependency. The BURR scheduler can now backtrace and duplicate instructions in order to avoid "expensive / impossible to copy" values (e.g. status flag EFLAGS for x86) from being clobbered.
llvm-svn: 42284
2007-09-25 01:54:36 +00:00
Evan Cheng
0effc3a6b8 Use struct SDep instead of std::pair for SUnit pred and succ lists. First step
in tracking physical register output dependencies.

llvm-svn: 42125
2007-09-19 01:38:40 +00:00
Evan Cheng
57ff158255 Remove dead code.
llvm-svn: 41899
2007-09-12 23:45:46 +00:00
Chris Lattner
dbfc4e4b07 Teach the dag scheduler to handle inline asm nodes with multi-value immediate operands.
llvm-svn: 41386
2007-08-25 00:53:07 +00:00
Evan Cheng
358c3d1dac Do not emit copies for physical register output if it's not used.
llvm-svn: 40722
2007-08-02 05:29:38 +00:00
Evan Cheng
c5549fc3a0 Instead of adding copyfromreg's to handle physical definitions. Now isel can
simply specify them as results and let scheduledag handle them. That
is, instead of
SDOperand Flag = DAG.getTargetNode(Opc, MVT::i32, MVT::Flag, ...)
SDOperand Result = DAG.getCopyFromReg(Chain, X86::EAX, MVT::i32, Flag)

Just write:
SDOperand Result = DAG.getTargetNode(Opc, MVT::i32, MVT::i32, ...)

And let scheduledag emit the move from X86::EAX to a virtual register.

llvm-svn: 40710
2007-08-02 00:28:15 +00:00
Christopher Lamb
18603b03e1 Teach DAG scheduling how to properly emit subreg insert/extract machine instructions. PR1350
llvm-svn: 40520
2007-07-26 08:12:07 +00:00
Dale Johannesen
2182f06f2d Skeleton of post-RA scheduler; doesn't do anything yet.
Change name of -sched option and DEBUG_TYPE to
pre-RA-sched; adjust testcases.

llvm-svn: 39816
2007-07-13 17:13:54 +00:00
Evan Cheng
5e9084207f If the operand is marked M_OPTIONAL_DEF_OPERAND, then it's a def.
llvm-svn: 38496
2007-07-10 17:52:20 +00:00
Evan Cheng
ff6f279adf When a node value is only used by a CopyToReg, use the user's dest. This should not be restricted to nodes that produce only a single value.
llvm-svn: 38485
2007-07-10 07:08:32 +00:00
Evan Cheng
642be16bbf Change CalculateHeights and CalculateDepths to be non-recursive.
llvm-svn: 37934
2007-07-06 01:37:28 +00:00
Dan Gohman
a7644dd9b9 Pass a SelectionDAG into SDNode::dump everywhere it's used, in prepration
for needing the DAG node to print pre-legalize extended value types, and
to get better debug messages with target-specific nodes.

llvm-svn: 37656
2007-06-19 14:13:56 +00:00
Jeff Cohen
1baf5c84ab Fix some VC++ warnings.
llvm-svn: 35224
2007-03-20 20:43:18 +00:00
Lauro Ramos Venancio
971aa18867 Code clean up.
llvm-svn: 35220
2007-03-20 20:09:03 +00:00
Lauro Ramos Venancio
25878b45f5 CopyToReg source operand can be a physical register.
llvm-svn: 35213
2007-03-20 16:46:44 +00:00
Chris Lattner
56e5fea163 print target nodes nicely
llvm-svn: 34369
2007-02-17 06:38:37 +00:00
Chris Lattner
68dcec6fea fix indentation
llvm-svn: 34307
2007-02-15 18:19:15 +00:00
Chris Lattner
21ebae3394 Apply B Scott Michel's patch for PR1184, which improves diagnostics in an
abort case.

llvm-svn: 34306
2007-02-15 18:17:56 +00:00
Reid Spencer
09575bac2e For PR1195:
Change use of "packed" term to "vector" in comments, strings, variable
names, etc.

llvm-svn: 34300
2007-02-15 03:39:18 +00:00
Chris Lattner
19083a4671 switch the VRBaseMap in the scheduler from an std::map to a DenseMap. This
speeds up the isel pass from 2.5570s to 2.4722s on kc++ (3.4%).

llvm-svn: 33879
2007-02-04 08:47:20 +00:00
Jim Laskey
f9e5445ed4 Make LABEL a builtin opcode.
llvm-svn: 33537
2007-01-26 14:34:52 +00:00
Evan Cheng
f5c96fabf9 Renamed getTypeAlignmentShift() to getPreferredTypeAlignmentShift().
llvm-svn: 33482
2007-01-24 07:03:39 +00:00
Evan Cheng
be48a47d9d Remove the DoubleTy special case.
llvm-svn: 33449
2007-01-22 23:13:55 +00:00
Reid Spencer
a8a0f2cf68 Compensate for loss of DerivedTypes.h in TargetLowering.h
llvm-svn: 33159
2007-01-12 23:31:12 +00:00
Evan Cheng
376c9c4c97 CopyToReg source operand can be a register as well. e.g. Copy from GlobalBaseReg.
llvm-svn: 32929
2007-01-05 20:59:06 +00:00
Bill Wendling
22e978a736 Removing even more <iostream> includes.
llvm-svn: 32320
2006-12-07 20:04:42 +00:00
Evan Cheng
67fc141db5 Match TargetInstrInfo changes.
llvm-svn: 32098
2006-12-01 21:52:58 +00:00
Evan Cheng
20350c4025 Change MachineInstr ctor's to take a TargetInstrDescriptor reference instead
of opcode and number of operands.

llvm-svn: 31947
2006-11-27 23:37:22 +00:00
Evan Cheng
dbd3d294e6 Matches MachineInstr changes.
llvm-svn: 31712
2006-11-13 23:36:35 +00:00
Evan Cheng
979bbf48d5 Add methods to add implicit def use operands to a MI.
llvm-svn: 31675
2006-11-11 10:20:02 +00:00
Evan Cheng
8c9c6d71ed Add implicit def / use operands to MachineInstr.
llvm-svn: 31633
2006-11-10 08:43:01 +00:00
Evan Cheng
fd2c5dd806 Changes to use operand constraints to process two-address instructions.
llvm-svn: 31453
2006-11-04 09:44:31 +00:00
Chris Lattner
1fd360e13a handle global address constant sdnodes
llvm-svn: 31323
2006-10-31 20:01:56 +00:00
Evan Cheng
47fbeda5ce Debug tweak.
llvm-svn: 30959
2006-10-14 08:34:06 +00:00
Evan Cheng
45fe3bc72c Added support for machine specific constantpool values. These are useful for
representing expressions that can only be resolved at link time, etc.

llvm-svn: 30278
2006-09-12 21:00:35 +00:00
Chris Lattner
af23f9b5f6 Completely eliminate def&use operands. Now a register operand is EITHER a
def operand or a use operand.

llvm-svn: 30109
2006-09-05 02:31:13 +00:00
Chris Lattner
d86418ab20 switch the SUnit pred/succ sets from being std::sets to being smallvectors.
This reduces selectiondag time on kc++ from 5.43s to 4.98s (9%).  More
significantly, this speeds up the default ppc scheduler from ~1571ms to 1063ms,
a 33% speedup.

llvm-svn: 29743
2006-08-17 00:09:56 +00:00
Evan Cheng
1640ae5a84 Reverse the FlaggedNodes after scanning up for flagged preds or else the order would be reversed.
llvm-svn: 29545
2006-08-07 22:12:12 +00:00
Jim Laskey
4e153f1b91 Use an enumeration to eliminate data relocations.
llvm-svn: 29249
2006-07-21 20:57:35 +00:00
Jim Laskey
f7300b2706 It was pointed out that DEBUG() is only available with -debug.
llvm-svn: 29106
2006-07-11 18:25:13 +00:00
Jim Laskey
c3d341ea98 Ensure that dump calls that are associated with asserts are removed from
non-debug build.

llvm-svn: 29105
2006-07-11 17:58:07 +00:00