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298 Commits

Author SHA1 Message Date
Chris Lattner
57ee7c6630 Implement ExpandOperationResult for ppc i64 fp->int, which fixes 
CodeGen/Generic/fp_to_int.ll among others.  Its unclear why this 
just started failing...

llvm-svn: 44407
 2007-11-28 18:44:47 +00:00
Bill Wendling
f359fed9f9 Unify CALLSEQ_{START,END}. They take 4 parameters: the chain, two stack 
adjustment fields, and an optional flag. If there is a "dynamic_stackalloc" in
the code, make sure that it's bracketed by CALLSEQ_START and CALLSEQ_END. If
not, then there is the potential for the stack to be changed while the stack's
being used by another instruction (like a call).

This can only result in tears...

llvm-svn: 44037
 2007-11-13 00:44:25 +00:00
Dale Johannesen
10f4152471 Disable a couple more things for ppcf128. 
llvm-svn: 43267
 2007-10-23 23:20:14 +00:00
Evan Cheng
bdbed66333 Use ptr type in the immediate field of a BxA instruction so we don't end up selecting 32-bit call instruction for ppc64. 
llvm-svn: 43228
 2007-10-22 19:46:19 +00:00
Chris Lattner
b193576bc6 comment fixes 
llvm-svn: 43168
 2007-10-19 04:08:28 +00:00
Dale Johannesen
10432e5a67 More ppcf128 issues (maybe the last)? 
llvm-svn: 43160
 2007-10-19 00:59:18 +00:00
Chris Lattner
06a4954e6e Change LowerFP_TO_SINT to create the specific code it needs instead of 
unconditionally creating an i64 bitcast.  With the future legalizer
design, operation legalization can't introduce new nodes with illegal
types.

This fixes the rest of olden on ppc32.

llvm-svn: 43005
 2007-10-15 20:14:52 +00:00
Dale Johannesen
2f6b6d6fb0 Fix type mismatch error in PPC Altivec (only causes 
a problem when asserts are on).  From vecLib.

llvm-svn: 42959
 2007-10-14 01:58:32 +00:00
Dan Gohman
9013eaff9a Mark vector pow, ctpop, cttz, and ctlz as Expand on PowerPC. 
llvm-svn: 42904
 2007-10-12 14:08:57 +00:00
Dan Gohman
482732af9d Set ISD::FPOW to Expand. 
llvm-svn: 42881
 2007-10-11 23:21:31 +00:00
Dale Johannesen
666323eacd Next PPC long double bits: ppcf128->i32 conversion. 
Surprisingly complicated.
Adds getTargetNode for 2 outputs, no inputs (missing).

llvm-svn: 42822
 2007-10-10 01:01:31 +00:00
Dan Gohman
71f0d7d76e When we start enabling SMUL_LOHI/UMUL_LOHI or SDIVREM/UDIVREM in 
target-indepenent lowering, don't use them on PowerPC.

llvm-svn: 42755
 2007-10-08 17:28:24 +00:00
Dale Johannesen
f864ac96d8 Next powerpc long double bits. Comparisons work, 
although not well, and shortening FP converts.

llvm-svn: 42672
 2007-10-06 01:24:11 +00:00
Dale Johannesen
c0154c06d6 First round of ppc long double. call/return and 
basic arithmetic works.
Rename RTLIB long double functions to distinguish
different flavors of long double; the lib functions
have different names, alas.

llvm-svn: 42644
 2007-10-05 20:04:43 +00:00
Duncan Sands
86e0119822 Fold the adjust_trampoline intrinsic into 
init_trampoline.  There is now only one
trampoline intrinsic.

llvm-svn: 41841
 2007-09-11 14:10:23 +00:00
Owen Anderson
e2f23a3abf Add lengthof and endof templates that hide a lot of sizeof computations. 
Patch by Sterling Stein!

llvm-svn: 41758
 2007-09-07 04:06:50 +00:00
Dale Johannesen
3cf889f75e Enhance APFloat to retain bits of NaNs (fixes oggenc). 
Use APFloat interfaces for more references, mostly
of ConstantFPSDNode.

llvm-svn: 41632
 2007-08-31 04:03:46 +00:00
Bill Wendling
10e18dea2a Use i64 on a PPC64 machine 
llvm-svn: 41590
 2007-08-30 00:59:19 +00:00
Chris Lattner
d8c9cb9182 rename isOperandValidForConstraint to LowerAsmOperandForConstraint, 
changing the interface to allow for future changes.

llvm-svn: 41384
 2007-08-25 00:47:38 +00:00
Evan Cheng
581d2795dc Vector fneg must be expanded into fsub -0.0, X. 
llvm-svn: 40586
 2007-07-30 07:51:22 +00:00
Duncan Sands
644f917358 Support for trampolines, except for X86 codegen which is 
still under discussion.

llvm-svn: 40549
 2007-07-27 12:58:54 +00:00
Lauro Ramos Venancio
09d73c0305 Assert when TLS is not implemented. 
llvm-svn: 39737
 2007-07-11 17:19:51 +00:00
Dan Gohman
f8f531bf69 Change getCopyToParts and getCopyFromParts to always use target-endian 
register ordering, for both physical and virtual registers. Update the PPC
target lowering for calls to expect registers for the call result to
already be in target order.

llvm-svn: 38471
 2007-07-09 20:59:04 +00:00
Dan Gohman
309d3d51b3 Move ComputeMaskedBits, MaskedValueIsZero, and ComputeNumSignBits from 
TargetLowering to SelectionDAG so that they have more convenient
access to the current DAG, in preparation for the ValueType routines
being changed from standalone functions to members of SelectionDAG for
the pre-legalize vector type changes.

llvm-svn: 37704
 2007-06-22 14:59:07 +00:00
Chris Lattner
7936d91f70 describe an argument, hide it. 
llvm-svn: 37650
 2007-06-19 05:46:06 +00:00
Chris Lattner
944200be45 If a function is vararg, never pass inreg arguments in registers. Thanks to 
Anton for half of this patch.

llvm-svn: 37641
 2007-06-19 00:13:10 +00:00
Dan Gohman
5c4413120f Rename MVT::getVectorBaseType to MVT::getVectorElementType. 
llvm-svn: 37579
 2007-06-14 22:58:02 +00:00
Dan Gohman
c12dd5207d Apply this patch: 
http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20070514/049845.html

llvm-svn: 37240
 2007-05-18 23:21:46 +00:00
Chris Lattner
0b7472da6f fix some subtle inline asm selection issues 
llvm-svn: 37067
 2007-05-15 01:31:05 +00:00
Chris Lattner
19ccd6226c Fix a bug in PPCTargetLowering::isLegalAddressingMode, scales other than 0/1/2 
are always unsupported.

llvm-svn: 35835
 2007-04-09 22:10:05 +00:00
Nicolas Geoffray
23710a7da3 Starting implementation of the ELF32 ABI specification of varargs handling. 
LowerVASTART emits the right code if the subtarget is ELF32, the other intrinsics
(VAARG, VACOPY and VAEND) are not yet implemented.

llvm-svn: 35625
 2007-04-03 13:59:52 +00:00
Nicolas Geoffray
b3e99a18ee The PPC64 ELF ABI is "intended to use the same structure layout and calling convention rules 
as the 64-bit PowerOpen ABI" (Reference http://www.linux-foundation.org/spec/ELF/ppc64/).
Change all ELF tests to ELF32.

llvm-svn: 35624
 2007-04-03 12:35:28 +00:00
Nicolas Geoffray
fbfc451ba9 The ELF ABI specifies F1-F8 registers as argument registers for double, not 
F1-F10. This affects only ELF, not MachO.

llvm-svn: 35622
 2007-04-03 10:27:07 +00:00
Chris Lattner
1eb94d973a implement the new addressing mode description hook. 
llvm-svn: 35521
 2007-03-30 23:15:24 +00:00
Lauro Ramos Venancio
682baf2dda "The C standards do say that "char" may either be a "signed char" or "unsigned 
char" and it is up to the compilers implementation or the platform which is
followed."
http://www.arm.linux.org.uk/docs/faqs/signedchar.php

llvm-svn: 35382
 2007-03-27 16:33:08 +00:00
Chris Lattner
d685514e2e switch TargetLowering::getConstraintType to take the entire constraint, 
not just the first letter.  No functionality change.

llvm-svn: 35322
 2007-03-25 02:14:49 +00:00
Nicolas Geoffray
7aad92868c Stack and register alignment of call arguments in the ELF ABI 
llvm-svn: 35083
 2007-03-13 15:02:46 +00:00
Evan Cheng
b9dce9db85 More flexible TargetLowering LSR hooks for testing whether an immediate is a legal target address immediate or scale. 
llvm-svn: 35074
 2007-03-12 23:29:01 +00:00
Chris Lattner
4f2e4e0f92 Switch PPC return lower to use an autogenerated CC description. 
llvm-svn: 34940
 2007-03-06 00:59:59 +00:00
Nicolas Geoffray
75ab9799df Implemented the frameaddress intrinsic for PPC. 
llvm-svn: 34787
 2007-03-01 13:11:38 +00:00
Nicolas Geoffray
89d81878d2 Differentiate between the MachO and the ELF ABI the CALL instruction. 
llvm-svn: 34667
 2007-02-27 13:01:19 +00:00
Chris Lattner
535bd6d3ba always lower to RETFLAG, never leave it as just ret. 
llvm-svn: 34639
 2007-02-26 19:44:02 +00:00
Chris Lattner
1ee61ab414 no really, this is the right patch 
llvm-svn: 34605
 2007-02-25 20:01:40 +00:00
Chris Lattner
4d2f5f8740 always promote float varargs to double. 
llvm-svn: 34604
 2007-02-25 19:59:18 +00:00
Chris Lattner
43df5b335c implement support for the linux/ppc function call ABI. Patch by 
Nicolas Geoffray!

llvm-svn: 34574
 2007-02-25 05:34:32 +00:00
Jim Laskey
e0008e23cf Simplify lowering and selection of exception ops. 
llvm-svn: 34488
 2007-02-22 14:56:36 +00:00
Jim Laskey
3796abea0f Support to provide exception and selector registers. 
llvm-svn: 34482
 2007-02-21 22:54:50 +00:00
Chris Lattner
1f7d60262e Fix ixaddrs as well, allowing ppc64 to compile to: 
_test2:
        li r2, 0
        lis r3, 1
        std r2, 9024(r3)
        blr

instead of:

_test2:
        lis r2, 1
        li r3, 0
        ori r2, r2, 9024
        std r3, 0(r2)
        blr

This implements CodeGen/PowerPC/LargeAbsoluteAddr.ll:test2

llvm-svn: 34373
 2007-02-17 06:57:26 +00:00
Chris Lattner
4a9c0bb147 Compile test/CodeGen/PowerPC/LargeAbsoluteAddr.ll to: 
_test:
        lis r2, 743
        li r3, 0
        stw r3, 32751(r2)
        blr

instead of:

_test:
        li r2, 0
        stw r2, 32751(48693248)
        blr

Implement support for ppc64 as well, allowing it to produce better code.

llvm-svn: 34371
 2007-02-17 06:44:03 +00:00
Nate Begeman
eda5997cc8 Finish off bug 680, allowing targets to custom lower frame and return 
address nodes.

llvm-svn: 33636
 2007-01-29 22:58:52 +00:00