caio/clang-p2996
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
81,639 Commits 1 Branch 0 Tags
465dffa73684af5ccd94de6be80ec4c0b8d6ebad
Commit Graph

125 Commits

Author SHA1 Message Date
Chris Lattner
27a4c1515a rearrange some code to allow inferring instr info from the pattern of the instr, but don't do so yet. 
llvm-svn: 45647
 2008-01-06 01:53:37 +00:00
Chris Lattner
85467a17ae final cleanups. 
llvm-svn: 45644
 2008-01-06 01:21:51 +00:00
Chris Lattner
626b89daa4 further simplifications and cleanup 
llvm-svn: 45643
 2008-01-06 01:20:13 +00:00
Chris Lattner
827efa451f simplify some code 
llvm-svn: 45642
 2008-01-06 01:12:44 +00:00
Chris Lattner
e59a3c79e5 split enum emission out from InstrInfoEmitter into it's own tblgen backend. 
llvm-svn: 45640
 2008-01-06 00:49:05 +00:00
Chris Lattner
dc3c9050f8 tblgen shouldn't include headers from llvm codegen. 
llvm-svn: 45429
 2007-12-30 00:25:23 +00:00
Chris Lattner
8adcd9f32e remove attributions from utils. 
llvm-svn: 45419
 2007-12-29 20:37:13 +00:00
Bill Wendling
cb77f04e1f Add flags to indicate that there are "never" side effects or that there "may be" 
side effects for machine instructions.

llvm-svn: 45022
 2007-12-14 01:48:59 +00:00
Evan Cheng
687567bca5 Oops. Forgot these. 
llvm-svn: 44969
 2007-12-13 00:42:35 +00:00
Owen Anderson
933b5b7e62 Add a flag for indirect branch instructions. 
Target maintainers: please check that the instructions for your target are correctly marked.

llvm-svn: 44012
 2007-11-12 07:39:39 +00:00
Evan Cheng
c9de9cec18 Added TargetInstrDescriptor::numDefs - num of results. 
llvm-svn: 40709
 2007-08-02 00:20:17 +00:00
Christopher Lamb
cde0ee5221 Add target independent MachineInstr's to represent subreg insert/extract in MBB's. PR1350 
llvm-svn: 40518
 2007-07-26 07:48:21 +00:00
Evan Cheng
6e3c705d74 Try committing again. Add OptionalDefOperand. Remove clobbersPred. 
llvm-svn: 38498
 2007-07-10 18:05:01 +00:00
Evan Cheng
9835db562f ImmutablePredicateOperand is no more. 
llvm-svn: 37963
 2007-07-06 23:23:38 +00:00
Evan Cheng
e32e7fb40d Instructions with ImmutablePredicateOperand aren't really predicable since their predicates are fixed at isel time. 
llvm-svn: 37899
 2007-07-05 07:19:29 +00:00
Dan Gohman
e8c1e428f2 Revert the earlier change that removed the M_REMATERIALIZABLE machine 
instruction flag, and use the flag along with a virtual member function
hook for targets to override if there are instructions that are only
trivially rematerializable with specific operands (i.e. constant pool
loads).

llvm-svn: 37728
 2007-06-26 00:48:07 +00:00
Dan Gohman
9e82064924 Replace M_REMATERIALIZIBLE and the newly-added isOtherReMaterializableLoad 
with a general target hook to identify rematerializable instructions. Some
instructions are only rematerializable with specific operands, such as loads
from constant pools, while others are always rematerializable. This hook
allows both to be identified as being rematerializable with the same
mechanism.

llvm-svn: 37644
 2007-06-19 01:48:05 +00:00
Evan Cheng
a7ca624028 Replace TargetInstrInfo::CanBeDuplicated() with a M_NOT_DUPLICABLE bit. 
llvm-svn: 37643
 2007-06-19 01:26:51 +00:00
Evan Cheng
452a818c6a Add clobbersPred - instruction that clobbers condition code / register which are used to predicate instructions. 
llvm-svn: 37465
 2007-06-06 10:14:55 +00:00
Evan Cheng
b99726d7a0 Rename M_PREDICATED to M_PREDICABLE; opcode can be specified isPredicable without having a PredicateOperand. 
llvm-svn: 37116
 2007-05-16 20:45:24 +00:00
Evan Cheng
c0fb94596a Mark all (not just the first) predicate operand M_PREDICATE_OPERAND. 
llvm-svn: 37061
 2007-05-15 01:20:36 +00:00
Evan Cheng
9d7d130835 Recognize target instruction flag 'isReMaterializable'. 
llvm-svn: 35159
 2007-03-19 06:20:37 +00:00
Jim Laskey
214c582002 Files missing from LABEL check in. 
llvm-svn: 33539
 2007-01-26 17:29:20 +00:00
Bill Wendling
9bfb1e1f29 What should be the last unnecessary <iostream>s in the library. 
llvm-svn: 32333
 2006-12-07 22:21:48 +00:00
Evan Cheng
71adba6dce Add opcode to TargetInstrDescriptor. 
llvm-svn: 31804
 2006-11-17 01:46:27 +00:00
Chris Lattner
c94f214d22 ADd support for adding constraints to suboperands 
llvm-svn: 31748
 2006-11-15 02:38:17 +00:00
Chris Lattner
ba7b3673f9 allow ptr_rc to explicitly appear in an instructions operand list, it doesn't 
have to be a subpart of a complex operand.

llvm-svn: 31618
 2006-11-10 02:01:40 +00:00
Evan Cheng
1698c2999c Remove M_2_ADDR_FLAG. 
llvm-svn: 31583
 2006-11-09 02:22:54 +00:00
Chris Lattner
f62138e792 Mark predicate operands as such in operand info. 
llvm-svn: 31483
 2006-11-06 23:53:31 +00:00
Chris Lattner
33f5a51020 simplify the way operand flags and constraints are handled, making it easier 
to extend.

llvm-svn: 31481
 2006-11-06 23:49:51 +00:00
Chris Lattner
8a9c91de33 recognize ppc's blr instruction as predicated 
llvm-svn: 31480
 2006-11-06 21:44:54 +00:00
Evan Cheng
3cb5bf721c Clean up some code. 
llvm-svn: 31451
 2006-11-04 09:40:23 +00:00
Evan Cheng
ac79c7c4c0 Add operand constraints to TargetInstrInfo. 
llvm-svn: 31333
 2006-11-01 00:27:05 +00:00
Jim Laskey
4b49c23571 Eliminate data relocations by using NULL instead of global empty list. 
llvm-svn: 29250
 2006-07-21 21:15:20 +00:00
Jim Laskey
4e153f1b91 Use an enumeration to eliminate data relocations. 
llvm-svn: 29249
 2006-07-21 20:57:35 +00:00
Evan Cheng
55772ccfd6 Instructions with variable operands (variable_ops) can have a number required 
operands. e.g.
def CALL32r : I<0xFF, MRM2r, (ops GR32:$dst, variable_ops),
                "call {*}$dst", [(X86call GR32:$dst)]>;
TableGen should emit operand informations for the "required" operands.

Added a target instruction info flag M_VARIABLE_OPS to indicate the target
instruction may have more operands in addition to the minimum required
operands.

llvm-svn: 28791
 2006-06-15 07:22:16 +00:00
Evan Cheng
d8e2f6ebc1 lib/Target/Target.td 
llvm-svn: 28386
 2006-05-18 20:42:07 +00:00
Evan Cheng
21c7c23d7e Noop instruction 
llvm-svn: 28241
 2006-05-12 07:47:00 +00:00
Evan Cheng
386fb9b0fd Set isStore of instructions with ISD::TRUNCSTORE root node. 
llvm-svn: 28075
 2006-05-03 02:08:34 +00:00
Chris Lattner
4b177f089e Put instruction names into the first non TargetInstrInfo namespace found. 
llvm-svn: 28043
 2006-05-01 23:46:16 +00:00
Evan Cheng
8e63393bc3 Formating 
llvm-svn: 28036
 2006-05-01 09:30:17 +00:00
Evan Cheng
c2ef5e34a8 Mark instructions whose pattern is (store ...) isStore. 
llvm-svn: 28032
 2006-05-01 09:04:20 +00:00
Chris Lattner
778509c844 Don't fill in fields that no longer exist. 
llvm-svn: 27898
 2006-04-20 18:32:22 +00:00
Chris Lattner
db2a5f09f1 If we want to emit things in enum order, use getInstructionsByEnumValue to 
get the order, don't compute it ourselves.

Don't emit stuff like (14<<0), emit 14 instead.

Don't attempt to get target properties for builtin instructions.

llvm-svn: 25672
 2006-01-27 01:44:09 +00:00
Duraid Madina
018da4f5ef almost got the HP-UX tester up.. :) 
llvm-svn: 25051
 2005-12-30 14:56:37 +00:00
Chris Lattner
6bc0304c91 Teach tblgen about instruction operands that have multiple MachineInstr 
operands, digging into them to find register values (used on X86).  Patch
by Evan Cheng!

llvm-svn: 24424
 2005-11-19 07:05:57 +00:00
Jim Laskey
802748cd61 Allow itineraries to be passed through the Target Machine. 
llvm-svn: 24139
 2005-11-01 20:06:59 +00:00
Jeff Cohen
9e1784d738 Keep VC++ happy. 
llvm-svn: 24137
 2005-11-01 18:04:06 +00:00
Jim Laskey
0433df136f Emit itinerary class in instruction info. 
llvm-svn: 24122
 2005-10-31 17:16:46 +00:00
Chris Lattner
742606ad30 Switch more code over to using getValueAsListOfDefs. Look at all the -'s. :) 
llvm-svn: 24074
 2005-10-28 22:59:53 +00:00