Commit Graph

425 Commits

Author SHA1 Message Date
Reed Kotler
5fdeb21249 This code implements most of mips16 hardfloat as it is done by gcc.
In this case, essentially it is soft float with different library routines.
The next step will be to make this fully interoperational with mips32 floating
point and that requires creating stubs for functions with signatures that
contain floating point types.

I have a more sophisticated design for mips16 hardfloat which I hope to
implement at a later time that directly does floating point without the need
for function calls.

The mips16 encoding has no floating point instructions so one needs to
switch to mips32 mode to execute floating point instructions.

llvm-svn: 170259
2012-12-15 00:20:05 +00:00
Patrik Hagglund
5e6c361bc0 Change TargetLowering::getRegClassFor to take an MVT, instead of EVT.
Accordingly, add helper funtions getSimpleValueType (in parallel to
getValueType) in SDValue, SDNode, and TargetLowering.

This is the first, in a series of patches.

This is the second attempt. In the first attempt (r169837), a few
getSimpleVT() were hoisted too far, detected by bootstrap failures.

llvm-svn: 170104
2012-12-13 06:34:11 +00:00
Akira Hatanaka
cf9a61b6ee [mips] Do not copy GOT address to register $gp if the function being called has
internal linkage.

llvm-svn: 170092
2012-12-13 03:17:29 +00:00
Evan Cheng
962711ee71 Sorry about the churn. One more change to getOptimalMemOpType() hook. Did I
mention the inline memcpy / memset expansion code is a mess?

This patch split the ZeroOrLdSrc argument into two: IsMemset and ZeroMemset.
The first indicates whether it is expanding a memset or a memcpy / memmove.
The later is whether the memset is a memset of zero. It's totally possible
(likely even) that targets may want to do different things for memcpy and
memset of zero.

llvm-svn: 169959
2012-12-12 02:34:41 +00:00
Evan Cheng
c3d1aca657 - Rename isLegalMemOpType to isSafeMemOpType. "Legal" is a very overloade term.
Also added more comments to explain why it is generally ok to return true.
- Rename getOptimalMemOpType argument IsZeroVal to ZeroOrLdSrc. It's meant to
be true for loaded source (memcpy) or zero constants (memset). The poor name
choice is probably some kind of legacy issue.

llvm-svn: 169954
2012-12-12 01:32:07 +00:00
Patrik Hagglund
e98b7a0389 Revert EVT->MVT changes, r169836-169851, due to buildbot failures.
llvm-svn: 169854
2012-12-11 11:14:33 +00:00
Patrik Hagglund
3708e548f8 Change TargetLowering::getRegClassFor to take an MVT, instead of EVT.
Accordingly, add helper funtions getSimpleValueType (in parallel to
getValueType) in SDValue, SDNode, and TargetLowering.

This is the first, in a series of patches.

llvm-svn: 169837
2012-12-11 09:10:33 +00:00
Evan Cheng
79e2ca90bc Some enhancements for memcpy / memset inline expansion.
1. Teach it to use overlapping unaligned load / store to copy / set the trailing
   bytes. e.g. On 86, use two pairs of movups / movaps for 17 - 31 byte copies.
2. Use f64 for memcpy / memset on targets where i64 is not legal but f64 is. e.g.
   x86 and ARM.
3. When memcpy from a constant string, do *not* replace the load with a constant
   if it's not possible to materialize an integer immediate with a single
   instruction (required a new target hook: TLI.isIntImmLegal()).
4. Use unaligned load / stores more aggressively if target hooks indicates they
   are "fast".
5. Update ARM target hooks to use unaligned load / stores. e.g. vld1.8 / vst1.8.
   Also increase the threshold to something reasonable (8 for memset, 4 pairs
   for memcpy).

This significantly improves Dhrystone, up to 50% on ARM iOS devices.

rdar://12760078

llvm-svn: 169791
2012-12-10 23:21:26 +00:00
Akira Hatanaka
efdce0fb09 [mips] Delete nodes and instructions for dynamic alloca that are no longer in
use.

llvm-svn: 169580
2012-12-07 03:10:18 +00:00
Chandler Carruth
ed0881b2a6 Use the new script to sort the includes of every file under lib.
Sooooo many of these had incorrect or strange main module includes.
I have manually inspected all of these, and fixed the main module
include to be the nearest plausible thing I could find. If you own or
care about any of these source files, I encourage you to take some time
and check that these edits were sensible. I can't have broken anything
(I strictly added headers, and reordered them, never removed), but they
may not be the headers you'd really like to identify as containing the
API being implemented.

Many forward declarations and missing includes were added to a header
files to allow them to parse cleanly when included first. The main
module rule does in fact have its merits. =]

llvm-svn: 169131
2012-12-03 16:50:05 +00:00
Akira Hatanaka
bb6e74a2f1 [mips] Generate big GOT code.
llvm-svn: 168460
2012-11-21 20:40:38 +00:00
Akira Hatanaka
56d5f1bca5 [mips] Simplify lowering functions in MipsISelLowering.cpp by using the helper
functions added in r168456.

llvm-svn: 168458
2012-11-21 20:30:40 +00:00
Akira Hatanaka
fd04ad4261 [mips] Add helper functions that create nodes for computing address.
llvm-svn: 168456
2012-11-21 20:26:38 +00:00
Akira Hatanaka
59f299f28e [mips] Add command line option "-mxgot".
llvm-svn: 168455
2012-11-21 20:21:11 +00:00
Akira Hatanaka
dbe41ad18c [mips] When a node which loads from a GOT is created, pass a MachinePointerInfo
referring to a GOT entry.

llvm-svn: 168453
2012-11-21 20:16:34 +00:00
Akira Hatanaka
ef83919b4c Initial implementation of MipsTargetLowering::isLegalAddressingMode.
llvm-svn: 168230
2012-11-17 00:25:41 +00:00
Akira Hatanaka
28e02ec8c1 [mips] Custom-lower ISD::FRAME_TO_ARGS_OFFSET node.
Patch by Sasa Stankovic.

llvm-svn: 167548
2012-11-07 19:10:58 +00:00
Akira Hatanaka
40f2d30987 Delete MipsFunctionInfo::NextStackOffset. No functionality change intended.
llvm-svn: 167546
2012-11-07 19:04:26 +00:00
Akira Hatanaka
719df2874c [mips] Add member field MipsFunctionInfo::IncomingArgSize which holds the size
of the incoming argument area.

llvm-svn: 167312
2012-11-02 21:03:58 +00:00
Akira Hatanaka
9c962c02e4 [mips] Allow tail-call optimization for vararg functions and functions which
use the caller's stack.

llvm-svn: 167048
2012-10-30 20:16:31 +00:00
Akira Hatanaka
4866fe14e2 Add code for saving formal argument information to MipsFunctionInfo. This
information will be used by IsEligibleForTailCallOptimization to determine
whether a call can be tail-call optimized.

llvm-svn: 167043
2012-10-30 19:37:25 +00:00
Akira Hatanaka
6233cf565f Add definition of function MipsTargetLowering::passArgOnStack which emits nodes
for passing a function call argument on a stack.

llvm-svn: 167041
2012-10-30 19:23:25 +00:00
Akira Hatanaka
8e50aba5f9 Do not do tail-call optimization if target is mips16.
llvm-svn: 167039
2012-10-30 19:07:58 +00:00
Reed Kotler
aebb8b034c Expand all atomic ops for mips16.
llvm-svn: 166935
2012-10-29 16:16:54 +00:00
Akira Hatanaka
6a124a84dc [mips] Do not tail-call optimize vararg functions or functions with byval
arguments.

This is rather conservative and should be fixed later to be more aggressive.

llvm-svn: 166851
2012-10-27 00:56:56 +00:00
Akira Hatanaka
2c07f1f140 [mips] Make sure FuncArg doesn't advance when OrigArgIndex is the same as in the
previous iteration.

llvm-svn: 166850
2012-10-27 00:44:39 +00:00
Akira Hatanaka
ac8c669985 Use the methods and classes that were added to simplify LowerCall and
LowerFormalArguments in MipsTargetLowering.

No functionality change intended.

llvm-svn: 166846
2012-10-27 00:29:43 +00:00
Akira Hatanaka
2a13402a66 Add method MipsTargetLowering::writeVarArgRegs which copies argument registers
of vararg functions back to the stack.

llvm-svn: 166844
2012-10-27 00:21:13 +00:00
Akira Hatanaka
35f55b1622 Add method MipsTargetLowering::passByValArg.
This method emits nodes for passing byval arguments in registers and stack.
This has the same functionality as existing functions PassByValArg64 and
WriteByValArg which will be deleted later.

llvm-svn: 166843
2012-10-27 00:16:36 +00:00
Akira Hatanaka
25dad19f0e Add method MipsTargetLowering::copyByValRegs.
This method copies byval arguments passed in registers onto the stack and has
the same functionality as existing functions CopyMips64ByValRegs and
ReadByValArg which will be deleted later.

llvm-svn: 166841
2012-10-27 00:10:18 +00:00
Akira Hatanaka
4a3711d077 Add class MipsCC which provides methods used to analyze formal and call
arguments and inquire about calling convention information.

llvm-svn: 166840
2012-10-26 23:56:38 +00:00
Akira Hatanaka
e485c65642 Delete MipsFunctionInfo::InArgFIRange.
llvm-svn: 166837
2012-10-26 23:49:51 +00:00
Akira Hatanaka
868b3a333b [mips] Make sure sret argument is returned in register V0.
llvm-svn: 166539
2012-10-24 02:10:54 +00:00
Akira Hatanaka
0c7d131a7b [mips] Use 64-bit registers to return an sret pointer if target ABI is N64.
llvm-svn: 166344
2012-10-19 22:11:40 +00:00
Akira Hatanaka
90131ac26c [mips] Add code to do tail call optimization.
Currently, it is enabled only if option "enable-mips-tail-calls" is given and
all of the callee's arguments are passed in registers.

llvm-svn: 166342
2012-10-19 21:47:33 +00:00
Akira Hatanaka
c046243488 [mips] Delete MipsFunctionInfo::MaxCallFrameSize which is no longer used.
llvm-svn: 166339
2012-10-19 21:18:38 +00:00
Akira Hatanaka
91318df0cc Add node and enum for mips tail call.
llvm-svn: 166318
2012-10-19 20:59:39 +00:00
Akira Hatanaka
9c8dcfc73a Implement MipsTargetLowering::CanLowerReturn.
Patch by Sasa Stankovic. 

llvm-svn: 165585
2012-10-10 01:27:09 +00:00
Reed Kotler
240322140e Patch for integer multiply, signed/unsigned, long/long long.
llvm-svn: 165322
2012-10-05 18:27:54 +00:00
Akira Hatanaka
e4bd054f98 MIPS DSP: Branch on Greater Than or Equal To Value 32 in DSPControl Pos Field instruction.
llvm-svn: 164751
2012-09-27 02:15:57 +00:00
Akira Hatanaka
9061a46443 MIPS DSP: all the remaining instructions which read or write accumulators.
llvm-svn: 164750
2012-09-27 02:11:20 +00:00
Akira Hatanaka
1babeaa44c MIPS DSP: add support for extract-word instructions.
llvm-svn: 164749
2012-09-27 02:05:42 +00:00
Akira Hatanaka
fabb8cf421 Add MIPS DSP register classes. Set actions of DSP vector operations and override
TargetLowering's callback functions.

llvm-svn: 164431
2012-09-21 23:58:31 +00:00
Akira Hatanaka
233ac53a3f SelectionDAG node enums for MIPS DSP nodes.
llvm-svn: 164430
2012-09-21 23:52:47 +00:00
Akira Hatanaka
189d0adde9 Handled unaligned load/stores properly in Mips16
Patch by Reed Kotler.

llvm-svn: 163956
2012-09-15 01:02:03 +00:00
Akira Hatanaka
92a96e1da4 Misc.
1. Remove RA from list of allocatable registers
2. Enable d,y,r constraint inline assembly instructions

Patch by Reed Kotler.

llvm-svn: 163753
2012-09-12 23:27:55 +00:00
Michael Liao
abb87d4857 Fix PR11985
- BlockAddress has no support of BA + offset form and there is no way to
  propagate that offset into machine operand;
- Add BA + offset support and a new interface 'getTargetBlockAddress' to
  simplify target block address forming;
- All targets are modified to use new interface and X86 backend is enhanced to
  support BA + offset addressing.

llvm-svn: 163743
2012-09-12 21:43:09 +00:00
Roman Divacky
ad06cee239 Stop casting away const qualifier needlessly.
llvm-svn: 163258
2012-09-05 22:26:57 +00:00
Akira Hatanaka
ad4950258b Add register Mips::GP to the list of reserved registers if target is bare-metal
to prevent it from being clobbered. mips uses $gp to access small data section.

This bug was originally reported by Carl Norum.

llvm-svn: 162340
2012-08-22 03:18:13 +00:00
Akira Hatanaka
33a25af5a8 Expand DYNAMIC_STACKALLOC nodes rather than doing custom-lowering.
The frame object which points to the dynamically allocated area will not be
needed after changes are made to cease reserving call frames.

llvm-svn: 161076
2012-07-31 20:54:48 +00:00