Commit Graph

4948 Commits

Author SHA1 Message Date
Peixin-Qiao
b37e5187f2 [MLIR][OpenMP] Add support for ordered construct
This patch supports the ordered construct in OpenMP dialect following
Section 2.19.9 of the OpenMP 5.1 standard. Also lowering to LLVM IR
using OpenMP IRBduiler. Lowering to LLVM IR for ordered simd directive
is not supported yet since LLVM optimization passes do not support it
for now.

Reviewed By: kiranchandramohan, clementval, ftynse, shraiysh

Differential Revision: https://reviews.llvm.org/D110015
2021-10-21 16:30:46 +08:00
Mehdi Amini
cb11ddb96c Revert "[MLIR][OpenMP] Add support for ordered construct"
This reverts commit dc2be87ecf.

Seems like this broke all the CI bots.
2021-10-21 04:53:45 +00:00
Peixin-Qiao
dc2be87ecf [MLIR][OpenMP] Add support for ordered construct
This patch supports the ordered construct in OpenMP dialect following
Section 2.19.9 of the OpenMP 5.1 standard. Also lowering to LLVM IR
using OpenMP IRBduiler. Lowering to LLVM IR for ordered simd directive
is not supported yet since LLVM optimization passes do not support it
for now.

Reviewed By: kiranchandramohan, clementval, ftynse, shraiysh

Differential Revision: https://reviews.llvm.org/D110015
2021-10-21 09:16:04 +08:00
Ahmed S. Taei
a3dd4e7770 Drop transfer_read inner most unit dimensions
Add a pattern to take a rank-reducing subview and drop inner most
contiguous unit dim.
This is useful when lowering vector to backends with 1d vector types.

Reviewed By: ThomasRaoux

Differential Revision: https://reviews.llvm.org/D111561
2021-10-20 19:27:04 +00:00
Shraiysh Vaishay
c4c7e06bd7 [MLIR][OpenMP] Shifted hint from CriticalOp to CriticalDeclareOp
According to the OpenMP 5.0 standard, names and hints of critical operation are
closely related. The following are the restrictions on them:
 - Unless the effect is as if `hint(omp_sync_hint_none)` was specified, the
   critical construct must specify a name.
 - If the hint clause is specified, each of the critical constructs with the
   same name must have a hint clause for which the hint-expression evaluates to
   the same value.

These restrictions will be enforced by design if the hint expression is a part
of the `omp.critical.declare` operation.
 - Any operation with no "name" will be considered to have
   `hint(omp_sync_hint_none)`.
 - All the operations with the same "name" will have the same hint value.

Reviewed By: kiranchandramohan

Differential Revision: https://reviews.llvm.org/D112134
2021-10-20 21:36:09 +05:30
Jacques Pienaar
6a99423390 [mlir] Expand prefixing to OpFormatGen
Follow up to also use the prefixed emitters in OpFormatGen (moved
getGetterName(s) and getSetterName(s) to Operator as that is most
convenient usage wise even though it just depends on Dialect). Prefix
accessors in Test dialect and follow up on missed changes in
OpDefinitionsGen.

Differential Revision: https://reviews.llvm.org/D112118
2021-10-20 07:08:37 -07:00
Nicolas Vasilache
6bb7d2474f [mlir][Linalg] Add a first vectorization pattern for conv1d in NWCxWCF format.
This revision uses the newly refactored StructuredGenerator to create a simple vectorization for conv1d_nwc_wcf.

Note that the pattern is not specific to the op and is technically not even specific to the ConvolutionOpInterface (modulo minor details related to dilations and strides).

The overall design follows the same ideas as the lowering of vector::ContractionOp -> vector::OuterProduct: it seeks to be minimally complex, composable and extensible while avoiding inference analysis. Instead, we metaprogram the maps/indexings we expect and we match against them.

This is just a first stab and still needs to be evaluated for performance.
Other tradeoffs are possible that should be explored.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D111894
2021-10-20 13:54:18 +00:00
bakhtiyar
f97f946839 Canonicalize max/min operations on integers.
Reviewed By: ezhulenev

Differential Revision: https://reviews.llvm.org/D112051
2021-10-19 05:25:59 -07:00
Shraiysh Vaishay
d576f45014 [MLIR][OpenMP] Added parseClauses
Code reorganized in OpenMPDialect.cpp to have all functions corresponding to an operation together.

Added parseClauses function to avoid code duplication while parsing clauses in OpenMP operations. Also added printers and verifiers for clauses, which are being used for multiple operations.

Reviewed By: kiranchandramohan, peixin

Differential Revision: https://reviews.llvm.org/D110903
2021-10-19 17:31:36 +05:30
Vladislav Vinogradov
e41ebbecf9 [mlir][RFC] Refactor layout representation in MemRefType
The change is based on the proposal from the following discussion:
https://llvm.discourse.group/t/rfc-memreftype-affine-maps-list-vs-single-item/3968

* Introduce `MemRefLayoutAttr` interface to get `AffineMap` from an `Attribute`
  (`AffineMapAttr` implements this interface).
* Store layout as a single generic `MemRefLayoutAttr`.

This change removes the affine map composition feature and related API.
Actually, while the `MemRefType` itself supported it, almost none of the upstream
can work with more than 1 affine map in `MemRefType`.

The introduced `MemRefLayoutAttr` allows to re-implement this feature
in a more stable way - via separate attribute class.

Also the interface allows to use different layout representations rather than affine maps.
For example, the described "stride + offset" form, which is currently supported in ASM parser only,
can now be expressed as separate attribute.

Reviewed By: ftynse, bondhugula

Differential Revision: https://reviews.llvm.org/D111553
2021-10-19 12:31:15 +03:00
Mogball
21bb463e96 [mlir] fix bugs with NamedAttrList
- `assign` with ArrayRef was calling `append`
- `assign` with empty ArrayRef was not clearing storage

Reviewed By: jpienaar

Differential Revision: https://reviews.llvm.org/D112043
2021-10-19 01:30:00 +00:00
Matthias Springer
fd26ca4e75 [mlir][scf] Add insideMutuallyExclusiveBranches helper
This helper function checks if two given ops are in mutually exclusive branches of the same scf::IfOp.

Differential Revision: https://reviews.llvm.org/D111957
2021-10-19 09:09:07 +09:00
Matthias Springer
252386ac81 [mlir] Add enclosingOpOk parameter to properlyDominates
Differential Revision: https://reviews.llvm.org/D111959
2021-10-19 08:59:56 +09:00
Aart Bik
9d1db3d4a1 [mlir][sparse] generalize sparse_tensor.convert on static/dynamic dimension sizes
This revison lifts the artificial restriction on having exact matches between
source and destination type shapes. A static size may become dynamic. We still
reject changing a dynamic size into a static size to avoid the need for a
runtime "assert" on the conversion. This revision also refactors some of the
conversion code to share same-content buffers.

Reviewed By: bixia

Differential Revision: https://reviews.llvm.org/D111915
2021-10-18 13:54:03 -07:00
Andrew Young
44b22f6f40 [MLIR] Expose optional attribute parsing functions
The functionality already exists in AsmParser to parse optional ArrayAttrs and
StringAttrs, but only if they are added to a NamedAttrList.  This moves the
code to parse an optional attribute and add it to an list into a common
template, and exposes the simpler functionality of just parsing the optional
attributes.

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D111918
2021-10-18 11:45:43 -07:00
Caitlyn Cano
2ea5e7ba57 [mlir] SPIR-V: add sin, cos, log, sqrt OCL ops
Differential Revision: https://reviews.llvm.org/D111884
2021-10-18 20:48:59 +03:00
Mathieu Fehr
6d6ad76a60 [mlir][NFC] Provide accessor for TableGen record for constraints
Besides accessing the record, there is currently no way to access all possible
constraint informations, such as the base constraint of a variadic constraint
for example.

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D111719
2021-10-18 15:46:08 +00:00
Mathieu Fehr
d78136121e [mlir] Add AnyAttrOf tablegen attribute constraint
AnyAttrOf, similar to AnyTypeOf, expects the attribute to be one of the
given attributes.
For instance, `AnyAttrOf<[I32Attr, StrAttr]>` expects either a `I32Attr`,
or a `StrAttr`.

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D111739
2021-10-18 15:45:25 +00:00
River Riddle
a77cd55dea [mlir] Add support for specifying printing flags when adding an op to a Diagnostic
This removes edge cases where the default flags we want to use
during printing (e.g. local scope, eliding attributes, etc.)
get missed/dropped.

Differential Revision: https://reviews.llvm.org/D111761
2021-10-18 15:07:55 +00:00
rkayaith
d5429a13da [mlir][python] Add 'loc' property to ops
Add a read-only `loc` property to Operation and OpView

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D111972
2021-10-18 16:01:12 +02:00
William S. Moses
40b9c39db1 [MLIR][LLVM] Add memset intrinsic
Add memset intrinsic into LLVM dialect

Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D111906
2021-10-16 18:20:48 -04:00
Chris Lattner
ecbee4804d [Builders.h] Silence a warning by adding a cast.
The no-result version of createOrFold calls 'tryFold' but
ignores the result since it doesn't matter what it produced.
Explicitly cast to void to silence this warning:

../llvm/mlir/include/mlir/IR/Builders.h:454:5: warning: ignoring return value of function declared with 'nodiscard' attribute [-Wunused-result]
    tryFold(op.getOperation(), unused);
    ^~~~~~~ ~~~~~~~~~~~~~~~~~~~~~~~~~

Differential Revision: https://reviews.llvm.org/D111951
2021-10-16 13:30:28 -07:00
Mehdi Amini
d0d991cd23 Improve fatal error message when an Attribute or Type wasn't initialized by a dialect (NFC)
The existing message hints that the dialect may not be loaded, but there
is also the possibility that the dialect was loaded and the initialize()
method didn't include the Type/Attribute.
2021-10-16 20:19:35 +00:00
Groverkss
52d6c5df85 [MLIR] Generalize Affine dependence analysis using Affine Relations
This patch removes code very specific to affine dependence analysis and
refactors it as a FlatAfffineRelation.

A FlatAffineRelation represents a set of ordered pairs (domain -> range) where
"domain" and "range" are tuples of identifiers. These relations are used to
represent an "access relation" for memory access on a memref.  An access
relation maps elements of an iteration domain to the element(s) of an array
domain accessed by that iteration of the associated statement through some
array reference.  The dependence relation representing the dependence
constraints between two memory accesses can be built by composing the access
relation of the destination access by the inverse of the access relation of
source access.

This patch does not change the functionality of the existing dependence
analysis in checkMemrefAccessDependence, but refactors it to use
FlatAffineRelations to deduplicate code and enable code reuse for future
development of features like scheduling, value-based dependence analysis, etc.

Reviewed By: bondhugula

Differential Revision: https://reviews.llvm.org/D110563
2021-10-16 12:16:42 +05:30
Jacques Pienaar
965ec6dbe7 [mlir] Add folder for shape.add 2021-10-15 17:30:17 -07:00
Geoffrey Martin-Noble
efc6fe963c [MLIR][TOSA] Drop "OnTensors" suffix
This is the only lowering to Linalg Tosa has, so it's needlessly
verbose. Likely this was a carry over from IREE's usage where we
originally lowered to linalg on buffers (the only linalg that existed at
the time), so the everything on tensors needed the suffix. We're dropping
it in IREE also, having transitioned entirely to using Linalg on
tensors.

Reviewed By: sjarus

Differential Revision: https://reviews.llvm.org/D111911
2021-10-15 16:01:19 -07:00
Nicolas Vasilache
60802715d1 [mlir][vector] NFC - Refactor and extract a helper StructuredGenerator class
Differential Revision: https://reviews.llvm.org/D111893
2021-10-15 16:01:59 +00:00
Andrew Young
844706701e [MLIR] Add KeywordOrString handling to AsmParser
This adds a new parser and printer for text which may be a keyword or a
string. When printing, it will attempt to print the text as a keyword,
but if it has any special or non-printable characters, it will be
printed as an escaped string.  When parsing, it will parse either a
valid keyword or a potentially escaped string. The printer allows for an
empty string, in which case it prints `""`.

This new function is used for printing the name in NamedAttributes, and
for printing the symbol name after the `@`. In CIRCT we are using this
to print module port names, which are conceptually similar to named
function arguments.

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D111683
2021-10-15 00:08:34 -07:00
Mogball
44610c01ae [MLIR][ODS] default-valued strings should be in quotes
`DefaultValuedAttr<StrAttr, "">` and `ConstantAttr<StrAttr, "">`
result in bugs in which TableGen will not recognize that the attribute
has a default value, because `""` is an empty TableGen string.

Strings no longer have special treatment. Instead, string values must be
wrapped in quotes: "\"foo\"". Two helpers, `DefaultValuedStrAttr` and
`ConstantStrAttr` have been added to keep code clean.

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D111855
2021-10-15 03:00:41 +00:00
Matthias Springer
d3cb6bf2d4 [mlir][linalg][bufferize] Rewrite conflict detection
For each memory read, follow SSA use-def chains to find the op that produces the data being read (i.e., the most recent write). A memory write to an alias is a conflict if it takes places after the "most recent write" but before the read.

This CL introduces two main changes:
* There is a concise definition of a conflict. Given a piece of IR with InPlaceSpec annotations and a computes alias set, it is easy to compute whether this program has a conflict. No need to consider multiple cases such as "read of operand after in-place write" etc.
* No need to check for clobbering.

Differential Revision: https://reviews.llvm.org/D111287
2021-10-15 10:31:02 +09:00
Jacques Pienaar
65c9907c80 [mlir][ods] Enable emitting getter/setter prefix
Allow emitting get & set prefix for accessors generated for ops. If
enabled, then the argument/return/region name gets converted from
snake_case to UpperCamel and prefix added. The attribute also allows
generating both the current "raw" method along with the prefix'd one to
make it easier to stage changes.

The option is added on the dialect and currently defaults to existing
raw behavior. The expectation is that the staging where both are
generated would be short lived and so optimized to keeping the changes
local/less invasive (it just generates two functions for each accessor
with the same body - most of these internally again call a helper
function). But generation can be optimized if needed.

I'm unsure about OpAdaptor classes as there it is all get methods (it is
a named view into raw data structures), so prefix doesn't add much.

This starts with emitting raw-only form (as current behavior) as
default, then one can opt-in to raw & prefixed, then just prefixed. The
default in OpBase will switch to prefixed-only to be consistent with
MLIR style guide. And the option potentially removed later (considered
enabling specifying prefix but current discussion more pro keeping it
limited and stuck with that).

Also add more explicit checking for pruned functions to avoid emitting
where no function was added (and so avoiding dereferencing nullptr)
during op def/decl generation.

See https://bugs.llvm.org/show_bug.cgi?id=51916 for further discussion.

Differential Revision: https://reviews.llvm.org/D111033
2021-10-14 15:58:44 -07:00
Mogball
cb3aa49ec0 [MLIR][arith] fix references to std.constant in comments
Reviewed By: jpienaar

Differential Revision: https://reviews.llvm.org/D111820
2021-10-14 20:38:47 +00:00
Uday Bondhugula
05fb26062c [MLIR] Fix assert crash when an unregistered dialect op is encountered
Fix assert crash when an unregistered dialect op is encountered during
parsing and `-allow-unregistered-dialect' isn't on. Instead, emit an
error.

While on this, clean up "registered" vs "loaded" on `getDialect()` and
local clang-tidy warnings.

https://llvm.discourse.group/t/assert-behavior-on-unregistered-dialect-ops/4402

Differential Revision: https://reviews.llvm.org/D111628
2021-10-14 15:43:53 +05:30
Tobias Gysi
a8f69be61f [mlir][linalg] Expose flag to control nofold attribute when padding.
Setting the nofold attribute enables packing an operand. At the moment, the attribute is set by default. The pack introduces a callback to control the flag.

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D111718
2021-10-14 10:07:07 +00:00
Tobias Gysi
eaa52750ce [mlir][linalg] Verify every LinalgOp has a body.
After removing the last LinalgOps that have no region attached we can verify there is a region. The patch performs the following changes:
- Move the SingleBlockImplicitTerminator trait further up the the structured op base class.
- Adapt the LinalgOp verification since the trait only check if there is 0 or 1 block.
- Introduce a getBlock method on the LinalgOp interface.
- Access the LinalgOp body using either getBlock() or getBody() if the concrete operation type is known.

This patch is a follow up to https://reviews.llvm.org/D111233.

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D111393
2021-10-14 09:08:39 +00:00
Aart Bik
35517a251d [mlir][sparse] add init sparse tensor operation
This is the first step towards supporting general sparse tensors as output
of operations. The init sparse tensor is used to materialize an empty sparse
tensor of given shape and sparsity into a subsequent computation (similar to
the dense tensor init operation counterpart).

Example:
  %c = sparse_tensor.init %d1, %d2 : tensor<?x?xf32, #SparseMatrix>
  %0 = linalg.matmul
    ins(%a, %b: tensor<?x?xf32>, tensor<?x?xf32>)
    outs(%c: tensor<?x?xf32, #SparseMatrix>) -> tensor<?x?xf32, #SparseMatrix>

Reviewed By: bixia

Differential Revision: https://reviews.llvm.org/D111684
2021-10-13 09:47:56 -07:00
xndcn
8c1553f0d7 [mlir][spirv] Add memory semantics verify for atomic operations
Differential Revision: https://reviews.llvm.org/D111510
2021-10-14 00:00:55 +08:00
Mehdi Amini
6f5c685839 Avoid one branch in Operation::getOpOperand()/getOperand() (NFC)
Skip the check on "hasOperandStorage" since the array will be indexed anyway.

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D111696
2021-10-13 09:07:06 +00:00
Matthias Springer
c161084723 [mlir] Make OpResult usable with DenseSet etc.
`DenseSet<Value>` works but `DenseSet<OpResult>` currently results in a compile error.

Differential Revision: https://reviews.llvm.org/D111694
2021-10-13 15:58:08 +09:00
Mogball
a54f4eae0e [MLIR] Replace std ops with arith dialect ops
Precursor: https://reviews.llvm.org/D110200

Removed redundant ops from the standard dialect that were moved to the
`arith` or `math` dialects.

Renamed all instances of operations in the codebase and in tests.

Reviewed By: rriddle, jpienaar

Differential Revision: https://reviews.llvm.org/D110797
2021-10-13 03:07:03 +00:00
Weiwei Li
c0a6381e49 [mlir][SPIRVToLLVM] Solve ExecutionModeOp redefinition and add OpTypeSampledImage into SPV_Type
1. To avoid two ExecutionModeOp using the same name, adding the value of execution mode in name when converting to LLVM dialect.
2. To avoid syntax error in spv.OpLoad, add OpTypeSampledImage into SPV_Type.

Reviewed by:antiagainst

Differential revision:https://reviews.llvm.org/D111193
2021-10-13 10:03:25 +08:00
Matthias Springer
fd31620420 [mlir][linalg][bufferize][NFC] Conflict detection funcs take OpOperand and OpResult
By doing so, it is not necessary to get the OpOperand a second time via
getAliasingOpOperand. Also, code slightly more readable because we do
not have to deal with Optional<> return value.

Differential Revision: https://reviews.llvm.org/D110918
2021-10-13 09:17:31 +09:00
Diego Caballero
5c1d356c18 [mlir][Linalg] Enable vectorization of explicit broadcasts
This patch teaches `isProjectedPermutation` and `inverseAndBroadcastProjectedPermutation`
utilities to deal with maps representing an explicit broadcast, e.g., (d0, d1) -> (d0, 0).
This extension is needed to enable vectorization of such explicit broadcast in Linalg.

Reviewed By: pifon2a, nicolasvasilache

Differential Revision: https://reviews.llvm.org/D111563
2021-10-12 21:08:22 +00:00
Rob Suderman
95e4b71519 [mlir][tosa] Fix tosa average_pool2d to linalg type issue
Average pool assumed the same input/output type. Result type for integers
is always an i32, should be updated appropriately.

Reviewed By: GMNGeoffrey

Differential Revision: https://reviews.llvm.org/D111590
2021-10-12 13:09:21 -07:00
Tobias Gysi
63638ed181 [mlir][linalg] Enable the vector transfer lowering by default.
Adapt CodegenStartegy to used the vector transfer lowering patterns by default.

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D111649
2021-10-12 18:11:05 +00:00
Lei Zhang
519b350de0 [mlir][vector] Add folder for no-op InsertStridedSliceOp
Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D111636
2021-10-12 11:41:35 -04:00
Tobias Gysi
c8faeb1edd [mlir][linalg] Add switch to disable/enable vector transfer lowering.
Add a switch to code gen strategy to disable/enable the vector transfer lowering and disable it by default.

Differential Revision: https://reviews.llvm.org/D111647
2021-10-12 15:06:07 +00:00
Tobias Gysi
97d67f7438 [mlir][linalg] Add vector transfer lowering patters to codegen strategy.
Add the vector transfer patterns and introduce the max transfer rank option on the codegen strategy.

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D111635
2021-10-12 14:19:45 +00:00
Nicolas Vasilache
753a67b5c9 [mlir][Linalg] Refactor and improve vectorization to add support for reduction into 0-d tensors.
This revision takes advantage of the recently added support for 0-d transfers and vector.multi_reduction that return a scalar.

Reviewed By: pifon2a

Differential Revision: https://reviews.llvm.org/D111626
2021-10-12 12:47:36 +00:00
Nicolas Vasilache
67b10532c6 [mlir][Vector] Allow a 0-d for for vector transfer ops.
This revision updates the op semantics, printer, parser and verifier to allow 0-d transfers.
Until 0-d vectors are available, such transfers have a special form that transits through vector<1xt>.
This is a stepping stone towards the longer term work of adding 0-d vectors and will help significantly reduce corner cases in vectorization.

Transformations and lowerings do not yet support this form, extensions will follow.

Differential Revision: https://reviews.llvm.org/D111559
2021-10-12 11:48:42 +00:00