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90 Commits

Author SHA1 Message Date
Nate Begeman
1ce4839890 Fix i64 return, fix CopyFromReg 
llvm-svn: 21076
 2005-04-04 06:52:38 +00:00
Nate Begeman
629cdaea39 Full varargs support. All of UnitTests now passes 
llvm-svn: 21070
 2005-04-03 23:11:17 +00:00
Nate Begeman
7a3e929efc Pass the correct value for the chain to the store 
llvm-svn: 21066
 2005-04-03 22:22:56 +00:00
Nate Begeman
f6dc43bd46 Fix SHL_PARTS 
Start implementation of integer varargs

llvm-svn: 21065
 2005-04-03 22:13:27 +00:00
Nate Begeman
34cc5b329f Keeping up with the Joneses. 
Implement not, nor, nand, and eqv

llvm-svn: 21060
 2005-04-03 11:20:20 +00:00
Nate Begeman
165cf4844e Set shift amount to Extend 
Implement ISD::FABS and ISD::FNEG nodes
Implement SHL_PARTS, SRL_PARTS, and SRA_PARTS
Generate PowerPC 'fneg', 'fabs', and 'fnabs' instructions

llvm-svn: 21018
 2005-04-02 05:59:34 +00:00
Chris Lattner
0b7e4cd107 This target doesn't support fabs/fneg yet. 
llvm-svn: 21010
 2005-04-02 05:03:24 +00:00
Nate Begeman
cfc452d088 Fix i64 returns 
Generate PowerPC 'subfic' instruction when appropriate

llvm-svn: 20995
 2005-04-02 00:42:16 +00:00
Nate Begeman
cda9aa7fa9 Add ISD::UNDEF node 
Teach the SelectionDAG code how to expand and promote it
Have PPC32 LowerCallTo generate ISD::UNDEF for int arg regs used up by fp
  arguments, but not shadowing their value.  This allows us to do the right
  thing with both fixed and vararg floating point arguments.

llvm-svn: 20988
 2005-04-01 22:34:39 +00:00
Nate Begeman
1c3aea6019 Fix Olden/bh, CR0 was being set in the wrong order 
LowerCallTo and ISD::CALL are going to need to be modified, regs are being
set in the wrong order.

llvm-svn: 20981
 2005-04-01 08:57:43 +00:00
Nate Begeman
c9e50238c5 Also apply Chris's fix to FP select and SETCC 
llvm-svn: 20979
 2005-04-01 07:21:30 +00:00
Chris Lattner
ffc7f243fe Move the selection of the arms of the select operation up to the conditional 
part to make sure we get the side effects and to avoid confusing the CFG.

llvm-svn: 20977
 2005-04-01 07:10:02 +00:00
Nate Begeman
2095f3b06b Fix stores to global addresses 
Fix calls with no arguments

llvm-svn: 20975
 2005-04-01 05:57:17 +00:00
Nate Begeman
839b34c367 Support indexed loads and stores. This drops Shootout/matrix time from 
18.8 to 14.8 seconds.  The Pattern ISel is now often faster than the
Simple ISel, esp. on memory intensive code.

llvm-svn: 20973
 2005-04-01 04:45:11 +00:00
Nate Begeman
f4d91610ff Implement FP_TO_SINT and FP_TO_UINT 
llvm-svn: 20972
 2005-04-01 02:59:27 +00:00
Nate Begeman
508aac2ca8 Add support for adding 0.0 and -0.0 to the constant pool, since we lie and 
say that we support them, for the purposes of generating fsel instructions.

llvm-svn: 20970
 2005-04-01 01:08:07 +00:00
Nate Begeman
4f3a9860d3 Factor out common code, support FP comparison in folded SetCC 
llvm-svn: 20969
 2005-04-01 00:32:34 +00:00
Nate Begeman
6215b35918 fsel generation for f32 and f64 select 
generate compare immediate for integer compare with constant
fold setcc into branch
fold setcc into select

Code generation quality for Shootout is now on par with the Simple ISel

llvm-svn: 20968
 2005-03-31 23:55:40 +00:00
Nate Begeman
eddfff338a Pass the correct values to the chain argument for node construction during 
LowerCallTo.
Handle ISD::ADD in SelectAddr, allowing us to have nonzero immediates for
loads and stores, amazing!

llvm-svn: 20946
 2005-03-31 02:05:53 +00:00
Nate Begeman
9de7ddf7d5 Rewrite LowerCallTo and Select(ISD::CALL) to properly handle float varargs 
Tell the SelectionDAG ISel to expand SEXTLOAD of i1 and i8, rather than
  complicate the code in ISD::SEXTLOAD to do it by hand
Combine the FP and Int ISD::LOAD codegen
Generate better code for constant pool loads

As a result, all of Shootout, and likely many other programs are now
working.

llvm-svn: 20945
 2005-03-31 00:15:26 +00:00
Nate Begeman
4c0780cf42 Fix calls whose arguments fit entirely in registers to not break the Chain. 
Implement SINT_TO_FP and UINT_TO_FP
Remove some dead code from the simple ISel

llvm-svn: 20944
 2005-03-30 19:38:35 +00:00
Nate Begeman
a8114a0f48 Fix frame index code to generate legal PowerPC instructions. About half of 
Shootout now works.

llvm-svn: 20940
 2005-03-30 02:23:08 +00:00
Nate Begeman
5851a66128 Fix external symbol printing in the AsmPrinter. Tell the ISel that we 
don't support things like memcpy directly.  This allows a handful of the
Shootout programs to work, yay!

llvm-svn: 20939
 2005-03-30 01:45:43 +00:00
Nate Begeman
9c40e9c61f Fix BranchCC (it's still dumb), and implement FP select (also dumb) 
llvm-svn: 20935
 2005-03-29 22:48:55 +00:00
Nate Begeman
28145edd30 Implement integer select and i1 sign extend 
llvm-svn: 20934
 2005-03-29 22:24:51 +00:00
Nate Begeman
28c5ac9ff4 Implement SetCC, fix ZERO_EXTEND_INREG 
llvm-svn: 20933
 2005-03-29 21:54:38 +00:00
Chris Lattner
1ce9aacf2e fix a warning in the optimized build 
llvm-svn: 20920
 2005-03-29 15:13:27 +00:00
Nate Begeman
60956dd52f Implement div, rem, and frameindex 
llvm-svn: 20907
 2005-03-29 00:03:27 +00:00
Nate Begeman
731bed10c7 Pattern ISel: fix argument loading for i64s (thanks chris) 
Simple  ISel: fix i64 subtract

llvm-svn: 20903
 2005-03-28 23:08:54 +00:00
Nate Begeman
66acad746f Remove fake instruction 'subc' (mnemonic for subfc). 
More pattern isel updates

llvm-svn: 20902
 2005-03-28 22:28:37 +00:00
Nate Begeman
5bdfc63516 Implement proper loads and zero-extends of all types 
llvm-svn: 20897
 2005-03-28 19:36:43 +00:00
Nate Begeman
518a994b7d Fix that pesky floats in integer regs problem by assigning the f32 type to 
the correct register class.  Also remove the loading of float data into int
regs part of varargs; it will need to be implemented differently later.

llvm-svn: 20857
 2005-03-26 08:25:22 +00:00
Nate Begeman
dcad53e7bd Get closer to having varargs working. There's still something strange 
going on with copies between floating point and integer register files
being generated.  Once that is solved, varargs will be done.

llvm-svn: 20856
 2005-03-26 07:46:36 +00:00
Nate Begeman
c95bf7b226 Make 64bit args and float args work correct with calls. Thanks to Chris 
for explaining EXTRACT_ELEMENT to me.

llvm-svn: 20847
 2005-03-26 02:17:46 +00:00
Nate Begeman
e70b5c79f8 Next round of pattern isel changes, mostly dealing with calls. 
llvm-svn: 20841
 2005-03-26 01:28:53 +00:00
Nate Begeman
0ad33afe22 Support global addresses and fix call returns. Varargs still aren't 
handled correctly for floating point arguments, or more than 8 arguemnts.
This does however, allow hello world to run.

llvm-svn: 20832
 2005-03-25 08:34:25 +00:00
Nate Begeman
ad5151d785 Implement next round of Pattern ISel fixes 
1. void returns
2. multiplies
3. calls

llvm-svn: 20822
 2005-03-24 23:35:30 +00:00
Nate Begeman
7ec19b4d5a Implement more of the PPC32 Pattern ISel: 
1) dynamic stack alloc
2) loads
3) shifts
4) subtract
5) immediate form of add, and, or, xor
6) change flag from -pattern-isel to -enable-ppc-pattern-isel

Remove dead arguments from getGlobalBaseReg in the simple ISel

llvm-svn: 20810
 2005-03-24 06:28:42 +00:00
Chris Lattner
a3abb4c01a Fix silly "no newline at end of file" warning 
llvm-svn: 20809
 2005-03-24 06:16:18 +00:00
Nate Begeman
20e7e28ee7 Addition of the PPC32 Pattern ISel. While it is far from complete, it will 
be brought up to parity with the current simple ISel in the coming days.
Currently, -pattern-isel is required to trigger it.

llvm-svn: 20805
 2005-03-24 04:41:43 +00:00