Chris Lattner
8abab9b0c7
treat TAILCALL nodes identically to CALL nodes
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llvm-svn: 21977
2005-05-13 20:29:26 +00:00
Chris Lattner
2e77db6af6
Add an isTailCall flag to LowerCallTo
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llvm-svn: 21958
2005-05-13 18:50:42 +00:00
Chris Lattner
6756f2f795
Realize that we don't support fmod directly, fixing CodeGen/Generic/print-arith-fp.ll
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llvm-svn: 21939
2005-05-13 16:20:22 +00:00
Chris Lattner
2dce703710
rename the ADJCALLSTACKDOWN/ADJCALLSTACKUP nodes to be CALLSEQ_START/BEGIN.
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llvm-svn: 21915
2005-05-12 23:24:06 +00:00
Chris Lattner
36674a123e
Pass in Calling Convention to use into LowerCallTo
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llvm-svn: 21899
2005-05-12 19:56:45 +00:00
Chris Lattner
f80969f29b
These targets don't like setcc
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llvm-svn: 21884
2005-05-12 02:06:00 +00:00
Andrew Lenharth
b8e94c3499
fix typo
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llvm-svn: 21693
2005-05-04 19:25:37 +00:00
Andrew Lenharth
5e177826fd
Implement count leading zeros (ctlz), count trailing zeros (cttz), and count
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population (ctpop). Generic lowering is implemented, however only promotion
is implemented for SelectionDAG at the moment.
More coming soon.
llvm-svn: 21676
2005-05-03 17:19:30 +00:00
Chris Lattner
9993823876
Doesn't support these nodes
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llvm-svn: 21634
2005-04-30 04:26:56 +00:00
Andrew Lenharth
4a73c2cfdc
Implement Value* tracking for loads and stores in the selection DAG. This enables one to use alias analysis in the backends.
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(TRUNK)Stores and (EXT|ZEXT|SEXT)Loads have an extra SDOperand which is a SrcValueSDNode which contains the Value*. Note that if the operation is introduced by the backend, it will still have the operand, but the value* will be null.
llvm-svn: 21599
2005-04-27 20:10:01 +00:00
Misha Brukman
e73e76dc42
Convert tabs to spaces
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llvm-svn: 21452
2005-04-22 17:54:37 +00:00
Misha Brukman
b440243e94
Remove trailing whitespace
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llvm-svn: 21425
2005-04-21 23:30:14 +00:00
Chris Lattner
83075510ee
Elimate handling of ZERO_EXTEND_INREG. This causes the PPC backend to emit
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andi instructions instead of rlwinm instructions for zero extend, but they
seem like they would take the same time.
llvm-svn: 21268
2005-04-13 02:40:26 +00:00
Chris Lattner
4f77badaa3
This target does not yet support ISD::BRCONDTWOWAY
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llvm-svn: 21163
2005-04-09 03:22:30 +00:00
Nate Begeman
e8ce0cda40
64b: Expand S/UREM
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32b: No longer pattern match fneg(fsub(fmul)) as fnmsub
Pattern match fsub a, mul(b, c) as fnmsub
Pattern match fadd a, mul(b, c) as fmadd
Those changes speed up hydro2d by 2.5%, distray by 6%, and scimark by 8%
llvm-svn: 21161
2005-04-09 03:05:51 +00:00
Nate Begeman
f50b597f67
Fix 64b shifts
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llvm-svn: 21159
2005-04-08 23:45:01 +00:00
Nate Begeman
705d3c18e8
Match Mac OS X 64 bit calling conventions
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llvm-svn: 21157
2005-04-08 21:26:05 +00:00
Nate Begeman
4164c4baac
Add support for MULHS and MULHU nodes
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Have LegalizeDAG handle SREM and UREM for us
Codegen SDIV and UDIV by constant as a multiply by magic constant instead
of integer divide, which is very slow.
llvm-svn: 21104
2005-04-06 00:25:27 +00:00
Nate Begeman
a188b698a2
Fix cut & paste errors (32->64), and codegen float->int more optimally.
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llvm-svn: 21098
2005-04-05 17:32:30 +00:00
Nate Begeman
9203e169a7
Remove 64 bit simple ISel, it never worked correctly
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Add initial (buggy) implementation of 64 bit pattern ISel
llvm-svn: 21096
2005-04-05 08:51:15 +00:00
