Commit Graph

11182 Commits

Author SHA1 Message Date
Alex MacLean
8ff60c4d47 [NVPTX] Add support for nvvm.flo.[us] intrinsics (#114489)
Add support for '`llvm.nvvm.flo.[su].*`' intrinsics which correspond to
a PTX `bfind` instruction.
See [PTX ISA 9.7.1.16. Integer Arithmetic Instructions: bfind]
(https://docs.nvidia.com/cuda/parallel-thread-execution/index.html#integer-arithmetic-instructions-bfind)

The '`llvm.nvvm.flo.u`' family of intrinsics identifies the bit position
of the leading one, returning either it's offset from the most or least
significant bit.

The '`llvm.nvvm.flo.s`' family of intrinsics identifies the bit position
of the leading non-sign bit, returning either it's offset from the most
or least significant bit.
2024-11-01 16:35:43 -07:00
David Spickett
a1c6dc223e [llvm][docs] Add Approvals section to GitHub guide (#113434)
Based on feedback that when reading the document as a guide, it's odd
that it skips right from updating the PR to merging it.

The section is a link to the existing Code Review guide's text on the
topic.

I have updated that to mention required reviewers, which some
subprojects do use (libcxx is one) but most don't.

Also we use the words "accepted" and "approved" interchangeably, so I've
swapped one instance so it's consistent between paragraphs.
2024-10-31 15:24:33 +00:00
Aaron Ballman
0ab44fd246 Replace documentation mentions of IRC with Discord (#114276)
This does not touch code owners or credits files that list IRC handles,
that can be done separately if we want to make that change.

See
https://discourse.llvm.org/t/rfc-remove-irc-as-a-recommended-communication-channel/82808/3
for the RFC.
2024-10-31 09:22:46 -04:00
Jan Svoboda
3f17613509 [docs] Point to Discourse for creating RFCs (#114341) 2024-10-31 05:35:57 -07:00
Wanyi
efc6d33be9 [lldb] Fix write only file action to truncate the file (#112657)
When `FileAction` opens file with write access, it doesn't clear the
file nor append to the end of the file if it already exists. Instead, it
writes from cursor index 0.

For example, by using the settings `target.output-path` and
`target.error-path`, lldb will redirect process stdout/stderr to files.
It then calls this function to write to the files which the above
symptoms appear.

## Test
- Added unit test checking the file flags
- Added 2 api tests checking
  - File content overwritten if the file path already exists
- Stdout and stderr redirection to the same file doesn't change its
behavior
2024-10-29 14:22:51 -04:00
Benjamin Maxwell
c3260c65e8 [IR] Add llvm.sincos intrinsic (#109825)
This adds the `llvm.sincos` intrinsic, legalization, and lowering.

The `llvm.sincos` intrinsic takes a floating-point value and returns
both the sine and cosine (as a struct).

```
declare { float, float }          @llvm.sincos.f32(float  %Val)
declare { double, double }        @llvm.sincos.f64(double %Val)
declare { x86_fp80, x86_fp80 }    @llvm.sincos.f80(x86_fp80  %Val)
declare { fp128, fp128 }          @llvm.sincos.f128(fp128 %Val)
declare { ppc_fp128, ppc_fp128 }  @llvm.sincos.ppcf128(ppc_fp128  %Val)
declare { <4 x float>, <4 x float> } @llvm.sincos.v4f32(<4 x float>  %Val)
```

The lowering is built on top of the existing FSINCOS ISD node, with
additional type legalization to allow for f16, f128, and vector values.
2024-10-29 10:52:20 +00:00
David Spickett
a8398bd817 [llvm][docs] Update list of llvm-lit options
Fixes #62899

In this commit I have updated the list of options
to include any missing options and re-rordered
some of them to match the order in lit's --help.

Where there was a larger description in this document
I've used that instead of the --help description.

This *does not* include --use-unique-output-file-name
as this was only added recently and we are still
debating whether it will be kept.
2024-10-29 10:35:27 +00:00
Alex Bradbury
7544d3af0e [RISCV] Mark RVB23U64 and RVB23S64 as non-experimental (#113918)
The specification was recently ratified

<https://github.com/riscv/riscv-profiles/blob/main/src/rvb23-profile.adoc>.
2024-10-29 07:57:34 +00:00
Alex Bradbury
ba7555e640 [RISCV] Mark the RVA23S64 and RVA23U64 profiles as non-experimental (#113826)
All of the extensions used by these profile are themselves
non-experimental, and RVA23 was just ratified

<https://riscv.org/announcements/2024/10/risc-v-announces-ratification-of-the-rva23-profile-standard/>.

<https://github.com/riscv/riscv-profiles/blob/main/src/rva23-profile.adoc>

We lack a way of expressing `Ss1p13` (supervisor architecture 1.13), but
this is a problem we have for RVA22 (Ss1p12) and RVA20 (Ss1p11) so I
don't feel it's a blocker.
2024-10-28 12:56:47 +00:00
dong-miao
75c75fc16e [RISCV]Add svvptc extension (#113882) 2024-10-28 22:54:51 +11:00
Brandon Wu
f5d8a485e2 [RISCV] Fix typo in UserGuides.rst. NFC (#113861) 2024-10-28 18:30:21 +08:00
Alex Bradbury
35f6cc6af0 [RISCV] Add the Sha extension (#113820)
This was introduced in the now-ratified RVA23 profile (and also added to
the RVA22 text) as a simple way of referring to H plus the set of
supervisor extensions required by RVA23.
https://github.com/riscv/riscv-profiles/blob/main/src/rva23-profile.adoc

This patch simply defines the extension. The next patch will adjust the
RVA23 profile to use it, and at that point I think we will be ready to
mark RVA23 as non-experimental.

Note that I haven't made it so if you enable all extensions that
constitute Sha, Sha is implied. Per #76893 (adding 'B'), the concern is
making this implication might break older external assemblers. Perhaps
this is less of a concern given the relative frequency of
`-march=${foo}_zba_zbb_zbs` vs the collection of H extensions. If we did
want to add that implication, we'd probably want to add it in a separate
patch so it can be easily reverted if found to cause problems.
2024-10-28 07:42:33 +00:00
Freddy Ye
d3f70db51c [X86][MC] Support instructions of MSR_IMM (#113524)
Ref.: https://cdrdv2.intel.com/v1/dl/getContent/671368
2024-10-28 12:59:51 +08:00
Freddy Ye
5aa1275d03 [X86] Support SM4 EVEX version intrinsics/instructions. (#113402)
Ref.: https://cdrdv2.intel.com/v1/dl/getContent/671368
2024-10-28 10:46:16 +08:00
Alex MacLean
fb33af08e4 [NVPTX] Remove nvvm.ldg.global.* intrinsics (#112834)
Remove these intrinsics which can be better represented by load
instructions with `!invariant.load` metadata:

- llvm.nvvm.ldg.global.i
- llvm.nvvm.ldg.global.f
- llvm.nvvm.ldg.global.p
2024-10-27 16:14:13 -07:00
davidtrevelyan
4102625380 [rtsan][llvm][NFC] Rename sanitize_realtime_unsafe attr to sanitize_realtime_blocking (#113155)
# What

This PR renames the newly-introduced llvm attribute
`sanitize_realtime_unsafe` to `sanitize_realtime_blocking`. Likewise,
sibling variables such as `SanitizeRealtimeUnsafe` are renamed to
`SanitizeRealtimeBlocking` respectively. There are no other functional
changes.


# Why?

- There are a number of problems that can cause a function to be
real-time "unsafe",
- we wish to communicate what problems rtsan detects and *why* they're
unsafe, and
- a generic "unsafe" attribute is, in our opinion, too broad a net -
which may lead to future implementations that need extra contextual
information passed through them in order to communicate meaningful
reasons to users.
- We want to avoid this situation and make the runtime library boundary
API/ABI as simple as possible, and
- we believe that restricting the scope of attributes to names like
`sanitize_realtime_blocking` is an effective means of doing so.

We also feel that the symmetry between `[[clang::blocking]]` and
`sanitize_realtime_blocking` is easier to follow as a developer.

# Concerns

- I'm aware that the LLVM attribute `sanitize_realtime_unsafe` has been
part of the tree for a few weeks now (introduced here:
https://github.com/llvm/llvm-project/pull/106754). Given that it hasn't
been released in version 20 yet, am I correct in considering this to not
be a breaking change?
2024-10-26 13:06:11 +01:00
Dan Gohman
1bc2cd98c5 [WebAssembly] Enable nontrapping-fptoint and bulk-memory by default. (#112049)
We were prepared to enable these features [back in February], but they
got pulled for what appear to be unrelated reasons. So let's have
another try at enabling them!

Another motivation here is that it'd be convenient for the [Lime1
proposal] if "lime1" is close to a subset of "generic" (missing only
for extended-const).

[back in February]:
https://github.com/WebAssembly/tool-conventions/issues/158#issuecomment-1931119512
[Lime1 proposal]: https://github.com/llvm/llvm-project/pull/112035
2024-10-25 13:52:51 -07:00
Jonathan Thackray
4161ca2092 [NFC][AArch64][LLVM] Update ReleaseNotes.md with Armv9.6-A (2024) arch extensions 2024-10-25 17:38:00 +01:00
Alex Bradbury
2c0b34852a [RISCV] Mark pointer masking extensions as non-experimental (#113618)
These extensions were ratified very recently.

<https://lf-riscv.atlassian.net/wiki/spaces/HOME/pages/16154732/Ratified+Extensions>

I've ensured we have definitions for all extensions in the document
<https://drive.google.com/file/d/159QffOTbi3EEbdkKndYRZ2c46D25ZLmO/view?usp=drive_link>.
There are no additional CSRs.
2024-10-25 12:24:50 +01:00
dong-miao
ed6ddffb58 [RISCV] Add Smrnmi extension (#111668)
This commit has completed the Extension for Resumable Non Maskable
Interrupts, adding four CRSs and one Trap-Return instruction.
Specification link:["Smrnmi"
Extension](https://github.com/riscv/riscv-isa-manual/blob/main/src/rnmi.adoc)

---------

Co-authored-by: Sam Elliott <sam@lenary.co.uk>
2024-10-25 18:41:21 +11:00
Freddy Ye
c4248fa3ed [X86] Support MOVRS and AVX10.2 instructions. (#113274)
Ref.: https://cdrdv2.intel.com/v1/dl/getContent/671368
2024-10-25 09:00:19 +08:00
David Spickett
76f4f950f6 [lldb][AArch64] Add release note for AArch64 Linux FPMR register 2024-10-24 11:05:21 +01:00
Edd Dawson
d4dd770289 [llvm-cxxfilt] De-emphasize "function" in llvm-cxxfilt docs and --help (#113309)
llvm-cxxfilt can demangle names of data symbols, in addition to function
names.

    $ llvm-cxxfilt _ZN6garden5gnomeE
    garden::gnome

And type names too, on request:

    $ llvm-cxxfilt -t i
    int

Update some overly specific the wording in the --help and documentation
that suggests otherwise.
2024-10-23 13:03:30 +01:00
David Spickett
dfc40650ec [llvm][docs] Clean up the "Landing Your Change" section of the GitHub docs (#112869)
* Note up front that the author may not have permissions to use the
merge button and should ask a reviewer to do those steps.
* Make it clear that a single commit PR can be landed with a single
button click.
* There are in fact 3 ways to land a multi-commit PR.
* Order the ways in increasing amount of overhead for the PR author.
* Put them in bullet point sections so they are visually separate.
* Add a note that force pushes can be problematic when the PR has multiple authors, but don't go too much into how to solve that, Git's docs are better here anyway.
2024-10-23 09:52:00 +01:00
Carl Ritson
076aac59ac [AMDGPU] Add a new target for gfx1153 (#113138) 2024-10-23 12:56:58 +09:00
Alex MacLean
4c1b1f6d21 [NVPTX] Add support for clamped funnel shift intrinsics (#113228)
Add support for ``llvm.nvvm.fshl.clamp`` and ``llvm.nvvm.fshr.clamp``
intrinsics. These intrinsics are similar to the generic llvm funnel
shift, except that the shift value is clamped to the integer width.
Currently only ``i32`` is supported and is implemented with the
`shf.[rl].clamp.b32` PTX instruction.
2024-10-22 16:39:44 -07:00
Justin Fargnoli
8a12e0131f Revert "[LLVM] Add IRNormalizer Pass" (#113392)
Reverts llvm/llvm-project#68176

Introduced BuildBot failure:
https://github.com/llvm/llvm-project/pull/68176#issuecomment-2428243474
2024-10-22 16:01:32 -07:00
Kristof Beyls
383bd05818 [docs] Add link to newest CoC transparency report 2024-10-22 11:01:06 -07:00
Jonas Devlieghere
5886454669 [dsymutil] Provide an option to ignore object timestamp mismatches (#113238)
Provide a option (--no-object-timestamp) to ignore object file timestamp
mismatches. We already have a similar option for Swift modules
(--no-swiftmodule-timestamp).

rdar://123975869
2024-10-22 09:48:02 -07:00
lifengxiang1025
cd290a6480 [Doc] Update a broken link in CompileCudaWithLLVM (#113282) 2024-10-22 19:28:22 +08:00
Jay Foad
e7f1dae412 [AMDGPU] gfx1152 does not have Feature1_5xVGPRs (#113163) 2024-10-22 11:12:00 +01:00
Benjamin Maxwell
0412d71928 [llvm][doc] Fix return type of vector.histogram in LangRef examples (NFC) (#113172)
The `@llvm.experimental.vector.histogram.add` returns void.
2024-10-22 09:36:20 +01:00
Jack Styles
a4d6fe54a7 Reland "[llvm][ARM] Add Addend Checks for MOVT and MOVW instructions. (PR #111970)" (#112877)
**Change relanded after feedback on failures and improvements to the
check of the addend. Original PR #111970**
Changes from original patch:
- The value that is being checked has changed, it is now correctly
checking any Addend for the instruction, rather than the Value. The
addend is kept within the Target data structure from my investigation.
- Removed changes to the following tests due to the original behaviour
being correct, and my original patch causing unexpected errors
    - llvm/test/MC/ARM/Windows/mov32t-range.s
    - llvm/test/MC/MachO/ARM/thumb2-movw-fixup.s

As per the ARM ABI, the MOVT and MOVW instructions should have addends
that fall within a 16bit signed range. LLVM does not check this so it is
possible to use addends that are beyond the accepted range. These
addends are silently truncated.

A new check is added to ensure the addend falls within the expected
range, rejecting an addend that falls outside with an error.

Information relating to the ABI requirements can be found here:
https://github.com/ARM-software/abi-aa/blob/main/aaelf32/aaelf32.rst#addends-and-pc-bias-compensation
2024-10-22 08:18:09 +01:00
Justin Fargnoli
1295d2e6da [LLVM] Add IRNormalizer Pass (#68176)
Add the llvm-canon tool. Description from the [original
PR](https://reviews.llvm.org/D66029#change-wZv3yOpDdxIu):

> Added a new llvm-canon tool which aims to transform LLVM Modules into
a canonical form by reordering and renaming instructions while
preserving the same semantics. This tool makes it easier to spot
semantic differences while diffing two modules which have undergone
different transformation passes.

The current version of this tool can:

- Reorder instructions within a function.
- Rename instructions based on the operands.
- Sort commutative operands.

This code was originally written by @michalpaszkowski and [submitted to
mainline
LLVM](14d358537f).
However, it was quickly
[reverted](335de55fa3)
to do BuildBot errors.

Michal presented his version of the tool in [LLVM-Canon: Shooting for
Clear Diffs](https://www.youtube.com/watch?v=c9WMijSOEUg).

@AidanGoldfarb and I ported the code to the new pass manager, added more
tests, and fixed some bugs related to PHI nodes that may have been the
root cause of the BuildBot errors that caused the patch to be reverted.
Additionally, we rewrote the implementation of instruction reordering to
fix cases where the original algorithm would break use-def chains.

Note that this is @AidanGoldfarb and I's first time submitting to LLVM.
Please liberally critique the PR!

CC @plotfi for initial review.

---------

Co-authored-by: Aidan <aidan.goldfarb@mail.mcgill.ca>
2024-10-21 18:11:11 -07:00
Ronan Keryell
d582442bec [llvm-cxxfilt] Add --quote option to quote demangled function names (#111871)
This is useful when looking at LLVM/MLIR assembly produced from C++
sources. For example
 cir.call @_ZN3aie4tileILi1ELi4EE7programIZ4mainE3$_0EEvOT_(%2, %7) :
will be translated to
cir.call @"void aie::tile<1, 4>::program<main::$_0>(main::$_0&&)"(%2,
%7) : which can be parsed as valid MLIR by the right mlir-lsp-server.

If a symbol is already quoted, do not quote it more.

---------

Co-authored-by: James Henderson <jh7370@my.bristol.ac.uk>
2024-10-21 08:54:04 +01:00
Luke Drummond
b55c52c047 Revert "Renormalize line endings whitespace only after dccebddb3b80"
This reverts commit 9d98acb196.
2024-10-18 21:16:50 +01:00
Luke Drummond
e669bbbb72 Revert "Finally formalise our defacto line-ending policy"
This reverts commit dccebddb3b.
2024-10-18 21:16:24 +01:00
Aaron Ballman
bf1a554312 Document the requirement that commits have a public email address (#109318)
See
https://discourse.llvm.org/t/hidden-emails-on-github-should-we-do-something-about-it/74223
for details about why this is important to the community.

Note, we currently have soft enforcement for this requirement in the
form of a bot which posts comments letting patch authors know their
email is private, so we're already setting expectations in practice;
this PR is documenting those expectations for clarity.
2024-10-17 12:25:22 -04:00
Luke Drummond
9d98acb196 Renormalize line endings whitespace only after dccebddb3b
Line ending policies were changed in the parent, dccebddb3b. To make
it easier to resolve downstream merge conflicts after line-ending
policies are adjusted this is a separate whitespace-only commit. If you
have merge conflicts as a result, you can simply `git add --renormalize
-u && git merge --continue` or `git add --renormalize -u && git rebase
--continue` - depending on your workflow.
2024-10-17 14:49:26 +01:00
Luke Drummond
dccebddb3b Finally formalise our defacto line-ending policy
Historically, we've not automatically enforced how git tracks line
endings, but there are many, many commits that "undo" unintended CRLFs
getting into history.

`git log --pretty=oneline --grep=CRLF` shows nearly 100 commits
involving reverts of CRLF making its way into the index and then
history. As far as I can tell, there are none the other way round except
for specific cases like `.bat` files or tests for parsers that need to
accept such sequences.

Of note, one of the earliest of those listed in that output is:

```
  commit 9795860250
  Author: NAKAMURA Takumi <geek4civic@gmail.com>
  Date:   Thu Feb 3 11:41:27 2011 +0000

      cmake/*: Add svn:eol-style=native and fix CRLF.

      llvm-svn: 124793
```

...which introduced such a defacto policy for subversion.

With old versions of git, it's been a bit of a crap-shoot whether
enforcing storing line endings in the history will upset checkouts on
machines where such line endings are the norm. Indeed many users have
enforced that git checks out the working copy according to a global or
per-user config via core crlf, or core autocrlf.

For ~8 years now[1], however, git has supported the ability to "do as
the Romans do" on checkout, but internally store subsets of text files
with line-endings specified via a system of patterns in the
`.gitattributes` file. Since we now have this ability, and we've been
specifying attributes for various binary files, I think it makes sense
to rid us of all that work converting things "back", and just let git
handle the local checkout. Thus the new toplevel policy here is

    * text=auto

In simple terms this means "unless otherwise specified, convert all
files considered "text" files to LF in the project history, but check
them out as expected on the local machine. What is "expected on the
local machine" is dependent on configuration and default.

For those files in the repository that *do* need CRLF endings, I've
adopted a policy of `eol=crlf` which means that git will store them in
history with LF, but regardless of user config, they'll be checked out
in tree with CRLF.

Finally, existing files have been "corrected" in history via `git add
--renormalize .`

End users should *not* need to adjust their local git config or
workflow.

[1]: git 2.10 was released with fixed support for fine-grained
line-ending tracking that respects user-config *and* repo policy. This
can be considered the point at which git will respect both the user's
local working tree preference *and* the history as specified by the
maintainers. See
https://github.com/git/git/blob/master/Documentation/RelNotes/2.10.0.txt#L248
for the release note.
2024-10-17 14:47:54 +01:00
gxlayer
4a2bd78f5b [ARM] Fix -mno-omit-leaf-frame-pointer flag doesn't works on 32-bit ARM (#109628)
The -mno-omit-leaf-frame-pointer flag works on 32-bit ARM architectures
and addresses the bug reported in #108019
2024-10-17 20:25:06 +08:00
Vyacheslav Levytskyy
bfe84f7085 [SPIR-V] Implement support of the SPV_INTEL_split_barrier SPIRV extension (#112359)
This PR implements support of the SPV_EXT_arithmetic_fence SPIRV
extension
(https://github.com/KhronosGroup/SPIRV-Registry/blob/main/extensions/INTEL/SPV_INTEL_split_barrier.asciidoc)
and adds builtins from
https://registry.khronos.org/OpenCL/extensions/intel/cl_intel_split_work_group_barrier.html
2024-10-15 18:43:09 +02:00
elhewaty
9efb07f261 [IR] Add samesign flag to icmp instruction (#111419)
Inspired by
https://discourse.llvm.org/t/rfc-signedness-independent-icmps/81423
2024-10-15 17:11:25 +08:00
Rahul Joshi
84b99b4b1e [NFC][CodingStandard] Extend if-else brace example with else-if (#112193)
Extend example to document that single statement `else if` needs a brace
as well if the associated `if` needs a brace.
2024-10-14 07:20:39 -07:00
Jack Styles
6a98c4a160 Revert "[llvm][ARM] Add Addend Checks for MOVT and MOVW instructions.… (#112184)
… (#111970)"

I was made aware of breakages in Windows/ARM, so reverting while I
investigate.

This reverts commit f3aebe623b.
2024-10-14 12:31:50 +01:00
Jubilee
fdf2b0a252 [LangRef] Document that sret only works with void returns (#112167) 2024-10-14 11:50:52 +02:00
Jack Styles
f3aebe623b [llvm][ARM] Add Addend Checks for MOVT and MOVW instructions. (#111970)
Previously, any value could be used for the MOVT and MOVW instructions,
however the ARM ABI dictates that the addend should be a signed 16 bit
value. To ensure this is followed, the Assembler will now check that
when using these instructions, the addend is a 16bit signed value, and
throw an error if this is not the case.

Information relating to the ABI requirements can be found here:
https://github.com/ARM-software/abi-aa/blob/main/aaelf32/aaelf32.rst#addends-and-pc-bias-compensation
2024-10-14 10:38:58 +01:00
David Spickett
57cd6d8634 [llvm][docs] Document how to get admin permissions for a Buildbot worker (#108561)
I spent a long time trying different combinations of primary and
verified emails, until a colleague tried it who happened to have a
public profile email set when I did not.

Document how this works to save everyone else the legwork.
2024-10-14 09:09:20 +01:00
Tim Renouf
76007138f4 [LLVM] New NoDivergenceSource function attribute (#111832)
A call to a function that has this attribute is not a source of
divergence, as used by UniformityAnalysis. That allows a front-end to
use known-name calls as an instruction extension mechanism (e.g.
https://github.com/GPUOpen-Drivers/llvm-dialects ) without such a call
being a source of divergence.
2024-10-12 09:34:45 +01:00
Thomas Symalla
f4cf6242fb [Docs] Fix typo in recent coro docs (#112005) 2024-10-12 00:23:18 +02:00