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89 Commits

Author SHA1 Message Date
Chris Lattner
9e69654461 Infer mayload 
llvm-svn: 45819
 2008-01-10 04:44:48 +00:00
Chris Lattner
1ca2068227 realize that instructions who match intrinsics that read memory read memory. 
Also, instructions with any nodes that are SDNPMayLoad also read memory.

llvm-svn: 45817
 2008-01-10 04:38:57 +00:00
Chris Lattner
07fde9bde1 add a mayLoad property for machine instructions, a correlary to mayStore. 
This is currently not set by anything.

llvm-svn: 45748
 2008-01-08 18:05:21 +00:00
Chris Lattner
03ad885039 rename TargetInstrDescriptor -> TargetInstrDesc. 
Make MachineInstr::getDesc return a reference instead
of a pointer, since it can never be null.

llvm-svn: 45695
 2008-01-07 07:27:27 +00:00
Chris Lattner
e99a6caee4 Rename all the M_* flags to be namespace qualified enums, and switch 
all clients over to using predicates instead of these flags directly.
These are now private values which are only to be used to statically
initialize the tables.

llvm-svn: 45692
 2008-01-07 06:42:05 +00:00
Chris Lattner
f376c99ea0 rename hasVariableOperands() -> isVariadic(). Add some comments. 
Evan, please review the comments I added to getNumDefs to make sure
that they are accurate, thx.

llvm-svn: 45687
 2008-01-07 05:19:29 +00:00
Chris Lattner
fd548c96cc Move M_* flags down in the file. Move SchedClass up in the 
TargetInstrDescriptor class and shrink to 16-bits, saving a 
word in TargetInstrDescriptor.  Add some comments.

llvm-svn: 45686
 2008-01-07 05:06:49 +00:00
Chris Lattner
6f8713decb the name field of instructions is never set to a non-empty string, 
just unconditionally use the def name of the instruction.

llvm-svn: 45684
 2008-01-07 04:57:31 +00:00
Chris Lattner
e55e115616 Add predicates methods to TargetOperandInfo, and switch all clients 
over to using them, instead of diddling Flags directly.  Change the
various flags from const variables to enums.

llvm-svn: 45677
 2008-01-07 02:39:19 +00:00
Chris Lattner
a4ce4f6987 rename isLoad -> isSimpleLoad due to evan's desire to have such a predicate. 
llvm-svn: 45667
 2008-01-06 23:38:27 +00:00
Chris Lattner
10324d0175 rename isStore -> mayStore to more accurately reflect what it captures. 
llvm-svn: 45656
 2008-01-06 08:36:04 +00:00
Chris Lattner
a348f55ec6 Change the 'isStore' inferrer to look for 'SDNPMayStore' 
instead of "ISD::STORE".  This allows us to mark target-specific dag
nodes as storing (such as ppc byteswap stores).  This allows us to remove
more explicit isStore flags from the .td files.

Finally, add a warning for when a .td file contains an explicit 
isStore and tblgen is able to infer it.

llvm-svn: 45654
 2008-01-06 06:44:58 +00:00
Chris Lattner
89c6566577 set the 'isstore' flag for instructions whose pattern is an 
intrinsic that writes to memory.

llvm-svn: 45650
 2008-01-06 05:36:50 +00:00
Chris Lattner
e457fd1e9b remove some old hacky code that tried to infer whether a store 
occured in a pattern, but failed miserably.  The new code works for
any instruction that has a store in its pattern, including all the 
x86 mem op mem instructions.

The only target-independent code that uses this is branch folding,
so this won't change anything in practice.

llvm-svn: 45648
 2008-01-06 02:16:26 +00:00
Chris Lattner
27a4c1515a rearrange some code to allow inferring instr info from the pattern of the instr, but don't do so yet. 
llvm-svn: 45647
 2008-01-06 01:53:37 +00:00
Chris Lattner
85467a17ae final cleanups. 
llvm-svn: 45644
 2008-01-06 01:21:51 +00:00
Chris Lattner
626b89daa4 further simplifications and cleanup 
llvm-svn: 45643
 2008-01-06 01:20:13 +00:00
Chris Lattner
827efa451f simplify some code 
llvm-svn: 45642
 2008-01-06 01:12:44 +00:00
Chris Lattner
e59a3c79e5 split enum emission out from InstrInfoEmitter into it's own tblgen backend. 
llvm-svn: 45640
 2008-01-06 00:49:05 +00:00
Chris Lattner
dc3c9050f8 tblgen shouldn't include headers from llvm codegen. 
llvm-svn: 45429
 2007-12-30 00:25:23 +00:00
Chris Lattner
8adcd9f32e remove attributions from utils. 
llvm-svn: 45419
 2007-12-29 20:37:13 +00:00
Bill Wendling
cb77f04e1f Add flags to indicate that there are "never" side effects or that there "may be" 
side effects for machine instructions.

llvm-svn: 45022
 2007-12-14 01:48:59 +00:00
Evan Cheng
687567bca5 Oops. Forgot these. 
llvm-svn: 44969
 2007-12-13 00:42:35 +00:00
Owen Anderson
933b5b7e62 Add a flag for indirect branch instructions. 
Target maintainers: please check that the instructions for your target are correctly marked.

llvm-svn: 44012
 2007-11-12 07:39:39 +00:00
Evan Cheng
c9de9cec18 Added TargetInstrDescriptor::numDefs - num of results. 
llvm-svn: 40709
 2007-08-02 00:20:17 +00:00
Christopher Lamb
cde0ee5221 Add target independent MachineInstr's to represent subreg insert/extract in MBB's. PR1350 
llvm-svn: 40518
 2007-07-26 07:48:21 +00:00
Evan Cheng
6e3c705d74 Try committing again. Add OptionalDefOperand. Remove clobbersPred. 
llvm-svn: 38498
 2007-07-10 18:05:01 +00:00
Evan Cheng
9835db562f ImmutablePredicateOperand is no more. 
llvm-svn: 37963
 2007-07-06 23:23:38 +00:00
Evan Cheng
e32e7fb40d Instructions with ImmutablePredicateOperand aren't really predicable since their predicates are fixed at isel time. 
llvm-svn: 37899
 2007-07-05 07:19:29 +00:00
Dan Gohman
e8c1e428f2 Revert the earlier change that removed the M_REMATERIALIZABLE machine 
instruction flag, and use the flag along with a virtual member function
hook for targets to override if there are instructions that are only
trivially rematerializable with specific operands (i.e. constant pool
loads).

llvm-svn: 37728
 2007-06-26 00:48:07 +00:00
Dan Gohman
9e82064924 Replace M_REMATERIALIZIBLE and the newly-added isOtherReMaterializableLoad 
with a general target hook to identify rematerializable instructions. Some
instructions are only rematerializable with specific operands, such as loads
from constant pools, while others are always rematerializable. This hook
allows both to be identified as being rematerializable with the same
mechanism.

llvm-svn: 37644
 2007-06-19 01:48:05 +00:00
Evan Cheng
a7ca624028 Replace TargetInstrInfo::CanBeDuplicated() with a M_NOT_DUPLICABLE bit. 
llvm-svn: 37643
 2007-06-19 01:26:51 +00:00
Evan Cheng
452a818c6a Add clobbersPred - instruction that clobbers condition code / register which are used to predicate instructions. 
llvm-svn: 37465
 2007-06-06 10:14:55 +00:00
Evan Cheng
b99726d7a0 Rename M_PREDICATED to M_PREDICABLE; opcode can be specified isPredicable without having a PredicateOperand. 
llvm-svn: 37116
 2007-05-16 20:45:24 +00:00
Evan Cheng
c0fb94596a Mark all (not just the first) predicate operand M_PREDICATE_OPERAND. 
llvm-svn: 37061
 2007-05-15 01:20:36 +00:00
Evan Cheng
9d7d130835 Recognize target instruction flag 'isReMaterializable'. 
llvm-svn: 35159
 2007-03-19 06:20:37 +00:00
Jim Laskey
214c582002 Files missing from LABEL check in. 
llvm-svn: 33539
 2007-01-26 17:29:20 +00:00
Bill Wendling
9bfb1e1f29 What should be the last unnecessary <iostream>s in the library. 
llvm-svn: 32333
 2006-12-07 22:21:48 +00:00
Evan Cheng
71adba6dce Add opcode to TargetInstrDescriptor. 
llvm-svn: 31804
 2006-11-17 01:46:27 +00:00
Chris Lattner
c94f214d22 ADd support for adding constraints to suboperands 
llvm-svn: 31748
 2006-11-15 02:38:17 +00:00
Chris Lattner
ba7b3673f9 allow ptr_rc to explicitly appear in an instructions operand list, it doesn't 
have to be a subpart of a complex operand.

llvm-svn: 31618
 2006-11-10 02:01:40 +00:00
Evan Cheng
1698c2999c Remove M_2_ADDR_FLAG. 
llvm-svn: 31583
 2006-11-09 02:22:54 +00:00
Chris Lattner
f62138e792 Mark predicate operands as such in operand info. 
llvm-svn: 31483
 2006-11-06 23:53:31 +00:00
Chris Lattner
33f5a51020 simplify the way operand flags and constraints are handled, making it easier 
to extend.

llvm-svn: 31481
 2006-11-06 23:49:51 +00:00
Chris Lattner
8a9c91de33 recognize ppc's blr instruction as predicated 
llvm-svn: 31480
 2006-11-06 21:44:54 +00:00
Evan Cheng
3cb5bf721c Clean up some code. 
llvm-svn: 31451
 2006-11-04 09:40:23 +00:00
Evan Cheng
ac79c7c4c0 Add operand constraints to TargetInstrInfo. 
llvm-svn: 31333
 2006-11-01 00:27:05 +00:00
Jim Laskey
4b49c23571 Eliminate data relocations by using NULL instead of global empty list. 
llvm-svn: 29250
 2006-07-21 21:15:20 +00:00
Jim Laskey
4e153f1b91 Use an enumeration to eliminate data relocations. 
llvm-svn: 29249
 2006-07-21 20:57:35 +00:00
Evan Cheng
55772ccfd6 Instructions with variable operands (variable_ops) can have a number required 
operands. e.g.
def CALL32r : I<0xFF, MRM2r, (ops GR32:$dst, variable_ops),
                "call {*}$dst", [(X86call GR32:$dst)]>;
TableGen should emit operand informations for the "required" operands.

Added a target instruction info flag M_VARIABLE_OPS to indicate the target
instruction may have more operands in addition to the minimum required
operands.

llvm-svn: 28791
 2006-06-15 07:22:16 +00:00