Commit Graph

2007 Commits

Author SHA1 Message Date
Aaron Ballman
af7c58b7ea Remove support for RenderScript (#112916)
See
https://discourse.llvm.org/t/rfc-deprecate-and-eventually-remove-renderscript-support/81284
for the RFC
2024-10-28 12:48:42 -04:00
dong-miao
75c75fc16e [RISCV]Add svvptc extension (#113882) 2024-10-28 22:54:51 +11:00
Alex Bradbury
35f6cc6af0 [RISCV] Add the Sha extension (#113820)
This was introduced in the now-ratified RVA23 profile (and also added to
the RVA22 text) as a simple way of referring to H plus the set of
supervisor extensions required by RVA23.
https://github.com/riscv/riscv-profiles/blob/main/src/rva23-profile.adoc

This patch simply defines the extension. The next patch will adjust the
RVA23 profile to use it, and at that point I think we will be ready to
mark RVA23 as non-experimental.

Note that I haven't made it so if you enable all extensions that
constitute Sha, Sha is implied. Per #76893 (adding 'B'), the concern is
making this implication might break older external assemblers. Perhaps
this is less of a concern given the relative frequency of
`-march=${foo}_zba_zbb_zbs` vs the collection of H extensions. If we did
want to add that implication, we'd probably want to add it in a separate
patch so it can be easily reverted if found to cause problems.
2024-10-28 07:42:33 +00:00
Dan Gohman
1bc2cd98c5 [WebAssembly] Enable nontrapping-fptoint and bulk-memory by default. (#112049)
We were prepared to enable these features [back in February], but they
got pulled for what appear to be unrelated reasons. So let's have
another try at enabling them!

Another motivation here is that it'd be convenient for the [Lime1
proposal] if "lime1" is close to a subset of "generic" (missing only
for extended-const).

[back in February]:
https://github.com/WebAssembly/tool-conventions/issues/158#issuecomment-1931119512
[Lime1 proposal]: https://github.com/llvm/llvm-project/pull/112035
2024-10-25 13:52:51 -07:00
Alex Bradbury
2c0b34852a [RISCV] Mark pointer masking extensions as non-experimental (#113618)
These extensions were ratified very recently.

<https://lf-riscv.atlassian.net/wiki/spaces/HOME/pages/16154732/Ratified+Extensions>

I've ensured we have definitions for all extensions in the document
<https://drive.google.com/file/d/159QffOTbi3EEbdkKndYRZ2c46D25ZLmO/view?usp=drive_link>.
There are no additional CSRs.
2024-10-25 12:24:50 +01:00
dong-miao
ed6ddffb58 [RISCV] Add Smrnmi extension (#111668)
This commit has completed the Extension for Resumable Non Maskable
Interrupts, adding four CRSs and one Trap-Return instruction.
Specification link:["Smrnmi"
Extension](https://github.com/riscv/riscv-isa-manual/blob/main/src/rnmi.adoc)

---------

Co-authored-by: Sam Elliott <sam@lenary.co.uk>
2024-10-25 18:41:21 +11:00
Freddy Ye
c4248fa3ed [X86] Support MOVRS and AVX10.2 instructions. (#113274)
Ref.: https://cdrdv2.intel.com/v1/dl/getContent/671368
2024-10-25 09:00:19 +08:00
Alex Crichton
c2293b33dd [WebAssembly] Implement the wide-arithmetic proposal (#111598)
This commit implements the [wide-arithmetic] proposal which has recently
reached phase 2 in the WebAssembly proposals process. The goal here is
to implement support in LLVM for emitting these instructions which are
gated behind a new feature flag by default. A new `wide-arithmetic`
feature flag is introduced which gates these four new instructions from
being emitted.

Emission of each instruction itself is relatively simple given LLVM's
preexisting lowering rules and infrastructure. The main gotcha is that
due to the multi-result nature of all of these instructions it needed
the lowerings to be implemented in C++ rather than in TableGen.

[wide-arithmetic]: https://github.com/WebAssembly/wide-arithmetic
2024-10-23 11:39:58 -07:00
tangaac
5b9c76b6e7 [LoongArch] Support LoongArch-specific amswap[_db].{b/h} and amadd[_db].{b/h} instructions (#113255)
Two options for clang: -mlam-bh & -mno-lam-bh.
Enable or disable amswap[__db].{b/h} and amadd[__db].{b/h} instructions.
The default is -mno-lam-bh.
Only works on LoongArch64.
2024-10-23 16:03:15 +08:00
Abhina Sree
46dc91e7d9 [SystemZ][z/OS] Add new openFileForReadBinary function, and pass IsText parameter to getBufferForFile (#111723)
This patch adds an IsText parameter to the following getBufferForFile,
getBufferForFileImpl. We introduce a new virtual function
openFileForReadBinary which defaults to openFileForRead except in
RealFileSystem which uses the OF_None flag instead of OF_Text.

The default is set to OF_Text instead of OF_None, this change in value
does not affect any other platforms other than z/OS. Setting this
parameter correctly is required to open files on z/OS in the correct
encoding. The IsText parameter is based on the context of where we open
files, for example, in the ASTReader, HeaderMap requires that files
always be opened in binary even though they might be tagged as text.
2024-10-21 08:20:22 -04:00
Hans
4ddea298e6 [clang-cl]: Add /std:c++23preview and update _MSVC_LANG for C++23 (#112378)
As discussed in
https://discourse.llvm.org/t/clang-cl-adding-std-c-23preview/82553
2024-10-16 10:06:43 +02:00
c8ef
ab6ec7ab14 [clang] Mark __builtin_convertvector and __builtin_shufflevector as constexpr. (#112129)
Closes #107985.

LanguageExtensions.rst states that `__builtin_shufflevector` and
`__builtin_convertvector` can be evaluated as constants, but this is not
reflected in Butiltins.td. This patch aligns these two.
2024-10-15 00:09:36 +08:00
Michał Górny
387b37af1a [LLVM] [Clang] Support for Gentoo *t64 triples (64-bit time_t ABIs) (#111302)
Gentoo is planning to introduce a `*t64` suffix for triples that will be
used by 32-bit platforms that use 64-bit `time_t`. Add support for
parsing and accepting these triples, and while at it make clang
automatically enable the necessary glibc feature macros when this suffix
is used.

An open question is whether we can backport this to LLVM 19.x. After
all, adding new triplets to Triple sounds like an ABI change — though I
suppose we can minimize the risk of breaking something if we move new
enum values to the very end.
2024-10-14 11:18:04 +00:00
YunQiang Su
5bf81e53db Clang: Support minimumnum and maximumnum intrinsics (#96281)
We just introduce llvm.minimumnum and llvm.maximumnum intrinsics support
to llvm. Let's support them in Clang.

See: #93033
2024-10-14 15:49:01 +08:00
cor3ntin
75611caff4 [Clang] Improve type traits recognition in __has_builtin (#111516)
`__has_builtin` was relying on reversible identifiers and string
matching to recognize builtin-type traits, leading to some newer type
traits not being recognized.

Fixes #111477
2024-10-08 23:03:32 +02:00
Jonathan Thackray
d0756caedc [ARM][AArch64] Introduce the Armv9.6-A architecture version (#110825)
This introduces the Armv9.6-A architecture version, including the
relevant command-line option for -march.

More details about the Armv9.6-A architecture version can be found at:
  * https://community.arm.com/arm-community-blogs/b/architectures-and-processors-blog/posts/arm-a-profile-architecture-developments-2024
  * https://developer.arm.com/documentation/ddi0602/2024-09/
2024-10-04 10:12:41 +01:00
Alex Bradbury
614aeda93b [RISCV] Mark Zacas as non-experimental (#109651)
The extension has been ratified for some time, but we kept it
experimental (see #99898) due to
<https://github.com/riscv-non-isa/riscv-elf-psabi-doc/issues/444>. The
ABI issue has been resolved by #101023 so I believe there's no known
barrier to moving Zacas to non-experimental.
2024-09-25 06:14:43 +01:00
eddyz87
eabc8857e7 [BPF] make __BPF_FEATURE_MAY_GOTO available for cpuv1 (#108071)
For some reason `__BPF_FEATURE_MAY_GOTO` is available for CPUs v{2,3,4}
but is not available for CPU v1. This limitation is arbitrary:
- the instruction is never produced by LLVM backend;
- on Linux Kernel side this instruction is available in kernels that
also support CPUv4.

Hence, it is more consistent to either always allow
`__BPF_FEATURE_MAY_GOTO` or only allow it for CPUv4.
2024-09-24 11:46:33 +03:00
Rainer Orth
39e30508a7 [Driver][Sparc] Default to -mcpu=v9 for 32-bit Linux/sparc64 (#109278)
While working on supporting PR #109101 on Linux/sparc64, I was reminded
that `clang -m32` still defaults to generating V8 code, although the
64-bit kernel requires a V9 CPU.

This patch corrects that.

Tested on `sparc64-unknown-linux-gnu`, `x86_64-pc-linux-gnu`,
`sparcv9-sun-solaris2.11`, and `amd64-pc-solaris2.11`.
2024-09-21 19:53:35 +02:00
Chris B
4d621025d4 [HLSL] Warn about incomplete language support (#108894)
This adds a warning about incomplete language mode support before HLSL
202x. This is the last change in the sequence to fix and make HLSL 202x
the default mode for Clang (#108044).


Fixes #108044
2024-09-20 16:41:15 -05:00
Alexandros Lamprineas
b1d7694c12 [AArch64] Add missing ACLE predefined macros and update __ARM_ACLE. (#108857)
Adds __ARM_ACLE_VERSION and __FUNCTION_MULTI_VERSIONING_SUPPORT_LEVEL
as defined here https://github.com/ARM-software/acle/pull/301 and
here https://github.com/ARM-software/acle/pull/302.

Also bumps __ARM_ACLE to 202420.
2024-09-17 11:07:07 +01:00
Chris B
488640389f [HLSL] Align language modes on 202x as default (#108662)
As captured in issue #108044, HLSL 202x is the target language mode for
conformance for Clang. Earlier language modes will be a best effort and
prioritized after 2020x. To make this easier and reduce our testing
complexity we want to make 202x the default language mode now, and align
all earlier modes to match 202x (except where we explicitly deviate).

This change has the following concrete changes:
* All older language modes gain `CPlusPlus11` as a base
* The default language mode for HLSL sources is changed to 202x
* A few test cases are updated to resolve differences in generated
diagnostics.

Second to last change for  #108044
2024-09-16 17:17:15 -05:00
Chris B
2222e27d9e [HLSL] Add HLSL 202y language mode (#108437)
This change adds a new HLSL 202y language mode. Currently HLSL 202y is
planned to add `auto` and `constexpr`.

This change updates extension diagnostics to state that lambadas are a
"clang HLSL" extension (since we have no planned release yet to include
them), and that `auto` is a HLSL 202y extension when used in earlier
language modes.

Note: This PR does temporarily work around some differences between HLSL
2021 and 202x in Clang by changing test cases to explicitly specify
202x. A subsequent PR will update 2021's language flags to match 202x.
2024-09-13 16:11:19 -05:00
Ganesh
02e4186d0b [X86] AMD Zen 5 Initial enablement (#107964)
This patch enables the basic skeleton enablement of AMD next gen zen5 CPUs.
2024-09-13 17:45:33 +01:00
Jim Lin
dee058f9e3 [RISCV] Emit predefined macro __riscv_cmodel_large for large code model (#108131)
Co-authored-by: patrick <patrick@andestech.com>
2024-09-13 10:37:48 +08:00
Sean Perry
e62bf7cd0b [z/OS] Set the default arch for z/OS to be arch10 (#89854)
The default arch level on z/OS is arch10. Update the code so z/OS has
arch10 without changing the default for zLinux.
2024-09-09 15:24:16 -04:00
Alex Rønne Petersen
b55186eefd [clang][Driver] Define soft float macros for PPC. (#106012)
Fixes #105972.

Co-authored-by: Qiu Chaofan <qcf@ecnelises.com>
2024-09-04 10:07:35 +08:00
yonghong-song
7852ebc088 [BPF] Make -mcpu=v3 as the default (#107008)
Before llvm20, (void)__sync_fetch_and_add(...) always generates locked
xadd insns. In linux kernel upstream discussion [1], it is found that
for arm64 architecture, the original semantics of
(void)__sync_fetch_and_add(...), i.e., __atomic_fetch_add(...), is
preferred in order for jit to emit proper native barrier insns.

In llvm commits [2] and [3], (void)__sync_fetch_and_add(...) will
generate the following insns:
  - for cpu v1/v2: locked xadd insns to keep backward compatibility
  - for cpu v3/v4: __atomic_fetch_add() insns

To ensure proper barrier semantics for (void)__sync_fetch_and_add(...),
cpu v3/v4 is recommended.

This patch enables cpu=v3 as the default cpu version. For users wanting
to use cpu v1, -mcpu=v1 needs to be explicitly added to clang/llc
command line.

  [1]
https://lore.kernel.org/bpf/ZqqiQQWRnz7H93Hc@google.com/T/#mb68d67bc8f39e35a0c3db52468b9de59b79f021f
  [2] https://github.com/llvm/llvm-project/pull/101428
  [3] https://github.com/llvm/llvm-project/pull/106494
2024-09-03 07:15:18 -07:00
SpencerAbson
2617023923 [clang][AArch64] Add SME2.1 feature macros (#105657) 2024-08-23 14:27:49 +01:00
Brendan Dahl
7d373cef49 [WebAssembly] Change half-precision feature name to fp16. (#105434)
This better aligns with how the feature is being referred to and what
runtimes (V8) are calling it.
2024-08-22 09:44:33 -07:00
Craig Topper
0ca77f6656 [RISCV] Add CSRs and an instruction for Smctr and Ssctr extensions. (#105148)
https://github.com/riscv/riscv-control-transfer-records/releases/tag/v1.0_rc3
2024-08-21 19:23:07 -07:00
Shao-Ce SUN
bacedb5684 [RISCV] Remove experimental for Ssqosid ext (#105476)
Ratified: https://github.com/riscv/riscv-ssqosid/releases/tag/v1.0
2024-08-21 16:42:16 +08:00
Pengcheng Wang
a80a90e34b [RISCV][MC] Support experimental extensions Zvbc32e and Zvkgs (#103709)
These two extensions add addtional instructions for carryless
multiplication with 32-bits elements and Vector-Scalar GCM
instructions.

Please see https://github.com/riscv/riscv-isa-manual/pull/1306.
2024-08-19 11:50:32 +08:00
Qiongsi Wu
123b6fcc70 [AIX] Revert #pragma mc_func check (#102919)
https://github.com/llvm/llvm-project/pull/99888 added a specific
diagnostic for `#pragma mc_func` on AIX. There are some disagreements
on:

1. If the check should be on by default. Leaving the check off by
default is dangerous, since it is difficult to be aware of such a check.
Turning it on by default at the moment causes build failures on AIX. See
https://github.com/llvm/llvm-project/pull/101336 for more details.
2. If the check can be made more general. See
https://github.com/llvm/llvm-project/pull/101336#issuecomment-2269283906.

This PR reverts this check from `main` so we can flush out these
disagreements.
2024-08-12 16:00:25 -04:00
Hari Limaye
94473f4db6 [IRBuilder] Generate nuw GEPs for struct member accesses (#99538)
Generate nuw GEPs for struct member accesses, as inbounds + non-negative
implies nuw.

Regression tests are updated using update scripts where possible, and by
find + replace where not.
2024-08-09 13:25:04 +01:00
Aaron Ballman
617cf8a72d Reapply "Finish deleting the le32/le64 targets" (#99079) (#101983)
This reverts commit d3f8105c65.

Halide no longer relies on this target:
https://github.com/llvm/llvm-project/pull/98497#issuecomment-2253358685
2024-08-06 08:35:56 -04:00
Daniil Kovalev
6e45fa95be [PAC][AArch64] Support init/fini array signing (#96478)
If both `-fptrauth-init-fini` and `-fptrauth-calls` are passed, sign
function pointers in `llvm.global_ctors` and `llvm.global_dtors` with
constant discriminator 0xD9D4
(`ptrauth_string_discriminator("init_fini")`). Additionally, if
`-fptrauth-init-fini-address-discrimination` is passed, address
discrimination is used for signing (otherwise, just constant
discriminator is used).

For address discrimination, we use it's special form since uses of
`llvm.global_{c|d}tors` are disallowed (see
`Verifier::visitGlobalVariable`) and we can't emit `getelementptr`
expressions referencing these special arrays. A signed ctor/dtor pointer
with special address discrimination applied looks like the following:

```
ptr ptrauth (ptr @foo, i32 0, i64 55764, ptr inttoptr (i64 1 to ptr))
```
2024-08-06 08:02:13 +03:00
Phoebe Wang
259ca9ee9c Reland "[X86][AVX10.2] Support AVX10.2 option and VMPSADBW/VADDP[D,H,S] new instructions (#101452)" (#101616)
Ref.: https://cdrdv2.intel.com/v1/dl/getContent/828965
2024-08-03 09:26:07 +08:00
Qiongsi Wu
dd7a4c3e5e Revert "[AIX] Turn on #pragma mc_func check by default (#101336)"
This reverts commit b9335176db.
2024-08-02 15:01:15 -04:00
Phoebe Wang
2e0588d5e1 Revert "[X86][AVX10.2] Support AVX10.2 option and VMPSADBW/VADDP[D,H,S] new instructions" (#101612)
Reverts llvm/llvm-project#101452

There are several buildbot failed. Revert first.
2024-08-02 13:04:10 +08:00
Phoebe Wang
10bad2c8d7 [X86][AVX10.2] Support AVX10.2 option and VMPSADBW/VADDP[D,H,S] new instructions (#101452)
Ref.: https://cdrdv2.intel.com/v1/dl/getContent/828965
2024-08-02 12:10:50 +08:00
Qiongsi Wu
b9335176db [AIX] Turn on #pragma mc_func check by default (#101336)
https://github.com/llvm/llvm-project/pull/99888 added a check (and
corresponding options) to flag uses of `#pragma mc_func` on AIX.

This PR turns on the check by default.
2024-08-01 09:51:07 -04:00
yronglin
6434dce85d [Clang][Interp] Fix the location of uninitialized base warning (#100761)
Fix the location of `diag::note_constexpr_uninitialized_base`, make it
same as current interpreter.
This PR does not print type name with namespacethat was used to improve
the current interpreter's type dump of base class type.

---------

Signed-off-by: yronglin <yronglin777@gmail.com>
2024-07-31 17:22:44 +08:00
Shengchen Kan
57acabb8e0 [Driver,X86] Update test Clang::Preprocessor/x86_target_features.c after #101151 2024-07-31 11:03:23 +08:00
Zahira Ammarguellat
c9c91f59c3 Remove FiniteMathOnly and use only NoHonorINFs and NoHonorNANs. (#97342)
Currently `__FINITE_MATH_ONLY__` is set when `FiniteMathOnly`. And
`FiniteMathOnly` is set when `NoHonorInfs` && `NoHonorNans` is true. But
what happens one of the latter flags is false?
To avoid potential inconsistencies, the internal option `FiniteMathOnly`
is removed option and the macro `__FINITE_MATH_ONLY__` is set when
`NoHonorInfs` && `NoHonorNans`.
2024-07-26 08:16:38 -04:00
Daniil Kovalev
70c6e79e6d [PAC][clang][test] Implement missing tests for some PAuth features (#100206)
Implement tests for the following PAuth-related features:

- driver, preprocessor and ELF codegen tests for type_info vtable
pointer discrimination #99726;

- driver, preprocessor, and ELF codegen (emitting function attributes) +
sema (emitting errors) tests for indirect gotos signing #97647;

- ELF codegen tests for ubsan type checks + auth #99590;

- ELF codegen tests for constant global init with polymorphic MI #99741;

- ELF codegen tests for C++ member function pointers auth #99576.
2024-07-25 00:24:50 +03:00
Philip Reames
d1e28e2a7b [RISCV] Support __builtin_cpu_init and __builtin_cpu_supports (#99700)
This implements the __builtin_cpu_init and __builtin_cpu_supports
builtin routines based on the compiler runtime changes in
https://github.com/llvm/llvm-project/pull/85790.

This is inspired by https://github.com/llvm/llvm-project/pull/85786.
Major changes are a) a restriction in scope to only the builtins (which
have a much narrower user interface), and the avoidance of false
generality. This change deliberately only handles group 0 extensions
(which happen to be all defined ones today), and avoids the tblgen
changes from that review.

I don't have an environment in which I can actually test this, but @BeMg
has been kind enough to report that this appears to work as expected.

Before this can make it into a release, we need a change such as
https://github.com/llvm/llvm-project/pull/99958. The gcc docs claim that
cpu_support can be called by "normal" code without calling the cpu_init
routine because the init routine will have been called by a high
priority constructor. Our current compiler-rt mechanism does not do
this.
2024-07-23 08:48:28 -07:00
azhan92
1df4d866cc [PowerPC] Add support for -mcpu=pwr11 / -mtune=pwr11 (#99511)
This PR adds support for -mcpu=pwr11/power11 and -mtune=pwr11/power11 in
clang and llvm.
2024-07-23 09:49:41 -04:00
Ami-zhang
d59925c398 [LoongArch] Fix test issue of init-loongarch.c 2024-07-23 15:24:11 +08:00
Ami-zhang
fcec298087 [LoongArch] Support la664 (#100068)
A new ProcessorModel called `la664` is defined in LoongArch.td to
support `-march/-mtune=la664`.
2024-07-23 15:14:20 +08:00