Commit Graph

14503 Commits

Author SHA1 Message Date
Jakob Stoklund Olesen
b089483993 Use getNumOperands() instead of Operands.size().
The representation of the Operands array is going to change soon so it
can be allocated from a BumpPtrAllocator.

llvm-svn: 170988
2012-12-22 17:13:06 +00:00
Roman Divacky
a229186a82 Remove duplicate includes.
llvm-svn: 170902
2012-12-21 17:06:44 +00:00
Evan Cheng
59421aee3d Add targets to skip running the GC passes.
llvm-svn: 170836
2012-12-21 02:57:04 +00:00
Jakob Stoklund Olesen
2455b58551 Require the two-argument MI::addOperand(MF, MO) for dangling instructions.
Instructions that are inserted in a basic block can still be decorated
with addOperand(MO).

Make the two-argument addOperand() function contain the actual
implementation. This function will now always have a valid MF reference
that it can use for memory allocation.

llvm-svn: 170798
2012-12-20 22:54:05 +00:00
Jakob Stoklund Olesen
33f5d1492d Add an MF argument to MI::copyImplicitOps().
This function is often used to decorate dangling instructions, so a
context reference is required to allocate memory for the operands.

Also add a corresponding MachineInstrBuilder method.

llvm-svn: 170797
2012-12-20 22:54:02 +00:00
Jakob Stoklund Olesen
ac4210eacb Use two-arg addOperand(MF, MO) internally in MachineInstr when possible.
llvm-svn: 170796
2012-12-20 22:53:58 +00:00
Eric Christopher
48fef599a4 Whitespace and 80-column cleanup.
llvm-svn: 170771
2012-12-20 21:58:40 +00:00
Eric Christopher
e698f53740 Start splitting out the debug string section handling by moving it
into the DwarfUnits class.

llvm-svn: 170770
2012-12-20 21:58:36 +00:00
Jakob Stoklund Olesen
00b28ecfae Remove two dead functions.
llvm-svn: 170766
2012-12-20 21:12:42 +00:00
Jakob Stoklund Olesen
2705333253 Use MachineInstrBuilder for PHI nodes in SelectionDAGISel.
llvm-svn: 170716
2012-12-20 18:46:29 +00:00
Jakob Stoklund Olesen
b109a7b430 Use MachineInstrBuilder in InstrEmitter.
This is supposed to be a mechanical change with no functional effects.

InstrEmitter can generate all types of MachineOperands which revealed
that MachineInstrBuilder was missing a few methods, added by this patch.

Besides providing a context pointer to MI::addOperand(),
MachineInstrBuilder seems like a better fit for this code.

llvm-svn: 170712
2012-12-20 18:08:09 +00:00
Jakob Stoklund Olesen
f623e9870d Use MachineInstrBuilder in a few CodeGen passes.
This automatically passes a context pointer to MI->addOperand().

llvm-svn: 170711
2012-12-20 18:08:06 +00:00
Bob Wilson
3365b80290 Do not introduce vector operations in functions marked with noimplicitfloat.
<rdar://problem/12879313>

llvm-svn: 170630
2012-12-20 01:36:20 +00:00
Dmitri Gribenko
349d1a35ff Add a missing 'else'. Found by grep '} if'
No testcase because it is apparently not so trivial to construct.

llvm-svn: 170595
2012-12-19 22:13:01 +00:00
Eric Christopher
3c5a1914b6 Split out abbreviations for the skeleton info from the rest of
the abbreviations. Part of implementing split dwarf.

llvm-svn: 170589
2012-12-19 22:02:53 +00:00
Jakob Stoklund Olesen
b159b5ff0d Remove the explicit MachineInstrBuilder(MI) constructor.
Use the version that also takes an MF reference instead.

It would technically be possible to extract an MF reference from the MI
as MI->getParent()->getParent(), but that would not work for MIs that
are not inserted into any basic block.

Given the reasonably small number of places this constructor was used at
all, I preferred the compile time check to a run time assertion.

llvm-svn: 170588
2012-12-19 21:31:56 +00:00
Patrik Hagglund
f9934613e8 Change AsmOperandInfo::ConstraintVT to MVT, instead of EVT.
Accordingly, add MVT::getVT.

llvm-svn: 170550
2012-12-19 15:19:11 +00:00
Patrik Hagglund
00e7a11904 Split the usage of 'EVT PartVT' into 'MVT PartVT' and 'EVT PartEVT'.
llvm-svn: 170540
2012-12-19 12:33:30 +00:00
Patrik Hagglund
4e0f828686 Change RegVT in BitTestBlock and RegsForValue, to contain MVTs,
instead of EVTs.

llvm-svn: 170538
2012-12-19 12:23:01 +00:00
Patrik Hagglund
e09cac9a67 Change TargetLowering::getTypeForExtArgOrReturn to take and return
MVTs, instead of EVTs.

llvm-svn: 170537
2012-12-19 12:02:25 +00:00
Patrik Hagglund
3f1905199b Change a parameter of TargetLowering::getVectorTypeBreakdown to MVT,
from EVT.

llvm-svn: 170536
2012-12-19 11:53:21 +00:00
Patrik Hagglund
bad545ccba Change TargetLowering::RegisterTypeForVT to contain MVTs, instead of
EVTs.

llvm-svn: 170535
2012-12-19 11:48:16 +00:00
Patrik Hagglund
93060569ba Change TargetLowering::TransformToType to contain MVTs, instead of
EVTs.

llvm-svn: 170534
2012-12-19 11:42:00 +00:00
Patrik Hagglund
f9eb168ef4 Change TargetLowering::findRepresentativeClass to take an MVT, instead
of EVT.

llvm-svn: 170532
2012-12-19 11:30:36 +00:00
Patrik Hagglund
fd41b5b969 Change TargetLowering::getTypeToPromoteTo to take and return MVTs,
instead of EVTs.

llvm-svn: 170529
2012-12-19 11:21:04 +00:00
Patrik Hagglund
ffd057a3e1 Change TargetLowering::isCondCodeLegal to take an MVT, instead of EVT.
llvm-svn: 170524
2012-12-19 10:19:55 +00:00
Patrik Hagglund
deee9003ed Change TargetLowering::getCondCodeAction to take an MVT, instead of
EVT.

llvm-svn: 170522
2012-12-19 10:09:26 +00:00
Patrik Hagglund
d7cdcf8cb5 Change TargetLowering::getTruncStoreAction to take MVTs, instead of EVTs.
llvm-svn: 170510
2012-12-19 08:28:51 +00:00
Elena Demikhovsky
14a4af0e66 Optimized load + SIGN_EXTEND patterns in the X86 backend.
llvm-svn: 170506
2012-12-19 07:50:20 +00:00
Nadav Rotem
33360d8ae9 After reducing the size of an operation in the DAG we zero-extend the reduced
bitwidth op back to the original size. If we reduce ANDs then this can cause
an endless loop. This patch changes the ZEXT to ANY_EXTEND if the demanded bits
are equal or smaller than the size of the reduced operation.

llvm-svn: 170505
2012-12-19 07:39:08 +00:00
Bill Wendling
3d7b0b8ac7 Rename the 'Attributes' class to 'Attribute'. It's going to represent a single attribute in the future.
llvm-svn: 170502
2012-12-19 07:18:57 +00:00
Craig Topper
3f194c8f4f Remove more of 'else's after 'returns'. No functional change.
llvm-svn: 170497
2012-12-19 06:43:58 +00:00
Craig Topper
5dd8291cbe Remove a bunch of 'else's after 'returns'
llvm-svn: 170496
2012-12-19 06:39:17 +00:00
Craig Topper
63f5921776 Teach SimplifySetCC that comparing AssertZext i1 against a constant 1 can be rewritten as a compare against a constant 0 with the opposite condition.
llvm-svn: 170495
2012-12-19 06:12:28 +00:00
Jakob Stoklund Olesen
d742533dbc Use bidirectional bundle flags to simplify important functions.
The bundle_iterator::operator++ function now doesn't need to dig out the
basic block and check against end(). It can use the isBundledWithSucc()
flag to find the last bundled instruction safely.

Similarly, MachineInstr::isBundled() no longer needs to look at
iterators etc. It only has to look at flags.

llvm-svn: 170473
2012-12-18 23:21:49 +00:00
Jakob Stoklund Olesen
00f6c7754b Verify bundle flag consistency when setting them.
Now that the bundle flag aware APIs are all in place, it is possible to
continuously verify the flag consistency.

llvm-svn: 170465
2012-12-18 23:00:28 +00:00
Jakob Stoklund Olesen
29c277197e Verify bundle flags for consistency in MachineVerifier.
The new bidirectional bundle flags are redundant, so inadvertent bundle
tearing can be detected in the machine code verifier.

llvm-svn: 170463
2012-12-18 22:55:07 +00:00
Jakob Stoklund Olesen
a33f504b3e Don't allow the automatically updated MI flags to be set directly.
The bundle-related MI flags need to be kept in sync with the neighboring
instructions. Don't allow the bulk flag-setting setFlags() function to
change them.

Also don't copy MI flags when cloning an instruction. The clone's bundle
flags will be set when it is explicitly inserted into a bundle.

llvm-svn: 170459
2012-12-18 21:36:05 +00:00
Jakob Stoklund Olesen
78eaf05fa7 Tighten up the splice() API for bundled instructions.
Remove the instr_iterator versions of the splice() functions. It doesn't
seem useful to be able to splice sequences of instructions that don't
consist of full bundles.

The normal splice functions that take MBB::iterator arguments are not
changed, and they can move whole bundles around without any problems.

llvm-svn: 170456
2012-12-18 20:59:41 +00:00
Andrew Trick
ec2564818c MISched: add dependence to ExitSU to model live-out latency.
llvm-svn: 170454
2012-12-18 20:53:01 +00:00
Andrew Trick
ef23569858 MISched: Cleanup, redundant statement.
llvm-svn: 170453
2012-12-18 20:52:58 +00:00
Andrew Trick
d6d5ad3d7b MISched: Heuristics, compare latency more precisely. It matters more for some targets.
llvm-svn: 170452
2012-12-18 20:52:56 +00:00
Andrew Trick
44f54d97a4 MISched: Remove SchedRemainder::IsResourceLimited. I don't know how to compute it.
llvm-svn: 170451
2012-12-18 20:52:54 +00:00
Andrew Trick
493b867b5d MISched: cleanup, use the proper iterator type.
llvm-svn: 170450
2012-12-18 20:52:52 +00:00
Andrew Trick
ffb6168e85 MISched: minor improvement, initialize remaining resources before the first scheduling decision.
llvm-svn: 170449
2012-12-18 20:52:49 +00:00
Jakob Stoklund Olesen
422e07b091 Tighten the insert() API for bundled instructions.
The normal insert() function takes an MBB::iterator position, and
inserts a stand-alone MachineInstr as before.

The insert() function that takes an MBB::instr_iterator position can
insert instructions inside a bundle, and will now update the bundle
flags correctly when that happens.

When the insert position is between two bundles, it is unclear whether
the instruction should be appended to the previous bundle, prepended to
the next bundle, or stand on its own. The MBB::insert() function doesn't
bundle the instruction in that case, use the MIBundleBuilder class for
that.

llvm-svn: 170437
2012-12-18 17:54:53 +00:00
Hal Finkel
943f76d1b3 Check multiple register classes for inline asm tied registers
A register can be associated with several distinct register classes.
For example, on PPC, the floating point registers are each associated with
both F4RC (which holds f32) and F8RC (which holds f64). As a result, this code
would fail when provided with a floating point register and an f64 operand
because it would happen to find the register in the F4RC class first and
return that. From the F4RC class, SDAG would extract f32 as the register
type and then assert because of the invalid implied conversion between
the f64 value and the f32 register.

Instead, search all register classes. If a register class containing the
the requested register has the requested type, then return that register
class. Otherwise, as before, return the first register class found that
contains the requested register.

llvm-svn: 170436
2012-12-18 17:50:58 +00:00
Jakob Stoklund Olesen
ccfb5fb472 Tighten up the erase/remove API for bundled instructions.
Most code is oblivious to bundles and uses the MBB::iterator which only
visits whole bundles. MBB::erase() operates on whole bundles at a time
as before.

MBB::remove() now refuses to remove bundled instructions. It is not safe
to remove all instructions in a bundle without deleting them since there
is no way of returning pointers to all the removed instructions.

MBB::remove_instr() and MBB::erase_instr() will now update bundle flags
correctly, lifting individual instructions out of bundles while leaving
the remaining bundle intact.

The MachineInstr convenience functions are updated so

  eraseFromParent() erases a whole bundle as before
  eraseFromBundle() erases a single instruction, leaving the rest of its bundle.
  removeFromParent() refuses to operate on bundled instructions, and
  removeFromBundle() lifts a single instruction out of its bundle.

These functions will no longer accidentally split or coalesce bundles -
bundle flags are updated to preserve the existing bundling, and explicit
bundleWith* / unbundleFrom* functions should be used to change the
instruction bundling.

This API update is still a work in progress. I am going to update APIs
first so they maintain bundle flags automatically when possible. Then
I'll add stricter verification of the bundle flags.

llvm-svn: 170384
2012-12-17 23:55:38 +00:00
Patrik Hagglund
c494d24a68 Revert/correct some FastISel changes in r170104 (EVT->MVT for
TargetLowering::getRegClassFor).

Some isSimple() guards were missing, or getSimpleVT() were hoisted too
far, resulting in asserts on valid LLVM assembly input.

llvm-svn: 170336
2012-12-17 14:30:06 +00:00
Craig Topper
588ceec0f7 Add debug prints for when optimizeLoadInstr folds a load.
llvm-svn: 170298
2012-12-17 03:56:00 +00:00