Commit Graph

1231 Commits

Author SHA1 Message Date
Zijiao Ma
56a837238d Some missing usage of TargetParser. NFC.
llvm-svn: 278890
2016-08-17 02:13:33 +00:00
Yaxun Liu
3317446301 [OpenCL] AMDGPU: Add extensions cl_amd_media_ops and cl_amd_media_ops2
Differential Revision: https://reviews.llvm.org/D23322

llvm-svn: 278851
2016-08-16 20:49:49 +00:00
Yaxun Liu
2c17e82bc7 [OpenCL][AMDGPU] Add support for -cl-denorms-are-zero
Adjust target features for amdgcn target when -cl-denorms-are-zero is set.

Denormal support is controlled by feature strings fp32-denormals fp64-denormals in amdgcn target. If -cl-denorms-are-zero is not set and the command line does not set fp32/64-denormals feature string, +fp32-denormals +fp64-denormals will be on for GPU's supporting them.

A new virtual function virtual void TargetInfo::adjustTargetOptions(const CodeGenOptions &CGOpts, TargetOptions &TargetOpts) const is introduced to allow adjusting target option by codegen option.

Differential Revision: https://reviews.llvm.org/D22815

llvm-svn: 278151
2016-08-09 19:43:38 +00:00
Yaxun Liu
99444cb860 [OpenCL] Fix size of image type
The size of image type is reported incorrectly as size of a pointer to address space 0, which causes error when casting image type to pointers by __builtin_astype.

The fix is to get image address space from TargetInfo then report the size accordingly.

Differential Revision: https://reviews.llvm.org/D22927

llvm-svn: 277647
2016-08-03 20:38:06 +00:00
Yaxun Liu
3f9e91286e [OpenCL] Add extension cl_khr_mipmap_image to clang
Adding extension cl_khr_mipmap_image to clang's OpenCL Extensions and initiated inside AMDGPU Target.

Patch by Aaron En Ye Shi.

Differential Revision: https://reviews.llvm.org/D22637

llvm-svn: 277181
2016-07-29 17:52:34 +00:00
Zijiao Ma
33e9521399 [AArch64] Using AArch64TargetParser in Clang.
This resubmit r270688 which broke some specific buildbots.That's because
there is incorrect indexing problem in the targetparser,and the problem is
fixed in r276957.

Differential Revision: https://reviews.llvm.org/D21277

llvm-svn: 276958
2016-07-28 06:24:48 +00:00
Matthias Braun
5092dc010f Basic/Targets.cpp: Reformat aarch64 CPU list.
Having 1 entry per line and an alphabetical order is clearer and reduces
the risk of invalid merges.

llvm-svn: 276931
2016-07-27 22:47:09 +00:00
Pirama Arumuga Nainar
bb846a32e4 Adjust coercion of aggregates on RenderScript
Summary:
In RenderScript, the size of the argument or return value emitted in the
IR is expected to be the same as the size of corresponding qualified
type.  For ARM and AArch64, the coercion performed by Clang can
change the parameter or return value to a type whose size is different
(usually larger) than the original aggregate type.  Specifically, this
can happen in the following cases:
    - Aggregate parameters of size <= 64 bytes and return values smaller
      than 4 bytes on ARM
    - Aggregate parameters and return values smaller than bytes on
      AArch64

This patch coerces the cases above to an integer array that is the same
size and alignment as the original aggregate.  A new field is added to
TargetInfo to detect a RenderScript target and limit this coercion just
to that case.

Tests added to test/CodeGen/renderscript.c

Reviewers: rsmith

Subscribers: aemerson, srhines, llvm-commits

Differential Revision: https://reviews.llvm.org/D22822

llvm-svn: 276904
2016-07-27 19:01:51 +00:00
Douglas Katzman
87da5f47ac [Myriad]: better compatibility with vendor source
- Accept ma{2100,2150,2150} for -mcpu
- Define more preprocessor macros
- Don't append "le/" to little-endian lib dirs

llvm-svn: 276646
2016-07-25 16:36:02 +00:00
Daniel Sanders
6a73883c48 [mips] Correct label prefixes for N32 and N64.
Summary:
N32 and N64 follow the standard ELF conventions (.L) whereas O32 uses its own
($).

This fixes the majority of object differences between -fintegrated-as and
-fno-integrated-as.

Reviewers: sdardis

Subscribers: dsanders, sdardis, llvm-commits

Differential Revision: https://reviews.llvm.org/D22412

llvm-svn: 275967
2016-07-19 10:49:03 +00:00
Bob Wilson
4cf27c4d6f Allow iOS and tvOS version numbers with 2-digit major version numbers.
rdar://problem/26921601

llvm-svn: 275905
2016-07-18 20:29:14 +00:00
Simon Pilgrim
13dff57849 Update switch statement to match coding standards.
llvm-svn: 274799
2016-07-07 22:32:26 +00:00
Chad Rosier
4c077aaabb [AArch64] Change the preferred alignment for char and short.
This reinstates commits r273280 and r273289.

Original Review: http://reviews.llvm.org/D21414.

llvm-svn: 274791
2016-07-07 20:02:25 +00:00
Chad Rosier
3e68af8f3d Revert "[AArch64] Change the preferred alignment for char and short to word alignment"
This reverts commit r273280 as the change was not properly approved.

llvm-svn: 274766
2016-07-07 16:37:19 +00:00
Simon Pilgrim
474c642172 Fix "not all control paths return a value" warning on MSVC
This time without causing a 'all enums handled' warning on other compilers.

llvm-svn: 274748
2016-07-07 11:24:38 +00:00
Simon Pilgrim
c6db895ece Fix "not all control paths return a value" warning on MSVC
llvm-svn: 274746
2016-07-07 11:12:02 +00:00
Justin Lebar
629076178a [CUDA] Add utility functions for dealing with CUDA versions / architectures.
Summary:
Currently our handling of CUDA architectures is scattered all around
clang.  This patch centralizes it.

A key advantage of this centralization is that you can now write a C++
switch on e.g. CudaArch and get a compile error if you don't handle one
of the enum values.

Reviewers: tra

Subscribers: cfe-commits

Differential Revision: http://reviews.llvm.org/D21867

llvm-svn: 274681
2016-07-06 21:21:39 +00:00
Justin Lebar
ef1aaac3cc [CUDA] Add support for CUDA 8 and sm_60-62.
Summary: Also add sm_32, which was missing.

Reviewers: tra

Subscribers: cfe-commits

Differential Revision: http://reviews.llvm.org/D21778

llvm-svn: 274680
2016-07-06 21:21:14 +00:00
Jacob Baungard Hansen
1bf12828be [Sparc] Allow LEON cpu models to be selected with -mcpu
Summary: This change exposes the recently added LEON CPUs (D19359) in the LLVM Sparc backend to Clang, allowing the cpu's to be selected using the -mcpu flag.

Reviewers: jyknight, lero_chris

Subscribers: jyknight, cfe-commits

Differential Revision: http://reviews.llvm.org/D21683

llvm-svn: 274487
2016-07-04 08:56:08 +00:00
Pirama Arumuga Nainar
54a213d280 Add TargetInfo for 32-bit and 64-bit RenderScript
Summary:
The TargetInfo for 'renderscript32' and 'renderscript64' ArchTypes are
subclasses of ARMleTargetInfo and AArch64leTargetInfo respectively.

RenderScript32TargetInfo modifies the ARM ABI to set LongWidth and
LongAlign to be 64-bits.  Other than this modification, the underlying
TargetInfo base classes is initialized as if they have "armv7" and
"aarch64" architecture type respectively.

Reviewers: rsmith, echristo

Subscribers: aemerson, tberghammer, cfe-commits, danalbert, mehdi_amini, srhines

Differential Revision: http://reviews.llvm.org/D21334

llvm-svn: 274409
2016-07-02 00:05:42 +00:00
Nikolay Haustov
8c6538b86d AMDGPU: Set amdgpu_kernel calling convention for OpenCL kernels.
Summary:
Summary:
Change Clang calling convention SpirKernel to OpenCLKernel.
Set calling convention OpenCLKernel for amdgcn as well.
Add virtual method .getOpenCLKernelCallingConv() to TargetCodeGenInfo
and use it to set target calling convention for AMDGPU and SPIR.
Update tests.

Reviewers: rsmith, tstellarAMD, Anastasia, yaxunl

Subscribers: kzhuravl, cfe-commits

Differential Revision: http://reviews.llvm.org/D21367

llvm-svn: 274220
2016-06-30 09:06:33 +00:00
Pankaj Gode
3267e843c5 [Driver][AArch64] Add support for Broadcom Vulcan core.
Adding support for new Broadcom Vulcan core (ARMv8.1A).

Differential Revision: http://reviews.llvm.org/D21501

llvm-svn: 274114
2016-06-29 10:00:31 +00:00
Manman Ren
ccf25bbf3f AvailabilityAttr: we accept "macos" as the platform name.
We continue accepting "macosx" but canonicalize it to "macos", When emitting
diagnostics, we use "macOS" instead of "OS X".

The PlatformName in TargetInfo is changed from "macosx" to "macos" so we can
directly compare the Platform in AvailabilityAttr with the PlatformName
in TargetInfo.

rdar://26795172
rdar://26800775

llvm-svn: 274064
2016-06-28 20:55:30 +00:00
Chris Dewhurst
7cc4cfe4fc [SPARC] Allows inlining of atomics for Sparc32 with appropriate store barrier.
The final change is required to extend the back-end's AtomicExpandPass that was implemented for Sparc (64 bit) and later extended for Sparc (32 bit).

llvm-svn: 274012
2016-06-28 12:55:55 +00:00
NAKAMURA Takumi
d743b1bf5d Revert r273950, (empty). Please recommit it with readable commit message.
llvm-svn: 273994
2016-06-28 06:10:54 +00:00
David Majnemer
017cf35d7c [clang-cl] Define _MSVC_LANG
Recently, Microsoft added support for a flag, /std, which controls which
version of the language rules MSVC should use.
MSVC hasn't updated __cplusplus though.
Instead, they added a new macro, _MSVC_LANG, which is defined in a
similar fashion to __cplusplus.  This is used to indicate which mode the
compiler is in.

llvm-svn: 273987
2016-06-28 03:13:16 +00:00
Chris Dewhurst
a657f875a9 (no commit message)
llvm-svn: 273950
2016-06-27 22:11:12 +00:00
Rafael Espindola
0fa668072f Add support for musl-libc on ARM Linux.
Patch by Lei Zhang!

llvm-svn: 273735
2016-06-24 21:35:06 +00:00
Evandro Menezes
04abc14fb5 [AArch64] Change the preferred alignment for char and short to word alignment
Differential Revision: http://reviews.llvm.org/D21414

llvm-svn: 273280
2016-06-21 15:55:29 +00:00
Jan Vesely
9674bd4f97 NVPTX: Add supported CL features
Fixes libclc compilation broken by r269670

Reviewers: jholewinsky

Differential Revision: http://reviews.llvm.org/D20389

llvm-svn: 273031
2016-06-17 19:02:14 +00:00
Jan Vesely
211ba785d9 AMDGPU: Fix supported CL features
Reviewers: arsenm

Differential Revision: http://reviews.llvm.org/D20388

llvm-svn: 272986
2016-06-17 02:25:03 +00:00
Chris Dewhurst
fe9e509b0c [Sparc] setjmp and longjmp intrinsic support update to add unit tests and remove accidentally checked-in code.
Related to revision r272782

llvm-svn: 272798
2016-06-15 16:08:13 +00:00
Chris Dewhurst
0381cd7dbf [Sparc] Change to let clang know that setjmp and longjmp intrinsics are implemented in the back-end.
Differential Revision: http://reviews.llvm.org/D19798

llvm-svn: 272782
2016-06-15 12:44:47 +00:00
Daniel Sanders
32b2d6b160 [mips] Defer validity check for CPU/ABI pairs and improve error message for invalid cases.
Summary:
The validity of ABI/CPU pairs is no longer checked on the fly but is
instead checked after initialization. As a result, invalid CPU/ABI pairs
can be reported as being known but invalid instead of being unknown. For
example, we now emit:
  error: ABI 'n32' is not supported on CPU 'mips32r2'
instead of:
  error: unknown target ABI 'n64'

Reviewers: atanasyan

Subscribers: sdardis, cfe-commits

Differential Revision: http://reviews.llvm.org/D21023

llvm-svn: 272645
2016-06-14 08:58:50 +00:00
Matt Arsenault
250024f905 AMDGPU: Verify subtarget specific builtins
Cleanup setup of subtarget features.

llvm-svn: 272091
2016-06-08 01:56:42 +00:00
Daniel Sanders
28d8637e25 [mips] The P5600 does not support N32/N64 since it's a 32-bit CPU.
Summary:

Reviewers: atanasyan

Subscribers: cfe-commits, sdardis

Differential Revision: http://reviews.llvm.org/D20963

llvm-svn: 271877
2016-06-06 09:47:32 +00:00
Daniel Sanders
26a56adaea [mips] Replace almost all Arch checks in MipsTargetInfo with ABI checks. NFC.
Summary:
setABI() is still tied to the Arch component of the Triple to preserve existing
behaviour.

Reviewers: atanasyan

Subscribers: cfe-commits

Differential Revision: http://reviews.llvm.org/D20961

llvm-svn: 271875
2016-06-06 09:07:08 +00:00
Daniel Sanders
55e4069702 [mips] Slightly simplify MipsTargetInfo::setDataLayout(). NFC.
Summary:

Reviewers: atanasyan

Subscribers: atanasyan, cfe-commits

Differential Revision: http://reviews.llvm.org/D20680

llvm-svn: 271647
2016-06-03 10:11:01 +00:00
Sjoerd Meijer
90df4a7c31 This adds target support and tests for Cortex-A73
Differential Revision: http://reviews.llvm.org/D20864

llvm-svn: 271507
2016-06-02 10:48:37 +00:00
Matt Arsenault
6dc455fb93 AMDGPU: Update datalayout string
llvm-svn: 271297
2016-05-31 16:58:18 +00:00
Daniel Sanders
07c8654284 [mips] Kill 'support' for untested EABI.
Summary:
There are no llvm backend tests* for EABI and no EABI buildbots. There were only
three clang tests, all of which checked that -mabi=eabi was passed to the
assembler.

*There is a single backend test that specifies EABI but it actually tests MIPS16.

Reviewers: atanasyan

Subscribers: emaste, sdardis, atanasyan, cfe-commits

Differential Revision: http://reviews.llvm.org/D20679

llvm-svn: 270998
2016-05-27 14:30:23 +00:00
Daniel Sanders
4672af6fec [mips] Fold MipsTargetInfoBase subclasses into MipsTargetInfoBase and rename to MipsTargetInfo. NFC
Summary:
This unifies mips/mipsel and mips64/mips64el into a single class so that we can
later support O32 on mips64/mips64el and N32/N64 on mips/mipsel (when an
appropriate CPU selected).

Reviewers: atanasyan

Subscribers: atanasyan, jfb, cfe-commits, dschuff

Differential Revision: http://reviews.llvm.org/D20678

llvm-svn: 270984
2016-05-27 11:51:02 +00:00
Renato Golin
3b8709c583 Revert "[AArch64] Using new TargetParser in Clang"
This reverts commit r270688 and r270689. The issue is not a random order, but a
different order for some targets and others (prob. Linux vs Darwin). Reverting until
we have a better fix.

llvm-svn: 270691
2016-05-25 12:36:31 +00:00
Renato Golin
d4d4da74a6 [AArch64] Using new TargetParser in Clang
Using AArch64TargetParser in clang to avoid repetitive string parsing.

Use TargetParser to do ARCH/CPU/ArchExt parsing instead of local implementation.

Patch by Jojo Ma.

llvm-svn: 270688
2016-05-25 12:02:58 +00:00
Jacob Baungard Hansen
13a4937404 [Sparc] Add software float option -msoft-float
Summary:
Following patch D19265 which enable software floating point support in the Sparc backend, this patch enables the option to be enabled in the front-end using the -msoft-float option.

The user should ensure a library (such as the builtins from Compiler-RT) that includes the software floating point routines is provided.

Reviewers: jyknight, lero_chris

Subscribers: jyknight, cfe-commits

Differential Revision: http://reviews.llvm.org/D20419

llvm-svn: 270538
2016-05-24 08:30:08 +00:00
Dimitry Andric
c6d924cd06 Make __FreeBSD_cc_version predefined macro configurable at build time
The `FreeBSDTargetInfo` class has always set the `__FreeBSD_cc_version`
predefined macro to a rather static value, calculated from the major OS
version.

In the FreeBSD base system, we will start incrementing the value of this
macro whenever we make any signifant change to clang, so we need a way
to configure the macro's value at build time.

Use `FREEBSD_CC_VERSION` for this, which we can define in the FreeBSD
build system using either the `-D` command line option, or an include
file.  Stock builds will keep the earlier value.

Differential Revision: http://reviews.llvm.org/D20037

llvm-svn: 270240
2016-05-20 17:27:22 +00:00
Benjamin Kramer
f4c520d5d2 Add all the avx512 flavors to __builtin_cpu_supports's list.
This is matching what trunk gcc is accepting. Also adds a missing ssse3
case. PR27779. The amount of duplication here is annoying, maybe it
should be factored into a separate .def file?

llvm-svn: 270224
2016-05-20 15:21:08 +00:00
Krzysztof Parzyszek
89fb44147b [Hexagon] Recognize "s" constraint in inline-asm
llvm-svn: 270216
2016-05-20 13:50:32 +00:00
Artem Belevich
ffa5fc51b8 [CUDA] Allow sm_50,52,53 GPUs
LLVM accepts them since r233575.

Differential Revision: http://reviews.llvm.org/D20405

llvm-svn: 270084
2016-05-19 17:47:47 +00:00
Krzysztof Parzyszek
e0026e4e21 [Hexagon] Recognize "q" and "v" in inline-asm as register constraints
Clang follow-up to r269933.

llvm-svn: 269934
2016-05-18 14:56:14 +00:00