Commit Graph

531 Commits

Author SHA1 Message Date
Greg Clayton
c1dfd93e1e Made the EmulateInstruction class into a plug-in interface and moved the
source files around into the places they need to go.

llvm-svn: 124631
2011-02-01 00:04:43 +00:00
Johnny Chen
2a183f836c Add emulate_pop (loads multiple registers from the stack) entries to both the
g_arm_opcodes and g_thumb_opcodes tables.

Plus a minor comment fix for EmulateInstruction.h.

llvm-svn: 124617
2011-01-31 23:07:40 +00:00
Johnny Chen
413e6520da Add emulate_add_sp_imm entry to the g_thumb_opcodes table, which represents an operation
to adjust the stack pointer by adding an imm7-scaled value to the SP.

llvm-svn: 124596
2011-01-31 20:09:28 +00:00
Johnny Chen
9eb77456e6 Align comment.
llvm-svn: 124595
2011-01-31 20:01:01 +00:00
Johnny Chen
072c35866a Add some comments to the emulate_* functions.
llvm-svn: 124588
2011-01-31 18:02:28 +00:00
Johnny Chen
1475d4fa36 Minor comment fix.
llvm-svn: 124586
2011-01-31 17:37:39 +00:00
Greg Clayton
b30438aa2b Added the start of the plug-in interface to EmulateInstruction
and implemented it for the EmulateInstructionARM class.

llvm-svn: 124563
2011-01-30 20:03:56 +00:00
Greg Clayton
7d478e0851 Added some documentation that describes the purpose and the goals
of the EmulateInstruction class.

llvm-svn: 124562
2011-01-30 19:42:40 +00:00
Johnny Chen
8960ffd902 Add emulate_mov_low_high() entry to the g_thumb_opcodes table to capture moving
of high registers to low registers in the prologue so they can be saved.

llvm-svn: 124509
2011-01-29 00:11:15 +00:00
Johnny Chen
a1a00b19b5 Add emulate_mov_rd_sp() entries to the g_arm_opcodes and g_thumb_opcodes tables.
For prolog instructions which set r7 or ip to the stack pointer.

llvm-svn: 124501
2011-01-28 19:57:25 +00:00
Johnny Chen
121e448e19 Add emulate_sub_r7_ip_imm() (set frame pointer to some ip offset) and emulate_sub_ip_sp_imm() (
set ip to some stack offset) entries to the g_arm_opcodes table.

llvm-svn: 124466
2011-01-28 02:26:08 +00:00
Johnny Chen
e5b28a9e6a Should provide more useful context info for the emulate_ldr_rd_pc_rel() impl.
The context being that it's a PC relative load.

llvm-svn: 124460
2011-01-28 00:32:27 +00:00
Johnny Chen
3086022a3c Add emulate_ldr_rd_pc_rel entry to the g_thumb_opcodes table, which represents a
PC relative immediate load into register, possibly followed by an add operation
to adjust the SP.

llvm-svn: 124448
2011-01-27 22:52:23 +00:00
Johnny Chen
8286868c84 Add emulate_add_sp_rm entry to the g_thumb_opcodes table, which represents an operation
to adjust the stack pointer by adding a register value in Rm to the SP.

llvm-svn: 124400
2011-01-27 19:34:30 +00:00
Johnny Chen
9864b5ec5f Add emulate_add_rd_sp_imm (SP plus immediate) to the g_arm_opcodes and g_thumb_opcodes tables.
Change the data type of Context.arg2 to int64_t due to possible negative values.

llvm-svn: 124343
2011-01-27 01:26:19 +00:00
Johnny Chen
9c40302b3b Add emulate_vpush (stores multiple consecutive extension registers to the stack) entries
to both the g_arm_opcodes and g_thumb_opcodes tables.

llvm-svn: 124333
2011-01-26 23:14:33 +00:00
Johnny Chen
f6aaf31103 Remove duplicated comments.
llvm-svn: 124262
2011-01-26 01:24:45 +00:00
Johnny Chen
832d3137df Move #define's out of ARMUtils.h and into a newly created file ARMDefines.h.
llvm-svn: 124261
2011-01-26 01:18:52 +00:00
Johnny Chen
74889b29a8 Move the generic instruction bits manipulation routines into a newly created file
named InstructionUtils.h and modify some existing code to use them.

llvm-svn: 124259
2011-01-26 01:00:55 +00:00
Johnny Chen
3fde51b820 Add Encoding T1 entry of emulate_sub_sp_imm to the g_thumb_opcodes table.
Update emulate_sub_sp_imm to handle Encoding T1.

llvm-svn: 124253
2011-01-26 00:08:59 +00:00
Greg Clayton
1a65ae11bd Enabled extra warnings and fixed a bunch of small issues.
llvm-svn: 124250
2011-01-25 23:55:37 +00:00
Johnny Chen
d5cd645c74 Add Encoding T2 & T3 entries of emulate_sub_sp_imm to the g_thumb_opcodes table.
Update emulate_sub_sp_imm to handle Encoding T2 & T3.

llvm-svn: 124248
2011-01-25 23:49:39 +00:00
Johnny Chen
ccc9963e34 Add an entry to the g_arm_opcodes table named emulate_sub_sp_imm which corresponds
to an operation to adjust the stack pointer (allocate space for local storage).

llvm-svn: 124237
2011-01-25 22:45:28 +00:00
Johnny Chen
54355f7440 Variable renaming for better readability.
llvm-svn: 124208
2011-01-25 19:07:04 +00:00
Johnny Chen
86b84c25d1 Add an emulate-callback function emulate_str_rt_sp() to the g_arm_opcodes table.
llvm-svn: 124165
2011-01-25 01:13:00 +00:00
Johnny Chen
175de8a1c6 Use two opcode tables g_arm_opcodes and g_thumb_opcodes, instead of lumping arm and thumb opcodes together.
llvm-svn: 124156
2011-01-24 23:40:59 +00:00
Johnny Chen
b66cdadd4a Fix typo of encoding T2 (push) in the original ARM Architecture Reference Manual,
which has been corrected in the subsequent errata.

llvm-svn: 124152
2011-01-24 22:50:16 +00:00
Johnny Chen
9397fba093 Add comment about using Encoding A1 push instruction to emulate the "stmfd sp!, reg" case,
i.e., pushing one register onto the full descending stacks.

llvm-svn: 124149
2011-01-24 22:25:48 +00:00
Johnny Chen
65b58eafbe Make the assembler mnemonic lowercase.
llvm-svn: 124147
2011-01-24 22:02:46 +00:00
Johnny Chen
e74e60cd50 Add Encoding T1 of the PUSH instructions to the g_arm_opcodes table.
llvm-svn: 124144
2011-01-24 20:38:45 +00:00
Johnny Chen
c053cdd03d Fix typo in the instruction descriptions for Encoding T2 and T3 of PUSH.
llvm-svn: 124143
2011-01-24 20:21:01 +00:00
Johnny Chen
44a408424f Move some #define's to the ARMUtils.h header file.
llvm-svn: 124141
2011-01-24 19:50:30 +00:00
Johnny Chen
d8c2a48298 Add Encoding T2 & T3 of the PUSH instructions to the g_arm_opcodes table.
Plus add an extra field ARMInstrSize to the table entry type 'ARMOpcode'.

llvm-svn: 124140
2011-01-24 19:46:32 +00:00
Johnny Chen
91027008f1 Add an ARMUtils.h file to house utility functions for the ARM/Thumb Instruction Set Architecture.
llvm-svn: 124131
2011-01-24 18:24:53 +00:00
Johnny Chen
05a97ecc02 Add more descriptions to the g_arm_opcodes table entries.
llvm-svn: 124010
2011-01-22 00:59:07 +00:00
Johnny Chen
7aeb12b848 Pass along (ARMEncoding)encoding as the callback data, which allows us to abstract
the EmulateCallback routine without too much duplication.  Add an entry for emulating
ARM PUSH with encoding A2.

llvm-svn: 124009
2011-01-22 00:47:08 +00:00
Johnny Chen
dfeab068f5 Untabify the file.
llvm-svn: 124003
2011-01-21 22:47:25 +00:00
Greg Clayton
6da4ca83b0 Added the start of opcode emulation for ARM instructions. This class is designed
to be fed 4 callbacks: read/write memory, and read/write registers. After this,
you can tell the object to read an instruction. This will cause the class to read
the PC, and read and instruction. Then you can emulate the instruction by calling
EvaluateInstruction. This will cause the class to figure out exactly what an opcode
does, and call the read/write mem/regs functions with actual values which allows one
to emulate an instruction without running a process, or it allows one to watch the
context information (the memory write is a pushing register 3 onto the stack at offset
12) so it can be used for generating call frame information. This way, in the future,
we will have one class that can be used to emulate instructions and generate our
unwind info from assembly.

llvm-svn: 123998
2011-01-21 22:02:52 +00:00
Greg Clayton
fc75303acb Avoid infinite loops in stack backtraces and renamed:
bool RegisterContextLLDB::GetPC (addr_t& pc);

to:
    bool RegisterContextLLDB::ReadPC (addr_t& pc);
    
To avoid confusion with the GetPC() function that is part of the 
lldb_private::RegisterContext:

    uint64_t RegisterContext::GetPC (uint64_t fail_value);
    
Bad things could happen if the two got intermixed and the wrong one got
called.

Fixed inifinite loop detection by watching for two frames where the
RegisterContextLLDB::CursorSP contains the same start_pc and cfa.

    

llvm-svn: 123673
2011-01-17 21:03:33 +00:00
Greg Clayton
3e06bd90b5 Put more smarts into the RegisterContext base class. Now the base class has
a method:

    void RegisterContext::InvalidateIfNeeded (bool force);

Each time this function is called, when "force" is false, it will only call
the pure virtual "virtual void RegisterContext::InvalideAllRegisters()" if
the register context's stop ID doesn't match that of the process. When the
stop ID doesn't match, or "force" is true, the base class will clear its
cached registers and the RegisterContext will update its stop ID to match
that of the process. This helps make it easier to correctly flush the register
context (possibly from multiple locations depending on when and where new
registers are availabe) without inadvertently clearing the register cache 
when it doesn't need to be.

Modified the ProcessGDBRemote plug-in to be much more efficient when it comes
to:
- caching the expedited registers in the stop reply packets (we were ignoring
  these before and it was causing us to read at least three registers every
  time we stopped that were already supplied in the stop reply packet).
- When a thread has no stop reason, don't keep asking for the thread stopped
  info. Prior to this fix we would continually send a qThreadStopInfo packet
  over and over when any thread stop info was requested. We now note the stop
  ID that the stop info was requested for and avoid multiple requests.

Cleaned up some of the expression code to not look for ClangExpressionVariable
objects up by name since they are now shared pointers and we can just look for
the exact pointer match and avoid possible errors.

Fixed an bug in the ValueObject code that would cause children to not be 
displayed.

llvm-svn: 123127
2011-01-09 21:07:35 +00:00
Greg Clayton
877aaa589b Made FuncUnwinders threadsafe.
Other small cleanups as well.

llvm-svn: 123088
2011-01-08 21:19:00 +00:00
Greg Clayton
710dd5aebf Spelling changes applied from lldb_spelling.diffs from Bruce Mitchener.
Thanks Bruce!

llvm-svn: 123083
2011-01-08 20:28:42 +00:00
Greg Clayton
671cabeeb5 Fixed an issue with the UnwindLLDB code where if there were inlined stack
frames, UnwindLLDB could create the incorrect RegisterContext for a given
stack frame because it was using the frame index (not the concrete frame
index). This was causing crashes when doing backtraces through the 
SBFrame::GetFP() because a NULL register context was being returned for the
deepest stack frame.

llvm-svn: 123052
2011-01-08 01:53:06 +00:00
Greg Clayton
58be07b28c Added memory caching to lldb_private::Process. All lldb_private::Process
subclasses will automatically be able to take advantage of caching. The
cache line size is set to 512 by default.

This greatly speeds up stack backtraces on MacOSX when using the 
ProcessGDBRemote process plug-in since only about 6300 packets per second
can be sent.

Initial speedups show:

Prior to caching: 10,000 stack frames took 5.2 seconds
After caching: 10,000 stack frames in 240 ms!

About a 20x speedup!

llvm-svn: 122996
2011-01-07 06:08:19 +00:00
Greg Clayton
db59823068 Added the ability for Target::ReadMemory to prefer to read from the file
cache even when a valid process exists. Previously, Target::ReadMemory would
read from the process if there was a valid one and then fallback to the
object file cache.

llvm-svn: 122989
2011-01-07 01:57:07 +00:00
Greg Clayton
5ccbd294b2 Fixed issues with RegisterContext classes and the subclasses. There was
an issue with the way the UnwindLLDB was handing out RegisterContexts: it
was making shared pointers to register contexts and then handing out just
the pointers (which would get put into shared pointers in the thread and
stack frame classes) and cause double free issues. MallocScribble helped to
find these issues after I did some other cleanup. To help avoid any
RegisterContext issue in the future, all code that deals with them now
returns shared pointers to the register contexts so we don't end up with
multiple deletions. Also now that the RegisterContext class doesn't require
a stack frame, we patched a memory leak where a StackFrame object was being
created and leaked.

Made the RegisterContext class not have a pointer to a StackFrame object as
one register context class can be used for N inlined stack frames so there is
not a 1 - 1 mapping. Updates the ExecutionContextScope part of the 
RegisterContext class to never return a stack frame to indicate this when it
is asked to recreate the execution context. Now register contexts point to the
concrete frame using a concrete frame index. Concrete frames are all of the
frames that are actually formed on the stack of a thread. These concrete frames
can be turned into one or more user visible frames due to inlining. Each 
inlined stack frame has the exact same register context (shared via shared
pointers) as any parent inlined stack frames all the way up to the concrete 
frame itself.

So now the stack frames and the register contexts should behave much better.

llvm-svn: 122976
2011-01-06 22:15:06 +00:00
Jason Molenda
f830e481c2 RegisterContextLLDB.cpp (InitializeNonZerothFrame): If we get a
0 mid-stack, stop backtracing.

SectionLoadList.cpp (ResolveLoadAddress): Don't assert on an
out-of-range address, just return an invalid Address object.
The unwinder may be passing in invalid addresses on the final
stack frame and the assert is a problem.

llvm-svn: 122386
2010-12-22 02:02:45 +00:00
Greg Clayton
8ac365cc4e Removed darwin specific CPU type defines to make UnwindAssemblyProfiler_x86 able to compile on linux (patch from Stephen Wilson).
llvm-svn: 122060
2010-12-17 15:54:09 +00:00
Greg Clayton
442d7544ac Removed libunwind sources as we aren't using them anymore.
llvm-svn: 122059
2010-12-17 15:50:20 +00:00
Jason Molenda
2d107dd02b Change the DWARFExpression::Evaluate methods to take an optional
RegisterContext* - normally this is retrieved from the ExecutionContext's
StackFrame but when we need to evaluate an expression while creating
the stack frame list this can be a little tricky.

Add DW_OP_deref_size, needed for the _sigtramp FDE expression.

Add support for processing DWARF expressions in RegisterContextLLDB.

Update callers to DWARFExpression::Evaluate.

llvm-svn: 119885
2010-11-20 01:28:30 +00:00