Commit Graph

298797 Commits

Author SHA1 Message Date
David Bolvansky
b562dbabda Enrich inline messages
Summary:
This patch improves Inliner to provide causes/reasons for negative inline decisions.
1. It adds one new message field to InlineCost to report causes for Always and Never instances. All Never and Always instantiations must provide a simple message.
2. Several functions that used to return the inlining results as boolean are changed to return InlineResult which carries the cause for negative decision.
3. Changed remark priniting and debug output messages to provide the additional messages and related inline cost.
4. Adjusted tests for changed printing.

Patch by: yrouban (Yevgeny Rouban)


Reviewers: craig.topper, sammccall, sgraenitz, NutshellySima, shchenz, chandlerc, apilipenko, javed.absar, tejohnson, dblaikie, sanjoy, eraman, xbolva00

Reviewed By: tejohnson, xbolva00

Subscribers: xbolva00, llvm-commits, arsenm, mehdi_amini, eraman, haicheng, steven_wu, dexonsmith

Differential Revision: https://reviews.llvm.org/D49412

llvm-svn: 338387
2018-07-31 14:25:24 +00:00
Andrea Di Biagio
4a31bcff3f [llvm-mca] Remove README.txt
A detailed description of the tool has been recently added by Matt to
CommandGuide/llvm-mca.rst. File README.txt is now redundant and can be removed;
all the relevant user-guide information has been improved and then moved to
llvm-mca.rst.

In future, we should add another .rst for the "llvm-mca developer manual" to
provide infromation about:
 - llvm-mca internals.
 - How to add custom stages to the simulated pipeline.
 - How to provide extra processor info in the scheduling model to improve the
   analysis performed by llvm-mca.

llvm-svn: 338386
2018-07-31 14:23:49 +00:00
David Bolvansky
f4be25352a [RISCV] Add driver for riscv32-unknown-elf baremetal target
Summary:
This patch adds a driver for the baremetal RISC-V target (i.e. riscv32-unknown-elf). For reference, D39963 added basic target info and added support for riscv32-linux-unknown-elf.

Patch by: asb (Alex Bradbury)

Reviewers: efriedma, phosek, apazos, espindola, mgrang

Reviewed By: mgrang

Subscribers: jrtc27, rogfer01, MartinMosbeck, brucehoult, the_o, rkruppe, emaste, mgorny, arichardson, rbar, johnrusso, simoncook, jordy.potman.lists, sabuasal, niosHD, kito-cheng, shiva0217, zzheng, edward-jones, mgrang, cfe-commits

Differential Revision: https://reviews.llvm.org/D46822

llvm-svn: 338385
2018-07-31 14:21:46 +00:00
John Brawn
cd5f37f3f1 [MemDep] Use PhiValuesAnalysis to improve alias analysis results
This is being done in order to make GVN able to better optimize certain inputs.
MemDep doesn't use PhiValues directly, but does need to notifiy it when things
get invalidated.

Differential Revision: https://reviews.llvm.org/D48489

llvm-svn: 338384
2018-07-31 14:19:29 +00:00
David Bolvansky
16d8a69b90 [InstSimplify] Fold another Select with And/Or pattern
Summary: Proof: https://rise4fun.com/Alive/L5J

Reviewers: lebedev.ri, spatel

Reviewed By: spatel

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D49975

llvm-svn: 338383
2018-07-31 14:17:15 +00:00
Matt Arsenault
a5ed032118 DAG: Fix PromoteFloatResult for fcanonicalize
llvm-svn: 338382
2018-07-31 14:15:22 +00:00
Matt Arsenault
638a202760 AMDGPU: Don't handle FP16_TO_FP in isCanonicalized
This needs more special handling to do correctly.
Fixes test in subsequent commit.

llvm-svn: 338381
2018-07-31 14:15:16 +00:00
Alexey Bataev
c0c3a6ed5e [SLP] Fix PR38339: Instruction does not dominate all uses!
Summary:
If the ExtractElement instructions can be optimized out during the
vectorization and we need to reshuffle the parent vector, this
ShuffleInstruction may be inserted in the wrong place causing compiler
to produce incorrect code.

Reviewers: spatel, RKSimon, mkuper, hfinkel, javed.absar

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D49928

llvm-svn: 338380
2018-07-31 14:02:43 +00:00
George Rimar
7a49ce4ac4 [LLD][ELF] - ICF: Check we do not fold sections which relocations reffering to absolute symbols with a different values.
This adds a test for the following uncovered piece of code:
https://github.com/llvm-mirror/lld/blob/master/ELF/ICF.cpp#L263

Without that lines we would crash.

llvm-svn: 338379
2018-07-31 13:55:25 +00:00
Ilya Biryukov
ec9bd36f2d [clangd] Do not build AST if no diagnostics were requested
Summary:
It can be removed from the cache before the first access anyway, so
building it can be a waste of time.

Reviewers: ioeric

Reviewed By: ioeric

Subscribers: javed.absar, MaskRay, jkorous, arphaman, cfe-commits

Differential Revision: https://reviews.llvm.org/D49991

llvm-svn: 338378
2018-07-31 13:45:37 +00:00
Peter Smith
70997f9a4e [ELF][ARM] Implement support for Tag_ABI_VFP_args
The Tag_ABI_VFP_args build attribute controls the procedure call standard
used for floating point parameters on ARM. The values are:
0 - Base AAPCS (FP Parameters passed in Core (Integer) registers
1 - VFP AAPCS (FP Parameters passed in FP registers)
2 - Toolchain specific (Neither Base or VFP)
3 - Compatible with all (No use of floating point parameters)

If the Tag_ABI_VFP_args build attribute is missing it has an implicit value
of 0.
    
We use the attribute in two ways:
- Detect a clash in calling convention between Base, VFP and Toolchain.
we follow ld.bfd's lead and do not error if there is a clash between an
implicit Base AAPCS caused by a missing attribute. Many projects
including the hard-float (VFP AAPCS) version of glibc contain assembler
files that do not use floating point but do not have Tag_ABI_VFP_args.
- Set the EF_ARM_ABI_FLOAT_SOFT or EF_ARM_ABI_FLOAT_HARD ELF header flag
for Base or VFP AAPCS respectively. This flag is used by some ELF
loaders.
    
References:
- Addenda to, and Errata in, the ABI for the ARM Architecture for
Tag_ABI_VFP_args
- Elf for the ARM Architecture for ELF header flags
    
Fixes PR36009
    
Differential Revision: https://reviews.llvm.org/D49993

llvm-svn: 338377
2018-07-31 13:41:59 +00:00
Matt Arsenault
4aec86d37a AMDGPU: Fold undef fcanonicalize to qNaN
We could choose a free 0 for this, but this
matches the behavior for fmul undef, 1.0. Also,
the NaN use is more useful for folding use operations
although if it's not eliminated it is more expensive
in terms of code size.

llvm-svn: 338376
2018-07-31 13:34:31 +00:00
George Rimar
511fed8a24 [LLD][ELF] - ICF: add test case testing we do not fold sections with the different flags. NFCI.
Previously the following condition was not tested at all:
https://github.com/llvm-mirror/lld/blob/master/ELF/ICF.cpp#L300

Patch adds a test for `A->Flags != B->Flags` part.

llvm-svn: 338375
2018-07-31 13:32:16 +00:00
Matt Arsenault
c1335eaf7e AMDGPU: Fix test check line bugs
llvm-svn: 338374
2018-07-31 13:25:23 +00:00
Peter Smith
08b54bb4ff [ARM] Complete enumeration values for Tag_ABI_VFP_args
The LLD implementation of Tag_ABI_VFP_args needs to check the rarely seen
values of 3 (toolchain specific) and 4 compatible with both Base and VFP.
Add the missing enumeration values so that LLD can refer to them without
having to use the raw numbers.

Differential Revision: https://reviews.llvm.org/D50049

llvm-svn: 338373
2018-07-31 13:24:49 +00:00
Andrea Di Biagio
a1852b6194 [llvm-mca][BtVer2] Teach how to identify dependency-breaking idioms.
This patch teaches llvm-mca how to identify dependency breaking instructions on
btver2.

An example of dependency breaking instructions is the zero-idiom XOR (example:
`XOR %eax, %eax`), which always generates zero regardless of the actual value of
the input register operands.
Dependency breaking instructions don't have to wait on their input register
operands before executing. This is because the computation is not dependent on
the inputs.

Not all dependency breaking idioms are also zero-latency instructions. For
example, `CMPEQ %xmm1, %xmm1` is independent on
the value of XMM1, and it generates a vector of all-ones.
That instruction is not eliminated at register renaming stage, and its opcode is
issued to a pipeline for execution. So, the latency is not zero. 

This patch adds a new method named isDependencyBreaking() to the MCInstrAnalysis
interface. That method takes as input an instruction (i.e. MCInst) and a
MCSubtargetInfo.
The default implementation of isDependencyBreaking() conservatively returns
false for all instructions. Targets may override the default behavior for
specific CPUs, and return a value which better matches the subtarget behavior.

In future, we should teach to Tablegen how to automatically generate the body of
isDependencyBreaking from scheduling predicate definitions. This would allow us
to expose the knowledge about dependency breaking instructions to the machine
schedulers (and, potentially, other codegen passes).

Differential Revision: https://reviews.llvm.org/D49310

llvm-svn: 338372
2018-07-31 13:21:43 +00:00
Tim Northover
c5018d46f2 [debuginfo-tests] tweak new test to be compatible with wider range of compilers.
emplace_back was added in C++11, and its usage isn't critical to what's being
tested so using push_back instead will allow this test to work with more
compilers.

llvm-svn: 338371
2018-07-31 13:19:01 +00:00
Peter Smith
d9e74901fd [ELF][ARM] Add Arm ABI names for float ABI ELF Header flags
The ELF for the Arm architecture document defines, for EF_ARM_EABI_VER5 and
above, the flags EF_ARM_ABI_FLOAT_HARD and EF_ARM_ABI_FLOAT_SOFT. These
have been defined to be compatible with the existing EF_ARM_VFP_FLOAT and
EF_ARM_SOFT_FLOAT used by gcc for EF_ARM_EABI_UNKNOWN.

This patch adds the flags in addition to the existing ones so that any code
depending on the old names will still work.

Differential Revision: https://reviews.llvm.org/D49992

llvm-svn: 338370
2018-07-31 13:03:54 +00:00
Simon Pilgrim
0aa2867545 Revert r338365: [X86] Improved sched models for X86 BT*rr instructions.
https://reviews.llvm.org/D49243

Contains WIP code that should not have been included.

llvm-svn: 338369
2018-07-31 13:00:51 +00:00
Jonas Paulsson
2f12e45d5a [SystemZ] Improve decoding in case of instructions with four register operands.
Since z13, the max group size will be 2 if any μop has more than 3 register
sources.

This has been ignored sofar in the SystemZHazardRecognizer, but is now
handled by recognizing those instructions and adjusting the tracking of
decoding and the cost heuristic for grouping.

Review: Ulrich Weigand
https://reviews.llvm.org/D49847

llvm-svn: 338368
2018-07-31 13:00:42 +00:00
Sanjay Patel
9a801cb598 [InstCombine] simplify code for A & (A ^ B) --> A & ~B
This fold was written in an odd way and tried to avoid
an endless loop by bailing out on all constants instead
of the supposedly problematic case of -1. But (X & -1) 
should always be simplified before we reach here, so I'm
not sure how that is a problem.

There were no tests for the commuted patterns, so I added
those at rL338364.

llvm-svn: 338367
2018-07-31 13:00:03 +00:00
Hans Wennborg
a592adbbc4 clang-format: try to make the doc for ConstructorInitializerAllOnOneLineOrOnePerLine more clear
PR38080 complained that the "OnePerLine" case wasn't previously shown.

llvm-svn: 338366
2018-07-31 12:42:02 +00:00
Andrew V. Tischenko
e6f5ace81a [X86] Improved sched models for X86 BT*rr instructions.
https://reviews.llvm.org/D49243

llvm-svn: 338365
2018-07-31 12:33:48 +00:00
Sanjay Patel
995138ce60 [InstCombine] move/add tests for xor+add fold; NFC
llvm-svn: 338364
2018-07-31 12:31:00 +00:00
Hans Wennborg
1cc3f51b04 windows_support.rst: Add links for downloading
llvm-svn: 338363
2018-07-31 12:02:03 +00:00
Hans Wennborg
c7792a6cc7 index.rst: pe/coff does support pdbs now
llvm-svn: 338362
2018-07-31 12:00:26 +00:00
Ilya Biryukov
442c283218 [clangd] Report diagnostics even if WantDiags::No AST was reused
Summary:
After r338256, clangd stopped reporting diagnostics if WantDiags::No request
is followed by a WantDiags::Yes request but the AST can be reused.

Reviewers: ioeric

Reviewed By: ioeric

Subscribers: javed.absar, MaskRay, jkorous, arphaman, jfb, cfe-commits

Differential Revision: https://reviews.llvm.org/D50045

llvm-svn: 338361
2018-07-31 11:47:52 +00:00
Jonas Hahnfeld
85673b083a Fix linux-header-search.cpp with CLANG_DEFAULT_CXX_STDLIB
This configuration was broken after r338294 because Clang might
be configured to always use libc++.

llvm-svn: 338360
2018-07-31 11:36:14 +00:00
Andrew V. Tischenko
e564055671 [X86] Improved sched models for X86 SHLD/SHRD* instructions.
Differential Revision: https://reviews.llvm.org/D9611

llvm-svn: 338359
2018-07-31 10:14:43 +00:00
Simon Pilgrim
99d475f97d [X86][SSE] isFNEG - Use getTargetConstantBitsFromNode to handle all constant cases
isFNEG was duplicating much of what was done by getTargetConstantBitsFromNode in its own calls to getTargetConstantFromNode.

Noticed while reviewing D48467.

llvm-svn: 338358
2018-07-31 10:13:17 +00:00
Martin Storsjo
293079f2de [ARM] Allow automatically deducing the thumb instruction size for .inst
This matches GAS, that allows unsuffixed .inst for thumb.

Differential Revision: https://reviews.llvm.org/D49937

llvm-svn: 338357
2018-07-31 09:27:07 +00:00
Martin Storsjo
af18947f0a [ARM] Support the .inst directive for MachO and COFF targets
Contrary to ELF, we don't add any markers that distinguish data generated
with .short/.long from normal instructions, so the .inst directive only
adds compatibility with assembly that uses it.

Differential Revision: https://reviews.llvm.org/D49936

llvm-svn: 338356
2018-07-31 09:27:01 +00:00
Martin Storsjo
3e3d39d07e [AArch64] Support the .inst directive for MachO and COFF targets
Contrary to ELF, we don't add any markers that distinguish data generated
with .long from normal instructions, so the .inst directive only adds
compatibility with assembly that uses it.

Differential Revision: https://reviews.llvm.org/D49935

llvm-svn: 338355
2018-07-31 09:26:52 +00:00
Sam Parker
2a6c842fda [ARM] Revert r337821
Re-enabling ARMCodeGenPrepare by default after failing to reproduce
the bootstrap issues that I was concerned it was causing.

llvm-svn: 338354
2018-07-31 09:04:14 +00:00
Aleksandr Urakov
09240ef776 Improve support of PDB as an external layout source
Summary:
This patch improves support of PDB as an external layout source
in the next cases:

- Multiple non-virtual inheritance from packed base classes. When using
  external layout, there's no need to align `NonVirtualSize` of a base class.
  It may cause an overlapping when the next base classes will be layouted
  (but there is a slightly different case in the test because I can't find
  a way to specify a base offset);
- Support of nameless structs and unions. There is no info about nameless child
  structs and unions in Microsoft cl-emitted PDBs. Instead all its fields
  are just treated as outer structure's (union's) fields. This also causes
  a fields overlapping, and makes it possible for unions to have fields located
  at a non-zero offset.

Reviewers: rsmith, zturner, rnk, mstorsjo, majnemer

Reviewed By: rnk

Subscribers: cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D49871

llvm-svn: 338353
2018-07-31 08:27:06 +00:00
Hsiangkai Wang
615540d0f2 Test commit.
llvm-svn: 338352
2018-07-31 06:09:29 +00:00
Hiroshi Inoue
2f6769be60 [InstSimplify] tests for D48828, D49981: fold extraction from std::pair
Minor touch up in the previous comment.

llvm-svn: 338351
2018-07-31 05:29:20 +00:00
Hiroshi Inoue
5427d3efc2 [InstSimplify] tests for D48828, D49981: fold extraction from std::pair
Updated unit tests for D48828 and D49981.

llvm-svn: 338350
2018-07-31 05:10:36 +00:00
Dean Michael Berris
f8d5969943 [XRay][compiler-rt] Update test to use similar structure
This is a follow-up to D50037.

llvm-svn: 338349
2018-07-31 04:47:37 +00:00
Max Kazantsev
eb8e9c0940 [NFC] Collect statistics in GuardWidening
llvm-svn: 338348
2018-07-31 04:37:11 +00:00
Dean Michael Berris
3bd20d4605 [XRay][compiler-rt] Profiling Mode: Include file header in buffers
Summary:
This change provides access to the file header even in the in-memory
buffer processing. This allows in-memory processing of the buffers to
also check the version, and the format, of the profile data.

Reviewers: eizan, kpw

Reviewed By: eizan

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D50037

llvm-svn: 338347
2018-07-31 04:16:54 +00:00
Diego Caballero
3587150fcb [VPlan] Introduce VPLoopInfo analysis.
The patch introduces loop analysis (VPLoopInfo/VPLoop) for VPBlockBases.
This analysis will be necessary to perform some H-CFG transformations and
detect and introduce regions representing a loop in the H-CFG.

Reviewers: fhahn, rengolin, mkuper, hfinkel, mssimpso

Reviewed By: fhahn 

Differential Revision: https://reviews.llvm.org/D48816

llvm-svn: 338346
2018-07-31 01:57:29 +00:00
Raphael Isemann
56bf356a4b Remove Stream::UnitTest
Summary: No one is using this method, and it also doesn't really make a lot of sense to have it around.

Reviewers: davide

Reviewed By: davide

Subscribers: davide, lldb-commits

Differential Revision: https://reviews.llvm.org/D50026

llvm-svn: 338345
2018-07-31 01:21:36 +00:00
Reid Kleckner
d2bad6c639 Revert r338340 "[MS Demangler] Better demangling of template arguments."
Breaks the build with GCC, apparently.

llvm-svn: 338344
2018-07-31 01:08:42 +00:00
Richard Smith
6fff5c412b [coroutines] Fix handling of dependent co_await in StmtProfiler.
Fix "Invalid operator call kind" error (llvm_unreachable) in
DecodeOperatorCall when profiling a dependent co_await.

Patch by Victor Zverovich!

Differential Revision: https://reviews.llvm.org/D50002

llvm-svn: 338343
2018-07-31 00:47:41 +00:00
Craig Topper
9164b9b16e [X86] Stop accidentally running the Bonnell LEA fixup path on Goldmont.
In one place we checked X86Subtarget.slowLEA() to decide if the pass should run. But to decide what the pass should we only check isSLM. This resulted in Goldmont going down the Bonnell path.

llvm-svn: 338342
2018-07-31 00:43:54 +00:00
Ana Pazos
2baa767455 [RISCV] Fixed test case failure due to r338047
llvm-svn: 338341
2018-07-31 00:36:28 +00:00
Zachary Turner
4f85809a84 [MS Demangler] Better demangling of template arguments.
This patch fixes demangling of template aliases as template-template
arguments, and also fixes function pointers and references as
not type template parameters.  All of these can be properly
demangled now, so I've ported over the test
clang/test/CodeGenCXX/ms-template-callbacks.cpp.  All of these
tests pass

llvm-svn: 338340
2018-07-31 00:26:52 +00:00
Artem Dergachev
cdd783713d [analyzer] Rename test: cxx17-mandatory-elision.cpp -> copy-elision.cpp
It reflects its contents more accurately. No functional change intended.

llvm-svn: 338339
2018-07-31 00:18:35 +00:00
Erik Pilkington
ca019e745d [Sema] Relax a failing assert in TemplateArgumentLoc
Any of these template argument kinds can be represented with an expression, so
accept them in this constructor.

Patch by Balaji Iyer!

rdar://41459965

Differential revision: https://reviews.llvm.org/D49766

llvm-svn: 338338
2018-07-31 00:18:30 +00:00