Commit Graph

75 Commits

Author SHA1 Message Date
Evan Cheng
0b77319742 Fix MachineCodeEmitter to use uintptr_t instead of intptr_t. This avoids some overflow issues. Patch by Thomas Jablin.
llvm-svn: 60828
2008-12-10 02:32:19 +00:00
Evan Cheng
5f23e9fe73 Fix a thinko. MO is getOperand(i-1) so we don't have to adjust e.
llvm-svn: 59696
2008-11-20 02:25:51 +00:00
Evan Cheng
59213d64e5 Eliminate a compile time warning.
llvm-svn: 59678
2008-11-19 23:21:33 +00:00
Evan Cheng
30f6f8fdad Fix MOVrx, MOVsrl_flag, and MOVsra_flag encodings.
llvm-svn: 59314
2008-11-14 20:09:11 +00:00
Evan Cheng
fabdcce677 Handle the rest of pseudo instructions.
llvm-svn: 59275
2008-11-13 23:36:57 +00:00
Evan Cheng
935963de81 Don't forget to emit stubs for function GV's emitted in CONSTPOOL_ENTRY's.
llvm-svn: 59258
2008-11-13 19:22:28 +00:00
Evan Cheng
4af89f7e7d Missed a break statement.
llvm-svn: 59231
2008-11-13 07:46:59 +00:00
Evan Cheng
2666f59322 Fix pre- and post-indexed load / store encoding bugs.
llvm-svn: 59230
2008-11-13 07:34:59 +00:00
Evan Cheng
45d030a05a Address mode immediate offset has already been divided by 4.
llvm-svn: 59117
2008-11-12 08:21:12 +00:00
Evan Cheng
052f20d3b1 Fix a VFP binary arithmetic instruction encoding bug.
llvm-svn: 59116
2008-11-12 08:14:21 +00:00
Evan Cheng
2836d91630 Fix address mode 3 immediate offset mode encoding.
llvm-svn: 59109
2008-11-12 07:34:37 +00:00
Evan Cheng
af644b50b4 Consolidate formats; fix FCMPED etc. encodings.
llvm-svn: 59107
2008-11-12 07:18:38 +00:00
Evan Cheng
4b6c7efbde Fix VFP conversion instruction encodings.
llvm-svn: 59104
2008-11-12 06:41:41 +00:00
Evan Cheng
a0e2f26320 Fix encoding of single-precision VFP registers.
llvm-svn: 59102
2008-11-12 02:19:38 +00:00
Evan Cheng
bfcee5b863 VFP fld / fst immediate field is multiplied by 4.
llvm-svn: 59100
2008-11-12 01:02:24 +00:00
Evan Cheng
97ccab888a Fix FMDRR encoding.
llvm-svn: 59088
2008-11-11 22:46:12 +00:00
Evan Cheng
ad519bbe54 Handle floating point constpool_entry's.
llvm-svn: 59087
2008-11-11 22:19:31 +00:00
Evan Cheng
8cbbcb1f2f Encode VFP load / store instructions.
llvm-svn: 59084
2008-11-11 21:48:44 +00:00
Evan Cheng
38c9a14a88 Encode VFP conversion instructions.
llvm-svn: 59074
2008-11-11 19:40:26 +00:00
Evan Cheng
ac2af2fdb2 Encode VFP arithmetic instructions.
llvm-svn: 59016
2008-11-11 02:11:05 +00:00
Evan Cheng
9f3058f3be Rename isGVNonLazyPtr to isIndirectSym to reflect how it will be used.
llvm-svn: 58949
2008-11-10 01:08:07 +00:00
Evan Cheng
98161f5f34 Tell ARMJITInfo if codegen relocation is PIC. It changes how function stubs are generated.
llvm-svn: 58896
2008-11-08 07:38:22 +00:00
Evan Cheng
bb373c4637 Fix relocation for calls to external symbols.
llvm-svn: 58893
2008-11-08 07:22:33 +00:00
Evan Cheng
077c8f8832 Skip over two-address use operands.
llvm-svn: 58883
2008-11-08 01:44:13 +00:00
Evan Cheng
ffdd91e3b8 Handle ARM machine constantpool entry with non-lazy ptr.
llvm-svn: 58882
2008-11-08 01:31:27 +00:00
Evan Cheng
ef4d78ba67 More code clean up.
llvm-svn: 58872
2008-11-07 22:57:53 +00:00
Evan Cheng
8467e2459a Get PIC jump table working.
llvm-svn: 58869
2008-11-07 22:30:53 +00:00
Evan Cheng
7095cd2af2 Jump table JIT support. Work in progress.
llvm-svn: 58836
2008-11-07 09:06:08 +00:00
Evan Cheng
98dc53e926 Encode misc arithmetic instructions.
llvm-svn: 58828
2008-11-07 01:41:35 +00:00
Evan Cheng
49d665218c Encode extend instructions; more clean up.
llvm-svn: 58818
2008-11-06 22:15:19 +00:00
Evan Cheng
aa03cd3336 - Improve naming consistency: Branch -> BrFrm, BranchMisc -> BrMiscFrm.
- Consolidate instruction formats.
- Other clean up.

llvm-svn: 58808
2008-11-06 17:48:05 +00:00
Evan Cheng
47b546d75f Remove opcode from instruction TS flags; add MOVCC support; fix addrmode3 encoding bug.
llvm-svn: 58800
2008-11-06 08:47:38 +00:00
Evan Cheng
b870fd8874 Fix so_imm encoding bug; add support for MOVi2pieces.
llvm-svn: 58790
2008-11-06 02:25:39 +00:00
Evan Cheng
2686c8fb34 Fix encoding of multiple instructions with 3 src operands; also handle smmul, smmla, and smmls.
llvm-svn: 58789
2008-11-06 01:21:28 +00:00
Evan Cheng
fd2adbfa28 Encode pic load / store instructions; fix some encoding bugs.
llvm-svn: 58780
2008-11-05 23:22:34 +00:00
Evan Cheng
81889d010c Restructure ARM code emitter to use instruction formats instead of addressing modes to determine how to encode instructions.
llvm-svn: 58764
2008-11-05 18:35:52 +00:00
Evan Cheng
4eaff40147 Debug output tweak.
llvm-svn: 58708
2008-11-04 17:58:53 +00:00
Evan Cheng
6dd08b6604 Handle ARM machine constantpool entries.
llvm-svn: 58671
2008-11-04 00:50:32 +00:00
Jim Grosbach
4d0549e3be Add binary encoding support for multiply instructions. Some blanks left to fill in, but the basics are there.
llvm-svn: 58626
2008-11-03 18:38:31 +00:00
Evan Cheng
20dbb3bcad Use better data structure for ConstPoolId2AddrMap.
llvm-svn: 58532
2008-10-31 19:55:13 +00:00
Evan Cheng
44994e0c77 Actually make debug output understandable.
llvm-svn: 58529
2008-10-31 19:15:52 +00:00
Evan Cheng
467e6e8093 Encode PICADD; some code clean up.
llvm-svn: 58526
2008-10-31 19:10:44 +00:00
Evan Cheng
c696ef9b11 I think we got non-machine specific constpool entries covered.
llvm-svn: 58474
2008-10-30 23:43:36 +00:00
Evan Cheng
19d64ba8bf Correct way to handle CONSTPOOL_ENTRY instructions.
llvm-svn: 58409
2008-10-29 23:55:43 +00:00
Jim Grosbach
ff2b4948ce Support for constant islands in the ARM JIT.
Since the ARM constant pool handling supercedes the standard LLVM constant
pool entirely, the JIT emitter does not allocate space for the constants,
nor initialize the memory. The constant pool is considered part of the 
instruction stream.

Likewise, when resolving relocations into the constant pool, a hook into
the target back end is used to resolve from the constant ID# to the
address where the constant is stored.

For now, the support in the ARM emitter is limited to 32-bit integer. Future
patches will expand this to the full range of constants necessary.

llvm-svn: 58338
2008-10-28 18:25:49 +00:00
Jim Grosbach
c084e84028 Encode the conditional execution predicate when JITing.
llvm-svn: 57258
2008-10-07 19:05:35 +00:00
Jim Grosbach
2fb5c3938b Clarify naming and correct conditional so that CMP and CMN instructions get the Rn operand encoded properly
llvm-svn: 57252
2008-10-07 17:42:09 +00:00
Jim Grosbach
332ad5e016 Indexing off by one resulted in errant encoding of source register for
reg->reg moves.

llvm-svn: 57011
2008-10-03 15:53:56 +00:00
Jim Grosbach
af929abc01 NeedStub/DoesntNeedStub logic was reversed, leading to not using a stub
for global relocations that do need them (libc calls, for example).

llvm-svn: 57010
2008-10-03 15:52:42 +00:00
Dan Gohman
0d1e9a8e04 Switch the MachineOperand accessors back to the short names like
isReg, etc., from isRegister, etc.

llvm-svn: 57006
2008-10-03 15:45:36 +00:00