Commit Graph

199 Commits

Author SHA1 Message Date
Evan Cheng
55173b7646 Avoid unneeded SIB byte encoding. Patch by Zoltan Varga.
llvm-svn: 71520
2009-05-12 00:07:35 +00:00
Dale Johannesen
72b6582c0f Use X86AddrNumOperands instead of magic constant one
more place.  This fixes a bunch of x86-64 JIT regressions.
(Introduced when the value of the magic constant changed
in 68645.  At the time apparently nobody noticed; failures
were hidden in 70343-70439 by an unrelated bug, so showed
up again as "new" failures in 70440.)

llvm-svn: 71106
2009-05-06 19:04:30 +00:00
Evan Cheng
a35aed567a Revert part of 70929 that has to do with determining whether a SIB byte is needed. It causes a lot of x86_64 JIT failures.
llvm-svn: 70986
2009-05-05 18:18:57 +00:00
Evan Cheng
c298ccb998 - Avoid the longer SIB encoding on x86_64 when it's not needed.
- Synchronize instruction length computation code in X86InstrInfo with code in X86CodeEmitter.cpp
Patch by Zoltan Varga.

llvm-svn: 70929
2009-05-04 22:49:16 +00:00
Rafael Espindola
3b2df10c9e Re-apply 68552.
Tested by bootstrapping llvm-gcc and using that to build llvm.

llvm-svn: 68645
2009-04-08 21:14:34 +00:00
Bill Wendling
4aa25b79f9 Temporarily revert r68552. This was causing a failure in the self-hosting LLVM
builds.

--- Reverse-merging (from foreign repository) r68552 into '.':
U    test/CodeGen/X86/tls8.ll
U    test/CodeGen/X86/tls10.ll
U    test/CodeGen/X86/tls2.ll
U    test/CodeGen/X86/tls6.ll
U    lib/Target/X86/X86Instr64bit.td
U    lib/Target/X86/X86InstrSSE.td
U    lib/Target/X86/X86InstrInfo.td
U    lib/Target/X86/X86RegisterInfo.cpp
U    lib/Target/X86/X86ISelLowering.cpp
U    lib/Target/X86/X86CodeEmitter.cpp
U    lib/Target/X86/X86FastISel.cpp
U    lib/Target/X86/X86InstrInfo.h
U    lib/Target/X86/X86ISelDAGToDAG.cpp
U    lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp
U    lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.cpp
U    lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.h
U    lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.h
U    lib/Target/X86/X86ISelLowering.h
U    lib/Target/X86/X86InstrInfo.cpp
U    lib/Target/X86/X86InstrBuilder.h
U    lib/Target/X86/X86RegisterInfo.td

llvm-svn: 68560
2009-04-07 22:35:25 +00:00
Rafael Espindola
1edda06792 Reduce code duplication on the TLS implementation.
This introduces a small regression on the generated code
quality in the case we are just computing addresses, not
loading values.

Will work on it and on X86-64 support.

llvm-svn: 68552
2009-04-07 21:37:46 +00:00
Rafael Espindola
6ff3dabbb4 Have only one definition of X86AddrNumOperands.
llvm-svn: 67949
2009-03-28 18:55:31 +00:00
Rafael Espindola
c2a17d3022 Make code a bit less brittle by no hardcoding the number
of operands in an address in so many places.

llvm-svn: 67945
2009-03-28 17:03:24 +00:00
Evan Cheng
2a332aa866 Re-apply 66024 with fixes: 1. Fixed indirect call to immediate address assembly. 2. Fixed JIT encoding by making the address pc-relative.
llvm-svn: 66803
2009-03-12 18:15:39 +00:00
Evan Cheng
0b77319742 Fix MachineCodeEmitter to use uintptr_t instead of intptr_t. This avoids some overflow issues. Patch by Thomas Jablin.
llvm-svn: 60828
2008-12-10 02:32:19 +00:00
Evan Cheng
dfb97383d5 Eliminate a compile time warning.
llvm-svn: 59677
2008-11-19 23:21:11 +00:00
Dan Gohman
d3b33fea65 Fix indentation.
llvm-svn: 59004
2008-11-10 22:09:58 +00:00
Evan Cheng
9f3058f3be Rename isGVNonLazyPtr to isIndirectSym to reflect how it will be used.
llvm-svn: 58949
2008-11-10 01:08:07 +00:00
Evan Cheng
132de1983f Rename isGVLazyPtr to isGVNonLazyPtr relocation. This represents Mac OS X
indirect gv reference. Please don't call it lazy.

llvm-svn: 58746
2008-11-05 01:50:32 +00:00
Mon P Wang
ef89465c9f x86_64 rip-relative and magic mode address
llvm-svn: 58528
2008-10-31 19:13:42 +00:00
Nicolas Geoffray
db30612fc4 Generate code for TLS instructions.
llvm-svn: 58141
2008-10-25 15:22:06 +00:00
Dan Gohman
712886f561 Fix constant-offset emission for x86-64 absolute addresses. This
fixes a bunch of test-suite JIT failures on x86-64 in
-relocation-model=static mode.

llvm-svn: 58066
2008-10-24 01:57:54 +00:00
Evan Cheng
27c3702267 Fix lfence and mfence encoding. These look like MRM5r and MRM6r instructions except they do not have any operands. The RegModRM byte is encoded with register number 0.
llvm-svn: 57692
2008-10-17 17:14:20 +00:00
Anton Korobeynikov
46a9c01fff Update size of inst correctly with segment override.
llvm-svn: 57414
2008-10-12 10:30:11 +00:00
Duncan Sands
23ee981e8e Fix comment typo.
llvm-svn: 57381
2008-10-11 19:34:24 +00:00
Anton Korobeynikov
2589777f3f Add ability to override segment (mostly for code emitter purposes).
llvm-svn: 57380
2008-10-11 19:09:15 +00:00
Dan Gohman
0d1e9a8e04 Switch the MachineOperand accessors back to the short names like
isReg, etc., from isRegister, etc.

llvm-svn: 57006
2008-10-03 15:45:36 +00:00
Dan Gohman
a79db30d28 Tidy up several unbeseeming casts from pointer to intptr_t.
llvm-svn: 55779
2008-09-04 17:05:41 +00:00
Anton Korobeynikov
f16134141d Allow inline asm nodes with empty bodies inside JIT.
This unbreaks explicit reg vars inside JIT, which are
implemented in such hacky way :)

llvm-svn: 55128
2008-08-21 17:33:01 +00:00
Bill Wendling
75eeeb399e Clean up whitespace.
llvm-svn: 55117
2008-08-21 08:38:54 +00:00
Dale Johannesen
30e5dbb407 Make x86-64 JIT changes Darwin-specific.
llvm-svn: 54700
2008-08-12 21:02:08 +00:00
Dale Johannesen
d4a5e8f74a In the absence of a linker to build the GOT, use the 32-bit
non_lazy_ptr mechanism on x86-64 Darwin JIT.  Fixes a bunch
of last night's failures.

llvm-svn: 54692
2008-08-12 18:23:48 +00:00
Dale Johannesen
dafdbf77b3 Some fixes for x86-64 JIT. Make it use small code
model, except for external calls; this makes
addressing modes PC-relative.  Incomplete.

The assertion at the top of Emitter::runOnMachineFunction
was obviously bogus (always true) so I removed it.
If someone knows what the correct test should be to cover
all the various targets, please fix.

llvm-svn: 54656
2008-08-11 23:46:25 +00:00
Dan Gohman
fb19f9402b Split ISD::LABEL into ISD::DBG_LABEL and ISD::EH_LABEL, eliminating
the need for a flavor operand, and add a new SDNode subclass,
LabelSDNode, for use with them to eliminate the need for a label id
operand.

Change instruction selection to let these label nodes through
unmodified instead of creating copies of them. Teach the MachineInstr
emitter how to emit a MachineInstr directly from an ISD label node.

This avoids the need for allocating SDNodes for the label id and
flavor value, as well as SDNodes for each of the post-isel label,
label id, and label flavor.

llvm-svn: 52943
2008-07-01 00:05:16 +00:00
Evan Cheng
974722b16f runOnMachineFunction should set IsPIC because relocation model may have been changed.
llvm-svn: 51291
2008-05-20 01:56:59 +00:00
Dan Gohman
eabd647cd5 Change target-specific classes to use more precise static types.
This eliminates the need for several awkward casts, including
the last dynamic_cast under lib/Target.

llvm-svn: 51091
2008-05-14 01:58:56 +00:00
Evan Cheng
00bd8d904a - Fix atomic operation JIT encoding.
- Remove unused instructions.

llvm-svn: 49921
2008-04-18 20:55:36 +00:00
Nicolas Geoffray
ae84bbdbed Infrastructure for getting the machine code size of a function and an instruction. X86, PowerPC and ARM are implemented
llvm-svn: 49809
2008-04-16 20:10:13 +00:00
Evan Cheng
6db4b4cc65 Fix x86-64 encoding bug. REX prefix must always follow 0x0F prefix. For example, extractps in 64bit mode: 66 REX 0F 3A 17, not 66 0F 3A REX 17.
llvm-svn: 49157
2008-04-03 08:53:17 +00:00
Evan Cheng
24bc123e80 Unbreak JIT. Ignore TargetInstrInfo::IMPLICIT_DEF.
llvm-svn: 48447
2008-03-17 06:56:52 +00:00
Evan Cheng
0e7b00d79f Replace all target specific implicit def instructions with a target independent one: TargetInstrInfo::IMPLICIT_DEF.
llvm-svn: 48380
2008-03-15 00:03:38 +00:00
Evan Cheng
77c8da7f00 Add debugging stuff.
llvm-svn: 48359
2008-03-14 07:13:42 +00:00
Evan Cheng
3bd59641ac Ignore debugging related instructions if they get this far.
llvm-svn: 47934
2008-03-05 02:34:36 +00:00
Evan Cheng
801bfb2cf7 Rather than asserting. Dump out the MI that we are not able to encode and abort.
llvm-svn: 47933
2008-03-05 02:08:03 +00:00
Andrew Lenharth
0070dd1de3 Add lock prefix support to x86. Also add the instructions necessary for the atomic ops. They are still marked pseudo, since I cannot figure out what format to use, but they are the correct opcode.
llvm-svn: 47795
2008-03-01 13:37:02 +00:00
Bill Wendling
80d6b87934 De-tabify
llvm-svn: 47600
2008-02-26 10:57:23 +00:00
Nicolas Geoffray
21ad494f67 Enable exception handling int JIT
llvm-svn: 47079
2008-02-13 18:39:37 +00:00
Dan Gohman
7a55a94ba1 Avoid needlessly casting away const qualifiers.
llvm-svn: 46877
2008-02-08 03:29:40 +00:00
Chris Lattner
8e60f2c996 IMPLICIT_USE and IMPLICIT_DEF are dead, remove them.
llvm-svn: 45838
2008-01-10 19:27:54 +00:00
Chris Lattner
03ad885039 rename TargetInstrDescriptor -> TargetInstrDesc.
Make MachineInstr::getDesc return a reference instead
of a pointer, since it can never be null.

llvm-svn: 45695
2008-01-07 07:27:27 +00:00
Chris Lattner
f376c99ea0 rename hasVariableOperands() -> isVariadic(). Add some comments.
Evan, please review the comments I added to getNumDefs to make sure
that they are accurate, thx.

llvm-svn: 45687
2008-01-07 05:19:29 +00:00
Chris Lattner
b0d06b4381 Move a bunch more accessors from TargetInstrInfo to TargetInstrDescriptor
llvm-svn: 45680
2008-01-07 03:13:06 +00:00
Chris Lattner
a98c679de0 Rename MachineInstr::getInstrDescriptor -> getDesc(), which reflects
that it is cheap and efficient to get.

Move a variety of predicates from TargetInstrInfo into 
TargetInstrDescriptor, which makes it much easier to query a predicate
when you don't have TII around.  Now you can use MI->getDesc()->isBranch()
instead of going through TII, and this is much more efficient anyway. Not
all of the predicates have been moved over yet.

Update old code that used MI->getInstrDescriptor()->Flags to use the
new predicates in many places.

llvm-svn: 45674
2008-01-07 01:56:04 +00:00
Evan Cheng
880b080887 X86 JIT PIC jumptable support.
llvm-svn: 45616
2008-01-05 02:26:58 +00:00