Commit Graph

3741 Commits

Author SHA1 Message Date
Strahinja Petrovic
7ba5bf5dc7 Fix make-check issues
Fixing build issue for test test/CodeGen/struct-union-BE.c.

llvm-svn: 273675
2016-06-24 13:11:15 +00:00
Strahinja Petrovic
515a1eb44c This patch fixes problem with passing structures and unions
smaller than register as argument in variadic functions on
big endian architectures.
Differential Revision: http://reviews.llvm.org/D21611

llvm-svn: 273665
2016-06-24 12:12:41 +00:00
Dehao Chen
bd3ed3c55b Invoke simplifycfg and sroa before instcombine.
Summary: InstCombine needs to be performed after simplifycfg and sroa, otherwise it may make bad optimization decisions.

Reviewers: davidxl, wmi, dnovillo

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D21568

llvm-svn: 273606
2016-06-23 20:13:10 +00:00
Saleem Abdulrasool
6e9e88b30a CodeGen: support linker options on Windows ARM
We would incorrectly emit the directive sections due to the missing overridden
methods.  We now emit the expected "/DEFAULTLIB" rather than "-l" options for
requested linkage

llvm-svn: 273558
2016-06-23 13:45:33 +00:00
Craig Topper
79f53ca0b5 [AVX512] Replace masked unpack builtins with shufflevector and selects.
llvm-svn: 273533
2016-06-23 06:36:42 +00:00
Hans Wennborg
44d061a471 Add support for /Ob1 and -finline-hint-functions flags
Add support for /Ob1 (and equivalent -finline-hint-functions), which enable
inlining only for functions marked inline, either explicitly (via inline
keyword, for example), or implicitly (function definition in class body,
for example).

This works by enabling inlining pass, and adding noinline attribute to
every function not marked inline.

Patch by Rudy Pons <rudy.pons@ilod.org>!

Differential Revision: http://reviews.llvm.org/D20647

llvm-svn: 273440
2016-06-22 16:56:16 +00:00
Hans Wennborg
9565cf581e Widen EHScope::ClenupBitFields::FixupDepth to avoid overflowing it (PR23490)
It currently only takes 2048 gotos to overflow the FixupDepth bitfield,
causing silent miscompilation. Apparently some parser generators run into
this (see PR).

I don't know that that data structure is terribly size sensitive anyway,
and since there's no room to widen the bitfield, let's just use a separate
word in EHCatchScope for it.

Differential Revision: http://reviews.llvm.org/D21566

llvm-svn: 273434
2016-06-22 16:21:14 +00:00
Michael Zuckerman
716859aa64 [Clang][bmi][intrinsics] Adding _mm_tzcnt_64 _mm_tzcnt_32 intrinsics to clang.
Differential Revision: http://reviews.llvm.org/D21373

llvm-svn: 273401
2016-06-22 12:32:43 +00:00
Craig Topper
08181f795f [AVX512] Fix _mm_setzero_di to not require avx512vl since its used by the avx512dqintrin.h. Also update the avx512dq test to not enable avx512vl feature so we can ensure correct dependencies.
llvm-svn: 273388
2016-06-22 06:36:21 +00:00
Craig Topper
d1691c7026 [AVX512] Replace masked integer cmp and ucmp builtins with native IR.
llvm-svn: 273378
2016-06-22 04:47:58 +00:00
Craig Topper
c56f0f8485 [AVX512] Use correct types for mask parameters in avx512vlbw cmp builtin tests.
llvm-svn: 273377
2016-06-22 04:47:55 +00:00
Peter Collingbourne
aa463c2a18 Require an x86 target for the thinlto_backend.ll test.
llvm-svn: 273361
2016-06-22 01:40:47 +00:00
Peter Collingbourne
2ff9c25d93 Specify a target triple to fix the test on non-Linux.
llvm-svn: 273356
2016-06-22 01:17:30 +00:00
Peter Collingbourne
91227f2195 CodeGen: Replace test/CodeGen/thinlto_backend.c with a functional test.
This new test tests that functions are capable of being imported, rather than
that the import pass is run. This new test is compatible with the approach
being developed in D20268 which runs the importer on its own rather than in
a pass.

Differential Revision: http://reviews.llvm.org/D21542

llvm-svn: 273347
2016-06-22 00:57:26 +00:00
Pirama Arumuga Nainar
a7484c9180 Emit the DWARF tag for the RenderScript language
Summary:
If the RenderScript LangOpt is set, either via '-x renderscript' or the '.rs'
file extension, set the DWARF language tag to be that of RenderScript.

Reviewers: rsmith

Subscribers: cfe-commits, srhines

Differential Revision: http://reviews.llvm.org/D21451

llvm-svn: 273321
2016-06-21 21:35:11 +00:00
Sanjay Patel
a4d156980e [x86] AVX FP compare builtins should require AVX target feature (PR28112)
This is a fix for PR28112:
https://llvm.org/bugs/show_bug.cgi?id=28112

The FP comparison intrinsics that take an immediate parameter (rather than specifying
a comparison predicate in the function name) were added with AVX; these are macros in
avxintrin.h. This patch makes clang behavior match gcc (error if a program tries to use 
these without -mavx) and matches the Intel documentation, eg:
VCMPPS: m128 _mm_cmp_ps(m128 a, __m128 b, const int imm)

'V' means this is intended to only work with the AVX form of the instruction.

Differential Revision: http://reviews.llvm.org/D21306

llvm-svn: 273311
2016-06-21 20:22:55 +00:00
Dehao Chen
1997d8684f Invoke PruneEH pass before Sample Profile pass.
Summary: We need to call PruneEH pass before AutoFDO pass so that some EH-related calls can get inlined in Sample Profile pass.

Reviewers: davidxl, dnovillo

Subscribers: junbuml, llvm-commits

Differential Revision: http://reviews.llvm.org/D21197

llvm-svn: 273298
2016-06-21 19:16:41 +00:00
Artem Belevich
4987dc85b4 [aarch64] Update datalayout for aarch64 tests
This brings the tests in sync with the changes in r273280.

llvm-svn: 273289
2016-06-21 17:35:31 +00:00
Craig Topper
879b0978f4 [AVX512] Move the 128-bit and 256-bit lzcnt intrinsics to avx512vlcdintrin.h where they belong.
llvm-svn: 273249
2016-06-21 06:53:58 +00:00
Simon Pilgrim
03a899957f [X86][XOP] Refreshed builtin tests ready for creation of llvm fast-isel tests
llvm-svn: 273090
2016-06-18 18:20:14 +00:00
Simon Pilgrim
c44a3b9599 [X86][TBM] Refreshed builtin tests ready for creation of llvm fast-isel tests
llvm-svn: 273086
2016-06-18 17:09:40 +00:00
David Majnemer
3370c20c7e [CodeGen] Use pointer-sized integers for ptrtoint sources
Given something like:
void *v = (void *)100;

We need to synthesize a ptrtoint operation from 100.  During constant
emission, we choose i64 as the type for our constant because it
guaranteed not to drop any bits from our CharUnits representation of the
value.  However, this is suboptimal for 32-bit targets: LLVM passes like
GlobalOpt will get confused by these sorts of casts resulting in
pessimization.

Instead, make sure the ptrtoint operand has a pointer-sized integer
type.

llvm-svn: 273020
2016-06-17 17:47:24 +00:00
Simon Pilgrim
d39d026324 [X86][SSE4A] Use native IR for mask movntsd/movntss intrinsics.
Depends on llvm side commit r273002.

llvm-svn: 273003
2016-06-17 14:28:16 +00:00
Ranjeet Singh
ca2b3e7b5c [ARM] Add mrrc/mrrc2 intrinsics and update existing mcrr/mcrr2 intrinsics.
Reapplying patch in r272777 which was reverted
because the llvm patch which added support
for generating the mcrr/mcrr2 instructions
from the intrinsic was causing an assertion
failure. This has now been fixed in llvm.

llvm-svn: 272983
2016-06-17 00:59:41 +00:00
George Burgess IV
419996ccb5 [CodeGen] Fix a segfault caused by pass_object_size.
This patch fixes a bug where we'd segfault (in some cases) if we saw a
variadic function with one or more pass_object_size arguments.

Differential Revision: http://reviews.llvm.org/D17462

llvm-svn: 272971
2016-06-16 23:06:04 +00:00
Sanjay Patel
dbd68dd09d [x86] generate IR for AVX2 integer min/max builtins
Sibling patch to r272932:
http://reviews.llvm.org/rL272932

llvm-svn: 272933
2016-06-16 18:45:01 +00:00
Marcin Koscielnicki
a46fade624 [Builtin] Make __builtin_thread_pointer target-independent.
This is now supported for ARM, AArch64, PowerPC, SystemZ, SPARC, Mips.

Differential Revision: http://reviews.llvm.org/D19589

llvm-svn: 272893
2016-06-16 13:41:54 +00:00
Sanjay Patel
280cfd1a69 [x86] translate SSE packed FP comparison builtins to IR
As noted in the code comment, a potential follow-on would be to remove
the builtins themselves. Other than ord/unord, this already works as 
expected. Eg:

  typedef float v4sf __attribute__((__vector_size__(16)));
  v4sf fcmpgt(v4sf a, v4sf b) { return a > b; }

Differential Revision: http://reviews.llvm.org/D21268

llvm-svn: 272840
2016-06-15 21:20:04 +00:00
Sanjay Patel
7495ec026e [x86] generate IR for SSE integer min/max builtins
Sibling patch to r272806:
http://reviews.llvm.org/rL272806

llvm-svn: 272807
2016-06-15 17:18:50 +00:00
Ranjeet Singh
d48760da64 Reverting r272777 because one of the tests
added in the llvm patch is causing an assertion
to fail.

llvm-svn: 272790
2016-06-15 14:21:28 +00:00
Craig Topper
a54c21e742 [AVX512] Use native IR for mask pcmpeq/pcmpgt intrinsics.
llvm-svn: 272787
2016-06-15 14:06:34 +00:00
Ranjeet Singh
8d5ad5bdf2 [ARM] Add mrrc/mrrc2 intrinsics and update existing mcrr/mcrr2 intrinsics.
Patch adds intrinsics for mrrc/mrrc2. The
intrinsics for mrrc/mrrc2 return a single
uint64_t to represent two 32 bit values.

The mcrr/mcrr2 intrinsic was changed to
accept a single uint64_t instead of two
32 bit values as the input for consistency.

Differential Revision: http://reviews.llvm.org/D21179

llvm-svn: 272777
2016-06-15 11:32:18 +00:00
Peter Collingbourne
bcf909d737 Update clang for D20348
Differential Revision: http://reviews.llvm.org/D20339

llvm-svn: 272710
2016-06-14 21:02:05 +00:00
Hans Wennborg
f8b91f8336 s/Intrin.h/intrin.h/, trying to fix the build after r272701
llvm-svn: 272702
2016-06-14 20:14:24 +00:00
Michael Zuckerman
c49f6ce3e1 [Clang][avx512][Intrinsics] adding prefetch gather intrinsics
Differential Revision: http://reviews.llvm.org/D21322

llvm-svn: 272667
2016-06-14 13:45:17 +00:00
Michael Zuckerman
223676d2cc [Clang][AVX512][intrinsics] Adding missing intrinsics div_pd and div_ps
Differential Revision: http://reviews.llvm.org/D20626

llvm-svn: 272658
2016-06-14 12:38:58 +00:00
Artem Belevich
6530a3e73f Test fix -- use captured call result instead of hardcoded %2.
llvm-svn: 272573
2016-06-13 18:44:22 +00:00
David Majnemer
d423574fde [immintrin] Reimplement _bit_scan_{forward,reverse}
There is no need to use a target-specific intrinsic to implement
_bit_scan_forward or _bit_scan_reverse, reimplementing them using
generic intrinsics makes it more likely that the middle end will
understand what's going on.

llvm-svn: 272564
2016-06-13 17:26:16 +00:00
Asaf Badouh
880f0c252b [X86][AVX512F] bugfix - sqrtps should get __mask16 as mask parameter
CR: Michael Zuckerman
llvm-svn: 272549
2016-06-13 15:15:57 +00:00
Simon Pilgrim
beca5f295c [Clang][X86] Convert non-temporal store builtins to generic __builtin_nontemporal_store in headers
We can now use __builtin_nontemporal_store instead of target specific builtins for naturally aligned nontemporal stores which avoids the need for handling in CGBuiltin.cpp

The scalar integer nontemporal (unaligned) store builtins will have to wait as __builtin_nontemporal_store currently assumes natural alignment and doesn't accept the 'packed struct' trick that we use for normal unaligned load/stores.

The nontemporal loads require further backend support before we can safely convert them to __builtin_nontemporal_load

Differential Revision: http://reviews.llvm.org/D21272

llvm-svn: 272540
2016-06-13 09:57:52 +00:00
Craig Topper
fc07498e4a [AVX512] Masked pcmpeqd, pcmpeqq, pcmpgtd, and pcmpgtq don't require avx512bw, just avx512vl.
llvm-svn: 272532
2016-06-13 04:15:11 +00:00
Simon Pilgrim
778a7eddb5 [X86][BMI] Improved bmi intrinsics checks
Ready for matching with llvm/test/CodeGen/X86/bmi-intrinsics-fast-isel.ll (to be added shortly)

llvm-svn: 272490
2016-06-11 22:40:01 +00:00
Craig Topper
46422562f5 [AVX512] Use a regular expression instead of checking for a specific name in a CHECK line in test.
llvm-svn: 272470
2016-06-11 13:35:43 +00:00
Craig Topper
7cc9263ec2 [AVX512] Implement masked and 512-bit pshufd intrinsics directly with __builtin_shufflevector and __builtin_ia32_select.
llvm-svn: 272467
2016-06-11 12:50:19 +00:00
Chandler Carruth
c41e081f71 Fix this test to handle NDEBUG builds which don't have a name for the
basic block.

llvm-svn: 272456
2016-06-11 06:32:56 +00:00
Craig Topper
68738332b8 [AVX512] Implement 512-bit and masked shufflelo and shufflehi intrinsics directly with __builtin_shufflevector and __builtin_ia32_select. Also improve the formatting of the AVX2 version.
llvm-svn: 272452
2016-06-11 03:31:13 +00:00
Craig Topper
d4273a425e [AVX512] Add _mm512_bsrli_epi128 and _mm512_bslli_epi128 intrinsics.
llvm-svn: 272451
2016-06-11 03:31:07 +00:00
Pirama Arumuga Nainar
8b788d013c RenderScript support in the Frontend
Summary:

Create a new Frontend LangOpt to specify the renderscript language. It
is enabled by the "-x renderscript" option from the driver.

Add a "kernel" function attribute only for RenderScript (an "ignored
attribute" warning is generated otherwise).

Make the NativeHalfType and NativeHalfArgsAndReturns LangOpts be implied
by the RenderScript LangOpt.

Reviewers: rsmith

Subscribers: cfe-commits, srhines

Differential Revision: http://reviews.llvm.org/D21198

llvm-svn: 272342
2016-06-09 23:34:20 +00:00
Craig Topper
2769bb5753 [X86] Handle AVX2 pslldqi and psrldqi intrinsics shufflevector creation directly in the header file instead of in CGBuiltin.cpp. Simplify the sse2 equivalents as well.
llvm-svn: 272246
2016-06-09 05:15:12 +00:00
Vitaly Buka
9d1b12c091 Specify target in lifetime-asan test.
Summary: Some target platforms -fsanitize=address.

Reviewers: pcc, eugenis

Subscribers: cfe-commits, christof, chapuni, kubabrecka

Differential Revision: http://reviews.llvm.org/D21117

llvm-svn: 272185
2016-06-08 18:18:08 +00:00