Chris Lattner
90f4238c38
add a hook to allow targets to hack on inline asms to lower them to llvm
...
when they want to.
llvm-svn: 31997
2006-11-29 01:12:32 +00:00
Bill Wendling
5c3966aa68
Converted to using llvm streams instead of <iostream>s
...
llvm-svn: 31992
2006-11-29 00:39:47 +00:00
Bill Wendling
787b77320f
Use llvm streams instead of <iostream>
...
llvm-svn: 31985
2006-11-28 22:48:48 +00:00
Bill Wendling
bc0d5f8bcb
Put the #include for a module first.
...
llvm-svn: 31958
2006-11-28 03:31:29 +00:00
Evan Cheng
b2a6b0dbad
Clean up.
...
llvm-svn: 31957
2006-11-28 02:25:34 +00:00
Bill Wendling
3f6f0fd028
Changed to using llvm streams.
...
llvm-svn: 31954
2006-11-28 02:08:17 +00:00
Chris Lattner
3abb63651b
Fix PR1016
...
llvm-svn: 31950
2006-11-28 01:03:30 +00:00
Evan Cheng
20350c4025
Change MachineInstr ctor's to take a TargetInstrDescriptor reference instead
...
of opcode and number of operands.
llvm-svn: 31947
2006-11-27 23:37:22 +00:00
Chris Lattner
5d5916b4d1
Fix the dag combiner bug corresponding to PR1014.
...
llvm-svn: 31943
2006-11-27 21:50:02 +00:00
Chris Lattner
3da631f29a
For better or worse, load from i1 is assumed to be zero extended. Do not
...
form a load from i1 from larger loads that may not be zext'd.
llvm-svn: 31933
2006-11-27 04:40:53 +00:00
Chris Lattner
db18938355
If a brcond condition is promoted, make sure to zero extend it, even if not
...
expanded into BR_CC.
llvm-svn: 31932
2006-11-27 04:39:56 +00:00
Reid Spencer
6c38f0bb07
For PR950:
...
The long awaited CAST patch. This introduces 12 new instructions into LLVM
to replace the cast instruction. Corresponding changes throughout LLVM are
provided. This passes llvm-test, llvm/test, and SPEC CPUINT2000 with the
exception of 175.vpr which fails only on a slight floating point output
difference.
llvm-svn: 31931
2006-11-27 01:05:10 +00:00
Jim Laskey
d7f53cdaec
Global label not handled correctly.
...
llvm-svn: 31883
2006-11-20 20:29:06 +00:00
Chris Lattner
3676a994ca
Fix PR1011 and CodeGen/Generic/2006-11-20-DAGCombineCrash.ll
...
llvm-svn: 31878
2006-11-20 18:05:46 +00:00
Chris Lattner
539df43e4b
setOperand should not zap the operand list or add implicit operands to an
...
instruction. Doing so breaks the FP stackifier, the alpha branch selector
the sparc fpmover.
This fixes PR1012 and CodeGen/X86/fp-stack-compare.ll
llvm-svn: 31876
2006-11-20 17:57:22 +00:00
Reid Spencer
d9436b6837
For PR950:
...
First in a series of patches to convert SetCondInst into ICmpInst and
FCmpInst using only two opcodes and having the instructions contain their
predicate value. Nothing uses these classes yet. More patches to follow.
llvm-svn: 31867
2006-11-20 01:22:35 +00:00
Chris Lattner
ea017f66f7
Don't transform in another bad case: if the block is empty, it should be
...
simplified before we do this xform so that our cost model is accurate.
llvm-svn: 31864
2006-11-18 22:25:39 +00:00
Chris Lattner
56ec81ff73
Fix another case we *don't* want to do this xform.
...
llvm-svn: 31861
2006-11-18 21:56:39 +00:00
Chris Lattner
ace542fa6c
Implement operator<< for machine basic blocks to make it easier to dump them.
...
llvm-svn: 31857
2006-11-18 21:47:36 +00:00
Chris Lattner
7acdc17fe4
make the previous change more aggressive, moving any block with no fallthrough.
...
This speeds up yacr2 by 7% on a core2.
llvm-svn: 31856
2006-11-18 21:30:35 +00:00
Chris Lattner
47ce26158f
Minor code layout tweak: if we have something like this:
...
if (cond) goto BB2
BB1:
...
return;
BB2:
...
Move BB1 to the end of the function so that the code falls through in the
non-return case. This has the effect of moving assert (and other no-return
call) bodies and return blocks out of loops.
llvm-svn: 31855
2006-11-18 20:47:54 +00:00
Jim Laskey
da0add3fd0
Fixing the ENABLE_OPTIMIZED=1 DISABLE_ASSERTIONS=1 build.
...
llvm-svn: 31822
2006-11-17 13:07:55 +00:00
Bill Wendling
9d46fcd59c
More removal of std::cerr and DEBUG, replacing with DOUT instead.
...
llvm-svn: 31806
2006-11-17 02:09:07 +00:00
Bill Wendling
d108b9a60d
Replace std::cerr uses of the "DEBUG" macro with "DOUT" instead. Removes
...
a #include of iostream.
llvm-svn: 31800
2006-11-17 00:50:36 +00:00
Bill Wendling
8969ebca44
*** empty log message ***
...
llvm-svn: 31789
2006-11-16 20:11:33 +00:00
Evan Cheng
9fd73b8a7f
Match MachineCodeEmitter changes.
...
llvm-svn: 31787
2006-11-16 20:04:04 +00:00
Bill Wendling
d811cc6818
Don't recompute getNumOperands for each iteration.
...
llvm-svn: 31783
2006-11-16 07:35:18 +00:00
Bill Wendling
c7969fd1e7
Added a new method "CreateNewLiveInterval" which, given a list of
...
LiveRanges, creates a new LiveInterval from them. The LiveRanges should
have existed already in another LiveInterval, but removed.
llvm-svn: 31780
2006-11-16 02:41:50 +00:00
Chris Lattner
e0a70388c2
enable the branch folding pass for the JIT.
...
llvm-svn: 31777
2006-11-16 01:00:07 +00:00
Evan Cheng
f64da389f8
Fix an incorrectly inverted condition.
...
llvm-svn: 31773
2006-11-16 00:08:20 +00:00
Evan Cheng
0ffff1c629
Match live variable changes.
...
llvm-svn: 31762
2006-11-15 20:55:15 +00:00
Evan Cheng
ebb0357b4c
Minor updates.
...
llvm-svn: 31761
2006-11-15 20:54:29 +00:00
Evan Cheng
12ea213de9
A register def can be partially dead when the whole register has use(s) but a subreg does not.
...
llvm-svn: 31760
2006-11-15 20:54:11 +00:00
Evan Cheng
70ec52896e
Do away with kill / dead maps. Move kill / dead info onto MI's.
...
llvm-svn: 31759
2006-11-15 20:51:59 +00:00
Chris Lattner
2775aba51d
Simplify IntrinsicLowering and clarify that it is only for use by the
...
CBE and interpreter.
llvm-svn: 31755
2006-11-15 18:00:10 +00:00
Chris Lattner
30d08801ef
remove dead #include
...
llvm-svn: 31753
2006-11-15 17:51:15 +00:00
Evan Cheng
dbd3d294e6
Matches MachineInstr changes.
...
llvm-svn: 31712
2006-11-13 23:36:35 +00:00
Evan Cheng
77af6ac5e8
- Let MachineInstr ctors add implicit def and use operands. Other operands
...
will be inserted before these operands. If the opcode changes (by
setOpcode), the implicit operands are updated as well.
- Added IsKill, IsDead fields to MachineOperand in preparation for changes
that move kill / dead info to MachineInstr's.
llvm-svn: 31711
2006-11-13 23:34:06 +00:00
Reid Spencer
2230144a75
Make an assert comment match the tested assertion.
...
llvm-svn: 31686
2006-11-11 20:07:59 +00:00
Evan Cheng
979bbf48d5
Add methods to add implicit def use operands to a MI.
...
llvm-svn: 31675
2006-11-11 10:20:02 +00:00
Chris Lattner
a0a8003f59
disallow preinc of a frameindex. This is not profitable and causes 2-addr
...
pass to explode. This fixes a bunch of llc-beta failures on ppc last night.
llvm-svn: 31661
2006-11-11 01:00:15 +00:00
Chris Lattner
eabc15c1d8
reduce indentation by using early exits. No functionality change.
...
llvm-svn: 31660
2006-11-11 00:56:29 +00:00
Chris Lattner
ffad2166e1
move big chunks of code out-of-line, no functionality change.
...
llvm-svn: 31658
2006-11-11 00:39:41 +00:00
Chris Lattner
4eac5f59e6
Fix a dag combiner bug exposed by my recent instcombine patch. This fixes
...
CodeGen/Generic/2006-11-10-DAGCombineMiscompile.ll and PPC gsm/toast
llvm-svn: 31644
2006-11-10 21:37:15 +00:00
Evan Cheng
8c9c6d71ed
Add implicit def / use operands to MachineInstr.
...
llvm-svn: 31633
2006-11-10 08:43:01 +00:00
Evan Cheng
13440b025c
When forming a pre-indexed store, make sure ptr isn't the same or is a pred of value being stored. It would cause a cycle.
...
llvm-svn: 31631
2006-11-10 08:28:11 +00:00
Chris Lattner
d5e604dbb2
commentate
...
llvm-svn: 31627
2006-11-10 04:41:34 +00:00
Evan Cheng
6878378390
Don't attempt expensive pre-/post- indexed dag combine if target does not support them.
...
llvm-svn: 31598
2006-11-09 19:10:46 +00:00
Evan Cheng
d550248f2c
Add a mechanism to specify whether a target supports a particular indexed load / store.
...
llvm-svn: 31597
2006-11-09 18:56:43 +00:00
Evan Cheng
c034f14fbe
Rename ISD::MemOpAddrMode to ISD::MemIndexedMode
...
llvm-svn: 31596
2006-11-09 18:44:21 +00:00