caio/clang-p2996
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
31,724 Commits 1 Branch 0 Tags
da17029218cf0c19cf0341dda1ba557471e33871
Commit Graph

3543 Commits

Author SHA1 Message Date
Evan Cheng
9a2a7b174a Don't add the same MI to register reuse "last def/use" twice if it reads the 
register more than once.

llvm-svn: 35513
 2007-03-30 20:21:35 +00:00
Evan Cheng
48dd5e7d44 Bug fix for PR1279. When isDead is propagate by copy coalescing, we keep length 
of dead def live interval at 1 to avoid multiple def's targeting the same
register. The previous patch missed a case where the source operand is live-in.
In that case, remove the whole interval.

llvm-svn: 35512
 2007-03-30 20:18:35 +00:00
Evan Cheng
ccee35fd0d Disable load width reduction xform of variant (zext (truncate load x)) for 
big endian targets until llvm-gcc build issue has been resolved.

llvm-svn: 35449
 2007-03-29 07:56:46 +00:00
Evan Cheng
86de3a009d New entries. 
llvm-svn: 35445
 2007-03-29 02:48:56 +00:00
Evan Cheng
d771485d89 Notes on re-materialization. 
llvm-svn: 35420
 2007-03-28 08:30:04 +00:00
Evan Cheng
603e49c6da Move rematerialization out of beta. 
llvm-svn: 35419
 2007-03-28 08:26:40 +00:00
Evan Cheng
4388043b25 Scale 1 is always ok. 
llvm-svn: 35407
 2007-03-28 01:55:52 +00:00
Evan Cheng
c2cba18f2b Remove isLegalAddressImmediate. 
llvm-svn: 35406
 2007-03-28 01:53:55 +00:00
Evan Cheng
07c42d43a2 GEP index sinking fixes: 
1) Take address scale into consideration. e.g. i32* -> scale 4.
2) Examine all the users of GEP.
3) Generalize to inter-block GEP's (no longer uses loopinfo).
4) Don't do xform if GEP has other variable index(es).

llvm-svn: 35403
 2007-03-28 01:49:39 +00:00
Evan Cheng
b41697c006 Fix for PR1279. Dead def has a live interval of length 1. Copy coalescing should 
not violate that.

llvm-svn: 35396
 2007-03-28 01:30:37 +00:00
Anton Korobeynikov
37a0bfe128 Remove dead code 
llvm-svn: 35380
 2007-03-27 12:05:48 +00:00
Anton Korobeynikov
3a9d68181a Split big monster into small helpers. No functionality change. 
llvm-svn: 35379
 2007-03-27 11:29:11 +00:00
Evan Cheng
c42406b5ad SDISel does not preserve all, it changes CFG and other info. 
llvm-svn: 35376
 2007-03-27 00:53:36 +00:00
Evan Cheng
fdbdf43632 Don't call getOperandConstraint() if operand index is greater than 
TID->numOperands.

llvm-svn: 35375
 2007-03-27 00:48:28 +00:00
Evan Cheng
4a09b1b5be Fix for PR1266. Don't mark a two address operand IsKill. 
llvm-svn: 35365
 2007-03-26 22:40:42 +00:00
Evan Cheng
ec3ac316e2 Change findRegisterUseOperand() to return operand index instead. 
llvm-svn: 35363
 2007-03-26 22:37:45 +00:00
Dale Johannesen
fd18a0cdf4 Fix reversed logic in getRegsUsed. Rename RegStates to RegsAvailable to 
hopefully forestall similar errors.

llvm-svn: 35362
 2007-03-26 22:23:54 +00:00
Evan Cheng
8275f0e0af SIGN_EXTEND_INREG requires one extra operand, a ValueType node. 
llvm-svn: 35350
 2007-03-26 07:12:51 +00:00
Anton Korobeynikov
7037826c86 First step of switch lowering refactoring: perform worklist-driven 
strategy, emit JT's where possible.

llvm-svn: 35338
 2007-03-25 15:07:15 +00:00
Chris Lattner
77f0479833 Implement support for vector operands to inline asm, implementing 
CodeGen/X86/2007-03-24-InlineAsmVectorOp.ll

llvm-svn: 35332
 2007-03-25 05:00:54 +00:00
Chris Lattner
3d7efa2586 implement initial support for the silly X constraint. Testcase here: CodeGen/X86/2007-03-24-InlineAsmXConstraint.ll 
llvm-svn: 35327
 2007-03-25 04:35:41 +00:00
Chris Lattner
843e44503c Implement CodeGen/X86/2007-03-24-InlineAsmMultiRegConstraint.ll 
llvm-svn: 35324
 2007-03-25 02:18:14 +00:00
Chris Lattner
d685514e2e switch TargetLowering::getConstraintType to take the entire constraint, 
not just the first letter.  No functionality change.

llvm-svn: 35322
 2007-03-25 02:14:49 +00:00
Chris Lattner
2a991268f7 don't rely on ADL 
llvm-svn: 35299
 2007-03-24 17:37:03 +00:00
Evan Cheng
b7051f596a Adjust offset to compensate for big endian machines. 
llvm-svn: 35293
 2007-03-24 00:02:43 +00:00
Evan Cheng
a883b58caf Make sure SEXTLOAD of the specific type is supported on the target. 
llvm-svn: 35289
 2007-03-23 22:13:36 +00:00
Evan Cheng
e2f5f24e8e Also replace uses of SRL if that's also folded during ReduceLoadWidth(). 
llvm-svn: 35286
 2007-03-23 20:55:21 +00:00
Evan Cheng
a824e79f06 A couple of bug fixes for reducing load width xform: 
1. Address offset is in bytes.
2. Make sure truncate node uses are replaced with new load.

llvm-svn: 35274
 2007-03-23 02:16:52 +00:00
Dan Gohman
dcb291faa4 Change uses of Function::front to Function::getEntryBlock for readability. 
llvm-svn: 35265
 2007-03-22 16:38:57 +00:00
Evan Cheng
464dc9b74c More opportunities to reduce load size. 
llvm-svn: 35254
 2007-03-22 01:54:19 +00:00
Evan Cheng
a20815e157 Fix for PR1257. Bug in live range shortening as a result of copy coalescing 
where the destination is dead.

llvm-svn: 35252
 2007-03-22 01:26:05 +00:00
Dale Johannesen
0c6bb5eab7 repair x86 performance, dejagnu problems from previous change 
llvm-svn: 35245
 2007-03-21 21:51:52 +00:00
Evan Cheng
d63baead9b fold (truncate (srl (load x), c)) -> (smaller load (x+c/vt bits)) 
llvm-svn: 35239
 2007-03-21 20:14:05 +00:00
Evan Cheng
3578dd61c6 Potential spiller improvement. 
llvm-svn: 35228
 2007-03-20 22:22:38 +00:00
Dale Johannesen
bacf4acf65 do not share old induction variables when this would result in invalid 
instructions (that would have to be split later)

llvm-svn: 35227
 2007-03-20 21:54:54 +00:00
Dale Johannesen
d05a1a2ade maintain LiveIn when splitting blocks (register scavenging needs it) 
llvm-svn: 35226
 2007-03-20 21:35:06 +00:00
Jeff Cohen
1baf5c84ab Fix some VC++ warnings. 
llvm-svn: 35224
 2007-03-20 20:43:18 +00:00
Lauro Ramos Venancio
971aa18867 Code clean up. 
llvm-svn: 35220
 2007-03-20 20:09:03 +00:00
Evan Cheng
550cf0369c Minor bug. 
llvm-svn: 35219
 2007-03-20 19:32:11 +00:00
Lauro Ramos Venancio
25878b45f5 CopyToReg source operand can be a physical register. 
llvm-svn: 35213
 2007-03-20 16:46:44 +00:00
Evan Cheng
0e3278e505 First cut trivial re-materialization support. 
llvm-svn: 35208
 2007-03-20 08:13:50 +00:00
Evan Cheng
25d00d545d Remove -reduce-joining-phys-regs options. Make it on by default. 
llvm-svn: 35165
 2007-03-19 18:08:26 +00:00
Evan Cheng
c5e74f6404 Minor bug fix. 
llvm-svn: 35153
 2007-03-19 04:22:35 +00:00
Evan Cheng
d8f2e4fe4c - Merge UsedBlocks info after two virtual registers are coalesced. 
- Use distance to closest use to determine whether to abort coalescing.

llvm-svn: 35141
 2007-03-18 09:05:55 +00:00
Evan Cheng
5382426577 Keep UsedBlocks info accurate. 
llvm-svn: 35140
 2007-03-18 09:02:31 +00:00
Evan Cheng
f6f043332f Track the BB's where each virtual register is used. 
llvm-svn: 35135
 2007-03-17 09:29:54 +00:00
Evan Cheng
7b2a001669 Joining a live interval of a physical register with a virtual one can turn out 
to be really bad. Once they are joined they are not broken apart. Also, physical
intervals cannot be spilled!

Added a heuristic as a workaround for this. Be careful coalescing with a
physical register if the virtual register uses are "far". Check if there are
uses in the same loop as the source (copy instruction). Check if it is in the
loop preheader, etc.

llvm-svn: 35134
 2007-03-17 09:27:35 +00:00
Evan Cheng
a2465dfc07 Use SmallSet instead of std::set. 
llvm-svn: 35133
 2007-03-17 08:53:30 +00:00
Evan Cheng
be22235790 If sdisel has decided to sink GEP index expression into any BB. Replace all uses 
in that BB.

llvm-svn: 35132
 2007-03-17 08:22:49 +00:00
Evan Cheng
c5bc763f50 Turn on GEP index sinking by default. 
llvm-svn: 35127
 2007-03-16 18:32:30 +00:00