Commit Graph

230 Commits

Author SHA1 Message Date
Chris Lattner
5aba6ae3b3 Enable global address legalization, fixing a todo and allowing the removal
of some code.  This exposes the implicit load from the stubs to the DAG, allowing
them to be optimized by the dag combiner.  It also moves darwin specific stuff
out of the isel into the legalizer, and allows more to be moved to the .td file.

llvm-svn: 24397
2005-11-17 18:26:56 +00:00
Chris Lattner
0fe88e3f32 Teach the selector to fold lo(g) into load instruction immediate fields
llvm-svn: 24396
2005-11-17 18:02:16 +00:00
Chris Lattner
595088aa0f Add an initial hack at legalizing GlobalAddress into the appropriate nodes
on Darwin to remove smarts from the isel.  This is currently disabled by
default (uncomment setOperationAction(ISD::GlobalAddress to enable it).
tblgen needs to become smarter about tglobaladdr nodes and bigger patterns
needed to be added to the .td file.  However, we can currently emit stuff like
this:  :)

        li r2, lo16(L_x$non_lazy_ptr)
        lis r3, ha16(L_x$non_lazy_ptr)
        lwzx r2, r3, r2

The obvious improvements will follow.

llvm-svn: 24390
2005-11-17 07:30:41 +00:00
Chris Lattner
b7025749e1 When lowering direct calls, lower them to use a targetglobaladress directly
instead of a globaladdress.  This has no effect on the generated code at all.

llvm-svn: 24386
2005-11-17 05:56:14 +00:00
Nate Begeman
a171f6b20c Patch to clean up function call pseudos and support the BLA instruction,
which branches to an absolute address.  This is required to support objc
direct dispatch.

llvm-svn: 24370
2005-11-16 00:48:01 +00:00
Chris Lattner
7ca53a5783 Don't emit "32" for unordered comparison
llvm-svn: 24073
2005-10-28 22:58:07 +00:00
Chris Lattner
f8899a6877 add a hack to get code with ordered comparisons working. This hack is
tracked as PR642

llvm-svn: 24068
2005-10-28 20:49:47 +00:00
Chris Lattner
5d6cb604de add support for branch on ordered/unordered.
llvm-svn: 24067
2005-10-28 20:32:44 +00:00
Chris Lattner
81ff73ec46 autogen undef
llvm-svn: 23991
2005-10-25 21:03:41 +00:00
Chris Lattner
261009a4df Autogen fsel
llvm-svn: 23987
2005-10-25 20:55:47 +00:00
Chris Lattner
cd7f101c9a Autogen a few new ppc-specific nodes
llvm-svn: 23985
2005-10-25 20:41:46 +00:00
Chris Lattner
26ee5953f7 The dag isel generator generates this now
llvm-svn: 23984
2005-10-25 20:36:10 +00:00
Chris Lattner
c0a201c318 Be a bit more paranoid about calling SelectNodeTo
llvm-svn: 23982
2005-10-25 20:26:41 +00:00
Chris Lattner
e1fd05ebde Fix a couple of minor bugs. The first fixes povray, the second fixes things
if the dag combiner isn't run

llvm-svn: 23981
2005-10-25 19:32:37 +00:00
Chris Lattner
e296949fbe Instead of aborting if not a case we can handle specially, break out and
let the generic code handle it.  This fixes CodeGen/Generic/2005-10-21-longlonggtu.ll on ppc.

also, reindent this code

llvm-svn: 23874
2005-10-21 21:17:10 +00:00
Nate Begeman
4dd383120f Invert the TargetLowering flag that controls divide by consant expansion.
Add a new flag to TargetLowering indicating if the target has really cheap
  signed division by powers of two, make ppc use it.  This will probably go
  away in the future.
Implement some more ISD::SDIV folds in the dag combiner
Remove now dead code in the x86 backend.

llvm-svn: 23853
2005-10-21 00:02:42 +00:00
Nate Begeman
c6f067a8c4 Move the target constant divide optimization up into the dag combiner, so
that the nodes can be folded with other nodes, and we can not duplicate
code in every backend.  Alpha will probably want this too.

llvm-svn: 23835
2005-10-20 02:15:44 +00:00
Nate Begeman
9f3c26c4ea Write patterns for the various shl and srl patterns that don't involve
doing something clever.

llvm-svn: 23824
2005-10-19 18:42:01 +00:00
Chris Lattner
5b6f4dc623 Convert these cases to patterns
llvm-svn: 23811
2005-10-19 01:38:02 +00:00
Nate Begeman
9eaa6bac06 Woo, it kinda works. We now generate this atrociously bad, but correct,
code for long long foo(long long a, long long b) { return a + b; }

_foo:
        or r2, r3, r3
        or r3, r4, r4
        or r4, r5, r5
        or r5, r6, r6
        rldicr r2, r2, 32, 31
        rldicl r3, r3, 0, 32
        rldicr r4, r4, 32, 31
        rldicl r5, r5, 0, 32
        or r2, r3, r2
        or r3, r5, r4
        add r4, r3, r2
        rldicl r2, r4, 32, 32
        or r4, r4, r4
        or r3, r2, r2
        blr

llvm-svn: 23809
2005-10-19 01:12:32 +00:00
Nate Begeman
92e77502f3 Make a new reg class for 64 bit regs that aliases the 32 bit regs. This
will have to tide us over until we get real subreg support, but it prevents
the PrologEpilogInserter from spilling 8 byte GPRs on a G4 processor.

Add some initial support for TRUNCATE and ANY_EXTEND, but they don't
currently work due to issues with ScheduleDAG.  Something wll have to be
figured out.

llvm-svn: 23803
2005-10-19 00:05:37 +00:00
Nate Begeman
78afac2ddd Add the ability to lower return instructions to TargetLowering. This
allows us to lower legal return types to something else, to meet ABI
requirements (such as that i64 be returned in two i32 regs on Darwin/ppc).

llvm-svn: 23802
2005-10-18 23:23:37 +00:00
Nate Begeman
0b71e007ef First bits of 64 bit PowerPC stuff, currently disabled. A lot of this is
purely mechanical.

llvm-svn: 23778
2005-10-18 00:28:58 +00:00
Nate Begeman
6cca84e43c More PPC32 -> PPC changes, as well as merging some classes that were
redundant after the change.

llvm-svn: 23759
2005-10-16 05:39:50 +00:00
Chris Lattner
d869bec4fe Remove some dead code: the ORI/ORIS cases are autogen'd. This makes
SelectIntImmediateExpr dead.

llvm-svn: 23753
2005-10-15 22:06:18 +00:00
Chris Lattner
a52969c8d6 These instructions are now autogenerated
llvm-svn: 23751
2005-10-15 21:44:56 +00:00
Chris Lattner
efa382616b remove dead code
llvm-svn: 23749
2005-10-15 21:40:12 +00:00
Chris Lattner
6f3b954662 Rename PPC32*.h to PPC*.h
This completes the grand PPC file renaming

llvm-svn: 23745
2005-10-14 23:59:06 +00:00
Chris Lattner
bfca1ab79d Rename PowerPC*.h to PPC*.h
llvm-svn: 23743
2005-10-14 23:51:18 +00:00
Chris Lattner
0921e3bfc1 Eliminate PowerPC.td and PPC32.td, consolidating them into PPC.td
llvm-svn: 23738
2005-10-14 23:37:35 +00:00
Chris Lattner
7d9f719d42 These are now autogenerated
llvm-svn: 23731
2005-10-14 06:26:29 +00:00
Chris Lattner
89c7fa22b1 Disable formation of rlwinm instructions from SRA bases. This fixes
the 177.mesa failure from last night, and fixes the
CodeGen/PowerPC/2005-10-08-ArithmeticRotate.ll regression test I added.
If this code cannot be fixed, it should be removed for good, but I'll leave
it to Nate to decide its fate.

llvm-svn: 23670
2005-10-09 05:36:17 +00:00
Chris Lattner
dae96f8881 When preselecting, favor things that have low depth to select first. This
is faster and uses less stack space.  This reduces our stack requirement
enough to compile sixtrack, and though it's a hack, should be enough until
we switch to iterative isel

llvm-svn: 23664
2005-10-07 22:10:27 +00:00
Chris Lattner
318622fb9f Pull out Call, reducing stack frame size from 6032 bytes to 5184 bytes.
llvm-svn: 23650
2005-10-06 19:07:45 +00:00
Chris Lattner
491b8294f4 Pull out setcc, this reduces stack frame size from 7520 to 6032 bytes
llvm-svn: 23649
2005-10-06 19:03:35 +00:00
Chris Lattner
502a36935e Pull two more methods out, reducing stack frame size from 8224 -> 7520 bytes
llvm-svn: 23648
2005-10-06 18:56:10 +00:00
Chris Lattner
259e6c76f2 Add a recursive-iterative hybrid stage to attempt to reduce stack space, this
helps but not enough.

Start pulling cases out of PPC32DAGToDAGISel::Select.  With GCC 4, this function
required 8512 bytes of stack space for each invocation (GCC 3 required less
than 700 bytes).  Pulling this first function out gets us down to 8224.  More
to come :(

llvm-svn: 23647
2005-10-06 18:45:51 +00:00
Chris Lattner
3734d204b8 another solution to the fsel issue. Instead of having 4 variants, just force
the comparison to be 64-bits.  This is fine because extensions from float
to double are free.

llvm-svn: 23589
2005-10-02 07:07:49 +00:00
Chris Lattner
9e98672962 fsel can take a different FP type for the comparison and for the result. As such
split the FSEL family into 4 things instead of just two.

llvm-svn: 23588
2005-10-02 06:58:23 +00:00
Chris Lattner
5ab9d42bb4 Minor tweak to the branch selector. When emitting a two-way branch, and if
we're in a single-mbb loop, make sure to emit the backwards branch as the
conditional branch instead of the uncond branch.  For example, emit this:

LBBl29_z__44:
        stw r9, 0(r15)
        stw r9, 4(r15)
        stw r9, 8(r15)
        stw r9, 12(r15)
        addi r15, r15, 16
        addi r8, r8, 1
        cmpw cr0, r8, r28
        ble cr0, LBBl29_z__44
        b LBBl29_z__48                   *** NOT PART OF LOOP

Instead of:

LBBl29_z__44:
        stw r9, 0(r15)
        stw r9, 4(r15)
        stw r9, 8(r15)
        stw r9, 12(r15)
        addi r15, r15, 16
        addi r8, r8, 1
        cmpw cr0, r8, r28
        bgt cr0, LBBl29_z__48            *** PART OF LOOP!
        b LBBl29_z__44

The former sequence has one fewer dispatch group for the loop body.

llvm-svn: 23582
2005-10-01 23:06:26 +00:00
Chris Lattner
8713ebf37c fix typo
llvm-svn: 23578
2005-10-01 02:51:36 +00:00
Chris Lattner
d3eee1a09b Modify the ppc backend to use two register classes for FP: F8RC and F4RC.
These are used to represent float and double values, and the two regclasses
contain the same physical registers.

llvm-svn: 23577
2005-10-01 01:35:02 +00:00
Jim Laskey
f61232354f Should be using flag and not chain.
llvm-svn: 23572
2005-09-30 23:43:37 +00:00
Chris Lattner
1de5706e68 Remove code for patterns that are autogenerated
llvm-svn: 23532
2005-09-29 23:33:31 +00:00
Chris Lattner
08c319fbdd Never rely on ReplaceAllUsesWith when selecting, use CodeGenMap instead.
ReplaceAllUsesWith does not replace scalars SDOperand floating around on
the stack, permitting things to be selected multiple times.

llvm-svn: 23515
2005-09-29 00:59:32 +00:00
Chris Lattner
b9b2e77295 Autogen MUL, move FP cases together
llvm-svn: 23512
2005-09-28 22:53:16 +00:00
Chris Lattner
5769311c92 disentangle FP from INT versions of div/mul
llvm-svn: 23511
2005-09-28 22:50:24 +00:00
Chris Lattner
585131baaf Use the autogenerated matcher for ADD/SUB
llvm-svn: 23510
2005-09-28 22:47:28 +00:00
Chris Lattner
d3ea19b51a Add FP versions of the binary operators, keeping the int and fp worlds seperate.
llvm-svn: 23506
2005-09-28 22:29:58 +00:00
Chris Lattner
fab48b3285 All (xor *) cases are autogenerated now
llvm-svn: 23497
2005-09-28 18:12:37 +00:00