Commit Graph

99190 Commits

Author SHA1 Message Date
Kevin Enderby
2e13b1c7f1 Update the X86 assembler for .intel_syntax to accept
the | and & bitwise operators.

rdar://15570412

llvm-svn: 199323
2014-01-15 19:05:24 +00:00
Rafael Espindola
587940502b Make sure we create a new archive by deleting any stale ones first.
llvm-svn: 199319
2014-01-15 16:56:57 +00:00
Zoran Jovanovic
7d63392da9 LL and SC decoder method fix.
llvm-svn: 199316
2014-01-15 13:17:33 +00:00
Zoran Jovanovic
d4cb61cf0e Added support for LWU microMIPS instruction.
llvm-svn: 199315
2014-01-15 13:01:18 +00:00
Chandler Carruth
577322a0d3 Fix a bug in r199313 where I failed to restore CXXFLAGS. Doh! Not
*quite* ready to just slam C++11 on by default.

llvm-svn: 199314
2014-01-15 10:34:30 +00:00
Chandler Carruth
f8c6ccf85d Add a check to configure that the libstdc++ selected by Clang isn't
libstdc++v4.6. This is quite hard to test directly, so we test for it by
checking a known missing feature in that version that was added in v4.7.

This should prevent users from upgrading Clang but not GCC and hosting
with a too-old GCC's libstdc++ and getting strange and hard to debug
errors when we switch to C++11 by default.

Also, switch several of the macros I introduced to use AC_LANG_SOURCE
rather than AC_LANG_PROGRAM as we don't need configure's help writing
our main function (and we don't need such a function at all for most of
the tests).

llvm-svn: 199313
2014-01-15 10:31:15 +00:00
David Majnemer
dee105772c WinCOFF: Transform IR expressions featuring __ImageBase into image relative relocations
MSVC on x64 requires that we create image relative symbol
references to refer to RTTI data. Seeing as how there is no way to
explicitly make reference to a given relocation type in LLVM IR, pattern
match expressions of the form &foo - &__ImageBase.

Differential Revision: http://llvm-reviews.chandlerc.com/D2523

llvm-svn: 199312
2014-01-15 09:16:42 +00:00
Renato Golin
da3b5987ca Revert 199262 - MCJIT remote still failing on ARM
Disabling remote MCJIT tests on ARM again, as they're still failing when
self-hosting on ARM, despite all my tests. At least now we have more info
on what message it's breaking and what is going on. Investigating.

llvm-svn: 199310
2014-01-15 09:09:46 +00:00
Renato Golin
f7eddfeab5 Re-disable MCJIT remote tests on ARM
llvm-svn: 199309
2014-01-15 09:09:39 +00:00
NAKAMURA Takumi
242d46e845 Whitespace.
llvm-svn: 199305
2014-01-15 08:21:38 +00:00
Kostya Serebryany
317e2c499d replace LeakSanitizerIsTurnedOffForTheCurrentProcess with __lsan_is_turned_off, but this time hide it under __has_feature(address_sanitizer); also include <sanitizer/lsan_interface.h>
llvm-svn: 199303
2014-01-15 07:59:37 +00:00
Elena Demikhovsky
79b75d9048 Fixed identation.
llvm-svn: 199301
2014-01-15 07:18:11 +00:00
Andrew Trick
ee5aa7f71a Fix PR18449: SCEV needs more precise max BECount for multi-exit loop.
llvm-svn: 199299
2014-01-15 06:42:11 +00:00
Craig Topper
30a134b68d Add OpSize16 to the two byte forms of INC/DEC that we only use in 64-bit mode and a 64-bit only LEA. Even though we'll not be in 16-bit mode when we use them it makes their tables consistent with their 32-bit counterparts.
llvm-svn: 199297
2014-01-15 05:20:59 +00:00
Jiangning Liu
0a791c348b For AArch64, lowering sext_inreg and generate optimized code by using SXTL.
llvm-svn: 199296
2014-01-15 05:08:01 +00:00
Craig Topper
b7c7f38918 Simplify x86 disassembler table handling of when to use TYPE_Rv/TYPE_R16/TYPE_R32 now that HasOpSizePrefix only means 16-bit instructions.
llvm-svn: 199295
2014-01-15 05:02:02 +00:00
Hans Wennborg
4744ac1733 Switch-to-lookup tables: set threshold to 3 cases
There has been an old FIXME to find the right cut-off for when it's worth
analyzing and potentially transforming a switch to a lookup table.

The switches always have two or more cases. I could not measure any speed-up
by transforming a switch with two cases. A switch with three cases gets a nice
speed-up, and I couldn't measure any compile-time regression, so I think this
is the right threshold.

In a Clang self-host, this causes 480 new switches to be transformed,
and reduces the final binary size with 8 KB.

llvm-svn: 199294
2014-01-15 05:00:27 +00:00
Rafael Espindola
5cf521047f Check the error code and save a call to sys::fs::exists.
llvm-svn: 199293
2014-01-15 04:49:50 +00:00
Arnold Schwaighofer
dc4c9460a2 LoopVectorize: Only strip casts from integer types when replacing symbolic
strides

Fixes PR18480.

llvm-svn: 199291
2014-01-15 03:35:46 +00:00
Rafael Espindola
9d795caea4 Fix uninitialized variable.
llvm-svn: 199288
2014-01-15 03:27:26 +00:00
Rafael Espindola
26e917cde0 Only mark functions as micromips.
The GNU as behavior is a bit different and very strange. It will mark any
label that contains an instruction. We can implement that, but using the
type looks more natural since gas will not mark a function if a .word is
used to output the instructions!

llvm-svn: 199287
2014-01-15 03:07:12 +00:00
Hans Wennborg
d4245acf19 LangRef.rst: fix LangRef data layout text about m specifier, take 2
llvm-svn: 199286
2014-01-15 02:49:17 +00:00
Hans Wennborg
773353b174 LangRef: attempt to fix line breaks
The line breaks around the "m:<mangling>" text in the Data Layout section
look weird. Let's see if this helps.

llvm-svn: 199285
2014-01-15 02:30:37 +00:00
Weiming Zhao
fe26fd27b4 PR 18466: Fix ARM Pseudo Expansion
When expanding neon pseudo stores, it may miss the implicit uses of sub
regs, which may cause post RA scheduler reorder instructions that
breakes anti dependency.

For example:
  VST1d64QPseudo %R0<kill>, 16, %Q9_Q10, pred:14, pred:%noreg
  will be expanded to
    VST1d64Q %R0<kill>, 16, %D18, pred:14, pred:%noreg;

An instruction that defines %D20 may be scheduled before the store by
mistake.

This patches adds implicit uses for such case. For the example above, it
emits:
  VST1d64Q %R0<kill>, 8, %D18, pred:14, pred:%noreg, %Q9_Q10<imp-use>

llvm-svn: 199282
2014-01-15 01:32:12 +00:00
Rafael Espindola
8f31e213e4 Make parseBitcodeFile return an ErrorOr<Module *>.
llvm-svn: 199279
2014-01-15 01:08:23 +00:00
Eric Christopher
1ad8457570 Make sure we emit a relocation to the debug_ranges section in the
presence of CU ranges.

llvm-svn: 199276
2014-01-15 00:04:29 +00:00
Rafael Espindola
e9fab9b077 Return an error_code from materializeAllPermanently.
llvm-svn: 199275
2014-01-14 23:51:27 +00:00
Rafael Espindola
1d06f7208c Use error_code in Module::materializeAll.
llvm-svn: 199269
2014-01-14 23:02:01 +00:00
Renato Golin
fd99af508d Fix Remote MCJIT on Windows
llvm-svn: 199268
2014-01-14 22:59:11 +00:00
Eric Christopher
fb4a99cd0a Add testcase for r199263 forgotten in commit.
llvm-svn: 199267
2014-01-14 22:57:52 +00:00
Tim Northover
463a5f24d1 ARM: correctly determine final tBX_LR in Thumb1 functions
The changes caused by folding an sp-adjustment into a "pop" previously
disrupted the forward search for the final real instruction in a
terminating block. This switches to a backward search (skipping debug
instrs).

This fixes PR18399.

Patch by Zhaoshi.

llvm-svn: 199266
2014-01-14 22:53:28 +00:00
Tim Northover
6e219cd588 AArch64: don't try to handle [SU]MUL_LOHI nodes
We should set them to expand for now since there are no patterns
dealing with them. Actually, there are no instructions either so I
doubt they'll ever be acceptable.

llvm-svn: 199265
2014-01-14 22:53:22 +00:00
Joey Gouly
ad07d08c8d Add the lld root to llvm-lit, so llvm-lit can be used
to run lld tests individually.

llvm-svn: 199264
2014-01-14 22:52:24 +00:00
Eric Christopher
39cde8cc90 Enable use of ranges for translation units in the presence of
-ffunction-sections and update comments and TODOs about other
places that we should enable this.

llvm-svn: 199263
2014-01-14 22:44:17 +00:00
Renato Golin
4086bf7156 Re-enable remote MCJIT tests on ARMv7
llvm-svn: 199262
2014-01-14 22:43:49 +00:00
Renato Golin
695895ca9f Sanitize MCJIT remote execution
MCJIT remote execution (ChildTarget+RemoteTargetExternal) protocol was in
dire need of refactoring. It was fail-prone, had no error reporting and
implemented the same message logic on every single function.

This patch rectifies it, and makes it work on ARM, where it was randomly
failing. Other architectures shall profit from this change as well, making
their buildbots and releases more reliable.

llvm-svn: 199261
2014-01-14 22:43:43 +00:00
Matt Arsenault
2d353d1a10 Do pointer cast simplifications on addrspacecast
llvm-svn: 199254
2014-01-14 20:00:45 +00:00
Matt Arsenault
f08a44f903 Remove a check for an illegal condition.
Bitcasts can't be between address spaces anymore.

llvm-svn: 199253
2014-01-14 19:56:57 +00:00
Lang Hames
06234ec147 Add FPExt option to CCValAssign::LocInfo. When generating calling-convention
promotion code, Tablegen will now select FPExt for floating point promotions
(previously it had returned AExt, which is not valid for floating point types).

Any out-of-tree targets that were relying on AExt being returned for FP
promotions will need to update their code check for FPExt instead.

llvm-svn: 199252
2014-01-14 19:56:36 +00:00
Rafael Espindola
08ff298d51 Revert "[AArch64] Added vselect patterns with float and double types"
This reverts commit r199242.

It is causing CodeGen/AArch64/neon-bsl.ll to fail.

llvm-svn: 199248
2014-01-14 19:24:08 +00:00
Matt Arsenault
e55a2c2e6b Make nocapture analysis work with addrspacecast
llvm-svn: 199246
2014-01-14 19:11:52 +00:00
Rafael Espindola
6633d57ae4 Fix a low hanging use of hasRawTextSupport.
This also fixes the placement of the function label comment. It was being
placed next to the mips16 directive instead of next to the label.

llvm-svn: 199245
2014-01-14 18:57:12 +00:00
Duncan P. N. Exon Smith
93be7c4fb3 Reapply "LTO: add API to set strategy for -internalize"
Reapply r199191, reverted in r199197 because it carelessly broke
Other/link-opts.ll.  The problem was that calling
createInternalizePass("main") would select
createInternalizePass(bool("main")) instead of
createInternalizePass(ArrayRef<const char *>("main")).  This commit
fixes the bug.

The original commit message follows.

Add API to LTOCodeGenerator to specify a strategy for the -internalize
pass.

This is a new attempt at Bill's change in r185882, which he reverted in
r188029 due to problems with the gold linker.  This puts the onus on the
linker to decide whether (and what) to internalize.

In particular, running internalize before outputting an object file may
change a 'weak' symbol into an internal one, even though that symbol
could be needed by an external object file --- e.g., with arclite.

This patch enables three strategies:

- LTO_INTERNALIZE_FULL: the default (and the old behaviour).
- LTO_INTERNALIZE_NONE: skip -internalize.
- LTO_INTERNALIZE_HIDDEN: only -internalize symbols with hidden
  visibility.

LTO_INTERNALIZE_FULL should be used when linking an executable.

Outputting an object file (e.g., via ld -r) is more complicated, and
depends on whether hidden symbols should be internalized.  E.g., for
ld -r, LTO_INTERNALIZE_NONE can be used when -keep_private_externs, and
LTO_INTERNALIZE_HIDDEN can be used otherwise.  However,
LTO_INTERNALIZE_FULL is inappropriate, since the output object file will
eventually need to link with others.

lto_codegen_set_internalize_strategy() sets the strategy for subsequent
calls to lto_codegen_write_merged_modules() and lto_codegen_compile*().

<rdar://problem/14334895>

llvm-svn: 199244
2014-01-14 18:52:17 +00:00
Ana Pazos
787f540daa [AArch64] Added vselect patterns with float and double types
llvm-svn: 199242
2014-01-14 18:45:48 +00:00
Rafael Espindola
ed90030ffe Handle UIDs and GIDs that don't fit in 6 decimal places.
Newer unix systems have 32 bit uid and gid types, but the archive format was
not updated. Fortunately, these fields are not normally used. Just truncate
the data to fit in 6 chars.

llvm-svn: 199223
2014-01-14 17:02:09 +00:00
Zoran Jovanovic
9d176af731 Test case micromips-load-effective-address.s renamed to micromips-load-effective-address.ll and moved to test/CodeGen/Mips.
llvm-svn: 199221
2014-01-14 16:26:47 +00:00
Nico Rieck
c60647f0db Handle dllexport for global aliases
llvm-svn: 199219
2014-01-14 15:23:25 +00:00
Nico Rieck
7157bb765e Decouple dllexport/dllimport from linkage
Representing dllexport/dllimport as distinct linkage types prevents using
these attributes on templates and inline functions.

Instead of introducing further mixed linkage types to include linkonce and
weak ODR, the old import/export linkage types are replaced with a new
separate visibility-like specifier:

  define available_externally dllimport void @f() {}
  @Var = dllexport global i32 1, align 4

Linkage for dllexported globals and functions is now equal to their linkage
without dllexport. Imported globals and functions must be either
declarations with external linkage, or definitions with
AvailableExternallyLinkage.

llvm-svn: 199218
2014-01-14 15:22:47 +00:00
Elena Demikhovsky
767fc967b4 AVX-512: optimized scalar compare patterns
removed AVX512SI format, since it is similar to AVX512BI.

llvm-svn: 199217
2014-01-14 15:10:08 +00:00
Patrik Hagglund
682a10d4cc Fix valgrind warning for gcc builds.
Sorry, I don't understand why the warning is generated (a gcc
bug?). Anyhow, the change should improve readablity. No functionality
change intended.

llvm-svn: 199214
2014-01-14 14:09:00 +00:00