Commit Graph

21 Commits

Author SHA1 Message Date
Vikram S. Adve
03fae5e5db Eliminate most uses of the machine instruction vector for each LLVM instr,
since some m. instr. may be generated by LLVM instrs. in other blocks.
Handle non-SSA (anti and output) edges and true edges uniformly by
working with machine instructions alone.

llvm-svn: 1269
2001-11-12 18:53:43 +00:00
Vikram S. Adve
dff0a891c1 Major improvement to how nodes are built for a BB.
LLVM instruction is no longer recorded in each node, but BB is.

llvm-svn: 1262
2001-11-12 14:18:01 +00:00
Vikram S. Adve
6cd83556e6 Only add true dep. edges from an earlier to a later instruction.
This wasn't a problem until we started putting copies for Phi values
that produced cycles in the SchedGraph!

llvm-svn: 1254
2001-11-11 01:23:27 +00:00
Vikram S. Adve
621b90440b Major change to how defs are found when adding dependences (they
are now found as part of the initial walk of the machine code).
Also memory load/store instructions can be generated for non-memory
LLVM instructions, which wasn't handled before.  It is now.

llvm-svn: 1199
2001-11-08 05:20:23 +00:00
Vikram S. Adve
596721384b Modified graph construction to use one pass to find all defs.
Avoids having to handle some special cases that cause complex interactions
with instr. selection.

llvm-svn: 1138
2001-11-05 04:04:23 +00:00
Vikram S. Adve
df6913549a Add edges between call instructions and (a) load/store instructions, and
(b) any instructions that use or set CC registers.  Whether or not the
latter are needed really should be machine-dependent.

llvm-svn: 1008
2001-10-28 21:43:33 +00:00
Vikram S. Adve
59cbb6498c *** empty log message ***
llvm-svn: 857
2001-10-17 23:53:16 +00:00
Chris Lattner
2b3369567e * Fix privacy issues on RegToRefVecMap
* Fix initialization order problems...

llvm-svn: 762
2001-10-13 06:51:01 +00:00
Vikram S. Adve
1235b330f7 Add graph edges due to implicit refs in each machine instruction.
llvm-svn: 724
2001-10-11 04:22:45 +00:00
Vikram S. Adve
d50b665acf Don't insert useful instructions in delay slot of a RETURN.
llvm-svn: 721
2001-10-10 20:58:11 +00:00
Chris Lattner
da55810666 Commit more code over to new cast style
llvm-svn: 697
2001-10-02 03:41:24 +00:00
Chris Lattner
3856934386 Convert more code to use new style casts
Eliminate old style casts from value.h

llvm-svn: 696
2001-10-01 20:11:19 +00:00
Chris Lattner
4b717c0edc Add support for new style casts
llvm-svn: 694
2001-10-01 16:18:37 +00:00
Vikram S. Adve
2b2ca42761 Two bug fixes:
(1) Add edges for Values that are written by multiple m/c instructions
(2) Add edges for LLVM operands that are not machine operands (e.g., Call args)

llvm-svn: 676
2001-09-30 23:36:58 +00:00
Vikram S. Adve
3e8029dc07 Moved erase edge functions to class SchedGraph.
Add new dummy edges when deleting existing edges.

llvm-svn: 609
2001-09-18 12:50:40 +00:00
Chris Lattner
8d44b99844 Chris seems fond of #include <vector>. Fix these. Also convert use list in
Value to a vector instead of a list.

Move SchedGraph.h & SchedPriorities.h into lib/CodeGen/InstrScheduling

llvm-svn: 572
2001-09-14 16:56:32 +00:00
Chris Lattner
87b3bf630b Split Target/Machine.h into three files:
* Machine.h
* InstInfo.h
* SchedInfo.h

TODO: Split out reg info stuff
llvm-svn: 567
2001-09-14 06:08:03 +00:00
Chris Lattner
22a6a90511 Make a new llvm/Target #include directory.
Move files from lib/CodeGen/TargetMachine to lib/Target
Move TargetData.h and TargetMachine.h to Target/{Data.h|Machine.h}
Prepare to split TargetMachine.h into several smaller files

llvm-svn: 566
2001-09-14 05:34:53 +00:00
Chris Lattner
44a45af61b Use predicate for Value type test
llvm-svn: 540
2001-09-10 20:09:28 +00:00
Chris Lattner
b7d0c37f5c Remove unnecesary #include add dump calls pulled out of .h file
llvm-svn: 488
2001-09-07 21:21:03 +00:00
Vikram S. Adve
754c4dd6ae Scheduling DAG for instruction scheduling. Currently for a single basic block.
llvm-svn: 394
2001-08-28 23:06:02 +00:00