Commit Graph

39 Commits

Author SHA1 Message Date
Tres Popp
9adc64539f [mlir] Add std.powf to ROCDL lowering.
Differential Revision: https://reviews.llvm.org/D93313
2020-12-15 18:47:49 +01:00
Frederik Gossen
1c6bc2c0b5 [MLIR] Add lowerings for atan and atan2 to ROCDL intrinsics
Differential Revision: https://reviews.llvm.org/D93123
2020-12-14 10:43:19 +01:00
Adrian Kuegel
9122070563 [mlir] Expose target configuration for lowering to ROCDL.
Differential Revision: https://reviews.llvm.org/D93028
2020-12-11 13:20:53 +01:00
Adrian Kuegel
ada4c7a351 Add rsqrt lowering from standard to ROCDL.
Add a lowering for rsqrt from standard dialect to ROCDL.

Differential Revision: https://reviews.llvm.org/D93011
2020-12-11 13:18:57 +01:00
Adrian Kuegel
09f717b929 Add sqrt lowering from standard to ROCDL
Add a lowering for sqrt from standard dialect to ROCDL.

Differential Revision: https://reviews.llvm.org/D92921
2020-12-10 09:47:37 +01:00
Adrian Kuegel
a719eef73e MLIR: Remove TanhOp from ops list. It caused a build failure. 2020-11-11 14:58:55 +01:00
Adrian Kuegel
5248047c93 MLIR: add SinOp Lowering to __ocml_sin_f32 and __ocml_sin_f64
This mimics the recent similar patch for GPUToNVVM.

Differential Revision: https://reviews.llvm.org/D91252
2020-11-11 14:38:23 +01:00
River Riddle
3fffffa882 [mlir][Pattern] Add a new FrozenRewritePatternList class
This class represents a rewrite pattern list that has been frozen, and thus immutable. This replaces the uses of OwningRewritePatternList in pattern driver related API, such as dialect conversion. When PDL becomes more prevalent, this API will allow for optimizing a set of patterns once without the need to do this per run of a pass.

Differential Revision: https://reviews.llvm.org/D89104
2020-10-26 18:01:06 -07:00
River Riddle
b6eb26fd0e [mlir][NFC] Move around the code related to PatternRewriting to improve layering
There are several pieces of pattern rewriting infra in IR/ that really shouldn't be there. This revision moves those pieces to a better location such that they are easier to evolve in the future(e.g. with PDL). More concretely this revision does the following:

* Create a Transforms/GreedyPatternRewriteDriver.h and move the apply*andFold methods there.
The definitions for these methods are already in Transforms/ so it doesn't make sense for the declarations to be in IR.

* Create a new lib/Rewrite library and move PatternApplicator there.
This new library will be focused on applying rewrites, and will also include compiling rewrites with PDL.

Differential Revision: https://reviews.llvm.org/D89103
2020-10-26 18:01:06 -07:00
Nicolas Vasilache
422aaf31da [mlir][Linalg] Add named Linalg ops on tensor to buffer support.
This revision introduces support for buffer allocation for any named linalg op.
To avoid template instantiating many ops, a new ConversionPattern is created to capture the LinalgOp interface.

Some APIs are updated to remain consistent with MLIR style:
`OwningRewritePatternList * -> OwningRewritePatternList &`
`BufferAssignmentTypeConverter * -> BufferAssignmentTypeConverter &`

Differential revision: https://reviews.llvm.org/D89226
2020-10-12 11:20:23 +00:00
Rob Suderman
5556575230 Added std.floor operation to match std.ceil
There should be an equivalent std.floor op to std.ceil. This includes
matching lowerings for SPIRV, NVVM, ROCDL, and LLVM.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D85940
2020-08-18 10:25:32 -07:00
River Riddle
9db53a1827 [mlir][NFC] Remove usernames and google bug numbers from TODO comments.
These were largely leftover from when MLIR was a google project, and don't really follow LLVM guidelines.
2020-07-07 01:40:52 -07:00
Tobias Gysi
10643c9ad8 [mlir] make the bitwidth of device side index computations configurable (reland)
Summary:
The patch makes the index type lowering of the GPU to NVVM/ROCDL conversion configurable. It introduces a pass option that controls the bitwidth used when lowering index computations and uses the LowerToLLVMOptions structure to control the Standard to LLVM lowering.

This commit fixes a use-after-free bug introduced by the reverted commit d10b1a3. It implements the following changes:
- Added a getDefaultOptions method to the LowerToLLVMOptions struct that returns a reference to statically allocated default options.
- Use the getDefaultOptions method to provide default LowerToLLVMOptions (instead of an initializer list).
- Added comments to clarify the required lifetime of the LowerToLLVMOptions

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D82475
2020-06-29 12:22:39 +02:00
Tobias Gysi
2ff6fad700 Revert "[mlir] make the bitwidth of device side index computations configurable"
This reverts commit d10b1a38a7.
2020-06-23 19:21:36 +02:00
Tobias Gysi
d10b1a38a7 [mlir] make the bitwidth of device side index computations configurable
The patch makes the index type lowering of the GPU to NVVM/ROCDL
conversion configurable. It introduces a pass option that controls the
bitwidth used when lowering index computations.

Differential Revision: https://reviews.llvm.org/D80285
2020-06-22 11:43:37 +02:00
River Riddle
8d67d187ba [mlir][DialectConversion] Refactor how block argument types get converted
This revision removes the TypeConverter parameter passed to the apply* methods, and instead moves the responsibility of region type conversion to patterns. The types of a region can be converted using the 'convertRegionTypes' method, which acts similarly to the existing 'applySignatureConversion'. This method ensures that all blocks within, and including those moved into, a region will have the block argument types converted using the provided converter.

This has the benefit of making more of the legalization logic controlled by patterns, instead of being handled explicitly by the driver. It also opens up the possibility to support multiple type conversions at some point in the future.

This revision also adds a new utility class `FailureOr<T>` that provides a LogicalResult friendly facility for returning a failure or a valid result value.

Differential Revision: https://reviews.llvm.org/D81681
2020-06-18 15:59:22 -07:00
jerryyin
2abad3433f [mlir][rocdl] Adding vector to ROCDL dialect lowering
* Created the vector to ROCDL lowering pass
  * The lowering pass lowers vector transferOps to rocdl mubufOps
* Added unit test and functional test
2020-06-11 14:28:13 +00:00
Wen-Heng (Jack) Chung
bc23c1d85e [mlir][rocdl] add rocdl.barier op.
- Add rocdl.barrier op.
- Lower gpu.barier to rocdl.barrier in -convert-gpu-to-rocdl.

Differential Revision: https://reviews.llvm.org/D79126
2020-05-04 10:35:01 +02:00
Wen-Heng (Jack) Chung
9ad5e57316 [mlir][nvvm][rocdl] refactor NVVM and ROCDL dialect. NFC.
- Extract common logic between -convert-gpu-to-nvvm and -convert-gpu-to-rocdl.
- Cope with the fact that alloca operates on different addrspaces between NVVM
  and ROCDL.
- Modernize unit tests for ROCDL dialect.

Differential Revision: https://reviews.llvm.org/D79021
2020-05-01 00:13:26 +02:00
River Riddle
1834ad4a69 [mlir][Pass] Update the PassGen to generate base classes instead of utilities
Summary:
This is much cleaner, and fits the same structure as many other tablegen backends. This was not done originally as the CRTP in the pass classes made it overly verbose/complex.

Differential Revision: https://reviews.llvm.org/D77367
2020-04-07 14:08:52 -07:00
River Riddle
80aca1eaf7 [mlir][Pass] Remove the use of CRTP from the Pass classes
This revision removes all of the CRTP from the pass hierarchy in preparation for using the tablegen backend instead. This creates a much cleaner interface in the C++ code, and naturally fits with the rest of the infrastructure. A new utility class, PassWrapper, is added to replicate the existing behavior for passes not suitable for using the tablegen backend.

Differential Revision: https://reviews.llvm.org/D77350
2020-04-07 14:08:52 -07:00
River Riddle
9a277af2d4 [mlir][Pass] Add support for generating pass utilities via tablegen
This revision adds support for generating utilities for passes such as options/statistics/etc. that can be inferred from the tablegen definition. This removes additional boilerplate from the pass, and also makes it easier to remove the reliance on the pass registry to provide certain things(e.g. the pass argument).

Differential Revision: https://reviews.llvm.org/D76659
2020-04-01 02:10:46 -07:00
River Riddle
3dddd8969f [mlir][Pass] Move the registration of conversion passes to tablegen
This removes the need to statically register conversion passes, and also puts all of the conversions within one centralized file.

Differential Revision: https://reviews.llvm.org/D76658
2020-04-01 02:10:46 -07:00
Marcel Koester
2b529a396d [mlir] Removed TanHOp lowering from ConvertStandardToLLVM since there is no reasonable TanH representation in LLVM.
Summary: The current ConvertStandardToLLVM phase lowers the standard TanHOp to function calls to external tanh symbols. However, this leads to misunderstandings since these external symbols are not defined anywhere. This commit removes the TanHOp lowering functionality from ConvertStandardToLLVM, adapts the LowerGpuOpsToNVVMOps and LowerGpuOpsToROCDLOps passes and adjusts the affected test cases.

Reviewers: mravishankar, herhut

Subscribers: jholewinski, mehdi_amini, rriddle, jpienaar, burmako, shauheen, antiagainst, nicolasvasilache, csigg, arpith-jacob, mgester, lucyrfox, aartbik, liufengdb, Joonsoo, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D75509
2020-03-25 16:43:45 +01:00
Adrian Kuegel
39e1c1fa9e Add GPU lowerings for the different log ops.
Summary: This adds GPU lowerings for log, log10 and log2.

Reviewers: mravishankar, herhut

Subscribers: jholewinski, mehdi_amini, rriddle, jpienaar, burmako, shauheen, antiagainst, nicolasvasilache, csigg, arpith-jacob, mgester, lucyrfox, liufengdb, Joonsoo, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D75239
2020-02-27 15:25:02 +01:00
Stephan Herhut
890d5e2dd2 [MLIR][GPU] Disallow llvm tanh intrinsics when lowering to NVVM/ROCm.
Summary:
The lowering to NVVM and ROCm handles tanh operations differently by
mapping them to NVVM/ROCm specific intrinsics. This conflicts with
the lowering to LLVM, which uses the default llvm intrinsic. This change
declares the LLVM intrinsics to be illegal, hence disallowing the
correspondign rewrite.

Differential Revision: https://reviews.llvm.org/D74389
2020-02-11 15:09:30 +01:00
Julian Gross
addc27bc43 Changed wrong ROCDL instructions in GPU lowering.
Summary:
In the scope of the lowering phase from GPU to ROCDL, the intructions for the conversion patterns seems to be wrong.
According to https://github.com/ROCm-Developer-Tools/HIP/blob/master/include/hip/hcc_detail/math_fwd.h the instructions need two underscores in the beginning instead of one.

Reviewers: nicolasvasilache, herhut, rriddle

Reviewed By: herhut, rriddle

Subscribers: merge_guards_bot, mehdi_amini, rriddle, jpienaar, burmako, shauheen, antiagainst, csigg, arpith-jacob, mgester, lucyrfox, herhut, liufengdb, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D73535
2020-01-30 15:37:00 +01:00
Julian Gross
664d2f5bad Add tanh lowering from Standard dialect to NVVM and ROCDL.
Summary:
The tanh lowering from Standard dialect to NVVM and ROCDL was not working.
The conversion pattern are inserted in the lowering files.
The test cases for the lowerings were added in the test files.

Reviewers: nicolasvasilache, ftynse, herhut

Reviewed By: ftynse, herhut

Subscribers: merge_guards_bot, ftynse, jholewinski, mehdi_amini, rriddle, jpienaar, burmako, shauheen, antiagainst, csigg, arpith-jacob, mgester, lucyrfox, herhut, liufengdb, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D73471
2020-01-28 11:01:10 +01:00
Mehdi Amini
308571074c Mass update the MLIR license header to mention "Part of the LLVM project"
This is an artifact from merging MLIR into LLVM, the file headers are
now aligned with the rest of the project.
2020-01-26 03:58:30 +00:00
Tres Popp
9a52ea5cf9 Create a gpu.module operation for the GPU Dialect.
Summary:
This is based on the use of code constantly checking for an attribute on
a model and instead represents the distinct operaion with a different
op. Instead, this op can be used to provide better filtering.

Reverts "Revert "[mlir] Create a gpu.module operation for the GPU Dialect.""

This reverts commit ac446302ca4145cdc89f377c0c364c29ee303be5 after
fixing internal Google issues.

This additionally updates ROCDL lowering to use the new gpu.module.

Reviewers: herhut, mravishankar, antiagainst, nicolasvasilache

Subscribers: jholewinski, mgorny, mehdi_amini, jpienaar, burmako, shauheen, csigg, arpith-jacob, mgester, lucyrfox, aartbik, liufengdb, llvm-commits, mravishankar, rriddle, antiagainst, bkramer

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D72921
2020-01-21 14:05:03 +01:00
Benjamin Kramer
a2cd4fe6bf Unbreak the mlir build after 202ab273e6 2020-01-13 19:18:43 +01:00
Julian Gross
202ab273e6 [mlir] Added missing GPU lowering ops.
Summary:
This diff adds missing GPU lowering ops to MLIR.

Reviewers: herhut, pifon2a, ftynse

Tags: #pre-merge_beta_testing, #llvm

Differential Revision: https://reviews.llvm.org/D72439
2020-01-13 17:10:54 +01:00
Mehdi Amini
56222a0694 Adjust License.txt file to use the LLVM license
PiperOrigin-RevId: 286906740
2019-12-23 15:33:37 -08:00
Alex Zinenko
b8dc3fd812 Rename CLI flags -lower-gpu-ops-to-*-ops to -convert-gpu-to-*
This makes the flags consistent with the naming scheme used elsewhere in the
codebase for dialect conversions.

PiperOrigin-RevId: 281027517
2019-11-18 02:43:10 -08:00
Alexander Belyaev
d2ce435dba Add custom lowering of ExpOp for NVVM and ROCM.
PiperOrigin-RevId: 276440911
2019-10-24 01:41:57 -07:00
Christian Sigg
b74af4aa5c Unify GPU op definition names with other dialects.
Rename GPU op names from gpu_Foo to GPU_FooOp.

PiperOrigin-RevId: 275882232
2019-10-21 11:10:56 -07:00
Deven Desai
d064469f6f Moving the GPUIndexIntrinsicOpLowering template to a common location
The GPUIndexIntrinsicOpLowering template is currently used by the code in both the GPUToNVVM and GPUToROCDL dirs.
Moving it to a common location to remove code duplication.

Closes tensorflow/mlir#163

COPYBARA_INTEGRATE_REVIEW=https://github.com/tensorflow/mlir/pull/163 from deven-amd:deven-refactor-gpu-index-ops-lowering b8dc2a5f5353df196039b6ff2ad42106028693ed
PiperOrigin-RevId: 272863297
2019-10-04 06:20:05 -07:00
Christian Sigg
85dcaf19c7 Fix typos, NFC.
PiperOrigin-RevId: 272851237
2019-10-04 04:37:53 -07:00
Deven Desai
e81b3129b4 [ROCm] Adding pass to lower GPU Dialect to ROCDL Dialect.
This is a follow-up to the PRtensorflow/mlir#146 which introduced the ROCDL Dialect. This PR introduces a pass to lower GPU Dialect to the ROCDL Dialect. As with the previous PR, this one builds on the work done by @whchung, and addresses most of the review comments in the original PR.

Closes tensorflow/mlir#154

COPYBARA_INTEGRATE_REVIEW=https://github.com/tensorflow/mlir/pull/154 from deven-amd:deven-lower-gpu-to-rocdl 809893e08236da5ab6a38e3459692fa04247773d
PiperOrigin-RevId: 272390729
2019-10-02 01:50:30 -07:00