# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py # RUN: llc -O2 -mtriple=x86_64-unknown-unknown -mattr=+amx-tile,+amx-bf16,+avx512f, \ # RUN: -mattr=+amx-transpose -run-pass=tilepreconfig -o - %s | FileCheck %s --- name: test_tile_2rpntlvwz0 alignment: 16 exposesReturnsTwice: false legalized: false regBankSelected: false selected: false failedISel: false tracksRegLiveness: true hasWinCFI: false callsEHReturn: false callsUnwindInit: false hasEHCatchret: false hasEHScopes: false hasEHFunclets: false failsVerification: false tracksDebugUserValues: false registers: - { id: 0, class: gr32, preferred-register: '' } - { id: 1, class: gr32, preferred-register: '' } - { id: 2, class: gr32, preferred-register: '' } - { id: 3, class: gr16, preferred-register: '' } - { id: 4, class: gr16, preferred-register: '' } - { id: 5, class: gr16, preferred-register: '' } - { id: 6, class: gr64, preferred-register: '' } - { id: 7, class: gr64_nosp, preferred-register: '' } - { id: 8, class: tilepair, preferred-register: '' } - { id: 9, class: tile, preferred-register: '' } - { id: 10, class: tile, preferred-register: '' } - { id: 11, class: tile, preferred-register: '' } - { id: 12, class: tile, preferred-register: '' } - { id: 13, class: gr64, preferred-register: '' } liveins: - { reg: '$edi', virtual-reg: '%0' } - { reg: '$esi', virtual-reg: '%1' } - { reg: '$edx', virtual-reg: '%2' } frameInfo: isFrameAddressTaken: false isReturnAddressTaken: false hasStackMap: false hasPatchPoint: false stackSize: 0 offsetAdjustment: 0 maxAlignment: 1 adjustsStack: false hasCalls: false stackProtector: '' functionContext: '' maxCallFrameSize: 4294967295 cvBytesOfCalleeSavedRegisters: 0 hasOpaqueSPAdjustment: false hasVAStart: false hasMustTailInVarArgFunc: false hasTailCall: false localFrameSize: 0 savePoint: '' restorePoint: '' fixedStack: [] stack: [] callSites: [] debugValueSubstitutions: [] constants: [] machineFunctionInfo: amxProgModel: ManagedRA body: | bb.0.entry: liveins: $edi, $esi, $edx, $rax, $rbx ; CHECK-LABEL: name: test_tile_2rpntlvwz0 ; CHECK: liveins: $edi, $esi, $edx, $rax, $rbx ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: [[AVX512_512_SET0_:%[0-9]+]]:vr512 = AVX512_512_SET0 ; CHECK-NEXT: VMOVUPSZmr %stack.0, 1, $noreg, 0, $noreg, [[AVX512_512_SET0_]] :: (store (s512) into %stack.0, align 4) ; CHECK-NEXT: MOV8mi %stack.0, 1, $noreg, 0, $noreg, 1 :: (store (s512) into %stack.0, align 4) ; CHECK-NEXT: [[COPY:%[0-9]+]]:gr32 = COPY $edx ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gr32 = COPY $esi ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gr32 = COPY $edi ; CHECK-NEXT: [[COPY3:%[0-9]+]]:gr16 = COPY [[COPY]].sub_16bit ; CHECK-NEXT: [[COPY4:%[0-9]+]]:gr16 = COPY [[COPY1]].sub_16bit ; CHECK-NEXT: [[COPY5:%[0-9]+]]:gr16 = COPY [[COPY2]].sub_16bit ; CHECK-NEXT: PLDTILECFGV %stack.0, 1, $noreg, 0, $noreg, implicit-def $tmm0, implicit-def $tmm1, implicit-def $tmm2, implicit-def $tmm3, implicit-def $tmm4, implicit-def $tmm5, implicit-def $tmm6, implicit-def $tmm7 :: (load (s512) from %stack.0, align 4) ; CHECK-NEXT: [[COPY6:%[0-9]+]]:gr64 = COPY $rax ; CHECK-NEXT: [[MOV32ri64_:%[0-9]+]]:gr64_nosp = MOV32ri64 32 ; CHECK-NEXT: [[PT2RPNTLVWZ0V:%[0-9]+]]:tilepair = PT2RPNTLVWZ0V [[COPY5]], [[COPY4]], [[COPY3]], killed [[COPY6]], 1, [[MOV32ri64_]], 0, $noreg ; CHECK-NEXT: [[COPY7:%[0-9]+]]:tile = COPY [[PT2RPNTLVWZ0V]].sub_t1 ; CHECK-NEXT: [[COPY8:%[0-9]+]]:tile = COPY [[PT2RPNTLVWZ0V]].sub_t0 ; CHECK-NEXT: [[PTILEZEROV:%[0-9]+]]:tile = PTILEZEROV [[COPY5]], [[COPY4]] ; CHECK-NEXT: [[PTDPBSSDV:%[0-9]+]]:tile = PTDPBSSDV [[COPY5]], [[COPY3]], [[COPY4]], [[PTILEZEROV]], killed [[COPY8]], killed [[COPY7]] ; CHECK-NEXT: [[COPY9:%[0-9]+]]:gr64 = COPY $rbx ; CHECK-NEXT: PTILESTOREDV [[COPY5]], [[COPY4]], killed [[COPY9]], 1, [[MOV32ri64_]], 0, $noreg, killed [[PTDPBSSDV]] ; CHECK-NEXT: RET 0 %2:gr32 = COPY $edx %1:gr32 = COPY $esi %0:gr32 = COPY $edi %3:gr16 = COPY %2.sub_16bit %4:gr16 = COPY %1.sub_16bit %5:gr16 = COPY %0.sub_16bit %6:gr64 = COPY $rax %7:gr64_nosp = MOV32ri64 32 %8:tilepair = PT2RPNTLVWZ0V %5, %4, %3, killed %6, 1, %7, 0, $noreg %9:tile = COPY %8.sub_t1 %10:tile = COPY %8.sub_t0 %11:tile = PTILEZEROV %5, %4 %12:tile = PTDPBSSDV %5, %3, %4, %11, killed %10, killed %9 %13:gr64 = COPY $rbx PTILESTOREDV %5, %4, killed %13, 1, %7, 0, $noreg, killed %12 RET 0 ...