; NOTE: Assertions have been autogenerated by utils/update_test_checks.py ; RUN: opt -O2 -S < %s -enable-new-pm=0 | FileCheck %s ; RUN: opt -passes='default' -S < %s | FileCheck %s define i64 @PR36760(i64 %a) { ; CHECK-LABEL: @PR36760( ; CHECK-NEXT: entry: ; CHECK-NEXT: [[TMP0:%.*]] = icmp sgt i64 [[A:%.*]], 0 ; CHECK-NEXT: [[DOTA:%.*]] = select i1 [[TMP0]], i64 [[A]], i64 0 ; CHECK-NEXT: ret i64 [[DOTA]] ; entry: %retval = alloca i64, align 8 %a.addr = alloca i64, align 8 store i64 %a, i64* %a.addr, align 8 %0 = load i64, i64* %a.addr, align 8 %cmp = icmp slt i64 %0, 0 br i1 %cmp, label %if.then, label %if.end if.then: store i64 0, i64* %retval, align 8 br label %return if.end: %1 = load i64, i64* %a.addr, align 8 %shr = ashr i64 %1, 63 %2 = load i64, i64* %a.addr, align 8 %xor = xor i64 %shr, %2 store i64 %xor, i64* %retval, align 8 br label %return return: %3 = load i64, i64* %retval, align 8 ret i64 %3 } define i64 @PR36760_2(i64 %a) #0 { ; CHECK-LABEL: @PR36760_2( ; CHECK-NEXT: entry: ; CHECK-NEXT: [[TMP0:%.*]] = icmp slt i64 [[A:%.*]], -1 ; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[TMP0]], i64 [[A]], i64 -1 ; CHECK-NEXT: [[RETVAL_0:%.*]] = xor i64 [[TMP1]], -1 ; CHECK-NEXT: ret i64 [[RETVAL_0]] ; entry: %retval = alloca i64, align 8 %a.addr = alloca i64, align 8 store i64 %a, i64* %a.addr, align 8 %0 = load i64, i64* %a.addr, align 8 %cmp = icmp sge i64 %0, 0 br i1 %cmp, label %if.then, label %if.end if.then: ; preds = %entry store i64 0, i64* %retval, align 8 br label %return if.end: ; preds = %entry %1 = load i64, i64* %a.addr, align 8 %shr = ashr i64 %1, 63 %2 = load i64, i64* %a.addr, align 8 %xor = xor i64 %shr, %2 store i64 %xor, i64* %retval, align 8 br label %return return: ; preds = %if.end, %if.then %3 = load i64, i64* %retval, align 8 ret i64 %3 }