; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
; RUN: opt -S -passes=loop-vectorize -mtriple=s390x-linux-gnu -vectorizer-min-trip-count=8 < %s | FileCheck %s

define i32 @main(i32 %arg, ptr nocapture readnone %arg1) #0 {
; CHECK-LABEL: define i32 @main(
; CHECK-SAME: i32 [[ARG:%.*]], ptr nocapture readnone [[ARG1:%.*]]) #[[ATTR0:[0-9]+]] {
; CHECK-NEXT:  [[ENTRY:.*]]:
; CHECK-NEXT:    [[TMP0:%.*]] = alloca i8, align 1
; CHECK-NEXT:    br label %[[LOOP:.*]]
; CHECK:       [[LOOP]]:
; CHECK-NEXT:    [[STOREMERGE_I_I:%.*]] = phi i8 [ 0, %[[ENTRY]] ], [ [[TMP12_I_I:%.*]], %[[LOOP]] ]
; CHECK-NEXT:    store i8 [[STOREMERGE_I_I]], ptr [[TMP0]], align 2
; CHECK-NEXT:    [[TMP8_I_I:%.*]] = icmp ult i8 [[STOREMERGE_I_I]], 8
; CHECK-NEXT:    [[TMP12_I_I]] = add nuw nsw i8 [[STOREMERGE_I_I]], 1
; CHECK-NEXT:    br i1 [[TMP8_I_I]], label %[[LOOP]], label %[[RET:.*]]
; CHECK:       [[RET]]:
; CHECK-NEXT:    ret i32 0
;
entry:
  %0 = alloca i8, align 1
  br label %loop

loop:
  %storemerge.i.i = phi i8 [ 0, %entry ], [ %tmp12.i.i, %loop ]
  store i8 %storemerge.i.i, ptr %0, align 2
  %tmp8.i.i = icmp ult i8 %storemerge.i.i, 8
  %tmp12.i.i = add nuw nsw i8 %storemerge.i.i, 1
  br i1 %tmp8.i.i, label %loop, label %ret

ret:
  ret i32 0
}

attributes #0 = { "target-cpu"="z13" }