4fb131b497
The COFF driver produces an ABSOLUTE relocation base for an ADDR32 relocation type and the system is 64 bits (machine=AMD64). The relocation information won't be added in the output and could produce an incorrect address access during run-time. This change set checks if the relocation type is IMAGE_REL_AMD64_ADDR32 and if so, adds the relocated symbol as IMAGE_REL_BASED_HIGHLOW base. Differential Revision: https://reviews.llvm.org/D96619
43 lines
1013 B
ArmAsm
43 lines
1013 B
ArmAsm
# REQUIRES: x86
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# RUN: llvm-mc %s -filetype=obj -o %t.obj -triple=x86_64-windows-msvc
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# RUN: lld-link /entry:main /out:%t.exe /LARGEADDRESSAWARE:NO %t.obj
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# RUN: llvm-readobj --coff-basereloc %t.exe | FileCheck %s --check-prefix=CHECKPASS
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# This test case checks that the "ADDR32" relocation symbol is collected
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# when linking a 64bit executable, and the output contains the HIGHLOW
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# relocated symbol.
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# Check that the HIGHLOW relocation base type is in the generated executable
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# CHECKPASS: Format: COFF-x86-64
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# CHECKPASS: Arch: x86_64
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# CHECKPASS: AddressSize: 64bit
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# CHECKPASS: BaseReloc
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# CHECKPASS: Entry {
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# CHECKPASS-NEXT: Type: HIGHLOW
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.text
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.def main;
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.scl 2;
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.type 32;
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.endef
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.intel_syntax noprefix
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.globl main
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.p2align 4, 0x90
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main: # @main
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sub rsp, 40
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mov dword ptr [rip + arr + 24], 7
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mov eax, 1
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mov ecx, 20
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mov eax, dword ptr [rcx + 4 * rax + arr]
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ret
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.globl arr
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.p2align 4
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arr:
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.zero 40
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