2044e4c53e
Summary of changes: - Update MUBUF lds syntax (see https://reviews.llvm.org/D124485). - Add v_cvt_pkrtz_f16_f32_dpp, v_cvt_pkrtz_f16_f32_sdwa. - Update SMEM syntax (see https://reviews.llvm.org/D127314). - Enable op_sel for v_add_nc_u16, v_sub_nc_u16 (see https://reviews.llvm.org/D123594). - Minor bug fixing and improvements.
23 lines
924 B
ReStructuredText
23 lines
924 B
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* Automatically generated file, do not edit! *
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.. _amdgpu_synid_gfx1030_soffset_73dae7:
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soffset
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=======
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An offset from the base address.
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* If offset is specified as a register, it supplies an unsigned byte offset.
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* If offset is specified as a 21-bit immediate, it supplies a signed byte offset.
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Note that an *immediate* offset may be specified using either :ref:`simm21<amdgpu_synid_simm21>` operand or :ref:`offset21s<amdgpu_synid_smem_offset21s>` modifier, but not both.
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*Size:* 1 dword.
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*Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`null<amdgpu_synid_null>`, :ref:`m0<amdgpu_synid_m0>`, :ref:`simm21<amdgpu_synid_simm21>`
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