cc426402be
Summary of changes: - Enable register tuples with 9, 10, 11 and 12 registers (https://reviews.llvm.org/D138205). - Enable tfe modifier for MUBUF loads (https://reviews.llvm.org/D137783). - Enable abs and neg modifiers for v_cndmask_b32_e64. - Minor corrections and improvements.
20 lines
689 B
ReStructuredText
20 lines
689 B
ReStructuredText
..
|
|
**************************************************
|
|
* *
|
|
* Automatically generated file, do not edit! *
|
|
* *
|
|
**************************************************
|
|
|
|
.. _amdgpu_synid_gfx7_vaddr_887f26:
|
|
|
|
vaddr
|
|
=====
|
|
|
|
Image address which includes from one to four dimensional coordinates and other data used to locate a position in the image.
|
|
|
|
*Size:* 1-12 dwords. Actual size depends on opcode and specific image being handled.
|
|
|
|
Note. Image format and dimensions are encoded in the image resource constant, but not in the instruction.
|
|
|
|
*Operands:* :ref:`v<amdgpu_synid_v>`
|