564d47db9e
Summary of changes: - Enable register tuples with 9, 10, 11 and 12 registers (https://reviews.llvm.org/D138205). - Enable abs and neg modifiers for v_cndmask_b32 (https://reviews.llvm.org/D135900). - Correct v_mov_b32_sdwa (it does not support abs and neg input modifiers yet). - Enable tfe modifier for MUBUF loads (https://reviews.llvm.org/D137783). - Minor corrections and improvements.
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595 B
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21 lines
595 B
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* Automatically generated file, do not edit! *
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.. _amdgpu_synid_gfx8_vdst_d809e2:
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vdst
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====
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Instruction output: data read from a memory buffer and converted to 16-bit format.
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*Size:* depends on GFX8 GPU revision:
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* 2 dwords for GFX8.0. This H/W supports no packing.
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* 1 dword for GFX8.1+. This H/W supports data packing.
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*Operands:* :ref:`v<amdgpu_synid_v>`
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